2 * Copyright (c) 1990 The Regents of the University of California.
4 * LWKT threads Copyright (c) 2003 Matthew Dillon
6 * This code is derived from software contributed to Berkeley by
9 * Redistribution and use in source and binary forms, with or without
10 * modification, are permitted provided that the following conditions
12 * 1. Redistributions of source code must retain the above copyright
13 * notice, this list of conditions and the following disclaimer.
14 * 2. Redistributions in binary form must reproduce the above copyright
15 * notice, this list of conditions and the following disclaimer in the
16 * documentation and/or other materials provided with the distribution.
17 * 3. All advertising materials mentioning features or use of this software
18 * must display the following acknowledgement:
19 * This product includes software developed by the University of
20 * California, Berkeley and its contributors.
21 * 4. Neither the name of the University nor the names of its contributors
22 * may be used to endorse or promote products derived from this software
23 * without specific prior written permission.
25 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
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27 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
28 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
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30 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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32 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
33 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
34 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
37 * $FreeBSD: src/sys/i386/i386/swtch.s,v 1.89.2.10 2003/01/23 03:36:24 ps Exp $
38 * $DragonFly: src/sys/platform/pc32/i386/swtch.s,v 1.12 2003/06/22 17:08:39 dillon Exp $
42 #include "opt_user_ldt.h"
44 #include <sys/rtprio.h>
46 #include <machine/asmacros.h>
47 #include <machine/ipl.h>
50 #include <machine/pmap.h>
51 #include <machine/smptests.h> /** GRAB_LOPRIO */
52 #include <machine/apic.h>
53 #include <machine/lock.h>
62 #if defined(SWTCH_OPTIM_STATS)
63 .globl _swtch_optim_stats, _tlb_flush_count
64 _swtch_optim_stats: .long 0 /* number of _swtch_optims */
65 _tlb_flush_count: .long 0
72 * cpu_heavy_switch(next_thread)
74 * Switch from the current thread to a new thread. This entry
75 * is normally called via the thread->td_switch function, and will
76 * only be called when the current thread is a heavy weight process.
78 * YYY disable interrupts once giant is removed.
80 ENTRY(cpu_heavy_switch)
82 movl TD_PROC(%ecx),%ecx
86 movb P_ONCPU(%ecx), %al /* save "last" cpu */
87 movb %al, P_LASTCPU(%ecx)
88 movb $0xff, P_ONCPU(%ecx) /* "leave" the cpu */
90 movl P_VMSPACE(%ecx), %edx
96 btrl %eax, VM_PMAP+PM_ACTIVE(%edx)
101 movl P_THREAD(%ecx),%edx
102 movl TD_PCB(%edx),%edx
103 movl (%esp),%eax /* Hardware registers */
104 movl %eax,PCB_EIP(%edx)
105 movl %ebx,PCB_EBX(%edx)
106 movl %esp,PCB_ESP(%edx)
107 movl %ebp,PCB_EBP(%edx)
108 movl %esi,PCB_ESI(%edx)
109 movl %edi,PCB_EDI(%edx)
110 movl %gs,PCB_GS(%edx)
113 * Push the LWKT switch restore function, which resumes a heavy
114 * weight process. Note that the LWKT switcher is based on
115 * TD_SP, while the heavy weight process switcher is based on
116 * PCB_ESP. TD_SP is usually one pointer pushed relative to
119 movl P_THREAD(%ecx),%eax
120 pushl $cpu_heavy_restore
121 movl %esp,TD_SP(%eax)
124 * Save debug regs if necessary
126 movb PCB_FLAGS(%edx),%al
128 jz 1f /* no, skip over */
129 movl %dr7,%eax /* yes, do the save */
130 movl %eax,PCB_DR7(%edx)
131 andl $0x0000fc00, %eax /* disable all watchpoints */
134 movl %eax,PCB_DR6(%edx)
136 movl %eax,PCB_DR3(%edx)
138 movl %eax,PCB_DR2(%edx)
140 movl %eax,PCB_DR1(%edx)
142 movl %eax,PCB_DR0(%edx)
146 * Save BGL nesting count. Note that we hold the BGL with a
147 * count of at least 1 on entry to cpu_heavy_switch().
151 /* XXX FIXME: we should be saving the local APIC TPR */
153 cmpl $FREE_LOCK, %eax /* is it free? */
154 je badsw4 /* yes, bad medicine! */
155 #endif /* DIAGNOSTIC */
156 andl $COUNT_FIELD, %eax /* clear CPU portion */
157 movl %eax, PCB_MPNEST(%edx) /* store it */
161 * Save the FP state if we have used the FP.
164 movl P_THREAD(%ecx),%ecx
167 addl $PCB_SAVEFPU,%edx /* h/w bugs make saving complicated */
169 call _npxsave /* do it in a big C function */
172 /* %ecx,%edx trashed */
173 #endif /* NNPX > 0 */
176 * Switch to the next thread, which was passed as an argument
177 * to cpu_heavy_switch(). Due to the switch-restore function we pushed,
178 * the argument is at 8(%esp). Set the current thread, load the
179 * stack pointer, and 'ret' into the switch-restore function.
183 movl TD_SP(%eax),%esp
189 * The switch function is changed to this when a thread is going away
190 * for good. We have to ensure that the MMU state is not cached, and
191 * we don't bother saving the existing thread state before switching.
193 * At this point we are in a critical section and this cpu owns the
194 * thread's token, which serves as an interlock until the switchout is
197 ENTRY(cpu_exit_switch)
199 * Get us out of the vmspace
209 * Switch to the next thread.
214 movl TD_SP(%eax),%esp
217 * We are now effectively the next thread, transfer ownership to
218 * this thread and release the original thread's RW lock, which
219 * will allow it to be reaped. Messy but rock solid.
222 movl %eax,RW_OWNER(%ecx)
230 * Restore the next thread's state and resume it. Note: the
231 * restore function assumes that the next thread's address is
237 * cpu_heavy_restore() (current thread in %eax on entry)
239 * Restore the thread after an LWKT switch. This entry is normally
240 * called via the LWKT switch restore function, which was pulled
241 * off the thread stack and jumped to.
243 * This entry is only called if the thread was previously saved
244 * using cpu_heavy_switch() (the heavy weight process thread switcher).
246 * YYY theoretically we do not have to restore everything here, a lot
247 * of this junk can wait until we return to usermode. But for now
248 * we restore everything.
250 * YYY STI/CLI sequencing.
252 * YYY note: spl check is done in mi_switch when it splx()'s.
254 ENTRY(cpu_heavy_restore)
255 /* interrupts are disabled */
256 movl TD_PCB(%eax),%edx
257 movl TD_PROC(%eax),%ecx
259 cmpb $SRUN,P_STAT(%ecx)
263 #if defined(SWTCH_OPTIM_STATS)
264 incl _swtch_optim_stats
267 * Restore the MMU address space
270 cmpl PCB_CR3(%edx),%ebx
272 #if defined(SWTCH_OPTIM_STATS)
273 decl _swtch_optim_stats
274 incl _tlb_flush_count
276 movl PCB_CR3(%edx),%ebx
281 * Deal with the PCB extension, restore the private tss
288 cmpl $0, PCB_EXT(%edx) /* has pcb extension? */
290 btsl %esi, _private_tss /* mark use of private tss */
291 movl PCB_EXT(%edx), %edi /* new tss descriptor */
296 * update common_tss.tss_esp0 pointer. This is the supervisor
297 * stack pointer on entry from user mode. Since the pcb is
298 * at the top of the supervisor stack esp0 starts just below it.
299 * We leave enough space for vm86 (16 bytes).
301 * common_tss.tss_esp0 is needed when user mode traps into the
305 movl %ebx, _common_tss + TSS_ESP0
307 btrl %esi, _private_tss
310 movl $gd_common_tssd, %edi
313 movl $_common_tssd, %edi
316 * Move the correct TSS descriptor into the GDT slot, then reload
317 * tr. YYY not sure what is going on here
320 movl _tss_gdt, %ebx /* entry in GDT */
325 movl $GPROC0_SEL*8, %esi /* GSEL(entry, SEL_KPL) */
329 * Tell the pmap that our cpu is using the VMSPACE now.
332 movl P_VMSPACE(%ecx), %ebx
338 btsl %eax, VM_PMAP+PM_ACTIVE(%ebx)
341 * Restore general registers.
343 movl PCB_EBX(%edx),%ebx
344 movl PCB_ESP(%edx),%esp
345 movl PCB_EBP(%edx),%ebp
346 movl PCB_ESI(%edx),%esi
347 movl PCB_EDI(%edx),%edi
348 movl PCB_EIP(%edx),%eax
352 * SMP ickyness to direct interrupts.
356 #ifdef GRAB_LOPRIO /* hold LOPRIO for INTs */
360 andl $~APIC_TPR_PRIO, lapic_tpr
361 #endif /** CHEAP_TPR */
362 #endif /** GRAB_LOPRIO */
364 movb %al, P_ONCPU(%ecx)
368 * Restore the BGL nesting count. Note that the nesting count will
372 movl _cpu_lockid, %eax
373 orl PCB_MPNEST(%edx), %eax /* add next count from PROC */
374 movl %eax, _mp_lock /* load the mp_lock */
375 /* XXX FIXME: we should be restoring the local APIC TPR */
379 * Restore the user LDT if we have one
382 cmpl $0, PCB_USERLDT(%edx)
384 movl __default_ldt,%eax
385 cmpl _currentldt,%eax
388 movl %eax,_currentldt
396 * Restore the %gs segment register, which must be done after
397 * loading the user LDT. Since user processes can modify the
398 * register via procfs, this may result in a fault which is
399 * detected by checking the fault address against cpu_switch_load_gs
400 * in i386/i386/trap.c
402 .globl cpu_switch_load_gs
404 movl PCB_GS(%edx),%gs
407 * Restore the DEBUG register state if necessary.
409 movb PCB_FLAGS(%edx),%al
411 jz 1f /* no, skip over */
412 movl PCB_DR6(%edx),%eax /* yes, do the restore */
414 movl PCB_DR3(%edx),%eax
416 movl PCB_DR2(%edx),%eax
418 movl PCB_DR1(%edx),%eax
420 movl PCB_DR0(%edx),%eax
422 movl %dr7,%eax /* load dr7 so as not to disturb */
423 andl $0x0000fc00,%eax /* reserved bits */
425 movl PCB_DR7(%edx),%ebx
426 andl $~0x0000fc00,%ebx
433 * Remove the heavy weight process from the heavy weight queue.
434 * this will also have the side effect of removing the thread from
435 * the run queue. YYY temporary?
437 * LWKT threads stay on the run queue until explicitly removed.
447 CROSSJUMPTARGET(sw1a)
454 sw0_1: .asciz "cpu_switch: has wchan"
460 sw0_2: .asciz "cpu_switch: not SRUN"
463 #if defined(SMP) && defined(DIAGNOSTIC)
468 sw0_4: .asciz "cpu_switch: do not have lock"
469 #endif /* SMP && DIAGNOSTIC */
473 * Update pcb, saving current processor state.
479 /* caller's return address - child won't execute this routine */
481 movl %eax,PCB_EIP(%ecx)
484 movl %eax,PCB_CR3(%ecx)
486 movl %ebx,PCB_EBX(%ecx)
487 movl %esp,PCB_ESP(%ecx)
488 movl %ebp,PCB_EBP(%ecx)
489 movl %esi,PCB_ESI(%ecx)
490 movl %edi,PCB_EDI(%ecx)
491 movl %gs,PCB_GS(%ecx)
495 * If npxthread == NULL, then the npx h/w state is irrelevant and the
496 * state had better already be in the pcb. This is true for forks
497 * but not for dumps (the old book-keeping with FP flags in the pcb
498 * always lost for dumps because the dump pcb has 0 flags).
500 * If npxthread != NULL, then we have to save the npx h/w state to
501 * npxthread's pcb and copy it to the requested pcb, or save to the
502 * requested pcb and reload. Copying is easier because we would
503 * have to handle h/w bugs for reloading. We used to lose the
504 * parent's npx state for forks by forgetting to reload.
511 movl TD_PCB(%eax),%eax
512 leal PCB_SAVEFPU(%eax),%eax
520 pushl $PCB_SAVEFPU_SIZE
521 leal PCB_SAVEFPU(%ecx),%ecx
526 #endif /* NNPX > 0 */
532 * cpu_idle_restore() (current thread in %eax on entry)
534 * Don't bother setting up any regs other then %ebp so backtraces
535 * don't die. This restore function is used to bootstrap into the
536 * cpu_idle() LWKT only, after that cpu_lwkt_*() will be used for
539 ENTRY(cpu_idle_restore)
547 * Standard LWKT switching function. Only non-scratch registers are
548 * saved and we don't bother with the MMU state or anything else.
551 ENTRY(cpu_lwkt_switch)
559 pushl $cpu_lwkt_restore
561 movl %esp,TD_SP(%ecx)
563 movl TD_SP(%eax),%esp
567 * cpu_idle_restore() (current thread in %eax on entry)
570 ENTRY(cpu_lwkt_restore)
576 movl TD_MACH+MTD_CPL(%eax),%ecx /* unmasked cpl? YYY too complex */
580 cmpl $0,_intr_nesting_level /* don't stack too deeply */
582 call splz /* execute unmasked ints */