2 * Copyright (c) 2006 David Gwynne <dlg@openbsd.org>
4 * Permission to use, copy, modify, and distribute this software for any
5 * purpose with or without fee is hereby granted, provided that the above
6 * copyright notice and this permission notice appear in all copies.
8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
17 * Copyright (c) 2009 The DragonFly Project. All rights reserved.
19 * This code is derived from software contributed to The DragonFly Project
20 * by Matthew Dillon <dillon@backplane.com>
22 * Redistribution and use in source and binary forms, with or without
23 * modification, are permitted provided that the following conditions
26 * 1. Redistributions of source code must retain the above copyright
27 * notice, this list of conditions and the following disclaimer.
28 * 2. Redistributions in binary form must reproduce the above copyright
29 * notice, this list of conditions and the following disclaimer in
30 * the documentation and/or other materials provided with the
32 * 3. Neither the name of The DragonFly Project nor the names of its
33 * contributors may be used to endorse or promote products derived
34 * from this software without specific, prior written permission.
36 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
37 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
38 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
39 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
40 * COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
41 * INCIDENTAL, SPECIAL, EXEMPLARY OR CONSEQUENTIAL DAMAGES (INCLUDING,
42 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
43 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
44 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
45 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
46 * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
49 * $OpenBSD: ahci.c,v 1.147 2009/02/16 21:19:07 miod Exp $
54 int ahci_port_start(struct ahci_port *ap);
55 int ahci_port_stop(struct ahci_port *ap, int stop_fis_rx);
56 int ahci_port_clo(struct ahci_port *ap);
57 void ahci_port_interrupt_enable(struct ahci_port *ap);
59 int ahci_load_prdt(struct ahci_ccb *);
60 void ahci_unload_prdt(struct ahci_ccb *);
61 static void ahci_load_prdt_callback(void *info, bus_dma_segment_t *segs,
62 int nsegs, int error);
63 void ahci_start(struct ahci_ccb *);
64 int ahci_port_softreset(struct ahci_port *ap);
65 int ahci_port_pmprobe(struct ahci_port *ap);
66 int ahci_port_hardreset(struct ahci_port *ap, int hard);
67 void ahci_port_hardstop(struct ahci_port *ap);
68 void ahci_flush_tfd(struct ahci_port *ap);
70 static void ahci_ata_cmd_timeout_unserialized(void *arg);
72 void ahci_issue_pending_ncq_commands(struct ahci_port *);
73 void ahci_issue_pending_commands(struct ahci_port *, int);
75 struct ahci_ccb *ahci_get_err_ccb(struct ahci_port *);
76 void ahci_put_err_ccb(struct ahci_ccb *);
78 int ahci_port_read_ncq_error(struct ahci_port *, int *);
80 struct ahci_dmamem *ahci_dmamem_alloc(struct ahci_softc *, bus_dma_tag_t tag);
81 void ahci_dmamem_free(struct ahci_softc *, struct ahci_dmamem *);
82 static void ahci_dmamem_saveseg(void *info, bus_dma_segment_t *segs, int nsegs, int error);
84 void ahci_empty_done(struct ahci_ccb *ccb);
85 void ahci_ata_cmd_done(struct ahci_ccb *ccb);
87 /* Wait for all bits in _b to be cleared */
88 #define ahci_pwait_clr(_ap, _r, _b) \
89 ahci_pwait_eq((_ap), AHCI_PWAIT_TIMEOUT, (_r), (_b), 0)
90 #define ahci_pwait_clr_to(_ap, _to, _r, _b) \
91 ahci_pwait_eq((_ap), _to, (_r), (_b), 0)
93 /* Wait for all bits in _b to be set */
94 #define ahci_pwait_set(_ap, _r, _b) \
95 ahci_pwait_eq((_ap), AHCI_PWAIT_TIMEOUT, (_r), (_b), (_b))
96 #define ahci_pwait_set_to(_ap, _to, _r, _b) \
97 ahci_pwait_eq((_ap), _to, (_r), (_b), (_b))
99 #define AHCI_PWAIT_TIMEOUT 1000
102 * Initialize the global AHCI hardware. This code does not set up any of
106 ahci_init(struct ahci_softc *sc)
110 DPRINTF(AHCI_D_VERBOSE, " GHC 0x%b",
111 ahci_read(sc, AHCI_REG_GHC), AHCI_FMT_GHC);
113 /* save BIOS initialised parameters, enable staggered spin up */
114 cap = ahci_read(sc, AHCI_REG_CAP);
115 cap &= AHCI_REG_CAP_SMPS;
116 cap |= AHCI_REG_CAP_SSS;
117 pi = ahci_read(sc, AHCI_REG_PI);
120 * Unconditionally reset the controller, do not conditionalize on
121 * trying to figure it if it was previously active or not.
123 ahci_write(sc, AHCI_REG_GHC, AHCI_REG_GHC_HR);
124 if (ahci_wait_ne(sc, AHCI_REG_GHC, AHCI_REG_GHC_HR,
125 AHCI_REG_GHC_HR) != 0) {
126 device_printf(sc->sc_dev,
127 "unable to reset controller\n");
131 /* enable ahci (global interrupts disabled) */
132 ahci_write(sc, AHCI_REG_GHC, AHCI_REG_GHC_AE);
134 /* restore parameters */
135 ahci_write(sc, AHCI_REG_CAP, cap);
136 ahci_write(sc, AHCI_REG_PI, pi);
142 * Allocate and initialize an AHCI port.
145 ahci_port_alloc(struct ahci_softc *sc, u_int port)
147 struct ahci_port *ap;
149 struct ahci_ccb *ccb;
152 struct ahci_cmd_hdr *hdr;
153 struct ahci_cmd_table *table;
158 ap = kmalloc(sizeof(*ap), M_DEVBUF, M_WAITOK | M_ZERO);
160 device_printf(sc->sc_dev,
161 "unable to allocate memory for port %d\n",
166 ksnprintf(ap->ap_name, sizeof(ap->ap_name), "%s%d.%d",
167 device_get_name(sc->sc_dev),
168 device_get_unit(sc->sc_dev),
170 sc->sc_ports[port] = ap;
173 * Allocate enough so we never have to reallocate, it makes
176 * ap_pmcount will be reduced by the scan if we encounter the
177 * port multiplier port prior to target 15.
179 if (ap->ap_ata == NULL) {
180 ap->ap_ata = kmalloc(sizeof(*ap->ap_ata) * AHCI_MAX_PMPORTS,
181 M_DEVBUF, M_INTWAIT | M_ZERO);
182 for (i = 0; i < AHCI_MAX_PMPORTS; ++i) {
184 at->at_ahci_port = ap;
186 at->at_probe = ATA_PROBE_NEED_INIT;
187 ksnprintf(at->at_name, sizeof(at->at_name),
188 "%s.%d", ap->ap_name, i);
191 if (bus_space_subregion(sc->sc_iot, sc->sc_ioh,
192 AHCI_PORT_REGION(port), AHCI_PORT_SIZE, &ap->ap_ioh) != 0) {
193 device_printf(sc->sc_dev,
194 "unable to create register window for port %d\n",
201 ap->ap_probe = ATA_PROBE_NEED_INIT;
202 TAILQ_INIT(&ap->ap_ccb_free);
203 TAILQ_INIT(&ap->ap_ccb_pending);
204 lockinit(&ap->ap_ccb_lock, "ahcipo", 0, 0);
206 /* Disable port interrupts */
207 ahci_pwrite(ap, AHCI_PREG_IE, 0);
210 * Sec 10.1.2 - deinitialise port if it is already running
212 cmd = ahci_pread(ap, AHCI_PREG_CMD);
213 if ((cmd & (AHCI_PREG_CMD_ST | AHCI_PREG_CMD_CR |
214 AHCI_PREG_CMD_FRE | AHCI_PREG_CMD_FR)) ||
215 (ahci_pread(ap, AHCI_PREG_SCTL) & AHCI_PREG_SCTL_DET)) {
218 r = ahci_port_stop(ap, 1);
220 device_printf(sc->sc_dev,
221 "unable to disable %s, ignoring port %d\n",
222 ((r == 2) ? "CR" : "FR"), port);
227 /* Write DET to zero */
228 ahci_pwrite(ap, AHCI_PREG_SCTL, AHCI_PREG_SCTL_IPM_DISABLED);
232 ap->ap_dmamem_rfis = ahci_dmamem_alloc(sc, sc->sc_tag_rfis);
233 if (ap->ap_dmamem_rfis == NULL) {
234 kprintf("%s: NORFIS\n", PORTNAME(ap));
238 /* Setup RFIS base address */
239 ap->ap_rfis = (struct ahci_rfis *) AHCI_DMA_KVA(ap->ap_dmamem_rfis);
240 dva = AHCI_DMA_DVA(ap->ap_dmamem_rfis);
241 ahci_pwrite(ap, AHCI_PREG_FBU, (u_int32_t)(dva >> 32));
242 ahci_pwrite(ap, AHCI_PREG_FB, (u_int32_t)dva);
244 /* Enable FIS reception and activate port. */
245 cmd = ahci_pread(ap, AHCI_PREG_CMD) & ~AHCI_PREG_CMD_ICC;
246 cmd &= ~(AHCI_PREG_CMD_CLO | AHCI_PREG_CMD_PMA);
247 cmd |= AHCI_PREG_CMD_FRE | AHCI_PREG_CMD_POD | AHCI_PREG_CMD_SUD;
248 ahci_pwrite(ap, AHCI_PREG_CMD, cmd | AHCI_PREG_CMD_ICC_ACTIVE);
250 /* Check whether port activated. Skip it if not. */
251 cmd = ahci_pread(ap, AHCI_PREG_CMD) & ~AHCI_PREG_CMD_ICC;
252 if ((cmd & AHCI_PREG_CMD_FRE) == 0) {
253 kprintf("%s: NOT-ACTIVATED\n", PORTNAME(ap));
258 /* Allocate a CCB for each command slot */
259 ap->ap_ccbs = kmalloc(sizeof(struct ahci_ccb) * sc->sc_ncmds, M_DEVBUF,
261 if (ap->ap_ccbs == NULL) {
262 device_printf(sc->sc_dev,
263 "unable to allocate command list for port %d\n",
268 /* Command List Structures and Command Tables */
269 ap->ap_dmamem_cmd_list = ahci_dmamem_alloc(sc, sc->sc_tag_cmdh);
270 ap->ap_dmamem_cmd_table = ahci_dmamem_alloc(sc, sc->sc_tag_cmdt);
271 if (ap->ap_dmamem_cmd_table == NULL ||
272 ap->ap_dmamem_cmd_list == NULL) {
274 device_printf(sc->sc_dev,
275 "unable to allocate DMA memory for port %d\n",
280 /* Setup command list base address */
281 dva = AHCI_DMA_DVA(ap->ap_dmamem_cmd_list);
282 ahci_pwrite(ap, AHCI_PREG_CLBU, (u_int32_t)(dva >> 32));
283 ahci_pwrite(ap, AHCI_PREG_CLB, (u_int32_t)dva);
285 /* Split CCB allocation into CCBs and assign to command header/table */
286 hdr = AHCI_DMA_KVA(ap->ap_dmamem_cmd_list);
287 table = AHCI_DMA_KVA(ap->ap_dmamem_cmd_table);
288 for (i = 0; i < sc->sc_ncmds; i++) {
289 ccb = &ap->ap_ccbs[i];
291 error = bus_dmamap_create(sc->sc_tag_data, BUS_DMA_ALLOCNOW,
294 device_printf(sc->sc_dev,
295 "unable to create dmamap for port %d "
296 "ccb %d\n", port, i);
300 callout_init(&ccb->ccb_timeout);
303 ccb->ccb_cmd_hdr = &hdr[i];
304 ccb->ccb_cmd_table = &table[i];
305 dva = AHCI_DMA_DVA(ap->ap_dmamem_cmd_table) +
306 ccb->ccb_slot * sizeof(struct ahci_cmd_table);
307 ccb->ccb_cmd_hdr->ctba_hi = htole32((u_int32_t)(dva >> 32));
308 ccb->ccb_cmd_hdr->ctba_lo = htole32((u_int32_t)dva);
311 (struct ata_fis_h2d *)ccb->ccb_cmd_table->cfis;
312 ccb->ccb_xa.packetcmd = ccb->ccb_cmd_table->acmd;
315 ccb->ccb_xa.state = ATA_S_COMPLETE;
319 /* Wait for ICC change to complete */
320 ahci_pwait_clr(ap, AHCI_PREG_CMD, AHCI_PREG_CMD_ICC);
323 * Start the port. The helper thread will call ahci_port_init()
324 * so the ports can all be started in parallel. A failure by
325 * ahci_port_init() does not deallocate the port since we still
326 * want hot-plug events.
328 ahci_os_start_port(ap);
331 ahci_port_free(sc, port);
337 * [re]initialize an idle port. No CCBs should be active.
339 * If at is NULL we are initializing a directly connected port, otherwise
340 * we are indirectly initializing a port multiplier port.
342 * This function is called during the initial port allocation sequence
343 * and is also called on hot-plug insertion. We take no chances and
344 * use a portreset instead of a softreset.
346 * This function is the only way to move a failed port back to active
349 * Returns 0 if a device is successfully detected.
352 ahci_port_init(struct ahci_port *ap, struct ata_port *atx)
357 * Clear all notification bits
359 if (ap->ap_sc->sc_cap & AHCI_REG_CAP_SSNTF)
360 ahci_pwrite(ap, AHCI_PREG_SNTF, -1);
363 * Hard-reset the port. If a device is detected but it is busy
364 * we try a second time, this time cycling the phy as well.
367 atx->at_probe = ATA_PROBE_NEED_HARD_RESET;
369 ap->ap_probe = ATA_PROBE_NEED_HARD_RESET;
370 rc = ahci_port_reset(ap, atx, 1);
372 rc = ahci_port_reset(ap, atx, 2);
378 * We had problems talking to the device on the port.
380 switch (ahci_pread(ap, AHCI_PREG_SSTS) & AHCI_PREG_SSTS_DET) {
381 case AHCI_PREG_SSTS_DET_DEV_NE:
382 kprintf("%s: Device not communicating\n", PORTNAME(ap));
384 case AHCI_PREG_SSTS_DET_PHYOFFLINE:
385 kprintf("%s: PHY offline\n", PORTNAME(ap));
388 kprintf("%s: No device detected\n", PORTNAME(ap));
395 * The device on the port is still telling us its busy,
396 * which means that it is not properly handling a SATA
399 * It may be possible to softreset the device using CLO
400 * and a device reset command.
402 kprintf("%s: Device on port is bricked, trying softreset\n",
405 rc = ahci_port_reset(ap, atx, 0);
407 kprintf("%s: Unable unbrick device\n",
410 kprintf("%s: Successfully unbricked\n",
420 * Command transfers can only be enabled if a device was successfully
423 * Allocate or deallocate the ap_ata array here too.
425 switch(ap->ap_type) {
426 case ATA_PORT_T_NONE:
438 * Start the port if we succeeded.
440 * There's nothing to start for devices behind a port multiplier.
442 if (rc == 0 && atx == NULL) {
443 if (ahci_port_start(ap)) {
444 kprintf("%s: failed to start command DMA on port, "
445 "disabling\n", PORTNAME(ap));
446 rc = ENXIO; /* couldn't start port */
451 * Flush interrupts on the port. XXX
453 * Enable interrupts on the port whether a device is sitting on
454 * it or not, to handle hot-plug events.
457 ahci_pwrite(ap, AHCI_PREG_IS, ahci_pread(ap, AHCI_PREG_IS));
458 ahci_write(ap->ap_sc, AHCI_REG_IS, 1 << ap->ap_num);
460 ahci_port_interrupt_enable(ap);
466 * Enable or re-enable interrupts on a port.
468 * This routine is called from the port initialization code or from the
469 * helper thread as the real interrupt may be forced to turn off certain
473 ahci_port_interrupt_enable(struct ahci_port *ap)
477 data = AHCI_PREG_IE_TFEE | AHCI_PREG_IE_HBFE |
478 AHCI_PREG_IE_IFE | AHCI_PREG_IE_OFE |
479 AHCI_PREG_IE_DPE | AHCI_PREG_IE_UFE |
480 AHCI_PREG_IE_PCE | AHCI_PREG_IE_PRCE |
482 if (ap->ap_sc->sc_cap & AHCI_REG_CAP_SSNTF)
483 data |= AHCI_PREG_IE_SDBE;
485 if (sc->sc_ccc_ports & (1 << port)
486 data &= ~(AHCI_PREG_IE_SDBE | AHCI_PREG_IE_DHRE);
488 ahci_pwrite(ap, AHCI_PREG_IE, data);
492 * Run the port / target state machine from a main context.
494 * The state machine for the port is always run.
496 * If atx is non-NULL run the state machine for a particular target.
497 * If atx is NULL run the state machine for all targets.
500 ahci_port_state_machine(struct ahci_port *ap)
507 if (ap->ap_type == ATA_PORT_T_NONE) {
508 if (ap->ap_probe == ATA_PROBE_NEED_INIT) {
509 for (target = 0; target < AHCI_MAX_PMPORTS; ++target) {
510 at = &ap->ap_ata[target];
511 at->at_probe = ATA_PROBE_NEED_INIT;
513 ahci_port_init(ap, NULL);
515 if (ap->ap_probe == ATA_PROBE_NEED_HARD_RESET)
516 ahci_port_reset(ap, NULL, 1);
517 if (ap->ap_probe == ATA_PROBE_NEED_SOFT_RESET)
518 ahci_port_reset(ap, NULL, 0);
519 if (ap->ap_probe == ATA_PROBE_NEED_IDENT)
520 ahci_cam_probe(ap, NULL);
522 if (ap->ap_type != ATA_PORT_T_PM) {
523 if (ap->ap_probe == ATA_PROBE_FAILED) {
524 ahci_cam_changed(ap, NULL, 0);
525 } else if (ap->ap_probe >= ATA_PROBE_NEED_IDENT) {
526 ahci_cam_changed(ap, NULL, 1);
532 if (ahci_pm_read(ap, 15, AHCI_PMREG_EINFO, &data)) {
533 kprintf("%s: PM unable to read hot-plug bitmap\n",
537 data &= (1 << ap->ap_pmcount) - 1;
540 * Stop if no ports on the target have indicated a state
547 * New devices showing up in the bitmap require some spin-up
548 * time before we start probing them. Reset didsleep. The
549 * first new device we detect will sleep before probing.
553 for (target = 0; target < ap->ap_pmcount; ++target) {
554 at = &ap->ap_ata[target];
557 * Check the target state for targets behind the PM
558 * which have changed state. This will adjust
559 * at_probe and set ATA_PORT_F_RESCAN
561 * We want to wait at least 4 seconds before probing
562 * a newly inserted device. If the check status
563 * indicates a device is present and in need of a
564 * hard reset, we make sure we have slept before
567 if (data & (1 << target)) {
568 ahci_pm_check_good(ap, target);
569 if (at->at_probe == ATA_PROBE_NEED_HARD_RESET) {
578 * Run through the state machine as necessary.
580 if (at->at_type == ATA_PORT_T_NONE &&
581 at->at_probe != ATA_PROBE_FAILED) {
582 if (at->at_probe == ATA_PROBE_NEED_INIT)
583 ahci_port_init(ap, at);
584 if (at->at_probe == ATA_PROBE_NEED_HARD_RESET)
585 ahci_port_reset(ap, at, 1);
586 if (at->at_probe == ATA_PROBE_NEED_SOFT_RESET)
587 ahci_port_reset(ap, at, 0);
588 if (at->at_probe == ATA_PROBE_NEED_IDENT)
589 ahci_cam_probe(ap, at);
592 if (data & (1 << target)) {
593 kprintf("%s: HOTPLUG event, ",
595 if (at->at_probe >= ATA_PROBE_NEED_IDENT)
596 kprintf("device inserted\n");
598 kprintf("device removed\n");
602 * Initial conditions set automatic add/rem
604 if (at->at_probe <= ATA_PROBE_NEED_HARD_RESET)
605 at->at_features |= ATA_PORT_F_RESCAN;
608 * add or remove from CAM
610 if (at->at_features & ATA_PORT_F_RESCAN) {
611 at->at_features &= ~ATA_PORT_F_RESCAN;
612 if (at->at_probe == ATA_PROBE_FAILED) {
613 ahci_cam_changed(ap, at, 0);
614 } else if (at->at_probe >= ATA_PROBE_NEED_IDENT) {
615 ahci_cam_changed(ap, at, 1);
624 * De-initialize and detach a port.
627 ahci_port_free(struct ahci_softc *sc, u_int port)
629 struct ahci_port *ap = sc->sc_ports[port];
630 struct ahci_ccb *ccb;
633 * Ensure port is disabled and its interrupts are all flushed.
636 ahci_port_stop(ap, 1);
637 ahci_os_stop_port(ap);
638 ahci_pwrite(ap, AHCI_PREG_CMD, 0);
639 ahci_pwrite(ap, AHCI_PREG_IE, 0);
640 ahci_pwrite(ap, AHCI_PREG_IS, ahci_pread(ap, AHCI_PREG_IS));
641 ahci_write(sc, AHCI_REG_IS, 1 << port);
645 while ((ccb = ahci_get_ccb(ap)) != NULL) {
646 if (ccb->ccb_dmamap) {
647 bus_dmamap_destroy(sc->sc_tag_data,
649 ccb->ccb_dmamap = NULL;
652 kfree(ap->ap_ccbs, M_DEVBUF);
656 if (ap->ap_dmamem_cmd_list) {
657 ahci_dmamem_free(sc, ap->ap_dmamem_cmd_list);
658 ap->ap_dmamem_cmd_list = NULL;
660 if (ap->ap_dmamem_rfis) {
661 ahci_dmamem_free(sc, ap->ap_dmamem_rfis);
662 ap->ap_dmamem_rfis = NULL;
664 if (ap->ap_dmamem_cmd_table) {
665 ahci_dmamem_free(sc, ap->ap_dmamem_cmd_table);
666 ap->ap_dmamem_cmd_table = NULL;
669 kfree(ap->ap_ata, M_DEVBUF);
673 /* bus_space(9) says we dont free the subregions handle */
676 sc->sc_ports[port] = NULL;
680 * Start high-level command processing on the port
683 ahci_port_start(struct ahci_port *ap)
685 u_int32_t r, oldr, s, olds, is, oldis, tfd, oldtfd;
688 * FRE must be turned on before ST. Wait for FR to go active
689 * before turning on ST. The spec doesn't seem to think this
690 * is necessary but waiting here avoids an on-off race in the
691 * ahci_port_stop() code.
694 olds = ahci_pread(ap, AHCI_PREG_SERR);
695 oldis= ahci_pread(ap, AHCI_PREG_IS);
696 oldtfd = ahci_pread(ap, AHCI_PREG_TFD);
697 oldr = r = ahci_pread(ap, AHCI_PREG_CMD) & ~AHCI_PREG_CMD_ICC;
698 if ((r & AHCI_PREG_CMD_FRE) == 0) {
699 r |= AHCI_PREG_CMD_FRE;
700 ahci_pwrite(ap, AHCI_PREG_CMD, r);
702 if ((ap->ap_sc->sc_flags & AHCI_F_IGN_FR) == 0) {
703 if (ahci_pwait_set(ap, AHCI_PREG_CMD, AHCI_PREG_CMD_FR)) {
704 kprintf("%s: Cannot start FIS reception\n",
711 * Turn on ST, wait for CR to come up.
713 r |= AHCI_PREG_CMD_ST;
714 ahci_pwrite(ap, AHCI_PREG_CMD, r);
715 if (ahci_pwait_set(ap, AHCI_PREG_CMD, AHCI_PREG_CMD_CR)) {
716 s = ahci_pread(ap, AHCI_PREG_SERR);
717 is = ahci_pread(ap, AHCI_PREG_IS);
718 tfd = ahci_pread(ap, AHCI_PREG_TFD);
719 kprintf("%s: Cannot start command DMA\n"
722 "OLDIS=%b\nNEWIS=%b\n"
723 "OLDTFD=%b\nNEWTFD=%b\n",
725 oldr, AHCI_PFMT_CMD, olds, AHCI_PFMT_SERR,
726 r, AHCI_PFMT_CMD, s, AHCI_PFMT_SERR,
727 oldis, AHCI_PFMT_IS, is, AHCI_PFMT_IS,
728 oldtfd, AHCI_PFMT_TFD_STS, tfd, AHCI_PFMT_TFD_STS);
734 * (Re-)enable coalescing on the port.
736 if (ap->ap_sc->sc_ccc_ports & (1 << ap->ap_num)) {
737 ap->ap_sc->sc_ccc_ports_cur |= (1 << ap->ap_num);
738 ahci_write(ap->ap_sc, AHCI_REG_CCC_PORTS,
739 ap->ap_sc->sc_ccc_ports_cur);
747 * Stop high-level command processing on a port
750 ahci_port_stop(struct ahci_port *ap, int stop_fis_rx)
756 * Disable coalescing on the port while it is stopped.
758 if (ap->ap_sc->sc_ccc_ports & (1 << ap->ap_num)) {
759 ap->ap_sc->sc_ccc_ports_cur &= ~(1 << ap->ap_num);
760 ahci_write(ap->ap_sc, AHCI_REG_CCC_PORTS,
761 ap->ap_sc->sc_ccc_ports_cur);
766 * Turn off ST, then wait for CR to go off.
768 r = ahci_pread(ap, AHCI_PREG_CMD) & ~AHCI_PREG_CMD_ICC;
769 r &= ~AHCI_PREG_CMD_ST;
770 ahci_pwrite(ap, AHCI_PREG_CMD, r);
772 if (ahci_pwait_clr(ap, AHCI_PREG_CMD, AHCI_PREG_CMD_CR)) {
773 kprintf("%s: Port bricked, unable to stop (ST)\n",
780 * Turn off FRE, then wait for FR to go off. FRE cannot
781 * be turned off until CR transitions to 0.
783 if ((r & AHCI_PREG_CMD_FR) == 0) {
784 kprintf("%s: FR stopped, clear FRE for next start\n",
790 r &= ~AHCI_PREG_CMD_FRE;
791 ahci_pwrite(ap, AHCI_PREG_CMD, r);
792 if (ahci_pwait_clr(ap, AHCI_PREG_CMD, AHCI_PREG_CMD_FR)) {
793 kprintf("%s: Port bricked, unable to stop (FRE)\n",
803 * AHCI command list override -> forcibly clear TFD.STS.{BSY,DRQ}
806 ahci_port_clo(struct ahci_port *ap)
808 struct ahci_softc *sc = ap->ap_sc;
811 /* Only attempt CLO if supported by controller */
812 if ((ahci_read(sc, AHCI_REG_CAP) & AHCI_REG_CAP_SCLO) == 0)
816 cmd = ahci_pread(ap, AHCI_PREG_CMD) & ~AHCI_PREG_CMD_ICC;
818 if (cmd & AHCI_PREG_CMD_ST) {
819 kprintf("%s: CLO requested while port running\n",
823 ahci_pwrite(ap, AHCI_PREG_CMD, cmd | AHCI_PREG_CMD_CLO);
825 /* Wait for completion */
826 if (ahci_pwait_clr(ap, AHCI_PREG_CMD, AHCI_PREG_CMD_CLO)) {
827 kprintf("%s: CLO did not complete\n", PORTNAME(ap));
837 * If hard is 0 perform a softreset of the port.
838 * If hard is 1 perform a hard reset of the port.
839 * If hard is 2 perform a hard reset of the port and cycle the phy.
841 * If at is non-NULL an indirect port via a port-multiplier is being
842 * reset, otherwise a direct port is being reset.
844 * NOTE: Indirect ports can only be soft-reset.
847 ahci_port_reset(struct ahci_port *ap, struct ata_port *at, int hard)
853 rc = ahci_pm_hardreset(ap, at->at_target, hard);
855 rc = ahci_port_hardreset(ap, hard);
858 rc = ahci_pm_softreset(ap, at->at_target);
860 rc = ahci_port_softreset(ap);
862 if (rc && at == NULL)
863 rc = ahci_port_hardreset(ap, hard);
870 * AHCI soft reset, Section 10.4.1
872 * (at) will be NULL when soft-resetting a directly-attached device, and
873 * non-NULL when soft-resetting a device through a port multiplier.
875 * This function keeps port communications intact and attempts to generate
876 * a reset to the connected device using device commands.
879 ahci_port_softreset(struct ahci_port *ap)
881 struct ahci_ccb *ccb = NULL;
882 struct ahci_cmd_hdr *cmd_slot;
889 kprintf("%s: START SOFTRESET %b\n", PORTNAME(ap),
890 ahci_pread(ap, AHCI_PREG_CMD), AHCI_PFMT_CMD);
892 DPRINTF(AHCI_D_VERBOSE, "%s: soft reset\n", PORTNAME(ap));
895 ap->ap_flags |= AP_F_IN_RESET;
896 ap->ap_state = AP_S_NORMAL;
899 * Remember port state in cmd (main to restore start/stop)
903 cmd = ahci_pread(ap, AHCI_PREG_CMD) & ~AHCI_PREG_CMD_ICC;
904 if (ahci_port_stop(ap, 0)) {
905 kprintf("%s: failed to stop port, cannot softreset\n",
911 * Request CLO if device appears hung.
913 if (ahci_pread(ap, AHCI_PREG_TFD) &
914 (AHCI_PREG_TFD_STS_BSY | AHCI_PREG_TFD_STS_DRQ)) {
919 * This is an attempt to clear errors so a new signature will
920 * be latched. It isn't working properly. XXX
923 ahci_pwrite(ap, AHCI_PREG_SERR, -1);
926 if (ahci_port_start(ap)) {
927 kprintf("%s: failed to start port, cannot softreset\n",
932 /* Check whether CLO worked */
933 if (ahci_pwait_clr(ap, AHCI_PREG_TFD,
934 AHCI_PREG_TFD_STS_BSY | AHCI_PREG_TFD_STS_DRQ)) {
935 kprintf("%s: CLO %s, need port reset\n",
937 (ahci_read(ap->ap_sc, AHCI_REG_CAP) & AHCI_REG_CAP_SCLO)
938 ? "failed" : "unsupported");
944 * Prep first D2H command with SRST feature & clear busy/reset flags
946 * It is unclear which other fields in the FIS are used. Just zero
949 ccb = ahci_get_err_ccb(ap);
950 ccb->ccb_xa.at = NULL;
951 cmd_slot = ccb->ccb_cmd_hdr;
953 fis = ccb->ccb_cmd_table->cfis;
954 bzero(fis, sizeof(ccb->ccb_cmd_table->cfis));
955 fis[0] = ATA_FIS_TYPE_H2D;
956 fis[15] = ATA_FIS_CONTROL_SRST|ATA_FIS_CONTROL_4BIT;
959 cmd_slot->flags = htole16(5); /* FIS length: 5 DWORDS */
960 cmd_slot->flags |= htole16(AHCI_CMD_LIST_FLAG_C); /* Clear busy on OK */
961 cmd_slot->flags |= htole16(AHCI_CMD_LIST_FLAG_R); /* Reset */
963 ccb->ccb_xa.state = ATA_S_PENDING;
964 ccb->ccb_xa.flags = 0;
965 if (ahci_poll(ccb, 1000, NULL) != 0 ||
966 ccb->ccb_xa.state != ATA_S_COMPLETE) {
967 kprintf("%s: First FIS failed\n", PORTNAME(ap));
972 * The device may muff the PHY up.
974 ahci_os_sleep(10); /* 3ms min, use 10 */
977 * Prep second D2H command to read status and complete reset sequence
978 * AHCI 10.4.1 and "Serial ATA Revision 2.6". I can't find the ATA
979 * Rev 2.6 and it is unclear how the second FIS should be set up
980 * from the AHCI document.
982 * Give the device 3ms before sending the second FIS.
984 * It is unclear which other fields in the FIS are used. Just zero
987 bzero(fis, sizeof(ccb->ccb_cmd_table->cfis));
988 fis[0] = ATA_FIS_TYPE_H2D;
989 fis[15] = ATA_FIS_CONTROL_4BIT;
992 cmd_slot->flags = htole16(5); /* FIS length: 5 DWORDS */
994 ccb->ccb_xa.state = ATA_S_PENDING;
995 ccb->ccb_xa.flags = 0;
996 if (ahci_poll(ccb, 1000, NULL) != 0 ||
997 ccb->ccb_xa.state != ATA_S_COMPLETE) {
998 kprintf("%s: Second FIS failed\n", PORTNAME(ap));
1002 if (ahci_pwait_clr(ap, AHCI_PREG_TFD,
1003 AHCI_PREG_TFD_STS_BSY | AHCI_PREG_TFD_STS_DRQ)) {
1004 kprintf("%s: device didn't come ready after reset, TFD: 0x%b\n",
1006 ahci_pread(ap, AHCI_PREG_TFD), AHCI_PFMT_TFD_STS);
1013 * If the softreset is trying to clear a BSY condition after a
1014 * normal portreset we assign the port type.
1016 * If the softreset is being run first as part of the ccb error
1017 * processing code then report if the device signature changed
1020 if (ap->ap_type == ATA_PORT_T_NONE) {
1021 ap->ap_type = ahci_port_signature_detect(ap, NULL);
1023 if (ahci_port_signature_detect(ap, NULL) != ap->ap_type) {
1024 kprintf("%s: device signature unexpectedly "
1025 "changed\n", PORTNAME(ap));
1026 error = EBUSY; /* XXX */
1035 * Abort our command, if it failed, by stopping command DMA.
1037 if (error && (ap->ap_active & (1 << ccb->ccb_slot))) {
1038 kprintf("%s: stopping the port, softreset slot "
1039 "%d was still active.\n",
1042 ahci_port_stop(ap, 0);
1044 ccb->ccb_xa.state = ATA_S_ERROR;
1046 ahci_put_err_ccb(ccb);
1049 * If the target is busy use CLO to clear the busy
1050 * condition. The BSY should be cleared on the next
1053 if (ahci_pread(ap, AHCI_PREG_TFD) &
1054 (AHCI_PREG_TFD_STS_BSY | AHCI_PREG_TFD_STS_DRQ)) {
1060 * If we failed to softreset make the port quiescent, otherwise
1061 * make sure the port's start/stop state matches what it was on
1064 * Don't kill the port if the softreset is on a port multiplier
1065 * target, that would kill all the targets!
1068 ahci_port_hardstop(ap);
1069 /* ap_probe set to failed */
1070 } else if (cmd & AHCI_PREG_CMD_ST) {
1071 ap->ap_probe = ATA_PROBE_NEED_IDENT;
1072 kprintf("%s: STARTING PORT\n", PORTNAME(ap));
1073 ahci_port_start(ap);
1075 ap->ap_probe = ATA_PROBE_NEED_IDENT;
1076 kprintf("%s: STOPPING PORT\n", PORTNAME(ap));
1077 ahci_port_stop(ap, !(cmd & AHCI_PREG_CMD_FRE));
1079 ap->ap_flags &= ~AP_F_IN_RESET;
1082 kprintf("%s: END SOFTRESET\n", PORTNAME(ap));
1088 * AHCI port reset, Section 10.4.2
1090 * This function does a hard reset of the port. Note that the device
1091 * connected to the port could still end-up hung.
1094 ahci_port_hardreset(struct ahci_port *ap, int hard)
1101 DPRINTF(AHCI_D_VERBOSE, "%s: port reset\n", PORTNAME(ap));
1103 ap->ap_flags |= AP_F_IN_RESET;
1108 ahci_port_stop(ap, 0);
1109 ap->ap_state = AP_S_NORMAL;
1113 * The port may have been quiescent with its SUD bit cleared, so
1114 * set the SUD (spin up device).
1116 cmd = ahci_pread(ap, AHCI_PREG_CMD) & ~AHCI_PREG_CMD_ICC;
1117 cmd |= AHCI_PREG_CMD_SUD;
1118 ahci_pwrite(ap, AHCI_PREG_CMD, cmd);
1121 * Perform device detection. Cycle the PHY off, wait 10ms.
1122 * This simulates the SATA cable being physically unplugged.
1124 ap->ap_type = ATA_PORT_T_NONE;
1126 r = AHCI_PREG_SCTL_IPM_DISABLED;
1128 r |= AHCI_PREG_SCTL_DET_DISABLE;
1129 ahci_pwrite(ap, AHCI_PREG_SCTL, r);
1133 * Start transmitting COMRESET. COMRESET must be sent for at
1136 r = AHCI_PREG_SCTL_IPM_DISABLED | AHCI_PREG_SCTL_DET_INIT;
1137 if (AhciForceGen1 & (1 << ap->ap_num)) {
1138 kprintf("%s: Force 1.5Gbits\n", PORTNAME(ap));
1139 r |= AHCI_PREG_SCTL_SPD_GEN1;
1141 r |= AHCI_PREG_SCTL_SPD_ANY;
1143 ahci_pwrite(ap, AHCI_PREG_SCTL, r);
1147 * Only SERR_DIAG_X needs to be cleared for TFD updates, but
1148 * since we are hard-resetting the port we might as well clear
1149 * the whole enchillada
1152 ahci_pwrite(ap, AHCI_PREG_SERR, -1);
1153 r &= ~AHCI_PREG_SCTL_DET_INIT;
1154 r |= AHCI_PREG_SCTL_DET_NONE;
1155 ahci_pwrite(ap, AHCI_PREG_SCTL, r);
1158 * Try to determine if there is a device on the port.
1160 * Give the device 3/10 second to at least be detected.
1161 * If we fail clear PRCS (phy detect) since we may cycled
1162 * the phy and probably caused another PRCS interrupt.
1164 for (loop = 30; loop; --loop) {
1165 r = ahci_pread(ap, AHCI_PREG_SSTS);
1166 if (r & AHCI_PREG_SSTS_DET)
1171 ahci_pwrite(ap, AHCI_PREG_IS, AHCI_PREG_IS_PRCS);
1172 kprintf("%s: Port appears to be unplugged\n",
1178 * There is something on the port. Give the device 3 seconds
1179 * to fully negotiate.
1182 ahci_pwait_eq(ap, 3000, AHCI_PREG_SSTS,
1183 AHCI_PREG_SSTS_DET, AHCI_PREG_SSTS_DET_DEV)) {
1184 kprintf("%s: Device may be powered down\n",
1190 * Wait for the device to become ready.
1192 * This can take more then a second, give it 3 seconds. If we
1193 * succeed give the device another 3ms after that.
1195 * NOTE: Port multipliers can do two things here. First they can
1196 * return device-ready if a device is on target 0 and also
1197 * return the signature for that device. If there is no
1198 * device on target 0 then BSY/DRQ is never cleared and
1199 * it never comes ready.
1202 ahci_pwait_clr_to(ap, 3000, AHCI_PREG_TFD,
1203 AHCI_PREG_TFD_STS_BSY | AHCI_PREG_TFD_STS_DRQ)) {
1205 * The device is bricked or its a port multiplier and will
1206 * not unbusy until we do the pmprobe CLO softreset sequence.
1208 error = ahci_port_pmprobe(ap);
1210 kprintf("%s: Device will not come ready 0x%b\n",
1212 ahci_pread(ap, AHCI_PREG_TFD),
1215 ap->ap_type = ATA_PORT_T_PM;
1217 } else if (error == 0) {
1219 * We generally will not get a port multiplier signature in
1220 * this case even if this is a port multiplier, because of
1221 * Intel's stupidity. We almost certainly got target 0
1222 * behind the PM, if there is a PM.
1224 * Save the signature and probe for a PM. If we do not
1225 * find a PM then use the saved signature and return
1228 type = ahci_port_signature_detect(ap, NULL);
1229 error = ahci_port_pmprobe(ap);
1234 ap->ap_type = ATA_PORT_T_PM;
1235 kprintf("%s: Port multiplier detected\n",
1241 * hard-stop the port if we failed. This will set ap_probe
1244 ap->ap_flags &= ~AP_F_IN_RESET;
1246 ahci_port_hardstop(ap);
1247 /* ap_probe set to failed */
1249 if (ap->ap_type == ATA_PORT_T_PM)
1250 ap->ap_probe = ATA_PROBE_GOOD;
1252 ap->ap_probe = ATA_PROBE_NEED_SOFT_RESET;
1258 * AHCI port multiplier probe. This routine is run by the hardreset code
1259 * if it gets past the device detect, whether or not BSY is found to be
1262 * We MUST use CLO to properly probe whether the port multiplier exists
1265 * Return 0 on success, non-zero on failure.
1268 ahci_port_pmprobe(struct ahci_port *ap)
1270 struct ahci_cmd_hdr *cmd_slot;
1271 struct ahci_ccb *ccb = NULL;
1272 u_int8_t *fis = NULL;
1278 * If we don't support port multipliers don't try to detect one.
1280 if ((ap->ap_sc->sc_cap & AHCI_REG_CAP_SPM) == 0)
1285 kprintf("%s: START PMPROBE\n", PORTNAME(ap));
1289 * This code is only called from hardreset, which does not
1290 * high level command processing. The port should be stopped.
1292 * Set PMA mode while the port is stopped.
1294 * NOTE: On retry the port might be running, stopped, or failed.
1296 ahci_port_stop(ap, 0);
1297 ap->ap_state = AP_S_NORMAL;
1298 cmd = ahci_pread(ap, AHCI_PREG_CMD) & ~AHCI_PREG_CMD_ICC;
1299 cmd |= AHCI_PREG_CMD_PMA;
1300 ahci_pwrite(ap, AHCI_PREG_CMD, cmd);
1303 * Flush any errors and request CLO unconditionally, then start
1308 if (ahci_port_start(ap)) {
1309 kprintf("%s: PMPROBE failed to start port, cannot softreset\n",
1315 * Check whether CLO worked
1317 if (ahci_pwait_clr(ap, AHCI_PREG_TFD,
1318 AHCI_PREG_TFD_STS_BSY | AHCI_PREG_TFD_STS_DRQ)) {
1319 kprintf("%s: PMPROBE CLO %s, need port reset\n",
1321 (ahci_read(ap->ap_sc, AHCI_REG_CAP) & AHCI_REG_CAP_SCLO)
1322 ? "failed" : "unsupported");
1328 * Prep the first H2D command with SRST feature & clear busy/reset
1331 ccb = ahci_get_err_ccb(ap);
1332 cmd_slot = ccb->ccb_cmd_hdr;
1334 fis = ccb->ccb_cmd_table->cfis;
1335 bzero(fis, sizeof(ccb->ccb_cmd_table->cfis));
1336 fis[0] = ATA_FIS_TYPE_H2D;
1337 fis[1] = 0x0F; /* Target 15 */
1338 fis[15] = ATA_FIS_CONTROL_SRST | ATA_FIS_CONTROL_4BIT;
1340 cmd_slot->prdtl = 0;
1341 cmd_slot->flags = htole16(5); /* FIS length: 5 DWORDS */
1342 cmd_slot->flags |= htole16(AHCI_CMD_LIST_FLAG_C); /* Clear busy on OK */
1343 cmd_slot->flags |= htole16(AHCI_CMD_LIST_FLAG_R); /* Reset */
1344 cmd_slot->flags |= htole16(AHCI_CMD_LIST_FLAG_PMP); /* port 0xF */
1346 ccb->ccb_xa.state = ATA_S_PENDING;
1347 ccb->ccb_xa.flags = 0;
1349 if (ahci_poll(ccb, 1000, NULL) != 0 ||
1350 ccb->ccb_xa.state != ATA_S_COMPLETE) {
1351 kprintf("%s: PMPROBE First FIS failed\n", PORTNAME(ap));
1354 ahci_put_err_ccb(ccb);
1359 if (ahci_pwait_clr(ap, AHCI_PREG_TFD,
1360 AHCI_PREG_TFD_STS_BSY | AHCI_PREG_TFD_STS_DRQ)) {
1361 kprintf("%s: PMPROBE Busy after first FIS\n", PORTNAME(ap));
1365 * The device may have muffed up the PHY when it reset.
1369 ahci_pwrite(ap, AHCI_PREG_SERR, -1);
1370 /* ahci_pm_phy_status(ap, 15, &cmd); */
1373 * Prep second D2H command to read status and complete reset sequence
1374 * AHCI 10.4.1 and "Serial ATA Revision 2.6". I can't find the ATA
1375 * Rev 2.6 and it is unclear how the second FIS should be set up
1376 * from the AHCI document.
1378 * Give the device 3ms before sending the second FIS.
1380 * It is unclear which other fields in the FIS are used. Just zero
1383 bzero(fis, sizeof(ccb->ccb_cmd_table->cfis));
1384 fis[0] = ATA_FIS_TYPE_H2D;
1386 fis[15] = ATA_FIS_CONTROL_4BIT;
1388 cmd_slot->prdtl = 0;
1389 cmd_slot->flags = htole16(5); /* FIS length: 5 DWORDS */
1390 cmd_slot->flags |= htole16(AHCI_CMD_LIST_FLAG_PMP); /* port 0xF */
1392 ccb->ccb_xa.state = ATA_S_PENDING;
1393 ccb->ccb_xa.flags = 0;
1395 if (ahci_poll(ccb, 1000, NULL) != 0 ||
1396 ccb->ccb_xa.state != ATA_S_COMPLETE) {
1397 kprintf("%s: PMPROBE Second FIS failed\n", PORTNAME(ap));
1400 ahci_put_err_ccb(ccb);
1407 * What? We succeeded? Yup, but for some reason the signature
1408 * is still latched from the original detect (that saw target 0
1409 * behind the PM), and I don't know how to clear the condition
1410 * other then by retrying the whole reset sequence.
1414 ahci_put_err_ccb(ccb);
1419 * Get the signature. The caller sets the ap fields.
1421 if (ahci_port_signature_detect(ap, NULL) == ATA_PORT_T_PM) {
1422 ap->ap_ata[15].at_probe = ATA_PROBE_GOOD;
1429 * Fall through / clean up the CCB and perform error processing.
1434 * Abort our command, if it failed, by stopping command DMA.
1437 kprintf("rc=%d active=%08x sactive=%08x slot=%d\n",
1438 rc, ap->ap_active, ap->ap_sactive, ccb->ccb_slot);
1440 if (rc && (ap->ap_active & (1 << ccb->ccb_slot))) {
1441 kprintf("%s: PMP stopping the port, softreset slot "
1442 "%d was still active.\n",
1445 ahci_port_stop(ap, 0);
1447 ccb->ccb_xa.state = ATA_S_ERROR;
1449 ahci_put_err_ccb(ccb);
1452 if (rc == 0 && ahci_pm_identify(ap)) {
1453 kprintf("%s: PM - cannot identify port multiplier\n",
1458 if (rc == 0 && ahci_pm_set_feature(ap, ATA_SATAFT_ASYNCNOTIFY, 1)) {
1459 kprintf("%s: PM - Warning, cannot enable async notify\n",
1465 if (ahci_pm_read(ap, 2, 4, &data))
1466 kprintf("Cannot read snotify\n");
1468 kprintf("Read snotify %08x\n", data);
1473 * If we failed turn off PMA, otherwise identify the port multiplier.
1474 * CAM will iterate the devices.
1477 ahci_port_stop(ap, 0);
1478 cmd = ahci_pread(ap, AHCI_PREG_CMD) & ~AHCI_PREG_CMD_ICC;
1479 cmd &= ~AHCI_PREG_CMD_PMA;
1480 ahci_pwrite(ap, AHCI_PREG_CMD, cmd);
1482 ahci_port_stop(ap, 0);
1485 kprintf("%s: END PMPROBE\n", PORTNAME(ap));
1493 * Hard-stop on hot-swap device removal. See 10.10.1
1495 * Place the port in a mode that will allow it to detect hot-swap insertions.
1496 * This is a bit imprecise because just setting-up SCTL to DET_INIT doesn't
1497 * seem to do the job.
1500 ahci_port_hardstop(struct ahci_port *ap)
1502 struct ata_port *at;
1508 * Stop the port. We can't modify things like SUD if the port
1511 ap->ap_state = AP_S_FATAL_ERROR;
1512 ap->ap_probe = ATA_PROBE_FAILED;
1513 ap->ap_type = ATA_PORT_T_NONE;
1514 ahci_port_stop(ap, 0);
1515 cmd = ahci_pread(ap, AHCI_PREG_CMD);
1518 * Clean up AT sub-ports on SATA port.
1520 for (i = 0; ap->ap_ata && i < AHCI_MAX_PMPORTS; ++i) {
1521 at = &ap->ap_ata[i];
1522 at->at_type = ATA_PORT_T_NONE;
1523 at->at_probe = ATA_PROBE_FAILED;
1527 * Turn off port-multiplier control bit
1529 if (cmd & AHCI_PREG_CMD_PMA) {
1530 cmd &= ~AHCI_PREG_CMD_PMA;
1531 ahci_pwrite(ap, AHCI_PREG_CMD, cmd);
1535 * Make sure FRE is active. There isn't anything we can do if it
1536 * fails so just ignore errors.
1538 if ((cmd & AHCI_PREG_CMD_FRE) == 0) {
1539 cmd |= AHCI_PREG_CMD_FRE;
1540 ahci_pwrite(ap, AHCI_PREG_CMD, cmd);
1541 if ((ap->ap_sc->sc_flags & AHCI_F_IGN_FR) == 0)
1542 ahci_pwait_set(ap, AHCI_PREG_CMD, AHCI_PREG_CMD_FR);
1546 * 10.10.3 DET must be set to 0 before setting SUD to 0.
1547 * 10.10.1 place us in the Listen state.
1549 * Deactivating SUD only applies if the controller supports SUD.
1551 ahci_pwrite(ap, AHCI_PREG_SCTL, AHCI_PREG_SCTL_IPM_DISABLED);
1553 if (cmd & AHCI_PREG_CMD_SUD) {
1554 cmd &= ~AHCI_PREG_CMD_SUD;
1555 ahci_pwrite(ap, AHCI_PREG_CMD, cmd);
1560 * Transition su to the spin-up state. HVA shall send COMRESET and
1561 * begin initialization sequence (whatever that means).
1563 * This only applies if the controller supports SUD.
1565 cmd |= AHCI_PREG_CMD_SUD;
1566 ahci_pwrite(ap, AHCI_PREG_CMD, cmd);
1570 * Transition us to the Reset state. Theoretically we send a
1571 * continuous stream of COMRESETs in this state.
1573 r = AHCI_PREG_SCTL_IPM_DISABLED | AHCI_PREG_SCTL_DET_INIT;
1574 if (AhciForceGen1 & (1 << ap->ap_num)) {
1575 kprintf("%s: Force 1.5Gbits\n", PORTNAME(ap));
1576 r |= AHCI_PREG_SCTL_SPD_GEN1;
1578 r |= AHCI_PREG_SCTL_SPD_ANY;
1580 ahci_pwrite(ap, AHCI_PREG_SCTL, r);
1584 * Flush SERR_DIAG_X so the TFD can update.
1589 * Leave us in COMRESET (both SUD and INIT active), the HBA should
1590 * hopefully send us a DIAG_X-related interrupt if it receives
1591 * a COMINIT, and if not that then at least a Phy transition
1594 * If we transition INIT from 1->0 to begin the initalization
1595 * sequence it is unclear if that sequence will remain active
1596 * until the next device insertion.
1598 * If we go back to the listen state it is unclear if the
1599 * device will actually send us a COMINIT, since we aren't
1600 * sending any COMRESET's
1606 * Multiple events may have built up in the TFD. The spec is not very
1607 * clear on this but it does seem to serialize events so clearing DIAG_X
1608 * just once might not do the job during a reset sequence.
1611 ahci_flush_tfd(struct ahci_port *ap)
1615 r = ahci_pread(ap, AHCI_PREG_SERR);
1616 while (r & AHCI_PREG_SERR_DIAG_X) {
1617 ahci_pwrite(ap, AHCI_PREG_SERR, AHCI_PREG_SERR_DIAG_X);
1619 r = ahci_pread(ap, AHCI_PREG_SERR);
1624 * Figure out what type of device is connected to the port, ATAPI or
1628 ahci_port_signature_detect(struct ahci_port *ap, struct ata_port *at)
1632 sig = ahci_pread(ap, AHCI_PREG_SIG);
1633 kprintf("%s: sig %08x\n", ATANAME(ap, at), sig);
1634 if ((sig & 0xffff0000) == (SATA_SIGNATURE_ATAPI & 0xffff0000)) {
1635 return(ATA_PORT_T_ATAPI);
1636 } else if ((sig & 0xffff0000) ==
1637 (SATA_SIGNATURE_PORT_MULTIPLIER & 0xffff0000)) {
1638 return(ATA_PORT_T_PM);
1640 return(ATA_PORT_T_DISK);
1645 * Load the DMA descriptor table for a CCB's buffer.
1648 ahci_load_prdt(struct ahci_ccb *ccb)
1650 struct ahci_port *ap = ccb->ccb_port;
1651 struct ahci_softc *sc = ap->ap_sc;
1652 struct ata_xfer *xa = &ccb->ccb_xa;
1653 struct ahci_prdt *prdt = ccb->ccb_cmd_table->prdt;
1654 bus_dmamap_t dmap = ccb->ccb_dmamap;
1655 struct ahci_cmd_hdr *cmd_slot = ccb->ccb_cmd_hdr;
1658 if (xa->datalen == 0) {
1659 ccb->ccb_cmd_hdr->prdtl = 0;
1663 error = bus_dmamap_load(sc->sc_tag_data, dmap,
1664 xa->data, xa->datalen,
1665 ahci_load_prdt_callback,
1667 ((xa->flags & ATA_F_NOWAIT) ?
1668 BUS_DMA_NOWAIT : BUS_DMA_WAITOK));
1670 kprintf("%s: error %d loading dmamap\n", PORTNAME(ap), error);
1673 if (xa->flags & ATA_F_PIO)
1674 prdt->flags |= htole32(AHCI_PRDT_FLAG_INTR);
1676 cmd_slot->prdtl = htole16(prdt - ccb->ccb_cmd_table->prdt + 1);
1678 bus_dmamap_sync(sc->sc_tag_data, dmap,
1679 (xa->flags & ATA_F_READ) ?
1680 BUS_DMASYNC_PREREAD : BUS_DMASYNC_PREWRITE);
1686 bus_dmamap_unload(sc->sc_tag_data, dmap);
1692 * Callback from BUSDMA system to load the segment list. The passed segment
1693 * list is a temporary structure.
1697 ahci_load_prdt_callback(void *info, bus_dma_segment_t *segs, int nsegs,
1700 struct ahci_prdt *prd = *(void **)info;
1703 KKASSERT(nsegs <= AHCI_MAX_PRDT);
1706 addr = segs->ds_addr;
1707 prd->dba_hi = htole32((u_int32_t)(addr >> 32));
1708 prd->dba_lo = htole32((u_int32_t)addr);
1710 KKASSERT((addr & 1) == 0);
1711 KKASSERT((segs->ds_len & 1) == 0);
1713 prd->flags = htole32(segs->ds_len - 1);
1719 *(void **)info = prd; /* return last valid segment */
1723 ahci_unload_prdt(struct ahci_ccb *ccb)
1725 struct ahci_port *ap = ccb->ccb_port;
1726 struct ahci_softc *sc = ap->ap_sc;
1727 struct ata_xfer *xa = &ccb->ccb_xa;
1728 bus_dmamap_t dmap = ccb->ccb_dmamap;
1730 if (xa->datalen != 0) {
1731 bus_dmamap_sync(sc->sc_tag_data, dmap,
1732 (xa->flags & ATA_F_READ) ?
1733 BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE);
1735 bus_dmamap_unload(sc->sc_tag_data, dmap);
1737 if (ccb->ccb_xa.flags & ATA_F_NCQ)
1740 xa->resid = xa->datalen -
1741 le32toh(ccb->ccb_cmd_hdr->prdbc);
1746 * Start a command and poll for completion.
1748 * timeout is in ms and only counts once the command gets on-chip.
1750 * NOTE: If the caller specifies a NULL timeout function the caller is
1751 * responsible for clearing hardware state on failure, but we will
1752 * deal with removing the ccb from any pending queue.
1754 * NOTE: NCQ should never be used with this function.
1756 * NOTE: If the port is in a failed state and stopped we do not try
1757 * to activate the ccb.
1760 ahci_poll(struct ahci_ccb *ccb, int timeout, void (*timeout_fn)(void *))
1762 struct ahci_port *ap = ccb->ccb_port;
1763 int xtimeout = timeout * 2;
1765 if (ccb->ccb_port->ap_state == AP_S_FATAL_ERROR) {
1766 ccb->ccb_xa.state = ATA_S_ERROR;
1773 ahci_port_intr(ap, 1);
1774 if (ccb->ccb_xa.state != ATA_S_ONCHIP &&
1775 ccb->ccb_xa.state != ATA_S_PENDING) {
1781 kprintf("poll timeout %d xa.state = %d\n", timeout, ccb->ccb_xa.state);
1782 Debugger("Excessive poll");
1786 if (ccb->ccb_xa.state == ATA_S_ONCHIP)
1788 } while (timeout > 0);
1790 kprintf("%s: Poll timed-out for slot %d state %d\n",
1791 ATANAME(ap, ccb->ccb_xa.at), ccb->ccb_slot, ccb->ccb_xa.state);
1793 if (timeout_fn != NULL) {
1796 if (ccb->ccb_xa.state == ATA_S_PENDING)
1797 TAILQ_REMOVE(&ap->ap_ccb_pending, ccb, ccb_entry);
1798 ccb->ccb_xa.state = ATA_S_TIMEOUT;
1808 ahci_start_timeout(struct ahci_ccb *ccb)
1810 if (ccb->ccb_xa.flags & ATA_F_TIMEOUT_DESIRED) {
1811 ccb->ccb_xa.flags |= ATA_F_TIMEOUT_RUNNING;
1812 callout_reset(&ccb->ccb_timeout,
1813 (ccb->ccb_xa.timeout * hz + 999) / 1000,
1814 ahci_ata_cmd_timeout_unserialized, ccb);
1819 ahci_start(struct ahci_ccb *ccb)
1821 struct ahci_port *ap = ccb->ccb_port;
1822 struct ahci_softc *sc = ap->ap_sc;
1824 KKASSERT(ccb->ccb_xa.state == ATA_S_PENDING);
1826 /* Zero transferred byte count before transfer */
1827 ccb->ccb_cmd_hdr->prdbc = 0;
1829 /* Sync command list entry and corresponding command table entry */
1830 bus_dmamap_sync(sc->sc_tag_cmdh,
1831 AHCI_DMA_MAP(ap->ap_dmamem_cmd_list),
1832 BUS_DMASYNC_PREWRITE);
1833 bus_dmamap_sync(sc->sc_tag_cmdt,
1834 AHCI_DMA_MAP(ap->ap_dmamem_cmd_table),
1835 BUS_DMASYNC_PREWRITE);
1837 /* Prepare RFIS area for write by controller */
1838 bus_dmamap_sync(sc->sc_tag_rfis,
1839 AHCI_DMA_MAP(ap->ap_dmamem_rfis),
1840 BUS_DMASYNC_PREREAD);
1842 if (ccb->ccb_xa.flags & ATA_F_NCQ) {
1844 * Issue NCQ commands only when there are no outstanding
1845 * standard commands.
1847 if (ap->ap_active || TAILQ_FIRST(&ap->ap_ccb_pending)) {
1848 TAILQ_INSERT_TAIL(&ap->ap_ccb_pending, ccb, ccb_entry);
1850 ahci_start_timeout(ccb);
1851 KKASSERT(ap->ap_active_cnt == 0);
1852 ap->ap_sactive |= (1 << ccb->ccb_slot);
1853 ccb->ccb_xa.state = ATA_S_ONCHIP;
1854 ahci_pwrite(ap, AHCI_PREG_SACT, 1 << ccb->ccb_slot);
1855 ahci_pwrite(ap, AHCI_PREG_CI, 1 << ccb->ccb_slot);
1859 * Wait for all NCQ commands to finish before issuing standard
1860 * command. Allow up to <limit> non-NCQ commands to be active.
1862 * XXX If ap is a port multiplier only allow 1. At least the
1863 * NVidia-MCP77 part seems to barf if more then one
1864 * command is activated, even though it isn't NCQ.
1866 * If I set up more then one I get phy errors and the
1869 int limit = (ap->ap_type == ATA_PORT_T_PM) ? 1 : 2;
1870 if (ap->ap_sactive || ap->ap_active_cnt >= limit) {
1871 TAILQ_INSERT_TAIL(&ap->ap_ccb_pending, ccb, ccb_entry);
1873 ahci_start_timeout(ccb);
1874 ap->ap_active |= 1 << ccb->ccb_slot;
1875 ccb->ccb_xa.state = ATA_S_ONCHIP;
1876 ahci_pwrite(ap, AHCI_PREG_CI, 1 << ccb->ccb_slot);
1877 ap->ap_active_cnt++;
1883 ahci_issue_pending_ncq_commands(struct ahci_port *ap)
1885 struct ahci_ccb *nextccb;
1886 u_int32_t sact_change = 0;
1888 KKASSERT(ap->ap_active_cnt == 0);
1890 nextccb = TAILQ_FIRST(&ap->ap_ccb_pending);
1891 if (nextccb == NULL || !(nextccb->ccb_xa.flags & ATA_F_NCQ))
1894 /* Start all the NCQ commands at the head of the pending list. */
1896 TAILQ_REMOVE(&ap->ap_ccb_pending, nextccb, ccb_entry);
1897 ahci_start_timeout(nextccb);
1898 sact_change |= 1 << nextccb->ccb_slot;
1899 nextccb->ccb_xa.state = ATA_S_ONCHIP;
1900 nextccb = TAILQ_FIRST(&ap->ap_ccb_pending);
1901 } while (nextccb && (nextccb->ccb_xa.flags & ATA_F_NCQ));
1903 ap->ap_sactive |= sact_change;
1904 ahci_pwrite(ap, AHCI_PREG_SACT, sact_change);
1905 ahci_pwrite(ap, AHCI_PREG_CI, sact_change);
1911 ahci_issue_pending_commands(struct ahci_port *ap, int last_was_ncq)
1913 struct ahci_ccb *nextccb;
1915 nextccb = TAILQ_FIRST(&ap->ap_ccb_pending);
1916 if (nextccb && (nextccb->ccb_xa.flags & ATA_F_NCQ)) {
1917 KKASSERT(last_was_ncq == 0); /* otherwise it should have
1918 * been started already. */
1921 * Issue NCQ commands only when there are no outstanding
1922 * standard commands.
1924 if (ap->ap_active == 0)
1925 ahci_issue_pending_ncq_commands(ap);
1927 KKASSERT(ap->ap_active_cnt > 0);
1928 } else if (nextccb) {
1929 if (ap->ap_sactive || last_was_ncq)
1930 KKASSERT(ap->ap_active_cnt == 0);
1933 * Wait for all NCQ commands to finish before issuing standard
1934 * command. Then keep up to 2 standard commands on-chip at
1940 while (ap->ap_active_cnt < 2 &&
1941 nextccb && (nextccb->ccb_xa.flags & ATA_F_NCQ) == 0) {
1942 TAILQ_REMOVE(&ap->ap_ccb_pending, nextccb, ccb_entry);
1943 ahci_start_timeout(nextccb);
1944 ap->ap_active |= 1 << nextccb->ccb_slot;
1945 nextccb->ccb_xa.state = ATA_S_ONCHIP;
1946 ahci_pwrite(ap, AHCI_PREG_CI, 1 << nextccb->ccb_slot);
1947 ap->ap_active_cnt++;
1948 nextccb = TAILQ_FIRST(&ap->ap_ccb_pending);
1954 ahci_intr(void *arg)
1956 struct ahci_softc *sc = arg;
1957 struct ahci_port *ap;
1958 u_int32_t is, ack = 0;
1962 * Check if the master enable is up, and whether any interrupts are
1965 if ((sc->sc_flags & AHCI_F_INT_GOOD) == 0)
1967 is = ahci_read(sc, AHCI_REG_IS);
1968 if (is == 0 || is == 0xffffffff)
1972 #ifdef AHCI_COALESCE
1973 /* Check coalescing interrupt first */
1974 if (is & sc->sc_ccc_mask) {
1975 DPRINTF(AHCI_D_INTR, "%s: command coalescing interrupt\n",
1977 is &= ~sc->sc_ccc_mask;
1978 is |= sc->sc_ccc_ports_cur;
1983 * Process interrupts for each port in a non-blocking fashion.
1987 ap = sc->sc_ports[port];
1989 if (ahci_os_lock_port_nb(ap) == 0) {
1990 ahci_port_intr(ap, 0);
1991 ahci_os_unlock_port(ap);
1993 ahci_pwrite(ap, AHCI_PREG_IE, 0);
1994 ahci_os_signal_port_thread(ap, AP_SIGF_PORTINT);
2000 /* Finally, acknowledge global interrupt */
2001 ahci_write(sc, AHCI_REG_IS, ack);
2005 * Core called from helper thread.
2008 ahci_port_thread_core(struct ahci_port *ap, int mask)
2010 struct ahci_ccb *ccb;
2014 * Process any expired timedouts.
2016 ahci_os_lock_port(ap);
2017 if (mask & AP_SIGF_TIMEOUT) {
2018 kprintf("%s: timeout", PORTNAME(ap));
2019 for (i = 0; i < ap->ap_sc->sc_ncmds; i++) {
2020 ccb = &ap->ap_ccbs[i];
2021 if (ccb->ccb_xa.flags & ATA_F_TIMEOUT_EXPIRED) {
2022 kprintf("%s: timeout slot %d\n",
2023 PORTNAME(ap), ccb->ccb_slot);
2024 ahci_ata_cmd_timeout(ccb);
2030 * Process port interrupts which require a higher level of
2033 if (mask & AP_SIGF_PORTINT) {
2034 ahci_port_intr(ap, 1);
2035 ahci_os_unlock_port(ap);
2036 ahci_port_interrupt_enable(ap);
2038 ahci_os_unlock_port(ap);
2043 * Core per-port interrupt handler.
2045 * If blockable is 0 we cannot call ahci_os_sleep() at all and we can only
2046 * deal with normal command completions which do not require blocking.
2049 ahci_port_intr(struct ahci_port *ap, int blockable)
2051 struct ahci_softc *sc = ap->ap_sc;
2052 u_int32_t is, ci_saved, ci_masked;
2054 struct ahci_ccb *ccb = NULL;
2055 struct ata_port *ccb_at = NULL;
2056 volatile u_int32_t *active;
2060 const u_int32_t blockable_mask = AHCI_PREG_IS_TFES |
2068 enum { NEED_NOTHING, NEED_RESTART, NEED_HOTPLUG_INSERT,
2069 NEED_HOTPLUG_REMOVE } need = NEED_NOTHING;
2071 is = ahci_pread(ap, AHCI_PREG_IS);
2074 * All basic command completions are always processed.
2076 if (is & AHCI_PREG_IS_DPS)
2077 ahci_pwrite(ap, AHCI_PREG_IS, is & AHCI_PREG_IS_DPS);
2080 * If we can't block then we can't handle these here. Disable
2081 * the interrupts in question so we don't live-lock, the helper
2082 * thread will re-enable them.
2084 * If the port is in a completely failed state we do not want
2085 * to drop through to failed-command-processing if blockable is 0,
2086 * just let the thread deal with it all.
2088 * Otherwise we fall through and still handle DHRS and any commands
2089 * which completed normally. Even if we are errored we haven't
2090 * stopped the port yet so CI/SACT are still good.
2092 if (blockable == 0) {
2093 if (ap->ap_state == AP_S_FATAL_ERROR) {
2094 ahci_pwrite(ap, AHCI_PREG_IE,
2095 ahci_pread(ap, AHCI_PREG_IE) & ~is);
2096 ahci_os_signal_port_thread(ap, AP_SIGF_PORTINT);
2099 if (is & blockable_mask) {
2100 ahci_pwrite(ap, AHCI_PREG_IE,
2101 ahci_pread(ap, AHCI_PREG_IE) & ~blockable_mask);
2102 is &= ~blockable_mask;
2103 ahci_os_signal_port_thread(ap, AP_SIGF_PORTINT);
2108 kprintf("%s: INTERRUPT %b\n", PORTNAME(ap),
2113 * Either NCQ or non-NCQ commands will be active, never both.
2115 if (ap->ap_sactive) {
2116 KKASSERT(ap->ap_active == 0);
2117 KKASSERT(ap->ap_active_cnt == 0);
2118 ci_saved = ahci_pread(ap, AHCI_PREG_SACT);
2119 active = &ap->ap_sactive;
2121 ci_saved = ahci_pread(ap, AHCI_PREG_CI);
2122 active = &ap->ap_active;
2125 if (is & AHCI_PREG_IS_TFES) {
2127 * Command failed (blockable).
2129 * See AHCI 1.1 spec 6.2.2.1 and 6.2.2.2.
2131 * This stops command processing.
2133 u_int32_t tfd, serr;
2136 tfd = ahci_pread(ap, AHCI_PREG_TFD);
2137 serr = ahci_pread(ap, AHCI_PREG_SERR);
2140 * If no NCQ commands are active the error slot is easily
2141 * determined, otherwise we have to extract the error
2142 * from the log page.
2144 if (ap->ap_sactive == 0) {
2145 err_slot = AHCI_PREG_CMD_CCS(
2146 ahci_pread(ap, AHCI_PREG_CMD));
2147 ccb = &ap->ap_ccbs[err_slot];
2148 ccb_at = ccb->ccb_xa.at; /* can be NULL */
2150 /* Preserve received taskfile data from the RFIS. */
2151 memcpy(&ccb->ccb_xa.rfis, ap->ap_rfis->rfis,
2152 sizeof(struct ata_fis_d2h));
2157 DPRINTF(AHCI_D_VERBOSE, "%s: errd slot %d, TFD: %b, SERR: %b\n",
2158 PORTNAME(ap), err_slot,
2159 tfd, AHCI_PFMT_TFD_STS,
2160 serr, AHCI_PFMT_SERR);
2162 /* Stopping the port clears CI and SACT */
2163 ahci_port_stop(ap, 0);
2164 need = NEED_RESTART;
2167 * Clear SERR (primarily DIAG_X) to enable capturing of the
2170 ahci_pwrite(ap, AHCI_PREG_SERR, serr);
2172 /* Acknowledge the interrupts we can recover from. */
2173 ahci_pwrite(ap, AHCI_PREG_IS,
2174 is & (AHCI_PREG_IS_TFES | AHCI_PREG_IS_IFS));
2175 is &= ~(AHCI_PREG_IS_TFES | AHCI_PREG_IS_IFS);
2177 /* If device hasn't cleared its busy status, try to idle it. */
2178 if (tfd & (AHCI_PREG_TFD_STS_BSY | AHCI_PREG_TFD_STS_DRQ)) {
2179 kprintf("%s: Attempting to idle device ccb=%p\n",
2180 PORTNAME(ap), ccb_at);
2181 if (ap->ap_flags & AP_F_IN_RESET)
2184 * XXX how do we unbrick a PM target (ccb_at != NULL).
2186 * For now fail the target and use CLO to clear the
2187 * busy condition and make the ahci port usable for
2188 * the remaining devices.
2191 ccb_at->at_probe = ATA_PROBE_FAILED;
2193 } else if (ahci_port_reset(ap, ccb_at, 0)) {
2194 kprintf("%s: Unable to idle device, port "
2200 /* Had to reset device, can't gather extended info. */
2201 } else if (ap->ap_sactive) {
2203 * Recover the NCQ error from log page 10h.
2205 * XXX NCQ currently not supported with port
2208 ahci_port_read_ncq_error(ap, &err_slot);
2209 kprintf("recover from NCQ error err_slot %d\n",
2214 DPRINTF(AHCI_D_VERBOSE, "%s: NCQ errored slot %d\n",
2215 PORTNAME(ap), err_slot);
2217 ccb = &ap->ap_ccbs[err_slot];
2219 /* Didn't reset, could gather extended info from log. */
2220 kprintf("%s: didn't reset err_slot %d "
2221 "sact=%08x act=%08x\n",
2223 err_slot, ap->ap_sactive, ap->ap_active);
2227 * If we couldn't determine the errored slot, reset the port
2228 * and fail all the active slots.
2230 if (err_slot == -1) {
2231 if (ap->ap_flags & AP_F_IN_RESET)
2234 * XXX how do we unbrick a PM target (ccb_at != NULL).
2236 * For now fail the target and use CLO to clear the
2237 * busy condition and make the ahci port usable for
2238 * the remaining devices.
2241 ccb_at->at_probe = ATA_PROBE_FAILED;
2243 } else if (ahci_port_reset(ap, ccb_at, 0)) {
2244 kprintf("%s: Unable to idle device after "
2245 "NCQ error, port bricked on us\n",
2249 kprintf("%s: couldn't recover NCQ error, failing "
2250 "all outstanding commands.\n",
2255 /* Clear the failed command in saved CI so completion runs. */
2256 ci_saved &= ~(1 << err_slot);
2258 /* Note the error in the ata_xfer. */
2259 KKASSERT(ccb->ccb_xa.state == ATA_S_ONCHIP);
2260 ccb->ccb_xa.state = ATA_S_ERROR;
2263 /* There may only be one outstanding standard command now. */
2264 if (ap->ap_sactive == 0) {
2267 slot = ffs(tmp) - 1;
2268 tmp &= ~(1 << slot);
2273 } else if (is & AHCI_PREG_IS_DHRS) {
2275 * Command posted D2H register FIS to the rfis (non-blocking).
2277 * Command posted D2H register FIS to the rfis. This
2278 * does NOT stop command processing and it is unclear
2279 * how we are supposed to deal with it other then using
2280 * only a queue of 1.
2282 * We must copy the port rfis to the ccb and restart
2283 * command processing. ahci_pm_read() does not function
2284 * without this support.
2288 if (ap->ap_sactive == 0) {
2289 err_slot = AHCI_PREG_CMD_CCS(
2290 ahci_pread(ap, AHCI_PREG_CMD));
2291 ccb = &ap->ap_ccbs[err_slot];
2292 ccb_at = ccb->ccb_xa.at; /* can be NULL */
2294 memcpy(&ccb->ccb_xa.rfis, ap->ap_rfis->rfis,
2295 sizeof(struct ata_fis_d2h));
2297 kprintf("%s: Unexpected DHRS posted while "
2298 "NCQ running\n", PORTNAME(ap));
2301 ahci_pwrite(ap, AHCI_PREG_IS, AHCI_PREG_IS_DHRS);
2302 is &= ~AHCI_PREG_IS_DHRS;
2306 * Device notification to us (non-blocking)
2308 * NOTE! On some parts notification bits can get set without
2309 * generating an interrupt. It is unclear whether this is
2310 * a bug in the PM (sending a DTOH device setbits with 'N' set
2311 * and 'I' not set), or a bug in the host controller.
2313 * It only seems to occur under load.
2315 if (/*(is & AHCI_PREG_IS_SDBS) &&*/ (sc->sc_cap & AHCI_REG_CAP_SSNTF)) {
2319 data = ahci_pread(ap, AHCI_PREG_SNTF);
2320 if (is & AHCI_PREG_IS_SDBS) {
2321 ahci_pwrite(ap, AHCI_PREG_IS, AHCI_PREG_IS_SDBS);
2322 is &= ~AHCI_PREG_IS_SDBS;
2323 xstr = " (no SDBS!)";
2328 ahci_pwrite(ap, AHCI_PREG_IS, AHCI_PREG_IS_SDBS);
2330 kprintf("%s: NOTIFY %08x%s\n",
2331 PORTNAME(ap), data, xstr);
2332 ahci_pwrite(ap, AHCI_PREG_SERR, AHCI_PREG_SERR_DIAG_N);
2333 ahci_pwrite(ap, AHCI_PREG_SNTF, data);
2334 ahci_cam_changed(ap, NULL, -1);
2339 * Spurious IFS errors (blockable).
2341 * Spurious IFS errors can occur while we are doing a reset
2342 * sequence through a PM. Try to recover if we are being asked
2343 * to ignore IFS errors during these periods.
2345 if ((is & AHCI_PREG_IS_IFS) && (ap->ap_flags & AP_F_IGNORE_IFS)) {
2346 u_int32_t serr = ahci_pread(ap, AHCI_PREG_SERR);
2347 if ((ap->ap_flags & AP_F_IFS_IGNORED) == 0) {
2348 kprintf("%s: Ignoring IFS (XXX) (IS: %b, SERR: %b)\n",
2351 serr, AHCI_PFMT_SERR);
2352 ap->ap_flags |= AP_F_IFS_IGNORED;
2354 ap->ap_flags |= AP_F_IFS_OCCURED;
2355 ahci_pwrite(ap, AHCI_PREG_SERR, -1);
2356 ahci_pwrite(ap, AHCI_PREG_IS, AHCI_PREG_IS_IFS);
2357 is &= ~AHCI_PREG_IS_IFS;
2358 ahci_port_stop(ap, 0);
2359 ahci_port_start(ap);
2360 need = NEED_RESTART;
2364 * Port change (hot-plug) (blockable).
2366 * A PCS interrupt will occur on hot-plug once communication is
2369 * A PRCS interrupt will occur on hot-unplug (and possibly also
2372 * XXX We can then check the CPS (Cold Presence State) bit, if
2373 * supported, to determine if a device is plugged in or not and do
2376 * WARNING: A PCS interrupt is cleared by clearing DIAG_X, and
2377 * can also occur if an unsolicited COMINIT is received.
2378 * If this occurs command processing is automatically
2379 * stopped (CR goes inactive) and the port must be stopped
2382 if (is & (AHCI_PREG_IS_PCS | AHCI_PREG_IS_PRCS)) {
2383 ahci_pwrite(ap, AHCI_PREG_IS,
2384 is & (AHCI_PREG_IS_PCS | AHCI_PREG_IS_PRCS));
2385 is &= ~(AHCI_PREG_IS_PCS | AHCI_PREG_IS_PRCS);
2386 ahci_pwrite(ap, AHCI_PREG_SERR,
2387 (AHCI_PREG_SERR_DIAG_N | AHCI_PREG_SERR_DIAG_X));
2388 ahci_port_stop(ap, 0);
2389 switch (ahci_pread(ap, AHCI_PREG_SSTS) & AHCI_PREG_SSTS_DET) {
2390 case AHCI_PREG_SSTS_DET_DEV:
2391 if (ap->ap_type == ATA_PORT_T_NONE) {
2392 need = NEED_HOTPLUG_INSERT;
2395 need = NEED_RESTART;
2398 if (ap->ap_type != ATA_PORT_T_NONE) {
2399 need = NEED_HOTPLUG_REMOVE;
2402 need = NEED_RESTART;
2408 * Check for remaining errors - they are fatal. (blockable)
2410 if (is & (AHCI_PREG_IS_TFES | AHCI_PREG_IS_HBFS | AHCI_PREG_IS_IFS |
2411 AHCI_PREG_IS_OFS | AHCI_PREG_IS_UFS)) {
2414 ahci_pwrite(ap, AHCI_PREG_IS,
2415 is & (AHCI_PREG_IS_TFES | AHCI_PREG_IS_HBFS |
2416 AHCI_PREG_IS_IFS | AHCI_PREG_IS_OFS |
2418 is &= ~(AHCI_PREG_IS_TFES | AHCI_PREG_IS_HBFS |
2419 AHCI_PREG_IS_IFS | AHCI_PREG_IS_OFS |
2421 serr = ahci_pread(ap, AHCI_PREG_SERR);
2422 kprintf("%s: unrecoverable errors (IS: %b, SERR: %b), "
2423 "disabling port.\n",
2426 serr, AHCI_PFMT_SERR
2428 /* XXX try recovery first */
2433 * Fail all outstanding commands if we know the port won't recover.
2435 * We may have a ccb_at if the failed command is known and was
2436 * being sent to a device over a port multiplier (PM). In this
2437 * case if the port itself has not completely failed we fail just
2438 * the commands related to that target.
2440 if (ap->ap_state == AP_S_FATAL_ERROR) {
2442 ap->ap_state = AP_S_FATAL_ERROR;
2445 /* Stopping the port clears CI/SACT */
2446 ahci_port_stop(ap, 0);
2449 * Error all the active slots. If running across a PM
2450 * try to error out just the slots related to the target.
2452 ci_masked = ci_saved & *active;
2454 slot = ffs(ci_masked) - 1;
2455 ccb = &ap->ap_ccbs[slot];
2456 if (ccb_at == ccb->ccb_xa.at ||
2457 ap->ap_state == AP_S_FATAL_ERROR) {
2458 ci_masked &= ~(1 << slot);
2459 ccb->ccb_xa.state = ATA_S_ERROR;
2463 /* Run completion for all active slots. */
2464 ci_saved &= ~*active;
2467 * Don't restart the port if our problems were deemed fatal.
2469 * Also acknowlege all fatal interrupt sources to prevent
2472 if (ap->ap_state == AP_S_FATAL_ERROR) {
2473 if (need == NEED_RESTART)
2474 need = NEED_NOTHING;
2475 ahci_pwrite(ap, AHCI_PREG_IS,
2476 AHCI_PREG_IS_TFES | AHCI_PREG_IS_HBFS |
2477 AHCI_PREG_IS_IFS | AHCI_PREG_IS_OFS |
2483 * CCB completion (non blocking).
2485 * CCB completion is detected by noticing its slot's bit in CI has
2486 * changed to zero some time after we activated it.
2487 * If we are polling, we may only be interested in particular slot(s).
2489 * Any active bits not saved are completed within the restrictions
2490 * imposed by the caller.
2492 ci_masked = ~ci_saved & *active;
2494 slot = ffs(ci_masked) - 1;
2495 ccb = &ap->ap_ccbs[slot];
2496 ci_masked &= ~(1 << slot);
2498 DPRINTF(AHCI_D_INTR, "%s: slot %d is complete%s\n",
2499 PORTNAME(ap), slot, ccb->ccb_xa.state == ATA_S_ERROR ?
2502 bus_dmamap_sync(sc->sc_tag_cmdh,
2503 AHCI_DMA_MAP(ap->ap_dmamem_cmd_list),
2504 BUS_DMASYNC_POSTWRITE);
2506 bus_dmamap_sync(sc->sc_tag_cmdt,
2507 AHCI_DMA_MAP(ap->ap_dmamem_cmd_table),
2508 BUS_DMASYNC_POSTWRITE);
2510 bus_dmamap_sync(sc->sc_tag_rfis,
2511 AHCI_DMA_MAP(ap->ap_dmamem_rfis),
2512 BUS_DMASYNC_POSTREAD);
2514 *active &= ~(1 << ccb->ccb_slot);
2515 if (active == &ap->ap_active) {
2516 KKASSERT(ap->ap_active_cnt > 0);
2517 --ap->ap_active_cnt;
2523 * Cleanup. Will not be set if non-blocking.
2528 * A recoverable error occured and we can restart outstanding
2529 * commands on the port.
2531 ahci_port_start(ap);
2537 slot = ffs(tmp) - 1;
2538 tmp &= ~(1 << slot);
2539 ccb = &ap->ap_ccbs[slot];
2540 KKASSERT(ccb->ccb_xa.state == ATA_S_ONCHIP);
2541 KKASSERT((!!(ccb->ccb_xa.flags & ATA_F_NCQ)) ==
2542 (!!ap->ap_sactive));
2545 DPRINTF(AHCI_D_VERBOSE, "%s: ahci_port_intr "
2546 "re-enabling%s slots %08x\n", PORTNAME(ap),
2547 ap->ap_sactive ? " NCQ" : "", ci_saved);
2550 ahci_pwrite(ap, AHCI_PREG_SACT, ci_saved);
2551 ahci_pwrite(ap, AHCI_PREG_CI, ci_saved);
2554 case NEED_HOTPLUG_INSERT:
2556 * A hot-plug insertion event has occured and all
2557 * outstanding commands have already been revoked.
2559 * Don't recurse if this occurs while we are
2560 * resetting the port.
2562 if ((ap->ap_flags & AP_F_IN_RESET) == 0) {
2563 kprintf("%s: HOTPLUG - Device inserted\n",
2565 ap->ap_probe = ATA_PROBE_NEED_INIT;
2566 ahci_cam_changed(ap, NULL, -1);
2569 case NEED_HOTPLUG_REMOVE:
2571 * A hot-plug removal event has occured and all
2572 * outstanding commands have already been revoked.
2574 * Don't recurse if this occurs while we are
2575 * resetting the port.
2577 if ((ap->ap_flags & AP_F_IN_RESET) == 0) {
2578 kprintf("%s: HOTPLUG - Device removed\n",
2580 ahci_port_hardstop(ap);
2581 /* ap_probe set to failed */
2582 ahci_cam_changed(ap, NULL, -1);
2591 ahci_get_ccb(struct ahci_port *ap)
2593 struct ahci_ccb *ccb;
2595 lockmgr(&ap->ap_ccb_lock, LK_EXCLUSIVE);
2596 ccb = TAILQ_FIRST(&ap->ap_ccb_free);
2598 KKASSERT(ccb->ccb_xa.state == ATA_S_PUT);
2599 TAILQ_REMOVE(&ap->ap_ccb_free, ccb, ccb_entry);
2600 ccb->ccb_xa.state = ATA_S_SETUP;
2601 ccb->ccb_xa.at = NULL;
2603 lockmgr(&ap->ap_ccb_lock, LK_RELEASE);
2609 ahci_put_ccb(struct ahci_ccb *ccb)
2611 struct ahci_port *ap = ccb->ccb_port;
2614 if (ccb->ccb_xa.state != ATA_S_COMPLETE &&
2615 ccb->ccb_xa.state != ATA_S_TIMEOUT &&
2616 ccb->ccb_xa.state != ATA_S_ERROR) {
2617 kprintf("%s: invalid ata_xfer state %02x in ahci_put_ccb, "
2619 PORTNAME(ccb->ccb_port), ccb->ccb_xa.state,
2624 ccb->ccb_xa.state = ATA_S_PUT;
2625 lockmgr(&ap->ap_ccb_lock, LK_EXCLUSIVE);
2626 TAILQ_INSERT_TAIL(&ap->ap_ccb_free, ccb, ccb_entry);
2627 lockmgr(&ap->ap_ccb_lock, LK_RELEASE);
2631 ahci_get_err_ccb(struct ahci_port *ap)
2633 struct ahci_ccb *err_ccb;
2636 /* No commands may be active on the chip. */
2637 sact = ahci_pread(ap, AHCI_PREG_SACT);
2639 kprintf("ahci_get_err_ccb but SACT %08x != 0?\n", sact);
2640 KKASSERT(ahci_pread(ap, AHCI_PREG_CI) == 0);
2643 KKASSERT(ap->ap_err_busy == 0);
2644 ap->ap_err_busy = 1;
2646 /* Save outstanding command state. */
2647 ap->ap_err_saved_active = ap->ap_active;
2648 ap->ap_err_saved_active_cnt = ap->ap_active_cnt;
2649 ap->ap_err_saved_sactive = ap->ap_sactive;
2652 * Pretend we have no commands outstanding, so that completions won't
2655 ap->ap_active = ap->ap_active_cnt = ap->ap_sactive = 0;
2658 * Grab a CCB to use for error recovery. This should never fail, as
2659 * we ask atascsi to reserve one for us at init time.
2661 err_ccb = ahci_get_ccb(ap);
2662 KKASSERT(err_ccb != NULL);
2663 err_ccb->ccb_xa.flags = 0;
2664 err_ccb->ccb_done = ahci_empty_done;
2670 ahci_put_err_ccb(struct ahci_ccb *ccb)
2672 struct ahci_port *ap = ccb->ccb_port;
2677 KKASSERT(ap->ap_err_busy);
2680 * No commands may be active on the chip
2682 sact = ahci_pread(ap, AHCI_PREG_SACT);
2684 panic("ahci_port_err_ccb(%d) but SACT %08x != 0\n",
2685 ccb->ccb_slot, sact);
2687 ci = ahci_pread(ap, AHCI_PREG_CI);
2689 panic("ahci_put_err_ccb(%d) but CI %08x != 0 "
2690 "(act=%08x sact=%08x)\n",
2692 ap->ap_active, ap->ap_sactive);
2695 /* Done with the CCB */
2698 /* Restore outstanding command state */
2699 ap->ap_sactive = ap->ap_err_saved_sactive;
2700 ap->ap_active_cnt = ap->ap_err_saved_active_cnt;
2701 ap->ap_active = ap->ap_err_saved_active;
2704 ap->ap_err_busy = 0;
2709 * Read log page to get NCQ error.
2711 * NOTE: NCQ not currently supported on port multipliers. XXX
2714 ahci_port_read_ncq_error(struct ahci_port *ap, int *err_slotp)
2716 struct ahci_ccb *ccb;
2717 struct ahci_cmd_hdr *cmd_slot;
2719 struct ata_fis_h2d *fis;
2722 DPRINTF(AHCI_D_VERBOSE, "%s: read log page\n", PORTNAME(ap));
2724 /* Save command register state. */
2725 cmd = ahci_pread(ap, AHCI_PREG_CMD) & ~AHCI_PREG_CMD_ICC;
2727 /* Port should have been idled already. Start it. */
2728 KKASSERT((cmd & AHCI_PREG_CMD_CR) == 0);
2729 ahci_port_start(ap);
2731 /* Prep error CCB for READ LOG EXT, page 10h, 1 sector. */
2732 ccb = ahci_get_err_ccb(ap);
2733 ccb->ccb_xa.flags = ATA_F_NOWAIT | ATA_F_READ | ATA_F_POLL;
2734 ccb->ccb_xa.data = ap->ap_err_scratch;
2735 ccb->ccb_xa.datalen = 512;
2736 cmd_slot = ccb->ccb_cmd_hdr;
2737 bzero(ccb->ccb_cmd_table, sizeof(struct ahci_cmd_table));
2739 fis = (struct ata_fis_h2d *)ccb->ccb_cmd_table->cfis;
2740 fis->type = ATA_FIS_TYPE_H2D;
2741 fis->flags = ATA_H2D_FLAGS_CMD;
2742 fis->command = ATA_C_READ_LOG_EXT;
2743 fis->lba_low = 0x10; /* queued error log page (10h) */
2744 fis->sector_count = 1; /* number of sectors (1) */
2745 fis->sector_count_exp = 0;
2746 fis->lba_mid = 0; /* starting offset */
2747 fis->lba_mid_exp = 0;
2750 cmd_slot->flags = htole16(5); /* FIS length: 5 DWORDS */
2752 if (ahci_load_prdt(ccb) != 0) {
2753 rc = ENOMEM; /* XXX caller must abort all commands */
2757 ccb->ccb_xa.state = ATA_S_PENDING;
2758 if (ahci_poll(ccb, 1000, NULL) != 0)
2763 /* Abort our command, if it failed, by stopping command DMA. */
2764 if (rc && (ap->ap_active & (1 << ccb->ccb_slot))) {
2765 kprintf("%s: log page read failed, slot %d was still active.\n",
2766 PORTNAME(ap), ccb->ccb_slot);
2767 ahci_port_stop(ap, 0);
2770 /* Done with the error CCB now. */
2771 ahci_unload_prdt(ccb);
2772 ahci_put_err_ccb(ccb);
2774 /* Extract failed register set and tags from the scratch space. */
2776 struct ata_log_page_10h *log;
2779 log = (struct ata_log_page_10h *)ap->ap_err_scratch;
2780 if (log->err_regs.type & ATA_LOG_10H_TYPE_NOTQUEUED) {
2781 /* Not queued bit was set - wasn't an NCQ error? */
2782 kprintf("%s: read NCQ error page, but not an NCQ "
2787 /* Copy back the log record as a D2H register FIS. */
2788 *err_slotp = err_slot = log->err_regs.type &
2789 ATA_LOG_10H_TYPE_TAG_MASK;
2791 ccb = &ap->ap_ccbs[err_slot];
2792 memcpy(&ccb->ccb_xa.rfis, &log->err_regs,
2793 sizeof(struct ata_fis_d2h));
2794 ccb->ccb_xa.rfis.type = ATA_FIS_TYPE_D2H;
2795 ccb->ccb_xa.rfis.flags = 0;
2799 /* Restore saved CMD register state */
2800 ahci_pwrite(ap, AHCI_PREG_CMD, cmd);
2806 * Allocate memory for various structures DMAd by hardware. The maximum
2807 * number of segments for these tags is 1 so the DMA memory will have a
2808 * single physical base address.
2810 struct ahci_dmamem *
2811 ahci_dmamem_alloc(struct ahci_softc *sc, bus_dma_tag_t tag)
2813 struct ahci_dmamem *adm;
2816 adm = kmalloc(sizeof(*adm), M_DEVBUF, M_INTWAIT | M_ZERO);
2818 error = bus_dmamem_alloc(tag, (void **)&adm->adm_kva,
2819 BUS_DMA_ZERO, &adm->adm_map);
2822 error = bus_dmamap_load(tag, adm->adm_map,
2824 bus_dma_tag_getmaxsize(tag),
2825 ahci_dmamem_saveseg, &adm->adm_busaddr,
2830 bus_dmamap_destroy(tag, adm->adm_map);
2831 adm->adm_map = NULL;
2832 adm->adm_tag = NULL;
2833 adm->adm_kva = NULL;
2835 kfree(adm, M_DEVBUF);
2843 ahci_dmamem_saveseg(void *info, bus_dma_segment_t *segs, int nsegs, int error)
2845 KKASSERT(error == 0);
2846 KKASSERT(nsegs == 1);
2847 *(bus_addr_t *)info = segs->ds_addr;
2852 ahci_dmamem_free(struct ahci_softc *sc, struct ahci_dmamem *adm)
2855 bus_dmamap_unload(adm->adm_tag, adm->adm_map);
2856 bus_dmamap_destroy(adm->adm_tag, adm->adm_map);
2857 adm->adm_map = NULL;
2858 adm->adm_tag = NULL;
2859 adm->adm_kva = NULL;
2861 kfree(adm, M_DEVBUF);
2865 ahci_read(struct ahci_softc *sc, bus_size_t r)
2867 bus_space_barrier(sc->sc_iot, sc->sc_ioh, r, 4,
2868 BUS_SPACE_BARRIER_READ);
2869 return (bus_space_read_4(sc->sc_iot, sc->sc_ioh, r));
2873 ahci_write(struct ahci_softc *sc, bus_size_t r, u_int32_t v)
2875 bus_space_write_4(sc->sc_iot, sc->sc_ioh, r, v);
2876 bus_space_barrier(sc->sc_iot, sc->sc_ioh, r, 4,
2877 BUS_SPACE_BARRIER_WRITE);
2881 ahci_wait_ne(struct ahci_softc *sc, bus_size_t r, u_int32_t mask,
2886 for (i = 0; i < 1000; i++) {
2887 if ((ahci_read(sc, r) & mask) != target)
2896 ahci_pread(struct ahci_port *ap, bus_size_t r)
2898 bus_space_barrier(ap->ap_sc->sc_iot, ap->ap_ioh, r, 4,
2899 BUS_SPACE_BARRIER_READ);
2900 return (bus_space_read_4(ap->ap_sc->sc_iot, ap->ap_ioh, r));
2904 ahci_pwrite(struct ahci_port *ap, bus_size_t r, u_int32_t v)
2906 bus_space_write_4(ap->ap_sc->sc_iot, ap->ap_ioh, r, v);
2907 bus_space_barrier(ap->ap_sc->sc_iot, ap->ap_ioh, r, 4,
2908 BUS_SPACE_BARRIER_WRITE);
2912 ahci_pwait_eq(struct ahci_port *ap, int timeout,
2913 bus_size_t r, u_int32_t mask, u_int32_t target)
2917 for (i = 0; i < timeout; i++) {
2918 if ((ahci_pread(ap, r) & mask) == target)
2927 * Acquire an ata transfer.
2929 * Pass a NULL at for direct-attached transfers, and a non-NULL at for
2930 * targets that go through the port multiplier.
2933 ahci_ata_get_xfer(struct ahci_port *ap, struct ata_port *at)
2935 struct ahci_ccb *ccb;
2937 ccb = ahci_get_ccb(ap);
2939 DPRINTF(AHCI_D_XFER, "%s: ahci_ata_get_xfer: NULL ccb\n",
2944 DPRINTF(AHCI_D_XFER, "%s: ahci_ata_get_xfer got slot %d\n",
2945 PORTNAME(ap), ccb->ccb_slot);
2947 ccb->ccb_xa.at = at;
2948 ccb->ccb_xa.fis->type = ATA_FIS_TYPE_H2D;
2950 return (&ccb->ccb_xa);
2954 ahci_ata_put_xfer(struct ata_xfer *xa)
2956 struct ahci_ccb *ccb = (struct ahci_ccb *)xa;
2958 DPRINTF(AHCI_D_XFER, "ahci_ata_put_xfer slot %d\n", ccb->ccb_slot);
2964 ahci_ata_cmd(struct ata_xfer *xa)
2966 struct ahci_ccb *ccb = (struct ahci_ccb *)xa;
2967 struct ahci_cmd_hdr *cmd_slot;
2969 KKASSERT(xa->state == ATA_S_SETUP);
2971 if (ccb->ccb_port->ap_state == AP_S_FATAL_ERROR)
2974 kprintf("%s: started std command %b ccb %d ccb_at %p %d\n",
2975 ATANAME(ccb->ccb_port, ccb->ccb_xa.at),
2976 ahci_pread(ccb->ccb_port, AHCI_PREG_CMD), AHCI_PFMT_CMD,
2979 ccb->ccb_xa.at ? ccb->ccb_xa.at->at_target : -1);
2982 ccb->ccb_done = ahci_ata_cmd_done;
2984 cmd_slot = ccb->ccb_cmd_hdr;
2985 cmd_slot->flags = htole16(5); /* FIS length (in DWORDs) */
2986 if (ccb->ccb_xa.at) {
2987 cmd_slot->flags |= htole16(ccb->ccb_xa.at->at_target <<
2988 AHCI_CMD_LIST_FLAG_PMP_SHIFT);
2991 if (xa->flags & ATA_F_WRITE)
2992 cmd_slot->flags |= htole16(AHCI_CMD_LIST_FLAG_W);
2994 if (xa->flags & ATA_F_PACKET)
2995 cmd_slot->flags |= htole16(AHCI_CMD_LIST_FLAG_A);
2997 if (ahci_load_prdt(ccb) != 0)
3000 xa->state = ATA_S_PENDING;
3002 if (xa->flags & ATA_F_POLL) {
3003 ahci_poll(ccb, xa->timeout, ahci_ata_cmd_timeout);
3004 return (ATA_COMPLETE);
3008 KKASSERT((xa->flags & ATA_F_TIMEOUT_EXPIRED) == 0);
3009 xa->flags |= ATA_F_TIMEOUT_DESIRED;
3012 return (ATA_QUEUED);
3016 xa->state = ATA_S_ERROR;
3023 ahci_ata_cmd_done(struct ahci_ccb *ccb)
3025 struct ata_xfer *xa = &ccb->ccb_xa;
3027 if (xa->flags & ATA_F_TIMEOUT_RUNNING) {
3028 xa->flags &= ~ATA_F_TIMEOUT_RUNNING;
3029 callout_stop(&ccb->ccb_timeout);
3031 xa->flags &= ~(ATA_F_TIMEOUT_DESIRED | ATA_F_TIMEOUT_EXPIRED);
3033 if (xa->state == ATA_S_ONCHIP || xa->state == ATA_S_ERROR) {
3034 ahci_issue_pending_commands(ccb->ccb_port,
3035 xa->flags & ATA_F_NCQ);
3038 ahci_unload_prdt(ccb);
3040 if (xa->state == ATA_S_ONCHIP)
3041 xa->state = ATA_S_COMPLETE;
3043 else if (xa->state != ATA_S_ERROR && xa->state != ATA_S_TIMEOUT)
3044 kprintf("%s: invalid ata_xfer state %02x in ahci_ata_cmd_done, "
3046 PORTNAME(ccb->ccb_port), xa->state, ccb->ccb_slot);
3048 if (xa->state != ATA_S_TIMEOUT)
3053 * Timeout from callout, MPSAFE - nothing can mess with the CCB's flags
3054 * while the callout is runing.
3056 * We can't safely get the port lock here or delay, we could block
3057 * the callout thread.
3060 ahci_ata_cmd_timeout_unserialized(void *arg)
3062 struct ahci_ccb *ccb = arg;
3063 struct ahci_port *ap = ccb->ccb_port;
3065 ccb->ccb_xa.flags &= ~ATA_F_TIMEOUT_RUNNING;
3066 ccb->ccb_xa.flags |= ATA_F_TIMEOUT_EXPIRED;
3067 ahci_os_signal_port_thread(ap, AP_SIGF_TIMEOUT);
3071 ahci_ata_cmd_timeout(void *arg)
3073 struct ahci_ccb *ccb = arg;
3074 struct ata_xfer *xa = &ccb->ccb_xa;
3075 struct ahci_port *ap = ccb->ccb_port;
3076 volatile u_int32_t *active;
3077 int ccb_was_started, ncq_cmd;
3081 kprintf("%s: CMD TIMEOUT cmd-reg 0x%b\n"
3082 "\tsactive=%08x active=%08x\n"
3083 "\t sact=%08x ci=%08x\n",
3084 ATANAME(ap, ccb->ccb_xa.at),
3085 ahci_pread(ap, AHCI_PREG_CMD), AHCI_PFMT_CMD,
3086 ap->ap_sactive, ap->ap_active,
3087 ahci_pread(ap, AHCI_PREG_SACT),
3088 ahci_pread(ap, AHCI_PREG_CI));
3091 * NOTE: Timeout will not be running if the command was polled.
3092 * If we got here at least one of these flags should be set.
3094 KKASSERT(xa->flags & (ATA_F_POLL | ATA_F_TIMEOUT_DESIRED |
3095 ATA_F_TIMEOUT_RUNNING));
3096 xa->flags &= ~(ATA_F_TIMEOUT_RUNNING | ATA_F_TIMEOUT_EXPIRED);
3097 ncq_cmd = (xa->flags & ATA_F_NCQ);
3098 active = ncq_cmd ? &ap->ap_sactive : &ap->ap_active;
3100 if (ccb->ccb_xa.state == ATA_S_PENDING) {
3101 DPRINTF(AHCI_D_TIMEOUT, "%s: command for slot %d timed out "
3102 "before it got on chip\n", PORTNAME(ap), ccb->ccb_slot);
3103 TAILQ_REMOVE(&ap->ap_ccb_pending, ccb, ccb_entry);
3104 ccb_was_started = 0;
3105 } else if (ccb->ccb_xa.state != ATA_S_ONCHIP) {
3106 DPRINTF(AHCI_D_TIMEOUT, "%s: command slot %d already "
3107 "handled%s\n", PORTNAME(ap), ccb->ccb_slot,
3108 (*active & (1 << ccb->ccb_slot)) ?
3109 " but slot is still active?" : ".");
3111 } else if ((ahci_pread(ap, ncq_cmd ? AHCI_PREG_SACT : AHCI_PREG_CI) &
3112 (1 << ccb->ccb_slot)) == 0 &&
3113 (*active & (1 << ccb->ccb_slot))) {
3114 DPRINTF(AHCI_D_TIMEOUT, "%s: command slot %d completed but "
3115 "IRQ handler didn't detect it. Why?\n", PORTNAME(ap),
3117 *active &= ~(1 << ccb->ccb_slot);
3119 KKASSERT(ap->ap_active_cnt > 0);
3120 --ap->ap_active_cnt;
3125 ccb_was_started = 1;
3128 /* Complete the slot with a timeout error. */
3129 ccb->ccb_xa.state = ATA_S_TIMEOUT;
3130 *active &= ~(1 << ccb->ccb_slot);
3132 KKASSERT(ap->ap_active_cnt > 0);
3133 --ap->ap_active_cnt;
3135 DPRINTF(AHCI_D_TIMEOUT, "%s: run completion (1)\n", PORTNAME(ap));
3136 ccb->ccb_done(ccb); /* This won't issue pending commands or run the
3137 atascsi completion. */
3139 /* Reset port to abort running command. */
3140 if (ccb_was_started) {
3141 DPRINTF(AHCI_D_TIMEOUT, "%s: resetting port to abort%s command "
3142 "in slot %d, active %08x\n", PORTNAME(ap), ncq_cmd ? " NCQ"
3143 : "", ccb->ccb_slot, *active);
3145 if (ccb->ccb_xa.at && ap->ap_type == ATA_PORT_T_PM) {
3146 /* XXX how do we unbrick a PM target? */
3147 kprintf("%s: PM target bricked and timed-out, "
3148 "disabling PM target but trying to "
3149 "leave the port intact\n",
3150 ATANAME(ap, ccb->ccb_xa.at));
3151 ccb->ccb_xa.at->at_probe = ATA_PROBE_FAILED;
3152 ahci_port_intr(ap, 1);
3153 ahci_port_stop(ap, 0);
3155 ahci_port_start(ap);
3157 } else if (ahci_port_reset(ap, ccb->ccb_xa.at, 0)) {
3159 * If the softreset failed place the port in a
3160 * failed state and use ahci_port_intr() to cancel
3161 * any remaining commands.
3163 kprintf("%s: Unable to reset during timeout, port "
3166 ap->ap_state = AP_S_FATAL_ERROR;
3167 ahci_port_intr(ap, 1);
3174 * Restart any other commands that were aborted
3178 DPRINTF(AHCI_D_TIMEOUT, "%s: re-enabling%s slots "
3179 "%08x\n", PORTNAME(ap), ncq_cmd ? " NCQ" : "",
3182 ahci_pwrite(ap, AHCI_PREG_SACT, *active);
3183 ahci_pwrite(ap, AHCI_PREG_CI, *active);
3188 /* Issue any pending commands now. */
3189 DPRINTF(AHCI_D_TIMEOUT, "%s: issue pending\n", PORTNAME(ap));
3190 if (ccb_was_started)
3191 ahci_issue_pending_commands(ap, ncq_cmd);
3192 else if (ap->ap_active == 0)
3193 ahci_issue_pending_ncq_commands(ap);
3195 /* Complete the timed out ata_xfer I/O (may generate new I/O). */
3196 DPRINTF(AHCI_D_TIMEOUT, "%s: run completion (2)\n", PORTNAME(ap));
3199 DPRINTF(AHCI_D_TIMEOUT, "%s: splx\n", PORTNAME(ap));
3205 ahci_empty_done(struct ahci_ccb *ccb)
3207 ccb->ccb_xa.state = ATA_S_COMPLETE;