4 ATH_RATE?= sample # tx rate control algorithm
8 HALCONTRIB= ${.CURDIR}/../../../../contrib/dev/ath/ath_hal
11 SRCS+= ah_eeprom_v3.c ah_osdep.c ah.c
12 SRCS+= device_if.h bus_if.h pci_if.h opt_wlan.h opt_inet.h opt_ath.h opt_ah.h
15 # AR5210 support; these are first generation 11a-only devices.
17 .PATH: ${.CURDIR}/ar5210
18 SRCS+= ah_eeprom_v1.c \
19 ar5210_attach.c ar5210_beacon.c ar5210_interrupts.c \
20 ar5210_keycache.c ar5210_misc.c ar5210_phy.c ar5210_power.c \
21 ar5210_recv.c ar5210_reset.c ar5210_xmit.c
24 # AR5211 support; these are second generation 11b/g/a devices
25 # (but 11g was OFDM only and is not supported).
27 .PATH: ${.CURDIR}/ar5211
28 SRCS+= ar5211_attach.c ar5211_beacon.c ar5211_interrupts.c \
29 ar5211_keycache.c ar5211_misc.c ar5211_phy.c ar5211_power.c \
30 ar5211_recv.c ar5211_reset.c ar5211_xmit.c
33 # AR5212 support; this covers all other pci/cardbus legacy parts.
35 .PATH: ${.CURDIR}/ar5212
36 SRCS+= ar5212_ani.c ar5212_attach.c ar5212_beacon.c ar5212_eeprom.c \
37 ar5212_gpio.c ar5212_interrupts.c ar5212_keycache.c ar5212_misc.c \
38 ar5212_phy.c ar5212_power.c ar5212_recv.c ar5212_reset.c \
39 ar5212_rfgain.c ar5212_xmit.c
48 # AR5416, AR9130, AR9160, AR9220, AR9280, AR9285, AR9287 support.
50 # Note enabling this support requires defining AH_SUPPORT_AR5416
51 # in opt_ah.h so the 11n tx/rx descriptor format is handled.
53 # NB: 9160 depends on 5416 but 5416 does not require 9160
56 .PATH: ${.CURDIR}/ar5416
57 SRCS+= ah_eeprom_v14.c ah_eeprom_v4k.c \
58 ar5416_ani.c ar5416_attach.c ar5416_beacon.c ar5416_btcoex.c \
59 ar5416_cal.c ar5416_cal_iq.c ar5416_cal_adcgain.c ar5416_cal_adcdc.c \
60 ar5416_eeprom.c ar5416_gpio.c ar5416_interrupts.c ar5416_keycache.c \
61 ar5416_misc.c ar5416_phy.c ar5416_power.c ar5416_radar.c ar5416_spectral.c \
62 ar5416_recv.c ar5416_reset.c ar5416_xmit.c
64 # RF backend for 5416, 9130 and 9160
68 .PATH: ${.CURDIR}/ar9001
69 SRCS+= ar9160_attach.c
71 # + AR9130 - (Sowl) - Embedded (AR913x SoC)
73 # This requires AH_SUPPORT_AR9130 in order to function as some
74 # register values have shifted for this chipset. Definig this however
75 # (currently) breaks non-AR9130 chipsets - since this is an embedded
76 # chipset and no other radios are glued to it, this shouldn't pose a
78 SRCS+= ar9130_attach.c ar9130_eeprom.c ar9130_phy.c
81 # + AR9220/AR9280 - Merlin
82 .PATH: ${.CURDIR}/ar9002
83 SRCS+= ar9280.c ar9280_attach.c ar9280_olc.c
86 SRCS+= ar9285.c ar9285_reset.c ar9285_attach.c ar9285_cal.c ar9285_phy.c
87 SRCS+= ar9285_diversity.c ar9285_btcoex.c
90 SRCS+= ah_eeprom_9287.c
91 .PATH: ${.CURDIR}/ar9002
92 SRCS+= ar9287.c ar9287_reset.c ar9287_attach.c ar9287_cal.c ar9287_olc.c
95 .PATH: ${HALCONTRIB}/ar9300
96 #SRCS+= ar9300_interrupts.c ar9300_radar.c ar9300_ani.c ar9300_keycache.c
97 #SRCS+= ar9300_radio.c ar9300_xmit.c ar9300_attach.c ar9300_mci.c ar9300_stub.c
98 #SRCS+= ar9300_xmit_ds.c ar9300_beacon.c ar9300_misc.c ar9300_recv.c
99 #SRCS+= ar9300_stub_funcs.c ar9300_eeprom.c ar9300_paprd.c ar9300_recv_ds.c
100 #SRCS+= ar9300_freebsd.c ar9300_phy.c ar9300_reset.c ar9300_gpio.c
101 #SRCS+= ar9300_power.c ar9300_timer.c
103 SRCS+= ar9300_aic.c ar9300_ani.c ar9300_attach.c ar9300_beacon.c
104 SRCS+= ar9300_eeprom.c ar9300_freebsd.c ar9300_gpio.c ar9300_interrupts.c
105 SRCS+= ar9300_keycache.c ar9300_mci.c ar9300_misc.c ar9300_paprd.c
106 SRCS+= ar9300_phy.c ar9300_power.c ar9300_radar.c ar9300_radio.c
107 SRCS+= ar9300_raw_adc_capture.c ar9300_recv.c ar9300_recv_ds.c ar9300_reset.c
108 SRCS+= ar9300_rtt.c ar9300_spectral.c ar9300_stub.c
109 SRCS+= ar9300_stub_funcs.c ar9300_timer.c ar9300_tx99_tgt.c ar9300_txbf.c
110 SRCS+= ar9300_txbf_cal.c ar9300_xmit.c ar9300_xmit_ds.c
111 # missing ar9300_sim.c
113 CFLAGS+= -I. -I${HAL} -I${HALCONTRIB}
115 .include <bsd.kmod.mk>