2 * Copyright © 2006-2007 Intel Corporation
3 * Copyright (c) 2006 Dave Airlie <airlied@linux.ie>
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
9 * and/or sell copies of the Software, and to permit persons to whom the
10 * Software is furnished to do so, subject to the following conditions:
12 * The above copyright notice and this permission notice (including the next
13 * paragraph) shall be included in all copies or substantial portions of the
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
21 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
22 * DEALINGS IN THE SOFTWARE.
25 * Eric Anholt <eric@anholt.net>
26 * Dave Airlie <airlied@linux.ie>
27 * Jesse Barnes <jesse.barnes@intel.com>
28 * $FreeBSD: src/sys/dev/drm2/i915/intel_lvds.c,v 1.1 2012/05/22 11:07:44 kib Exp $
31 #include <dev/drm/drmP.h>
32 #include <dev/drm/drm.h>
33 #include <dev/drm/drm_crtc.h>
34 #include <dev/drm/drm_edid.h>
37 #include "intel_drv.h"
39 /* Private structure for the integrated LVDS support */
41 struct intel_encoder base;
50 struct drm_display_mode *fixed_mode;
53 static struct intel_lvds *to_intel_lvds(struct drm_encoder *encoder)
55 return container_of(encoder, struct intel_lvds, base.base);
58 static struct intel_lvds *intel_attached_lvds(struct drm_connector *connector)
60 return container_of(intel_attached_encoder(connector),
61 struct intel_lvds, base);
65 * Sets the power state for the panel.
67 static void intel_lvds_enable(struct intel_lvds *intel_lvds)
69 struct drm_device *dev = intel_lvds->base.base.dev;
70 struct drm_i915_private *dev_priv = dev->dev_private;
71 u32 ctl_reg, lvds_reg, stat_reg;
73 if (HAS_PCH_SPLIT(dev)) {
74 ctl_reg = PCH_PP_CONTROL;
76 stat_reg = PCH_PP_STATUS;
83 I915_WRITE(lvds_reg, I915_READ(lvds_reg) | LVDS_PORT_EN);
85 if (intel_lvds->pfit_dirty) {
87 * Enable automatic panel scaling so that non-native modes
88 * fill the screen. The panel fitter should only be
89 * adjusted whilst the pipe is disabled, according to
90 * register description and PRM.
92 DRM_DEBUG_KMS("applying panel-fitter: %x, %x\n",
93 intel_lvds->pfit_control,
94 intel_lvds->pfit_pgm_ratios);
96 I915_WRITE(PFIT_PGM_RATIOS, intel_lvds->pfit_pgm_ratios);
97 I915_WRITE(PFIT_CONTROL, intel_lvds->pfit_control);
98 intel_lvds->pfit_dirty = false;
101 I915_WRITE(ctl_reg, I915_READ(ctl_reg) | POWER_TARGET_ON);
102 POSTING_READ(lvds_reg);
103 if (_intel_wait_for(dev,
104 (I915_READ(stat_reg) & PP_ON) == 0, 1000,
106 DRM_ERROR("timed out waiting for panel to power off\n");
108 intel_panel_enable_backlight(dev);
111 static void intel_lvds_disable(struct intel_lvds *intel_lvds)
113 struct drm_device *dev = intel_lvds->base.base.dev;
114 struct drm_i915_private *dev_priv = dev->dev_private;
115 u32 ctl_reg, lvds_reg, stat_reg;
117 if (HAS_PCH_SPLIT(dev)) {
118 ctl_reg = PCH_PP_CONTROL;
120 stat_reg = PCH_PP_STATUS;
122 ctl_reg = PP_CONTROL;
124 stat_reg = PP_STATUS;
127 intel_panel_disable_backlight(dev);
129 I915_WRITE(ctl_reg, I915_READ(ctl_reg) & ~POWER_TARGET_ON);
130 if (_intel_wait_for(dev,
131 (I915_READ(stat_reg) & PP_ON) == 0, 1000,
133 DRM_ERROR("timed out waiting for panel to power off\n");
135 if (intel_lvds->pfit_control) {
136 I915_WRITE(PFIT_CONTROL, 0);
137 intel_lvds->pfit_dirty = true;
140 I915_WRITE(lvds_reg, I915_READ(lvds_reg) & ~LVDS_PORT_EN);
141 POSTING_READ(lvds_reg);
144 static void intel_lvds_dpms(struct drm_encoder *encoder, int mode)
146 struct intel_lvds *intel_lvds = to_intel_lvds(encoder);
148 if (mode == DRM_MODE_DPMS_ON)
149 intel_lvds_enable(intel_lvds);
151 intel_lvds_disable(intel_lvds);
153 /* XXX: We never power down the LVDS pairs. */
156 static int intel_lvds_mode_valid(struct drm_connector *connector,
157 struct drm_display_mode *mode)
159 struct intel_lvds *intel_lvds = intel_attached_lvds(connector);
160 struct drm_display_mode *fixed_mode = intel_lvds->fixed_mode;
162 if (mode->hdisplay > fixed_mode->hdisplay)
164 if (mode->vdisplay > fixed_mode->vdisplay)
171 centre_horizontally(struct drm_display_mode *mode,
174 u32 border, sync_pos, blank_width, sync_width;
176 /* keep the hsync and hblank widths constant */
177 sync_width = mode->crtc_hsync_end - mode->crtc_hsync_start;
178 blank_width = mode->crtc_hblank_end - mode->crtc_hblank_start;
179 sync_pos = (blank_width - sync_width + 1) / 2;
181 border = (mode->hdisplay - width + 1) / 2;
182 border += border & 1; /* make the border even */
184 mode->crtc_hdisplay = width;
185 mode->crtc_hblank_start = width + border;
186 mode->crtc_hblank_end = mode->crtc_hblank_start + blank_width;
188 mode->crtc_hsync_start = mode->crtc_hblank_start + sync_pos;
189 mode->crtc_hsync_end = mode->crtc_hsync_start + sync_width;
191 mode->private_flags |= INTEL_MODE_CRTC_TIMINGS_SET;
195 centre_vertically(struct drm_display_mode *mode,
198 u32 border, sync_pos, blank_width, sync_width;
200 /* keep the vsync and vblank widths constant */
201 sync_width = mode->crtc_vsync_end - mode->crtc_vsync_start;
202 blank_width = mode->crtc_vblank_end - mode->crtc_vblank_start;
203 sync_pos = (blank_width - sync_width + 1) / 2;
205 border = (mode->vdisplay - height + 1) / 2;
207 mode->crtc_vdisplay = height;
208 mode->crtc_vblank_start = height + border;
209 mode->crtc_vblank_end = mode->crtc_vblank_start + blank_width;
211 mode->crtc_vsync_start = mode->crtc_vblank_start + sync_pos;
212 mode->crtc_vsync_end = mode->crtc_vsync_start + sync_width;
214 mode->private_flags |= INTEL_MODE_CRTC_TIMINGS_SET;
217 static inline u32 panel_fitter_scaling(u32 source, u32 target)
220 * Floating point operation is not supported. So the FACTOR
221 * is defined, which can avoid the floating point computation
222 * when calculating the panel ratio.
225 #define FACTOR (1 << ACCURACY)
226 u32 ratio = source * FACTOR / target;
227 return (FACTOR * ratio + FACTOR/2) / FACTOR;
230 static bool intel_lvds_mode_fixup(struct drm_encoder *encoder,
231 struct drm_display_mode *mode,
232 struct drm_display_mode *adjusted_mode)
234 struct drm_device *dev = encoder->dev;
235 struct drm_i915_private *dev_priv = dev->dev_private;
236 struct intel_crtc *intel_crtc = to_intel_crtc(encoder->crtc);
237 struct intel_lvds *intel_lvds = to_intel_lvds(encoder);
238 struct drm_encoder *tmp_encoder;
239 u32 pfit_control = 0, pfit_pgm_ratios = 0, border = 0;
242 /* Should never happen!! */
243 if (INTEL_INFO(dev)->gen < 4 && intel_crtc->pipe == 0) {
244 DRM_ERROR("Can't support LVDS on pipe A\n");
248 /* Should never happen!! */
249 list_for_each_entry(tmp_encoder, &dev->mode_config.encoder_list, head) {
250 if (tmp_encoder != encoder && tmp_encoder->crtc == encoder->crtc) {
251 DRM_ERROR("Can't enable LVDS and another "
252 "encoder on the same pipe\n");
258 * We have timings from the BIOS for the panel, put them in
259 * to the adjusted mode. The CRTC will be set up for this mode,
260 * with the panel scaling set up to source from the H/VDisplay
261 * of the original mode.
263 intel_fixed_panel_mode(intel_lvds->fixed_mode, adjusted_mode);
265 if (HAS_PCH_SPLIT(dev)) {
266 intel_pch_panel_fitting(dev, intel_lvds->fitting_mode,
267 mode, adjusted_mode);
271 /* Native modes don't need fitting */
272 if (adjusted_mode->hdisplay == mode->hdisplay &&
273 adjusted_mode->vdisplay == mode->vdisplay)
276 /* 965+ wants fuzzy fitting */
277 if (INTEL_INFO(dev)->gen >= 4)
278 pfit_control |= ((intel_crtc->pipe << PFIT_PIPE_SHIFT) |
282 * Enable automatic panel scaling for non-native modes so that they fill
283 * the screen. Should be enabled before the pipe is enabled, according
284 * to register description and PRM.
285 * Change the value here to see the borders for debugging
288 I915_WRITE(BCLRPAT(pipe), 0);
290 drm_mode_set_crtcinfo(adjusted_mode, 0);
292 switch (intel_lvds->fitting_mode) {
293 case DRM_MODE_SCALE_CENTER:
295 * For centered modes, we have to calculate border widths &
296 * heights and modify the values programmed into the CRTC.
298 centre_horizontally(adjusted_mode, mode->hdisplay);
299 centre_vertically(adjusted_mode, mode->vdisplay);
300 border = LVDS_BORDER_ENABLE;
303 case DRM_MODE_SCALE_ASPECT:
304 /* Scale but preserve the aspect ratio */
305 if (INTEL_INFO(dev)->gen >= 4) {
306 u32 scaled_width = adjusted_mode->hdisplay * mode->vdisplay;
307 u32 scaled_height = mode->hdisplay * adjusted_mode->vdisplay;
309 /* 965+ is easy, it does everything in hw */
310 if (scaled_width > scaled_height)
311 pfit_control |= PFIT_ENABLE | PFIT_SCALING_PILLAR;
312 else if (scaled_width < scaled_height)
313 pfit_control |= PFIT_ENABLE | PFIT_SCALING_LETTER;
314 else if (adjusted_mode->hdisplay != mode->hdisplay)
315 pfit_control |= PFIT_ENABLE | PFIT_SCALING_AUTO;
317 u32 scaled_width = adjusted_mode->hdisplay * mode->vdisplay;
318 u32 scaled_height = mode->hdisplay * adjusted_mode->vdisplay;
320 * For earlier chips we have to calculate the scaling
321 * ratio by hand and program it into the
322 * PFIT_PGM_RATIO register
324 if (scaled_width > scaled_height) { /* pillar */
325 centre_horizontally(adjusted_mode, scaled_height / mode->vdisplay);
327 border = LVDS_BORDER_ENABLE;
328 if (mode->vdisplay != adjusted_mode->vdisplay) {
329 u32 bits = panel_fitter_scaling(mode->vdisplay, adjusted_mode->vdisplay);
330 pfit_pgm_ratios |= (bits << PFIT_HORIZ_SCALE_SHIFT |
331 bits << PFIT_VERT_SCALE_SHIFT);
332 pfit_control |= (PFIT_ENABLE |
333 VERT_INTERP_BILINEAR |
334 HORIZ_INTERP_BILINEAR);
336 } else if (scaled_width < scaled_height) { /* letter */
337 centre_vertically(adjusted_mode, scaled_width / mode->hdisplay);
339 border = LVDS_BORDER_ENABLE;
340 if (mode->hdisplay != adjusted_mode->hdisplay) {
341 u32 bits = panel_fitter_scaling(mode->hdisplay, adjusted_mode->hdisplay);
342 pfit_pgm_ratios |= (bits << PFIT_HORIZ_SCALE_SHIFT |
343 bits << PFIT_VERT_SCALE_SHIFT);
344 pfit_control |= (PFIT_ENABLE |
345 VERT_INTERP_BILINEAR |
346 HORIZ_INTERP_BILINEAR);
349 /* Aspects match, Let hw scale both directions */
350 pfit_control |= (PFIT_ENABLE |
351 VERT_AUTO_SCALE | HORIZ_AUTO_SCALE |
352 VERT_INTERP_BILINEAR |
353 HORIZ_INTERP_BILINEAR);
357 case DRM_MODE_SCALE_FULLSCREEN:
359 * Full scaling, even if it changes the aspect ratio.
360 * Fortunately this is all done for us in hw.
362 if (mode->vdisplay != adjusted_mode->vdisplay ||
363 mode->hdisplay != adjusted_mode->hdisplay) {
364 pfit_control |= PFIT_ENABLE;
365 if (INTEL_INFO(dev)->gen >= 4)
366 pfit_control |= PFIT_SCALING_AUTO;
368 pfit_control |= (VERT_AUTO_SCALE |
369 VERT_INTERP_BILINEAR |
371 HORIZ_INTERP_BILINEAR);
380 /* If not enabling scaling, be consistent and always use 0. */
381 if ((pfit_control & PFIT_ENABLE) == 0) {
386 /* Make sure pre-965 set dither correctly */
387 if (INTEL_INFO(dev)->gen < 4 && dev_priv->lvds_dither)
388 pfit_control |= PANEL_8TO6_DITHER_ENABLE;
390 if (pfit_control != intel_lvds->pfit_control ||
391 pfit_pgm_ratios != intel_lvds->pfit_pgm_ratios) {
392 intel_lvds->pfit_control = pfit_control;
393 intel_lvds->pfit_pgm_ratios = pfit_pgm_ratios;
394 intel_lvds->pfit_dirty = true;
396 dev_priv->lvds_border_bits = border;
399 * XXX: It would be nice to support lower refresh rates on the
400 * panels to reduce power consumption, and perhaps match the
401 * user's requested refresh rate.
407 static void intel_lvds_prepare(struct drm_encoder *encoder)
409 struct intel_lvds *intel_lvds = to_intel_lvds(encoder);
412 * Prior to Ironlake, we must disable the pipe if we want to adjust
413 * the panel fitter. However at all other times we can just reset
414 * the registers regardless.
416 if (!HAS_PCH_SPLIT(encoder->dev) && intel_lvds->pfit_dirty)
417 intel_lvds_disable(intel_lvds);
420 static void intel_lvds_commit(struct drm_encoder *encoder)
422 struct intel_lvds *intel_lvds = to_intel_lvds(encoder);
424 /* Always do a full power on as we do not know what state
427 intel_lvds_enable(intel_lvds);
430 static void intel_lvds_mode_set(struct drm_encoder *encoder,
431 struct drm_display_mode *mode,
432 struct drm_display_mode *adjusted_mode)
435 * The LVDS pin pair will already have been turned on in the
436 * intel_crtc_mode_set since it has a large impact on the DPLL
442 * Detect the LVDS connection.
444 * Since LVDS doesn't have hotlug, we use the lid as a proxy. Open means
445 * connected and closed means disconnected. We also send hotplug events as
446 * needed, using lid status notification from the input layer.
448 static enum drm_connector_status
449 intel_lvds_detect(struct drm_connector *connector, bool force)
451 struct drm_device *dev = connector->dev;
452 enum drm_connector_status status;
454 status = intel_panel_detect(dev);
455 if (status != connector_status_unknown)
458 return connector_status_connected;
462 * Return the list of DDC modes if available, or the BIOS fixed mode otherwise.
464 static int intel_lvds_get_modes(struct drm_connector *connector)
466 struct intel_lvds *intel_lvds = intel_attached_lvds(connector);
467 struct drm_device *dev = connector->dev;
468 struct drm_display_mode *mode;
470 if (intel_lvds->edid)
471 return drm_add_edid_modes(connector, intel_lvds->edid);
473 mode = drm_mode_duplicate(dev, intel_lvds->fixed_mode);
477 drm_mode_probed_add(connector, mode);
481 static int intel_no_modeset_on_lid_dmi_callback(const struct dmi_system_id *id)
483 DRM_DEBUG_KMS("Skipping forced modeset for %s\n", id->ident);
487 /* The GPU hangs up on these systems if modeset is performed on LID open */
488 static const struct dmi_system_id intel_no_modeset_on_lid[] = {
490 .callback = intel_no_modeset_on_lid_dmi_callback,
491 .ident = "Toshiba Tecra A11",
493 DMI_MATCH(DMI_SYS_VENDOR, "TOSHIBA"),
494 DMI_MATCH(DMI_PRODUCT_NAME, "TECRA A11"),
498 { } /* terminating entry */
503 * Lid events. Note the use of 'modeset_on_lid':
504 * - we set it on lid close, and reset it on open
505 * - we use it as a "only once" bit (ie we ignore
506 * duplicate events where it was already properly
508 * - the suspend/resume paths will also set it to
509 * zero, since they restore the mode ("lid open").
511 static int intel_lid_notify(struct notifier_block *nb, unsigned long val,
514 struct drm_i915_private *dev_priv =
515 container_of(nb, struct drm_i915_private, lid_notifier);
516 struct drm_device *dev = dev_priv->dev;
517 struct drm_connector *connector = dev_priv->int_lvds_connector;
519 if (dev->switch_power_state != DRM_SWITCH_POWER_ON)
523 * check and update the status of LVDS connector after receiving
524 * the LID nofication event.
527 connector->status = connector->funcs->detect(connector,
530 /* Don't force modeset on machines where it causes a GPU lockup */
531 if (dmi_check_system(intel_no_modeset_on_lid))
533 if (!acpi_lid_open()) {
534 dev_priv->modeset_on_lid = 1;
538 if (!dev_priv->modeset_on_lid)
541 dev_priv->modeset_on_lid = 0;
543 mutex_lock(&dev->mode_config.mutex);
544 drm_helper_resume_force_mode(dev);
545 mutex_unlock(&dev->mode_config.mutex);
552 * intel_lvds_destroy - unregister and free LVDS structures
553 * @connector: connector to free
555 * Unregister the DDC bus for this connector then free the driver private
558 static void intel_lvds_destroy(struct drm_connector *connector)
560 struct drm_device *dev = connector->dev;
562 struct drm_i915_private *dev_priv = dev->dev_private;
565 intel_panel_destroy_backlight(dev);
568 if (dev_priv->lid_notifier.notifier_call)
569 acpi_lid_notifier_unregister(&dev_priv->lid_notifier);
572 drm_sysfs_connector_remove(connector);
574 drm_connector_cleanup(connector);
575 drm_free(connector, DRM_MEM_KMS);
578 static int intel_lvds_set_property(struct drm_connector *connector,
579 struct drm_property *property,
582 struct intel_lvds *intel_lvds = intel_attached_lvds(connector);
583 struct drm_device *dev = connector->dev;
585 if (property == dev->mode_config.scaling_mode_property) {
586 struct drm_crtc *crtc = intel_lvds->base.base.crtc;
588 if (value == DRM_MODE_SCALE_NONE) {
589 DRM_DEBUG_KMS("no scaling not supported\n");
593 if (intel_lvds->fitting_mode == value) {
594 /* the LVDS scaling property is not changed */
597 intel_lvds->fitting_mode = value;
598 if (crtc && crtc->enabled) {
600 * If the CRTC is enabled, the display will be changed
601 * according to the new panel fitting mode.
603 drm_crtc_helper_set_mode(crtc, &crtc->mode,
604 crtc->x, crtc->y, crtc->fb);
611 static const struct drm_encoder_helper_funcs intel_lvds_helper_funcs = {
612 .dpms = intel_lvds_dpms,
613 .mode_fixup = intel_lvds_mode_fixup,
614 .prepare = intel_lvds_prepare,
615 .mode_set = intel_lvds_mode_set,
616 .commit = intel_lvds_commit,
619 static const struct drm_connector_helper_funcs intel_lvds_connector_helper_funcs = {
620 .get_modes = intel_lvds_get_modes,
621 .mode_valid = intel_lvds_mode_valid,
622 .best_encoder = intel_best_encoder,
625 static const struct drm_connector_funcs intel_lvds_connector_funcs = {
626 .dpms = drm_helper_connector_dpms,
627 .detect = intel_lvds_detect,
628 .fill_modes = drm_helper_probe_single_connector_modes,
629 .set_property = intel_lvds_set_property,
630 .destroy = intel_lvds_destroy,
633 static const struct drm_encoder_funcs intel_lvds_enc_funcs = {
634 .destroy = intel_encoder_destroy,
637 static int intel_no_lvds_dmi_callback(const struct dmi_system_id *id)
639 DRM_DEBUG_KMS("Skipping LVDS initialization for %s\n", id->ident);
643 /* These systems claim to have LVDS, but really don't */
644 static const struct dmi_system_id intel_no_lvds[] = {
646 .callback = intel_no_lvds_dmi_callback,
647 .ident = "Apple Mac Mini (Core series)",
649 DMI_MATCH(DMI_SYS_VENDOR, "Apple"),
650 DMI_MATCH(DMI_PRODUCT_NAME, "Macmini1,1"),
654 .callback = intel_no_lvds_dmi_callback,
655 .ident = "Apple Mac Mini (Core 2 series)",
657 DMI_MATCH(DMI_SYS_VENDOR, "Apple"),
658 DMI_MATCH(DMI_PRODUCT_NAME, "Macmini2,1"),
662 .callback = intel_no_lvds_dmi_callback,
663 .ident = "MSI IM-945GSE-A",
665 DMI_MATCH(DMI_SYS_VENDOR, "MSI"),
666 DMI_MATCH(DMI_PRODUCT_NAME, "A9830IMS"),
670 .callback = intel_no_lvds_dmi_callback,
671 .ident = "Dell Studio Hybrid",
673 DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
674 DMI_MATCH(DMI_PRODUCT_NAME, "Studio Hybrid 140g"),
678 .callback = intel_no_lvds_dmi_callback,
679 .ident = "Dell OptiPlex FX170",
681 DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
682 DMI_MATCH(DMI_PRODUCT_NAME, "OptiPlex FX170"),
686 .callback = intel_no_lvds_dmi_callback,
687 .ident = "AOpen Mini PC",
689 DMI_MATCH(DMI_SYS_VENDOR, "AOpen"),
690 DMI_MATCH(DMI_PRODUCT_NAME, "i965GMx-IF"),
694 .callback = intel_no_lvds_dmi_callback,
695 .ident = "AOpen Mini PC MP915",
697 DMI_MATCH(DMI_BOARD_VENDOR, "AOpen"),
698 DMI_MATCH(DMI_BOARD_NAME, "i915GMx-F"),
702 .callback = intel_no_lvds_dmi_callback,
703 .ident = "AOpen i915GMm-HFS",
705 DMI_MATCH(DMI_BOARD_VENDOR, "AOpen"),
706 DMI_MATCH(DMI_BOARD_NAME, "i915GMm-HFS"),
710 .callback = intel_no_lvds_dmi_callback,
711 .ident = "AOpen i45GMx-I",
713 DMI_MATCH(DMI_BOARD_VENDOR, "AOpen"),
714 DMI_MATCH(DMI_BOARD_NAME, "i45GMx-I"),
718 .callback = intel_no_lvds_dmi_callback,
719 .ident = "Aopen i945GTt-VFA",
721 DMI_MATCH(DMI_PRODUCT_VERSION, "AO00001JW"),
725 .callback = intel_no_lvds_dmi_callback,
726 .ident = "Clientron U800",
728 DMI_MATCH(DMI_SYS_VENDOR, "Clientron"),
729 DMI_MATCH(DMI_PRODUCT_NAME, "U800"),
733 .callback = intel_no_lvds_dmi_callback,
734 .ident = "Clientron E830",
736 DMI_MATCH(DMI_SYS_VENDOR, "Clientron"),
737 DMI_MATCH(DMI_PRODUCT_NAME, "E830"),
741 .callback = intel_no_lvds_dmi_callback,
742 .ident = "Asus EeeBox PC EB1007",
744 DMI_MATCH(DMI_SYS_VENDOR, "ASUSTeK Computer INC."),
745 DMI_MATCH(DMI_PRODUCT_NAME, "EB1007"),
749 .callback = intel_no_lvds_dmi_callback,
750 .ident = "Asus AT5NM10T-I",
752 DMI_MATCH(DMI_BOARD_VENDOR, "ASUSTeK Computer INC."),
753 DMI_MATCH(DMI_BOARD_NAME, "AT5NM10T-I"),
757 .callback = intel_no_lvds_dmi_callback,
758 .ident = "Hewlett-Packard t5745",
760 DMI_MATCH(DMI_BOARD_VENDOR, "Hewlett-Packard"),
761 DMI_MATCH(DMI_PRODUCT_NAME, "hp t5745"),
765 .callback = intel_no_lvds_dmi_callback,
766 .ident = "Hewlett-Packard st5747",
768 DMI_MATCH(DMI_BOARD_VENDOR, "Hewlett-Packard"),
769 DMI_MATCH(DMI_PRODUCT_NAME, "hp st5747"),
773 .callback = intel_no_lvds_dmi_callback,
774 .ident = "MSI Wind Box DC500",
776 DMI_MATCH(DMI_BOARD_VENDOR, "MICRO-STAR INTERNATIONAL CO., LTD"),
777 DMI_MATCH(DMI_BOARD_NAME, "MS-7469"),
781 .callback = intel_no_lvds_dmi_callback,
782 .ident = "Supermicro X7SPA-H",
784 DMI_MATCH(DMI_SYS_VENDOR, "Supermicro"),
785 DMI_MATCH(DMI_PRODUCT_NAME, "X7SPA-H"),
789 { } /* terminating entry */
793 * intel_find_lvds_downclock - find the reduced downclock for LVDS in EDID
795 * @connector: LVDS connector
797 * Find the reduced downclock for LVDS in EDID.
799 static void intel_find_lvds_downclock(struct drm_device *dev,
800 struct drm_display_mode *fixed_mode,
801 struct drm_connector *connector)
803 struct drm_i915_private *dev_priv = dev->dev_private;
804 struct drm_display_mode *scan;
807 temp_downclock = fixed_mode->clock;
808 list_for_each_entry(scan, &connector->probed_modes, head) {
810 * If one mode has the same resolution with the fixed_panel
811 * mode while they have the different refresh rate, it means
812 * that the reduced downclock is found for the LVDS. In such
813 * case we can set the different FPx0/1 to dynamically select
814 * between low and high frequency.
816 if (scan->hdisplay == fixed_mode->hdisplay &&
817 scan->hsync_start == fixed_mode->hsync_start &&
818 scan->hsync_end == fixed_mode->hsync_end &&
819 scan->htotal == fixed_mode->htotal &&
820 scan->vdisplay == fixed_mode->vdisplay &&
821 scan->vsync_start == fixed_mode->vsync_start &&
822 scan->vsync_end == fixed_mode->vsync_end &&
823 scan->vtotal == fixed_mode->vtotal) {
824 if (scan->clock < temp_downclock) {
826 * The downclock is already found. But we
827 * expect to find the lower downclock.
829 temp_downclock = scan->clock;
833 if (temp_downclock < fixed_mode->clock && i915_lvds_downclock) {
834 /* We found the downclock for LVDS. */
835 dev_priv->lvds_downclock_avail = 1;
836 dev_priv->lvds_downclock = temp_downclock;
837 DRM_DEBUG_KMS("LVDS downclock is found in EDID. "
838 "Normal clock %dKhz, downclock %dKhz\n",
839 fixed_mode->clock, temp_downclock);
844 * Enumerate the child dev array parsed from VBT to check whether
845 * the LVDS is present.
846 * If it is present, return 1.
847 * If it is not present, return false.
848 * If no child dev is parsed from VBT, it assumes that the LVDS is present.
850 static bool lvds_is_present_in_vbt(struct drm_device *dev,
853 struct drm_i915_private *dev_priv = dev->dev_private;
856 if (!dev_priv->child_dev_num)
859 for (i = 0; i < dev_priv->child_dev_num; i++) {
860 struct child_device_config *child = dev_priv->child_dev + i;
862 /* If the device type is not LFP, continue.
863 * We have to check both the new identifiers as well as the
864 * old for compatibility with some BIOSes.
866 if (child->device_type != DEVICE_TYPE_INT_LFP &&
867 child->device_type != DEVICE_TYPE_LFP)
871 *i2c_pin = child->i2c_pin;
873 /* However, we cannot trust the BIOS writers to populate
874 * the VBT correctly. Since LVDS requires additional
875 * information from AIM blocks, a non-zero addin offset is
876 * a good indicator that the LVDS is actually present.
878 if (child->addin_offset)
881 /* But even then some BIOS writers perform some black magic
882 * and instantiate the device without reference to any
883 * additional data. Trust that if the VBT was written into
884 * the OpRegion then they have validated the LVDS's existence.
886 if (dev_priv->opregion.vbt)
893 static bool intel_lvds_supported(struct drm_device *dev)
895 /* With the introduction of the PCH we gained a dedicated
896 * LVDS presence pin, use it. */
897 if (HAS_PCH_SPLIT(dev))
900 /* Otherwise LVDS was only attached to mobile products,
901 * except for the inglorious 830gm */
902 return IS_MOBILE(dev) && !IS_I830(dev);
906 * intel_lvds_init - setup LVDS connectors on this device
909 * Create the connector, register the LVDS DDC bus, and try to figure out what
910 * modes we can display on the LVDS panel (if present).
912 bool intel_lvds_init(struct drm_device *dev)
914 struct drm_i915_private *dev_priv = dev->dev_private;
915 struct intel_lvds *intel_lvds;
916 struct intel_encoder *intel_encoder;
917 struct intel_connector *intel_connector;
918 struct drm_connector *connector;
919 struct drm_encoder *encoder;
920 struct drm_display_mode *scan; /* *modes, *bios_mode; */
921 struct drm_crtc *crtc;
926 if (!intel_lvds_supported(dev))
929 /* Skip init on machines we know falsely report LVDS */
930 if (dmi_check_system(intel_no_lvds))
933 pin = GMBUS_PORT_PANEL;
934 if (!lvds_is_present_in_vbt(dev, &pin)) {
935 DRM_DEBUG_KMS("LVDS is not present in VBT\n");
939 if (HAS_PCH_SPLIT(dev)) {
940 if ((I915_READ(PCH_LVDS) & LVDS_DETECTED) == 0)
942 if (dev_priv->edp.support) {
943 DRM_DEBUG_KMS("disable LVDS for eDP support\n");
948 intel_lvds = kmalloc(sizeof(struct intel_lvds), DRM_MEM_KMS,
950 intel_connector = kmalloc(sizeof(struct intel_connector), DRM_MEM_KMS,
953 if (!HAS_PCH_SPLIT(dev)) {
954 intel_lvds->pfit_control = I915_READ(PFIT_CONTROL);
957 intel_encoder = &intel_lvds->base;
958 encoder = &intel_encoder->base;
959 connector = &intel_connector->base;
960 drm_connector_init(dev, &intel_connector->base, &intel_lvds_connector_funcs,
961 DRM_MODE_CONNECTOR_LVDS);
963 drm_encoder_init(dev, &intel_encoder->base, &intel_lvds_enc_funcs,
964 DRM_MODE_ENCODER_LVDS);
966 intel_connector_attach_encoder(intel_connector, intel_encoder);
967 intel_encoder->type = INTEL_OUTPUT_LVDS;
969 intel_encoder->clone_mask = (1 << INTEL_LVDS_CLONE_BIT);
970 if (HAS_PCH_SPLIT(dev))
971 intel_encoder->crtc_mask = (1 << 0) | (1 << 1) | (1 << 2);
973 intel_encoder->crtc_mask = (1 << 1);
975 drm_encoder_helper_add(encoder, &intel_lvds_helper_funcs);
976 drm_connector_helper_add(connector, &intel_lvds_connector_helper_funcs);
977 connector->display_info.subpixel_order = SubPixelHorizontalRGB;
978 connector->interlace_allowed = false;
979 connector->doublescan_allowed = false;
981 /* create the scaling mode property */
982 drm_mode_create_scaling_mode_property(dev);
984 * the initial panel fitting mode will be FULL_SCREEN.
987 drm_connector_attach_property(&intel_connector->base,
988 dev->mode_config.scaling_mode_property,
989 DRM_MODE_SCALE_ASPECT);
990 intel_lvds->fitting_mode = DRM_MODE_SCALE_ASPECT;
993 * 1) check for EDID on DDC
994 * 2) check for VBT data
995 * 3) check to see if LVDS is already on
996 * if none of the above, no panel
997 * 4) make sure lid is open
998 * if closed, act like it's not there for now
1002 * Attempt to get the fixed panel mode from DDC. Assume that the
1003 * preferred mode is the right one.
1005 intel_lvds->edid = drm_get_edid(connector, dev_priv->gmbus[pin]);
1006 if (intel_lvds->edid) {
1007 if (drm_add_edid_modes(connector,
1008 intel_lvds->edid)) {
1009 drm_mode_connector_update_edid_property(connector,
1012 drm_free(intel_lvds->edid, DRM_MEM_KMS);
1013 intel_lvds->edid = NULL;
1016 if (!intel_lvds->edid) {
1017 /* Didn't get an EDID, so
1018 * Set wide sync ranges so we get all modes
1019 * handed to valid_mode for checking
1021 connector->display_info.min_vfreq = 0;
1022 connector->display_info.max_vfreq = 200;
1023 connector->display_info.min_hfreq = 0;
1024 connector->display_info.max_hfreq = 200;
1027 list_for_each_entry(scan, &connector->probed_modes, head) {
1028 if (scan->type & DRM_MODE_TYPE_PREFERRED) {
1029 intel_lvds->fixed_mode =
1030 drm_mode_duplicate(dev, scan);
1031 intel_find_lvds_downclock(dev,
1032 intel_lvds->fixed_mode,
1038 /* Failed to get EDID, what about VBT? */
1039 if (dev_priv->lfp_lvds_vbt_mode) {
1040 intel_lvds->fixed_mode =
1041 drm_mode_duplicate(dev, dev_priv->lfp_lvds_vbt_mode);
1042 if (intel_lvds->fixed_mode) {
1043 intel_lvds->fixed_mode->type |=
1044 DRM_MODE_TYPE_PREFERRED;
1050 * If we didn't get EDID, try checking if the panel is already turned
1051 * on. If so, assume that whatever is currently programmed is the
1055 /* Ironlake: FIXME if still fail, not try pipe mode now */
1056 if (HAS_PCH_SPLIT(dev))
1059 lvds = I915_READ(LVDS);
1060 pipe = (lvds & LVDS_PIPEB_SELECT) ? 1 : 0;
1061 crtc = intel_get_crtc_for_pipe(dev, pipe);
1063 if (crtc && (lvds & LVDS_PORT_EN)) {
1064 intel_lvds->fixed_mode = intel_crtc_mode_get(dev, crtc);
1065 if (intel_lvds->fixed_mode) {
1066 intel_lvds->fixed_mode->type |=
1067 DRM_MODE_TYPE_PREFERRED;
1072 /* If we still don't have a mode after all that, give up. */
1073 if (!intel_lvds->fixed_mode)
1077 if (HAS_PCH_SPLIT(dev)) {
1080 pipe = (I915_READ(PCH_LVDS) & LVDS_PIPEB_SELECT) ? 1 : 0;
1082 /* make sure PWM is enabled and locked to the LVDS pipe */
1083 pwm = I915_READ(BLC_PWM_CPU_CTL2);
1084 if (pipe == 0 && (pwm & PWM_PIPE_B))
1085 I915_WRITE(BLC_PWM_CPU_CTL2, pwm & ~PWM_ENABLE);
1090 I915_WRITE(BLC_PWM_CPU_CTL2, pwm | PWM_ENABLE);
1092 pwm = I915_READ(BLC_PWM_PCH_CTL1);
1093 pwm |= PWM_PCH_ENABLE;
1094 I915_WRITE(BLC_PWM_PCH_CTL1, pwm);
1096 * Unlock registers and just
1097 * leave them unlocked
1099 I915_WRITE(PCH_PP_CONTROL,
1100 I915_READ(PCH_PP_CONTROL) | PANEL_UNLOCK_REGS);
1103 * Unlock registers and just
1104 * leave them unlocked
1106 I915_WRITE(PP_CONTROL,
1107 I915_READ(PP_CONTROL) | PANEL_UNLOCK_REGS);
1110 dev_priv->lid_notifier.notifier_call = intel_lid_notify;
1111 if (acpi_lid_notifier_register(&dev_priv->lid_notifier)) {
1112 DRM_DEBUG_KMS("lid notifier registration failed\n");
1113 dev_priv->lid_notifier.notifier_call = NULL;
1116 /* keep the LVDS connector */
1117 dev_priv->int_lvds_connector = connector;
1119 drm_sysfs_connector_add(connector);
1121 intel_panel_setup_backlight(dev);
1125 DRM_DEBUG_KMS("No LVDS modes found, disabling.\n");
1126 drm_connector_cleanup(connector);
1127 drm_encoder_cleanup(encoder);
1128 drm_free(intel_lvds, DRM_MEM_KMS);
1129 drm_free(intel_connector, DRM_MEM_KMS);