Device layer rollup commit.
[dragonfly.git] / sys / dev / raid / asr / asr.c
1 /* $FreeBSD: src/sys/dev/asr/asr.c,v 1.3.2.2 2001/08/23 05:21:29 scottl Exp $ */
2 /* $DragonFly: src/sys/dev/raid/asr/asr.c,v 1.14 2004/05/19 22:52:46 dillon Exp $ */
3 /*
4  * Copyright (c) 1996-2000 Distributed Processing Technology Corporation
5  * Copyright (c) 2000-2001 Adaptec Corporation
6  * All rights reserved.
7  *
8  * TERMS AND CONDITIONS OF USE
9  *
10  * Redistribution and use in source form, with or without modification, are
11  * permitted provided that redistributions of source code must retain the
12  * above copyright notice, this list of conditions and the following disclaimer.
13  *
14  * This software is provided `as is' by Adaptec and any express or implied
15  * warranties, including, but not limited to, the implied warranties of
16  * merchantability and fitness for a particular purpose, are disclaimed. In no
17  * event shall Adaptec be liable for any direct, indirect, incidental, special,
18  * exemplary or consequential damages (including, but not limited to,
19  * procurement of substitute goods or services; loss of use, data, or profits;
20  * or business interruptions) however caused and on any theory of liability,
21  * whether in contract, strict liability, or tort (including negligence or
22  * otherwise) arising in any way out of the use of this driver software, even
23  * if advised of the possibility of such damage.
24  *
25  * SCSI I2O host adapter driver
26  *
27  *      V1.08 2001/08/21 Mark_Salyzyn@adaptec.com
28  *              - The 2000S and 2005S do not initialize on some machines,
29  *                increased timeout to 255ms from 50ms for the StatusGet
30  *                command.
31  *      V1.07 2001/05/22 Mark_Salyzyn@adaptec.com
32  *              - I knew this one was too good to be true. The error return
33  *                on ioctl commands needs to be compared to CAM_REQ_CMP, not
34  *                to the bit masked status.
35  *      V1.06 2001/05/08 Mark_Salyzyn@adaptec.com
36  *              - The 2005S that was supported is affectionately called the
37  *                Conjoined BAR Firmware. In order to support RAID-5 in a
38  *                16MB low-cost configuration, Firmware was forced to go
39  *                to a Split BAR Firmware. This requires a separate IOP and
40  *                Messaging base address.
41  *      V1.05 2001/04/25 Mark_Salyzyn@adaptec.com
42  *              - Handle support for 2005S Zero Channel RAID solution.
43  *              - System locked up if the Adapter locked up. Do not try
44  *                to send other commands if the resetIOP command fails. The
45  *                fail outstanding command discovery loop was flawed as the
46  *                removal of the command from the list prevented discovering
47  *                all the commands.
48  *              - Comment changes to clarify driver.
49  *              - SysInfo searched for an EATA SmartROM, not an I2O SmartROM.
50  *              - We do not use the AC_FOUND_DEV event because of I2O.
51  *                Removed asr_async.
52  *      V1.04 2000/09/22 Mark_Salyzyn@adaptec.com, msmith@freebsd.org,
53  *                       lampa@fee.vutbr.cz and Scott_Long@adaptec.com.
54  *              - Removed support for PM1554, PM2554 and PM2654 in Mode-0
55  *                mode as this is confused with competitor adapters in run
56  *                mode.
57  *              - critical locking needed in ASR_ccbAdd and ASR_ccbRemove
58  *                to prevent operating system panic.
59  *              - moved default major number to 154 from 97.
60  *      V1.03 2000/07/12 Mark_Salyzyn@adaptec.com
61  *              - The controller is not actually an ASR (Adaptec SCSI RAID)
62  *                series that is visible, it's more of an internal code name.
63  *                remove any visible references within reason for now.
64  *              - bus_ptr->LUN was not correctly zeroed when initially
65  *                allocated causing a possible panic of the operating system
66  *                during boot.
67  *      V1.02 2000/06/26 Mark_Salyzyn@adaptec.com
68  *              - Code always fails for ASR_getTid affecting performance.
69  *              - initiated a set of changes that resulted from a formal
70  *                code inspection by Mark_Salyzyn@adaptec.com,
71  *                George_Dake@adaptec.com, Jeff_Zeak@adaptec.com,
72  *                Martin_Wilson@adaptec.com and Vincent_Trandoan@adaptec.com.
73  *                Their findings were focussed on the LCT & TID handler, and
74  *                all resulting changes were to improve code readability,
75  *                consistency or have a positive effect on performance.
76  *      V1.01 2000/06/14 Mark_Salyzyn@adaptec.com
77  *              - Passthrough returned an incorrect error.
78  *              - Passthrough did not migrate the intrinsic scsi layer wakeup
79  *                on command completion.
80  *              - generate control device nodes using make_dev and delete_dev.
81  *              - Performance affected by TID caching reallocing.
82  *              - Made suggested changes by Justin_Gibbs@adaptec.com
83  *                      - use splcam instead of splbio.
84  *                      - use cam_imask instead of bio_imask.
85  *                      - use u_int8_t instead of u_char.
86  *                      - use u_int16_t instead of u_short.
87  *                      - use u_int32_t instead of u_long where appropriate.
88  *                      - use 64 bit context handler instead of 32 bit.
89  *                      - create_ccb should only allocate the worst case
90  *                        requirements for the driver since CAM may evolve
91  *                        making union ccb much larger than needed here.
92  *                        renamed create_ccb to asr_alloc_ccb.
93  *                      - go nutz justifying all debug prints as macros
94  *                        defined at the top and remove unsightly ifdefs.
95  *                      - INLINE STATIC viewed as confusing. Historically
96  *                        utilized to affect code performance and debug
97  *                        issues in OS, Compiler or OEM specific situations.
98  *      V1.00 2000/05/31 Mark_Salyzyn@adaptec.com
99  *              - Ported from FreeBSD 2.2.X DPT I2O driver.
100  *                      changed struct scsi_xfer to union ccb/struct ccb_hdr
101  *                      changed variable name xs to ccb
102  *                      changed struct scsi_link to struct cam_path
103  *                      changed struct scsibus_data to struct cam_sim
104  *                      stopped using fordriver for holding on to the TID
105  *                      use proprietary packet creation instead of scsi_inquire
106  *                      CAM layer sends synchronize commands.
107  */
108
109 #define ASR_VERSION     1
110 #define ASR_REVISION    '0'
111 #define ASR_SUBREVISION '8'
112 #define ASR_MONTH       8
113 #define ASR_DAY         21
114 #define ASR_YEAR        2001 - 1980
115
116 /*
117  *      Debug macros to reduce the unsightly ifdefs
118  */
119 #if (defined(DEBUG_ASR) || defined(DEBUG_ASR_USR_CMD) || defined(DEBUG_ASR_CMD))
120 # define debug_asr_message(message)                                            \
121         {                                                                      \
122                 u_int32_t * pointer = (u_int32_t *)message;                    \
123                 u_int32_t   length = I2O_MESSAGE_FRAME_getMessageSize(message);\
124                 u_int32_t   counter = 0;                                       \
125                                                                                \
126                 while (length--) {                                             \
127                         printf ("%08lx%c", (u_long)*(pointer++),               \
128                           (((++counter & 7) == 0) || (length == 0))            \
129                             ? '\n'                                             \
130                             : ' ');                                            \
131                 }                                                              \
132         }
133 #endif /* DEBUG_ASR || DEBUG_ASR_USR_CMD || DEBUG_ASR_CMD */
134
135 #if (defined(DEBUG_ASR))
136   /* Breaks on none STDC based compilers :-( */
137 # define debug_asr_printf(fmt,args...)   printf(fmt, ##args)
138 # define debug_asr_dump_message(message) debug_asr_message(message)
139 # define debug_asr_print_path(ccb)       xpt_print_path(ccb->ccb_h.path);
140   /* None fatal version of the ASSERT macro */
141 # if (defined(__STDC__))
142 #  define ASSERT(phrase) if(!(phrase))printf(#phrase " at line %d file %s\n",__LINE__,__FILE__)
143 # else
144 #  define ASSERT(phrase) if(!(phrase))printf("phrase" " at line %d file %s\n",__LINE__,__FILE__)
145 # endif
146 #else /* DEBUG_ASR */
147 # define debug_asr_printf(fmt,args...)
148 # define debug_asr_dump_message(message)
149 # define debug_asr_print_path(ccb)
150 # define ASSERT(x)
151 #endif /* DEBUG_ASR */
152
153 /*
154  *      If DEBUG_ASR_CMD is defined:
155  *              0 - Display incoming SCSI commands
156  *              1 - add in a quick character before queueing.
157  *              2 - add in outgoing message frames.
158  */
159 #if (defined(DEBUG_ASR_CMD))
160 # define debug_asr_cmd_printf(fmt,args...)     printf(fmt,##args)
161 # define debug_asr_dump_ccb(ccb)                                      \
162         {                                                             \
163                 u_int8_t * cp = (unsigned char *)&(ccb->csio.cdb_io); \
164                 int        len = ccb->csio.cdb_len;                   \
165                                                                       \
166                 while (len) {                                         \
167                         debug_asr_cmd_printf (" %02x", *(cp++));      \
168                         --len;                                        \
169                 }                                                     \
170         }
171 # if (DEBUG_ASR_CMD > 0)
172 #  define debug_asr_cmd1_printf                debug_asr_cmd_printf
173 # else
174 #  define debug_asr_cmd1_printf(fmt,args...)
175 # endif
176 # if (DEBUG_ASR_CMD > 1)
177 #  define debug_asr_cmd2_printf                debug_asr_cmd_printf
178 #  define debug_asr_cmd2_dump_message(message) debug_asr_message(message)
179 # else
180 #  define debug_asr_cmd2_printf(fmt,args...)
181 #  define debug_asr_cmd2_dump_message(message)
182 # endif
183 #else /* DEBUG_ASR_CMD */
184 # define debug_asr_cmd_printf(fmt,args...)
185 # define debug_asr_cmd_dump_ccb(ccb)
186 # define debug_asr_cmd1_printf(fmt,args...)
187 # define debug_asr_cmd2_printf(fmt,args...)
188 # define debug_asr_cmd2_dump_message(message)
189 #endif /* DEBUG_ASR_CMD */
190
191 #if (defined(DEBUG_ASR_USR_CMD))
192 # define debug_usr_cmd_printf(fmt,args...)   printf(fmt,##args)
193 # define debug_usr_cmd_dump_message(message) debug_usr_message(message)
194 #else /* DEBUG_ASR_USR_CMD */
195 # define debug_usr_cmd_printf(fmt,args...)
196 # define debug_usr_cmd_dump_message(message)
197 #endif /* DEBUG_ASR_USR_CMD */
198
199 #define dsDescription_size 46   /* Snug as a bug in a rug */
200 #include "dptsig.h"
201
202 static dpt_sig_S ASR_sig = {
203         { 'd', 'P', 't', 'S', 'i', 'G'}, SIG_VERSION, PROC_INTEL,
204         PROC_386 | PROC_486 | PROC_PENTIUM | PROC_SEXIUM, FT_HBADRVR, 0,
205         OEM_DPT, OS_FREE_BSD, CAP_ABOVE16MB, DEV_ALL,
206         ADF_ALL_SC5,
207         0, 0, ASR_VERSION, ASR_REVISION, ASR_SUBREVISION,
208         ASR_MONTH, ASR_DAY, ASR_YEAR,
209 /*       01234567890123456789012345678901234567890123456789     < 50 chars */
210         "Adaptec FreeBSD 4.0.0 Unix SCSI I2O HBA Driver"
211         /*               ^^^^^ asr_attach alters these to match OS */
212 };
213
214 #include <sys/param.h>  /* TRUE=1 and FALSE=0 defined here */
215 #include <sys/kernel.h>
216 #include <sys/systm.h>
217 #include <sys/malloc.h>
218 #include <sys/proc.h>
219 #include <sys/conf.h>
220 #include <sys/disklabel.h>
221 #include <sys/bus.h>
222 #include <machine/resource.h>
223 #include <machine/bus.h>
224 #include <sys/rman.h>
225 #include <sys/stat.h>
226 #include <sys/device.h>
227
228 #include <bus/cam/cam.h>
229 #include <bus/cam/cam_ccb.h>
230 #include <bus/cam/cam_sim.h>
231 #include <bus/cam/cam_xpt_sim.h>
232 #include <bus/cam/cam_xpt_periph.h>
233
234 #include <bus/cam/scsi/scsi_all.h>
235 #include <bus/cam/scsi/scsi_message.h>
236
237 #include <vm/vm.h>
238 #include <vm/pmap.h>
239 #include <machine/cputypes.h>
240 #include <machine/clock.h>
241 #include <i386/include/vmparam.h>
242
243 #include <bus/pci/pcivar.h>
244 #include <bus/pci/pcireg.h>
245
246 #define STATIC static
247 #define INLINE
248
249 #if (defined(DEBUG_ASR) && (DEBUG_ASR > 0))
250 # undef STATIC
251 # define STATIC
252 # undef INLINE
253 # define INLINE
254 #endif
255 #define IN
256 #define OUT
257 #define INOUT
258
259 #define osdSwap4(x) ((u_long)ntohl((u_long)(x)))
260 #define KVTOPHYS(x) vtophys(x)
261 #include        "dptalign.h"
262 #include        "i2oexec.h"
263 #include        "i2obscsi.h"
264 #include        "i2odpt.h"
265 #include        "i2oadptr.h"
266 #include        "opt_asr.h"
267
268 #include        "sys_info.h"
269
270 /* Configuration Definitions */
271
272 #define SG_SIZE          58     /* Scatter Gather list Size              */
273 #define MAX_TARGET_ID    126    /* Maximum Target ID supported           */
274 #define MAX_LUN          255    /* Maximum LUN Supported                 */
275 #define MAX_CHANNEL      7      /* Maximum Channel # Supported by driver */
276 #define MAX_INBOUND      2000   /* Max CCBs, Also Max Queue Size         */
277 #define MAX_OUTBOUND     256    /* Maximum outbound frames/adapter       */
278 #define MAX_INBOUND_SIZE 512    /* Maximum inbound frame size            */
279 #define MAX_MAP          4194304L /* Maximum mapping size of IOP         */
280                                 /* Also serves as the minimum map for    */
281                                 /* the 2005S zero channel RAID product   */
282
283 /**************************************************************************
284 ** ASR Host Adapter structure - One Structure For Each Host Adapter That **
285 **  Is Configured Into The System.  The Structure Supplies Configuration **
286 **  Information, Status Info, Queue Info And An Active CCB List Pointer. **
287 ***************************************************************************/
288
289 /* I2O register set */
290 typedef struct {
291         U8           Address[0x30];
292         volatile U32 Status;
293         volatile U32 Mask;
294 #               define Mask_InterruptsDisabled 0x08
295         U32          x[2];
296         volatile U32 ToFIFO;    /* In Bound FIFO  */
297         volatile U32 FromFIFO;  /* Out Bound FIFO */
298 } i2oRegs_t;
299
300 /*
301  * A MIX of performance and space considerations for TID lookups
302  */
303 typedef u_int16_t tid_t;
304
305 typedef struct {
306         u_int32_t size;         /* up to MAX_LUN    */
307         tid_t     TID[1];
308 } lun2tid_t;
309
310 typedef struct {
311         u_int32_t   size;       /* up to MAX_TARGET */
312         lun2tid_t * LUN[1];
313 } target2lun_t;
314
315 /*
316  *      To ensure that we only allocate and use the worst case ccb here, lets
317  *      make our own local ccb union. If asr_alloc_ccb is utilized for another
318  *      ccb type, ensure that you add the additional structures into our local
319  *      ccb union. To ensure strict type checking, we will utilize the local
320  *      ccb definition wherever possible.
321  */
322 union asr_ccb {
323         struct ccb_hdr      ccb_h;  /* For convenience */
324         struct ccb_scsiio   csio;
325         struct ccb_setasync csa;
326 };
327
328 typedef struct Asr_softc {
329         u_int16_t               ha_irq;
330         void                  * ha_Base;       /* base port for each board */
331         u_int8_t     * volatile ha_blinkLED;
332         i2oRegs_t             * ha_Virt;       /* Base address of IOP      */
333         U8                    * ha_Fvirt;      /* Base address of Frames   */
334         I2O_IOP_ENTRY           ha_SystemTable;
335         LIST_HEAD(,ccb_hdr)     ha_ccb;        /* ccbs in use              */
336         struct cam_path       * ha_path[MAX_CHANNEL+1];
337         struct cam_sim        * ha_sim[MAX_CHANNEL+1];
338 #if defined(__DragonFly__) || __FreeBSD_version >= 400000
339         struct resource       * ha_mem_res;
340         struct resource       * ha_mes_res;
341         struct resource       * ha_irq_res;
342         void                  * ha_intr;
343 #endif
344         PI2O_LCT                ha_LCT;        /* Complete list of devices */
345 #                define le_type   IdentityTag[0]
346 #                        define I2O_BSA     0x20
347 #                        define I2O_FCA     0x40
348 #                        define I2O_SCSI    0x00
349 #                        define I2O_PORT    0x80
350 #                        define I2O_UNKNOWN 0x7F
351 #                define le_bus    IdentityTag[1]
352 #                define le_target IdentityTag[2]
353 #                define le_lun    IdentityTag[3]
354         target2lun_t          * ha_targets[MAX_CHANNEL+1];
355         PI2O_SCSI_ERROR_REPLY_MESSAGE_FRAME ha_Msgs;
356         u_long                  ha_Msgs_Phys;
357
358         u_int8_t                ha_in_reset;
359 #               define HA_OPERATIONAL       0
360 #               define HA_IN_RESET          1
361 #               define HA_OFF_LINE          2
362 #               define HA_OFF_LINE_RECOVERY 3
363         /* Configuration information */
364         /* The target id maximums we take     */
365         u_int8_t                ha_MaxBus;     /* Maximum bus              */
366         u_int8_t                ha_MaxId;      /* Maximum target ID        */
367         u_int8_t                ha_MaxLun;     /* Maximum target LUN            */
368         u_int8_t                ha_SgSize;     /* Max SG elements          */
369         u_int8_t                ha_pciBusNum;
370         u_int8_t                ha_pciDeviceNum;
371         u_int8_t                ha_adapter_target[MAX_CHANNEL+1];
372         u_int16_t               ha_QueueSize;  /* Max outstanding commands */
373         u_int16_t               ha_Msgs_Count;
374
375         /* Links into other parents and HBAs */
376         struct Asr_softc      * ha_next;       /* HBA list                 */
377
378 #ifdef ASR_MEASURE_PERFORMANCE
379 #define MAX_TIMEQ_SIZE  256 // assumes MAX 256 scsi commands sent
380         asr_perf_t              ha_performance;
381         u_int32_t               ha_submitted_ccbs_count;
382
383         // Queueing macros for a circular queue
384 #define TIMEQ_FREE_LIST_EMPTY(head, tail) (-1 == (head) && -1 == (tail))
385 #define TIMEQ_FREE_LIST_FULL(head, tail) ((((tail) + 1) % MAX_TIMEQ_SIZE) == (head))
386 #define ENQ_TIMEQ_FREE_LIST(item, Q, head, tail) \
387         if (!TIMEQ_FREE_LIST_FULL((head), (tail))) { \
388                 if TIMEQ_FREE_LIST_EMPTY((head),(tail)) { \
389                         (head) = (tail) = 0; \
390                 } \
391                 else (tail) = ((tail) + 1) % MAX_TIMEQ_SIZE; \
392                 Q[(tail)] = (item); \
393         } \
394         else { \
395                 debug_asr_printf("asr: Enqueueing when TimeQ Free List is full... This should not happen!\n"); \
396         }
397 #define DEQ_TIMEQ_FREE_LIST(item, Q, head, tail) \
398         if (!TIMEQ_FREE_LIST_EMPTY((head), (tail))) { \
399                 item  = Q[(head)]; \
400                 if ((head) == (tail)) { (head) = (tail) = -1; } \
401                 else (head) = ((head) + 1) % MAX_TIMEQ_SIZE; \
402         } \
403         else { \
404                 (item) = -1; \
405                 debug_asr_printf("asr: Dequeueing when TimeQ Free List is empty... This should not happen!\n"); \
406         }
407
408         // Circular queue of time stamps
409         struct timeval          ha_timeQ[MAX_TIMEQ_SIZE];
410         u_int32_t               ha_timeQFreeList[MAX_TIMEQ_SIZE];
411         int                     ha_timeQFreeHead;
412         int                     ha_timeQFreeTail;
413 #endif
414 } Asr_softc_t;
415
416 STATIC Asr_softc_t * Asr_softc;
417
418 /*
419  *      Prototypes of the routines we have in this object.
420  */
421
422 /* Externally callable routines */
423 #if defined(__DragonFly__) || __FreeBSD_version >= 400000
424 #define PROBE_ARGS  IN device_t tag
425 #define PROBE_RET   int
426 #define PROBE_SET() u_long id = (pci_get_device(tag)<<16)|pci_get_vendor(tag)
427 #define PROBE_RETURN(retval) if(retval){device_set_desc(tag,retval);return(0);}else{return(ENXIO);}
428 #define ATTACH_ARGS IN device_t tag
429 #define ATTACH_RET  int
430 #define ATTACH_SET() int unit = device_get_unit(tag)
431 #define ATTACH_RETURN(retval) return(retval)
432 #else
433 #define PROBE_ARGS  IN pcici_t tag, IN pcidi_t id
434 #define PROBE_RET   const char *
435 #define PROBE_SET()
436 #define PROBE_RETURN(retval) return(retval)
437 #define ATTACH_ARGS IN pcici_t tag, IN int unit
438 #define ATTACH_RET  void
439 #define ATTACH_SET()
440 #define ATTACH_RETURN(retval) return
441 #endif
442 /* I2O HDM interface */
443 STATIC PROBE_RET      asr_probe (PROBE_ARGS);
444 STATIC ATTACH_RET     asr_attach (ATTACH_ARGS);
445 /* DOMINO placeholder */
446 STATIC PROBE_RET      domino_probe (PROBE_ARGS);
447 STATIC ATTACH_RET     domino_attach (ATTACH_ARGS);
448 /* MODE0 adapter placeholder */
449 STATIC PROBE_RET      mode0_probe (PROBE_ARGS);
450 STATIC ATTACH_RET     mode0_attach (ATTACH_ARGS);
451
452 STATIC Asr_softc_t  * ASR_get_sc (
453                         IN dev_t dev);
454 STATIC int            asr_ioctl (
455                         IN dev_t      dev,
456                         IN u_long     cmd,
457                         INOUT caddr_t data,
458                         int           flag,
459                         d_thread_t *td);
460 STATIC int            asr_open (
461                         IN dev_t         dev,
462                         int32_t          flags,
463                         int32_t          ifmt,
464                         IN d_thread_t *td);
465 STATIC int            asr_close (
466                         dev_t         dev,
467                         int           flags,
468                         int           ifmt,
469                         d_thread_t *td);
470 STATIC int            asr_intr (
471                         IN Asr_softc_t * sc);
472 STATIC void           asr_timeout (
473                         INOUT void * arg);
474 STATIC int            ASR_init (
475                         IN Asr_softc_t * sc);
476 STATIC INLINE int     ASR_acquireLct (
477                         INOUT Asr_softc_t * sc);
478 STATIC INLINE int     ASR_acquireHrt (
479                         INOUT Asr_softc_t * sc);
480 STATIC void           asr_action (
481                         IN struct cam_sim * sim,
482                         IN union ccb      * ccb);
483 STATIC void           asr_poll (
484                         IN struct cam_sim * sim);
485
486 /*
487  *      Here is the auto-probe structure used to nest our tests appropriately
488  *      during the startup phase of the operating system.
489  */
490 #if defined(__DragonFly__) || __FreeBSD_version >= 400000
491 STATIC device_method_t asr_methods[] = {
492         DEVMETHOD(device_probe,  asr_probe),
493         DEVMETHOD(device_attach, asr_attach),
494         { 0, 0 }
495 };
496
497 STATIC driver_t asr_driver = {
498         "asr",
499         asr_methods,
500         sizeof(Asr_softc_t)
501 };
502
503 STATIC devclass_t asr_devclass;
504
505 DECLARE_DUMMY_MODULE(asr);
506 DRIVER_MODULE(asr, pci, asr_driver, asr_devclass, 0, 0);
507
508 STATIC device_method_t domino_methods[] = {
509         DEVMETHOD(device_probe,  domino_probe),
510         DEVMETHOD(device_attach, domino_attach),
511         { 0, 0 }
512 };
513
514 STATIC driver_t domino_driver = {
515         "domino",
516         domino_methods,
517         0
518 };
519
520 STATIC devclass_t domino_devclass;
521
522 DRIVER_MODULE(domino, pci, domino_driver, domino_devclass, 0, 0);
523
524 STATIC device_method_t mode0_methods[] = {
525         DEVMETHOD(device_probe,  mode0_probe),
526         DEVMETHOD(device_attach, mode0_attach),
527         { 0, 0 }
528 };
529
530 STATIC driver_t mode0_driver = {
531         "mode0",
532         mode0_methods,
533         0
534 };
535
536 STATIC devclass_t mode0_devclass;
537
538 DRIVER_MODULE(mode0, pci, mode0_driver, mode0_devclass, 0, 0);
539 #else
540 STATIC u_long asr_pcicount = 0;
541 STATIC struct pci_device asr_pcidev = {
542         "asr",
543         asr_probe,
544         asr_attach,
545         &asr_pcicount,
546         NULL
547 };
548 DATA_SET (asr_pciset, asr_pcidev);
549
550 STATIC u_long domino_pcicount = 0;
551 STATIC struct pci_device domino_pcidev = {
552         "domino",
553         domino_probe,
554         domino_attach,
555         &domino_pcicount,
556         NULL
557 };
558 DATA_SET (domino_pciset, domino_pcidev);
559
560 STATIC u_long mode0_pcicount = 0;
561 STATIC struct pci_device mode0_pcidev = {
562         "mode0",
563         mode0_probe,
564         mode0_attach,
565         &mode0_pcicount,
566         NULL
567 };
568 DATA_SET (mode0_pciset, mode0_pcidev);
569 #endif
570
571 /*
572  * devsw for asr hba driver
573  *
574  * only ioctl is used. the sd driver provides all other access.
575  */
576 #define CDEV_MAJOR 154   /* prefered default character major */
577 STATIC struct cdevsw asr_cdevsw = {
578         "asr",          /* name     */
579         CDEV_MAJOR,     /* maj      */
580         0,              /* flags    */
581         NULL,           /* port     */
582         0,              /* auto     */
583
584         asr_open,       /* open     */
585         asr_close,      /* close    */
586         noread,         /* read     */
587         nowrite,        /* write    */
588         asr_ioctl,      /* ioctl    */
589         nopoll,         /* poll     */
590         nommap,         /* mmap     */
591         nostrategy,     /* strategy */
592         nodump,         /* dump     */
593         nopsize         /* psize    */
594 };
595
596 #ifdef ASR_MEASURE_PERFORMANCE
597 STATIC u_int32_t         asr_time_delta (IN struct timeval start,
598                                              IN struct timeval end);
599 #endif
600
601 /*
602  * Initialize the dynamic cdevsw hooks.
603  */
604 STATIC void
605 asr_drvinit (void * unused)
606 {
607         static int asr_devsw_installed = 0;
608
609         if (asr_devsw_installed) {
610                 return;
611         }
612         asr_devsw_installed++;
613         /*
614          * Find a free spot (the report during driver load used by
615          * osd layer in engine to generate the controlling nodes).
616          *
617          * XXX this is garbage code, store a unit number in asr_cdevsw
618          * and iterate through that instead?
619          */
620         while (asr_cdevsw.d_maj < NUMCDEVSW &&
621                 cdevsw_get(asr_cdevsw.d_maj, -1) != NULL
622         ) {
623                 ++asr_cdevsw.d_maj;
624         }
625         if (asr_cdevsw.d_maj >= NUMCDEVSW) {
626                 asr_cdevsw.d_maj = 0;
627                 while (asr_cdevsw.d_maj < CDEV_MAJOR &&
628                         cdevsw_get(asr_cdevsw.d_maj, -1) != NULL
629                 ) {
630                         ++asr_cdevsw.d_maj;
631                 }
632         }
633
634         /*
635          *      Come to papa
636          */
637         cdevsw_add(&asr_cdevsw, 0, 0);
638 } /* asr_drvinit */
639
640 /* Must initialize before CAM layer picks up our HBA driver */
641 SYSINIT(asrdev,SI_SUB_DRIVERS,SI_ORDER_MIDDLE+CDEV_MAJOR,asr_drvinit,NULL)
642
643 /* I2O support routines */
644 #define defAlignLong(STRUCT,NAME) char NAME[sizeof(STRUCT)]
645 #define getAlignLong(STRUCT,NAME) ((STRUCT *)(NAME))
646
647 /*
648  *      Fill message with default.
649  */
650 STATIC PI2O_MESSAGE_FRAME
651 ASR_fillMessage (
652         IN char              * Message,
653         IN u_int16_t           size)
654 {
655         OUT PI2O_MESSAGE_FRAME Message_Ptr;
656
657         Message_Ptr = getAlignLong(I2O_MESSAGE_FRAME, Message);
658         bzero ((void *)Message_Ptr, size);
659         I2O_MESSAGE_FRAME_setVersionOffset(Message_Ptr, I2O_VERSION_11);
660         I2O_MESSAGE_FRAME_setMessageSize(Message_Ptr,
661           (size + sizeof(U32) - 1) >> 2);
662         I2O_MESSAGE_FRAME_setInitiatorAddress (Message_Ptr, 1);
663         return (Message_Ptr);
664 } /* ASR_fillMessage */
665
666 #define EMPTY_QUEUE ((U32)-1L)
667
668 STATIC INLINE U32
669 ASR_getMessage(
670         IN i2oRegs_t * virt)
671 {
672         OUT U32        MessageOffset;
673
674         if ((MessageOffset = virt->ToFIFO) == EMPTY_QUEUE) {
675                 MessageOffset = virt->ToFIFO;
676         }
677         return (MessageOffset);
678 } /* ASR_getMessage */
679
680 /* Issue a polled command */
681 STATIC U32
682 ASR_initiateCp (
683         INOUT i2oRegs_t     * virt,
684         INOUT U8            * fvirt,
685         IN PI2O_MESSAGE_FRAME Message)
686 {
687         OUT U32               Mask = -1L;
688         U32                   MessageOffset;
689         u_int                 Delay = 1500;
690
691         /*
692          * ASR_initiateCp is only used for synchronous commands and will
693          * be made more resiliant to adapter delays since commands like
694          * resetIOP can cause the adapter to be deaf for a little time.
695          */
696         while (((MessageOffset = ASR_getMessage(virt)) == EMPTY_QUEUE)
697          && (--Delay != 0)) {
698                 DELAY (10000);
699         }
700         if (MessageOffset != EMPTY_QUEUE) {
701                 bcopy (Message, fvirt + MessageOffset,
702                   I2O_MESSAGE_FRAME_getMessageSize(Message) << 2);
703                 /*
704                  *      Disable the Interrupts
705                  */
706                 virt->Mask = (Mask = virt->Mask) | Mask_InterruptsDisabled;
707                 virt->ToFIFO = MessageOffset;
708         }
709         return (Mask);
710 } /* ASR_initiateCp */
711
712 /*
713  *      Reset the adapter.
714  */
715 STATIC U32
716 ASR_resetIOP (
717         INOUT i2oRegs_t                * virt,
718         INOUT U8                       * fvirt)
719 {
720         struct resetMessage {
721                 I2O_EXEC_IOP_RESET_MESSAGE M;
722                 U32                        R;
723         };
724         defAlignLong(struct resetMessage,Message);
725         PI2O_EXEC_IOP_RESET_MESSAGE      Message_Ptr;
726         OUT U32               * volatile Reply_Ptr;
727         U32                              Old;
728
729         /*
730          *  Build up our copy of the Message.
731          */
732         Message_Ptr = (PI2O_EXEC_IOP_RESET_MESSAGE)ASR_fillMessage(Message,
733           sizeof(I2O_EXEC_IOP_RESET_MESSAGE));
734         I2O_EXEC_IOP_RESET_MESSAGE_setFunction(Message_Ptr, I2O_EXEC_IOP_RESET);
735         /*
736          *  Reset the Reply Status
737          */
738         *(Reply_Ptr = (U32 *)((char *)Message_Ptr
739           + sizeof(I2O_EXEC_IOP_RESET_MESSAGE))) = 0;
740         I2O_EXEC_IOP_RESET_MESSAGE_setStatusWordLowAddress(Message_Ptr,
741           KVTOPHYS((void *)Reply_Ptr));
742         /*
743          *      Send the Message out
744          */
745         if ((Old = ASR_initiateCp (virt, fvirt, (PI2O_MESSAGE_FRAME)Message_Ptr)) != (U32)-1L) {
746                 /*
747                  *      Wait for a response (Poll), timeouts are dangerous if
748                  * the card is truly responsive. We assume response in 2s.
749                  */
750                 u_int8_t Delay = 200;
751
752                 while ((*Reply_Ptr == 0) && (--Delay != 0)) {
753                         DELAY (10000);
754                 }
755                 /*
756                  *      Re-enable the interrupts.
757                  */
758                 virt->Mask = Old;
759                 ASSERT (*Reply_Ptr);
760                 return (*Reply_Ptr);
761         }
762         ASSERT (Old != (U32)-1L);
763         return (0);
764 } /* ASR_resetIOP */
765
766 /*
767  *      Get the curent state of the adapter
768  */
769 STATIC INLINE PI2O_EXEC_STATUS_GET_REPLY
770 ASR_getStatus (
771         INOUT i2oRegs_t *                        virt,
772         INOUT U8 *                               fvirt,
773         OUT PI2O_EXEC_STATUS_GET_REPLY           buffer)
774 {
775         defAlignLong(I2O_EXEC_STATUS_GET_MESSAGE,Message);
776         PI2O_EXEC_STATUS_GET_MESSAGE             Message_Ptr;
777         U32                                      Old;
778
779         /*
780          *  Build up our copy of the Message.
781          */
782         Message_Ptr = (PI2O_EXEC_STATUS_GET_MESSAGE)ASR_fillMessage(Message,
783           sizeof(I2O_EXEC_STATUS_GET_MESSAGE));
784         I2O_EXEC_STATUS_GET_MESSAGE_setFunction(Message_Ptr,
785           I2O_EXEC_STATUS_GET);
786         I2O_EXEC_STATUS_GET_MESSAGE_setReplyBufferAddressLow(Message_Ptr,
787           KVTOPHYS((void *)buffer));
788         /* This one is a Byte Count */
789         I2O_EXEC_STATUS_GET_MESSAGE_setReplyBufferLength(Message_Ptr,
790           sizeof(I2O_EXEC_STATUS_GET_REPLY));
791         /*
792          *  Reset the Reply Status
793          */
794         bzero ((void *)buffer, sizeof(I2O_EXEC_STATUS_GET_REPLY));
795         /*
796          *      Send the Message out
797          */
798         if ((Old = ASR_initiateCp (virt, fvirt, (PI2O_MESSAGE_FRAME)Message_Ptr)) != (U32)-1L) {
799                 /*
800                  *      Wait for a response (Poll), timeouts are dangerous if
801                  * the card is truly responsive. We assume response in 50ms.
802                  */
803                 u_int8_t Delay = 255;
804
805                 while (*((U8 * volatile)&(buffer->SyncByte)) == 0) {
806                         if (--Delay == 0) {
807                                 buffer = (PI2O_EXEC_STATUS_GET_REPLY)NULL;
808                                 break;
809                         }
810                         DELAY (1000);
811                 }
812                 /*
813                  *      Re-enable the interrupts.
814                  */
815                 virt->Mask = Old;
816                 return (buffer);
817         }
818         return ((PI2O_EXEC_STATUS_GET_REPLY)NULL);
819 } /* ASR_getStatus */
820
821 /*
822  *      Check if the device is a SCSI I2O HBA, and add it to the list.
823  */
824
825 /*
826  * Probe for ASR controller.  If we find it, we will use it.
827  * virtual adapters.
828  */
829 STATIC PROBE_RET
830 asr_probe(PROBE_ARGS)
831 {
832         PROBE_SET();
833         if ((id == 0xA5011044) || (id == 0xA5111044)) {
834                 PROBE_RETURN ("Adaptec Caching SCSI RAID");
835         }
836         PROBE_RETURN (NULL);
837 } /* asr_probe */
838
839 /*
840  * Probe/Attach for DOMINO chipset.
841  */
842 STATIC PROBE_RET
843 domino_probe(PROBE_ARGS)
844 {
845         PROBE_SET();
846         if (id == 0x10121044) {
847                 PROBE_RETURN ("Adaptec Caching Memory Controller");
848         }
849         PROBE_RETURN (NULL);
850 } /* domino_probe */
851
852 STATIC ATTACH_RET
853 domino_attach (ATTACH_ARGS)
854 {
855         ATTACH_RETURN (0);
856 } /* domino_attach */
857
858 /*
859  * Probe/Attach for MODE0 adapters.
860  */
861 STATIC PROBE_RET
862 mode0_probe(PROBE_ARGS)
863 {
864         PROBE_SET();
865
866         /*
867          *      If/When we can get a business case to commit to a
868          * Mode0 driver here, we can make all these tests more
869          * specific and robust. Mode0 adapters have their processors
870          * turned off, this the chips are in a raw state.
871          */
872
873         /* This is a PLX9054 */
874         if (id == 0x905410B5) {
875                 PROBE_RETURN ("Adaptec Mode0 PM3757");
876         }
877         /* This is a PLX9080 */
878         if (id == 0x908010B5) {
879                 PROBE_RETURN ("Adaptec Mode0 PM3754/PM3755");
880         }
881         /* This is a ZION 80303 */
882         if (id == 0x53098086) {
883                 PROBE_RETURN ("Adaptec Mode0 3010S");
884         }
885         /* This is an i960RS */
886         if (id == 0x39628086) {
887                 PROBE_RETURN ("Adaptec Mode0 2100S");
888         }
889         /* This is an i960RN */
890         if (id == 0x19648086) {
891                 PROBE_RETURN ("Adaptec Mode0 PM2865/2400A/3200S/3400S");
892         }
893 #if 0   /* this would match any generic i960 -- mjs */
894         /* This is an i960RP (typically also on Motherboards) */
895         if (id == 0x19608086) {
896                 PROBE_RETURN ("Adaptec Mode0 PM2554/PM1554/PM2654");
897         }
898 #endif
899         PROBE_RETURN (NULL);
900 } /* mode0_probe */
901
902 STATIC ATTACH_RET
903 mode0_attach (ATTACH_ARGS)
904 {
905         ATTACH_RETURN (0);
906 } /* mode0_attach */
907
908 STATIC INLINE union asr_ccb *
909 asr_alloc_ccb (
910         IN Asr_softc_t    * sc)
911 {
912         OUT union asr_ccb * new_ccb;
913
914         if ((new_ccb = (union asr_ccb *)malloc(sizeof(*new_ccb),
915           M_DEVBUF, M_WAITOK)) != (union asr_ccb *)NULL) {
916                 bzero (new_ccb, sizeof(*new_ccb));
917                 new_ccb->ccb_h.pinfo.priority = 1;
918                 new_ccb->ccb_h.pinfo.index = CAM_UNQUEUED_INDEX;
919                 new_ccb->ccb_h.spriv_ptr0 = sc;
920         }
921         return (new_ccb);
922 } /* asr_alloc_ccb */
923
924 STATIC INLINE void
925 asr_free_ccb (
926         IN union asr_ccb * free_ccb)
927 {
928         free(free_ccb, M_DEVBUF);
929 } /* asr_free_ccb */
930
931 /*
932  *      Print inquiry data `carefully'
933  */
934 STATIC void
935 ASR_prstring (
936         u_int8_t * s,
937         int        len)
938 {
939         while ((--len >= 0) && (*s) && (*s != ' ') && (*s != '-')) {
940                 printf ("%c", *(s++));
941         }
942 } /* ASR_prstring */
943
944 /*
945  * Prototypes
946  */
947 STATIC INLINE int ASR_queue (
948         IN Asr_softc_t             * sc,
949         IN PI2O_MESSAGE_FRAME Message);
950 /*
951  *      Send a message synchronously and without Interrupt to a ccb.
952  */
953 STATIC int
954 ASR_queue_s (
955         INOUT union asr_ccb * ccb,
956         IN PI2O_MESSAGE_FRAME Message)
957 {
958         int                   s;
959         U32                   Mask;
960         Asr_softc_t         * sc = (Asr_softc_t *)(ccb->ccb_h.spriv_ptr0);
961
962         /*
963          * We do not need any (optional byteswapping) method access to
964          * the Initiator context field.
965          */
966         I2O_MESSAGE_FRAME_setInitiatorContext64(Message, (long)ccb);
967
968         /* Prevent interrupt service */
969         s = splcam ();
970         sc->ha_Virt->Mask = (Mask = sc->ha_Virt->Mask)
971           | Mask_InterruptsDisabled;
972
973         if (ASR_queue (sc, Message) == EMPTY_QUEUE) {
974                 ccb->ccb_h.status &= ~CAM_STATUS_MASK;
975                 ccb->ccb_h.status |= CAM_REQUEUE_REQ;
976         }
977
978         /*
979          * Wait for this board to report a finished instruction.
980          */
981         while ((ccb->ccb_h.status & CAM_STATUS_MASK) == CAM_REQ_INPROG) {
982                 (void)asr_intr (sc);
983         }
984
985         /* Re-enable Interrupts */
986         sc->ha_Virt->Mask = Mask;
987         splx(s);
988
989         return (ccb->ccb_h.status);
990 } /* ASR_queue_s */
991
992 /*
993  *      Send a message synchronously to a Asr_softc_t
994  */
995 STATIC int
996 ASR_queue_c (
997         IN Asr_softc_t      * sc,
998         IN PI2O_MESSAGE_FRAME Message)
999 {
1000         union asr_ccb       * ccb;
1001         OUT int               status;
1002
1003         if ((ccb = asr_alloc_ccb (sc)) == (union asr_ccb *)NULL) {
1004                 return (CAM_REQUEUE_REQ);
1005         }
1006
1007         status = ASR_queue_s (ccb, Message);
1008
1009         asr_free_ccb(ccb);
1010
1011         return (status);
1012 } /* ASR_queue_c */
1013
1014 /*
1015  *      Add the specified ccb to the active queue
1016  */
1017 STATIC INLINE void
1018 ASR_ccbAdd (
1019         IN Asr_softc_t      * sc,
1020         INOUT union asr_ccb * ccb)
1021 {
1022         int s;
1023
1024         s = splcam();
1025         LIST_INSERT_HEAD(&(sc->ha_ccb), &(ccb->ccb_h), sim_links.le);
1026         if (ccb->ccb_h.timeout != CAM_TIME_INFINITY) {
1027                 if (ccb->ccb_h.timeout == CAM_TIME_DEFAULT) {
1028                         /*
1029                          * RAID systems can take considerable time to
1030                          * complete some commands given the large cache
1031                          * flashes switching from write back to write thru.
1032                          */
1033                         ccb->ccb_h.timeout = 6 * 60 * 1000;
1034                 }
1035                 ccb->ccb_h.timeout_ch = timeout(asr_timeout, (caddr_t)ccb,
1036                   (ccb->ccb_h.timeout * hz) / 1000);
1037         }
1038         splx(s);
1039 } /* ASR_ccbAdd */
1040
1041 /*
1042  *      Remove the specified ccb from the active queue.
1043  */
1044 STATIC INLINE void
1045 ASR_ccbRemove (
1046         IN Asr_softc_t      * sc,
1047         INOUT union asr_ccb * ccb)
1048 {
1049         int s;
1050
1051         s = splcam();
1052         untimeout(asr_timeout, (caddr_t)ccb, ccb->ccb_h.timeout_ch);
1053         LIST_REMOVE(&(ccb->ccb_h), sim_links.le);
1054         splx(s);
1055 } /* ASR_ccbRemove */
1056
1057 /*
1058  *      Fail all the active commands, so they get re-issued by the operating
1059  *      system.
1060  */
1061 STATIC INLINE void
1062 ASR_failActiveCommands (
1063         IN Asr_softc_t                         * sc)
1064 {
1065         struct ccb_hdr                         * ccb;
1066         int                                      s;
1067
1068 #if 0 /* Currently handled by callers, unnecessary paranoia currently */
1069       /* Left in for historical perspective. */
1070         defAlignLong(I2O_EXEC_LCT_NOTIFY_MESSAGE,Message);
1071         PI2O_EXEC_LCT_NOTIFY_MESSAGE             Message_Ptr;
1072
1073         /* Send a blind LCT command to wait for the enableSys to complete */
1074         Message_Ptr = (PI2O_EXEC_LCT_NOTIFY_MESSAGE)ASR_fillMessage(Message,
1075           sizeof(I2O_EXEC_LCT_NOTIFY_MESSAGE) - sizeof(I2O_SG_ELEMENT));
1076         I2O_MESSAGE_FRAME_setFunction(&(Message_Ptr->StdMessageFrame),
1077           I2O_EXEC_LCT_NOTIFY);
1078         I2O_EXEC_LCT_NOTIFY_MESSAGE_setClassIdentifier(Message_Ptr,
1079           I2O_CLASS_MATCH_ANYCLASS);
1080         (void)ASR_queue_c(sc, (PI2O_MESSAGE_FRAME)Message_Ptr);
1081 #endif
1082
1083         s = splcam();
1084         /*
1085          *      We do not need to inform the CAM layer that we had a bus
1086          * reset since we manage it on our own, this also prevents the
1087          * SCSI_DELAY settling that would be required on other systems.
1088          * The `SCSI_DELAY' has already been handled by the card via the
1089          * acquisition of the LCT table while we are at CAM priority level.
1090          *  for (int bus = 0; bus <= sc->ha_MaxBus; ++bus) {
1091          *      xpt_async (AC_BUS_RESET, sc->ha_path[bus], NULL);
1092          *  }
1093          */
1094         while ((ccb = LIST_FIRST(&(sc->ha_ccb))) != (struct ccb_hdr *)NULL) {
1095                 ASR_ccbRemove (sc, (union asr_ccb *)ccb);
1096
1097                 ccb->status &= ~CAM_STATUS_MASK;
1098                 ccb->status |= CAM_REQUEUE_REQ;
1099                 /* Nothing Transfered */
1100                 ((struct ccb_scsiio *)ccb)->resid
1101                   = ((struct ccb_scsiio *)ccb)->dxfer_len;
1102
1103                 if (ccb->path) {
1104                         xpt_done ((union ccb *)ccb);
1105                 } else {
1106                         wakeup ((caddr_t)ccb);
1107                 }
1108         }
1109         splx(s);
1110 } /* ASR_failActiveCommands */
1111
1112 /*
1113  *      The following command causes the HBA to reset the specific bus
1114  */
1115 STATIC INLINE void
1116 ASR_resetBus(
1117         IN Asr_softc_t                       * sc,
1118         IN int                                 bus)
1119 {
1120         defAlignLong(I2O_HBA_BUS_RESET_MESSAGE,Message);
1121         I2O_HBA_BUS_RESET_MESSAGE            * Message_Ptr;
1122         PI2O_LCT_ENTRY                         Device;
1123
1124         Message_Ptr = (I2O_HBA_BUS_RESET_MESSAGE *)ASR_fillMessage(Message,
1125           sizeof(I2O_HBA_BUS_RESET_MESSAGE));
1126         I2O_MESSAGE_FRAME_setFunction(&Message_Ptr->StdMessageFrame,
1127           I2O_HBA_BUS_RESET);
1128         for (Device = sc->ha_LCT->LCTEntry; Device < (PI2O_LCT_ENTRY)
1129           (((U32 *)sc->ha_LCT)+I2O_LCT_getTableSize(sc->ha_LCT));
1130           ++Device) {
1131                 if (((Device->le_type & I2O_PORT) != 0)
1132                  && (Device->le_bus == bus)) {
1133                         I2O_MESSAGE_FRAME_setTargetAddress(
1134                           &Message_Ptr->StdMessageFrame,
1135                           I2O_LCT_ENTRY_getLocalTID(Device));
1136                         /* Asynchronous command, with no expectations */
1137                         (void)ASR_queue(sc, (PI2O_MESSAGE_FRAME)Message_Ptr);
1138                         break;
1139                 }
1140         }
1141 } /* ASR_resetBus */
1142
1143 STATIC INLINE int
1144 ASR_getBlinkLedCode (
1145         IN Asr_softc_t * sc)
1146 {
1147         if ((sc != (Asr_softc_t *)NULL)
1148          && (sc->ha_blinkLED != (u_int8_t *)NULL)
1149          && (sc->ha_blinkLED[1] == 0xBC)) {
1150                 return (sc->ha_blinkLED[0]);
1151         }
1152         return (0);
1153 } /* ASR_getBlinkCode */
1154
1155 /*
1156  *      Determine the address of an TID lookup. Must be done at high priority
1157  *      since the address can be changed by other threads of execution.
1158  *
1159  *      Returns NULL pointer if not indexible (but will attempt to generate
1160  *      an index if `new_entry' flag is set to TRUE).
1161  *
1162  *      All addressible entries are to be guaranteed zero if never initialized.
1163  */
1164 STATIC INLINE tid_t *
1165 ASR_getTidAddress(
1166         INOUT Asr_softc_t * sc,
1167         IN int              bus,
1168         IN int              target,
1169         IN int              lun,
1170         IN int              new_entry)
1171 {
1172         target2lun_t      * bus_ptr;
1173         lun2tid_t         * target_ptr;
1174         unsigned            new_size;
1175
1176         /*
1177          *      Validity checking of incoming parameters. More of a bound
1178          * expansion limit than an issue with the code dealing with the
1179          * values.
1180          *
1181          *      sc must be valid before it gets here, so that check could be
1182          * dropped if speed a critical issue.
1183          */
1184         if ((sc == (Asr_softc_t *)NULL)
1185          || (bus > MAX_CHANNEL)
1186          || (target > sc->ha_MaxId)
1187          || (lun > sc->ha_MaxLun)) {
1188                 debug_asr_printf("(%lx,%d,%d,%d) target out of range\n",
1189                   (u_long)sc, bus, target, lun);
1190                 return ((tid_t *)NULL);
1191         }
1192         /*
1193          *      See if there is an associated bus list.
1194          *
1195          *      for performance, allocate in size of BUS_CHUNK chunks.
1196          *      BUS_CHUNK must be a power of two. This is to reduce
1197          *      fragmentation effects on the allocations.
1198          */
1199 #       define BUS_CHUNK 8
1200         new_size = ((target + BUS_CHUNK - 1) & ~(BUS_CHUNK - 1));
1201         if ((bus_ptr = sc->ha_targets[bus]) == (target2lun_t *)NULL) {
1202                 /*
1203                  *      Allocate a new structure?
1204                  *              Since one element in structure, the +1
1205                  *              needed for size has been abstracted.
1206                  */
1207                 if ((new_entry == FALSE)
1208                  || ((sc->ha_targets[bus] = bus_ptr = (target2lun_t *)malloc (
1209                     sizeof(*bus_ptr) + (sizeof(bus_ptr->LUN) * new_size),
1210                     M_TEMP, M_WAITOK))
1211                    == (target2lun_t *)NULL)) {
1212                         debug_asr_printf("failed to allocate bus list\n");
1213                         return ((tid_t *)NULL);
1214                 }
1215                 bzero (bus_ptr, sizeof(*bus_ptr)
1216                   + (sizeof(bus_ptr->LUN) * new_size));
1217                 bus_ptr->size = new_size + 1;
1218         } else if (bus_ptr->size <= new_size) {
1219                 target2lun_t * new_bus_ptr;
1220
1221                 /*
1222                  *      Reallocate a new structure?
1223                  *              Since one element in structure, the +1
1224                  *              needed for size has been abstracted.
1225                  */
1226                 if ((new_entry == FALSE)
1227                  || ((new_bus_ptr = (target2lun_t *)malloc (
1228                     sizeof(*bus_ptr) + (sizeof(bus_ptr->LUN) * new_size),
1229                     M_TEMP, M_WAITOK))
1230                    == (target2lun_t *)NULL)) {
1231                         debug_asr_printf("failed to reallocate bus list\n");
1232                         return ((tid_t *)NULL);
1233                 }
1234                 /*
1235                  *      Zero and copy the whole thing, safer, simpler coding
1236                  * and not really performance critical at this point.
1237                  */
1238                 bzero (new_bus_ptr, sizeof(*bus_ptr)
1239                   + (sizeof(bus_ptr->LUN) * new_size));
1240                 bcopy (bus_ptr, new_bus_ptr, sizeof(*bus_ptr)
1241                   + (sizeof(bus_ptr->LUN) * (bus_ptr->size - 1)));
1242                 sc->ha_targets[bus] = new_bus_ptr;
1243                 free (bus_ptr, M_TEMP);
1244                 bus_ptr = new_bus_ptr;
1245                 bus_ptr->size = new_size + 1;
1246         }
1247         /*
1248          *      We now have the bus list, lets get to the target list.
1249          *      Since most systems have only *one* lun, we do not allocate
1250          *      in chunks as above, here we allow one, then in chunk sizes.
1251          *      TARGET_CHUNK must be a power of two. This is to reduce
1252          *      fragmentation effects on the allocations.
1253          */
1254 #       define TARGET_CHUNK 8
1255         if ((new_size = lun) != 0) {
1256                 new_size = ((lun + TARGET_CHUNK - 1) & ~(TARGET_CHUNK - 1));
1257         }
1258         if ((target_ptr = bus_ptr->LUN[target]) == (lun2tid_t *)NULL) {
1259                 /*
1260                  *      Allocate a new structure?
1261                  *              Since one element in structure, the +1
1262                  *              needed for size has been abstracted.
1263                  */
1264                 if ((new_entry == FALSE)
1265                  || ((bus_ptr->LUN[target] = target_ptr = (lun2tid_t *)malloc (
1266                     sizeof(*target_ptr) + (sizeof(target_ptr->TID) * new_size),
1267                     M_TEMP, M_WAITOK))
1268                    == (lun2tid_t *)NULL)) {
1269                         debug_asr_printf("failed to allocate target list\n");
1270                         return ((tid_t *)NULL);
1271                 }
1272                 bzero (target_ptr, sizeof(*target_ptr)
1273                   + (sizeof(target_ptr->TID) * new_size));
1274                 target_ptr->size = new_size + 1;
1275         } else if (target_ptr->size <= new_size) {
1276                 lun2tid_t * new_target_ptr;
1277
1278                 /*
1279                  *      Reallocate a new structure?
1280                  *              Since one element in structure, the +1
1281                  *              needed for size has been abstracted.
1282                  */
1283                 if ((new_entry == FALSE)
1284                  || ((new_target_ptr = (lun2tid_t *)malloc (
1285                     sizeof(*target_ptr) + (sizeof(target_ptr->TID) * new_size),
1286                     M_TEMP, M_WAITOK))
1287                    == (lun2tid_t *)NULL)) {
1288                         debug_asr_printf("failed to reallocate target list\n");
1289                         return ((tid_t *)NULL);
1290                 }
1291                 /*
1292                  *      Zero and copy the whole thing, safer, simpler coding
1293                  * and not really performance critical at this point.
1294                  */
1295                 bzero (new_target_ptr, sizeof(*target_ptr)
1296                   + (sizeof(target_ptr->TID) * new_size));
1297                 bcopy (target_ptr, new_target_ptr,
1298                   sizeof(*target_ptr)
1299                   + (sizeof(target_ptr->TID) * (target_ptr->size - 1)));
1300                 bus_ptr->LUN[target] = new_target_ptr;
1301                 free (target_ptr, M_TEMP);
1302                 target_ptr = new_target_ptr;
1303                 target_ptr->size = new_size + 1;
1304         }
1305         /*
1306          *      Now, acquire the TID address from the LUN indexed list.
1307          */
1308         return (&(target_ptr->TID[lun]));
1309 } /* ASR_getTidAddress */
1310
1311 /*
1312  *      Get a pre-existing TID relationship.
1313  *
1314  *      If the TID was never set, return (tid_t)-1.
1315  *
1316  *      should use mutex rather than spl.
1317  */
1318 STATIC INLINE tid_t
1319 ASR_getTid (
1320         IN Asr_softc_t * sc,
1321         IN int           bus,
1322         IN int           target,
1323         IN int           lun)
1324 {
1325         tid_t          * tid_ptr;
1326         int              s;
1327         OUT tid_t        retval;
1328
1329         s = splcam();
1330         if (((tid_ptr = ASR_getTidAddress (sc, bus, target, lun, FALSE))
1331           == (tid_t *)NULL)
1332         /* (tid_t)0 or (tid_t)-1 indicate no TID */
1333          || (*tid_ptr == (tid_t)0)) {
1334                 splx(s);
1335                 return ((tid_t)-1);
1336         }
1337         retval = *tid_ptr;
1338         splx(s);
1339         return (retval);
1340 } /* ASR_getTid */
1341
1342 /*
1343  *      Set a TID relationship.
1344  *
1345  *      If the TID was not set, return (tid_t)-1.
1346  *
1347  *      should use mutex rather than spl.
1348  */
1349 STATIC INLINE tid_t
1350 ASR_setTid (
1351         INOUT Asr_softc_t * sc,
1352         IN int              bus,
1353         IN int              target,
1354         IN int              lun,
1355         INOUT tid_t         TID)
1356 {
1357         tid_t             * tid_ptr;
1358         int                 s;
1359
1360         if (TID != (tid_t)-1) {
1361                 if (TID == 0) {
1362                         return ((tid_t)-1);
1363                 }
1364                 s = splcam();
1365                 if ((tid_ptr = ASR_getTidAddress (sc, bus, target, lun, TRUE))
1366                  == (tid_t *)NULL) {
1367                         splx(s);
1368                         return ((tid_t)-1);
1369                 }
1370                 *tid_ptr = TID;
1371                 splx(s);
1372         }
1373         return (TID);
1374 } /* ASR_setTid */
1375
1376 /*-------------------------------------------------------------------------*/
1377 /*                    Function ASR_rescan                                  */
1378 /*-------------------------------------------------------------------------*/
1379 /* The Parameters Passed To This Function Are :                            */
1380 /*     Asr_softc_t *     : HBA miniport driver's adapter data storage.     */
1381 /*                                                                         */
1382 /* This Function Will rescan the adapter and resynchronize any data        */
1383 /*                                                                         */
1384 /* Return : 0 For OK, Error Code Otherwise                                 */
1385 /*-------------------------------------------------------------------------*/
1386
1387 STATIC INLINE int
1388 ASR_rescan(
1389         IN Asr_softc_t * sc)
1390 {
1391         int              bus;
1392         OUT int          error;
1393
1394         /*
1395          * Re-acquire the LCT table and synchronize us to the adapter.
1396          */
1397         if ((error = ASR_acquireLct(sc)) == 0) {
1398                 error = ASR_acquireHrt(sc);
1399         }
1400
1401         if (error != 0) {
1402                 return error;
1403         }
1404
1405         bus = sc->ha_MaxBus;
1406         /* Reset all existing cached TID lookups */
1407         do {
1408                 int target, event = 0;
1409
1410                 /*
1411                  *      Scan for all targets on this bus to see if they
1412                  * got affected by the rescan.
1413                  */
1414                 for (target = 0; target <= sc->ha_MaxId; ++target) {
1415                         int lun;
1416
1417                         /* Stay away from the controller ID */
1418                         if (target == sc->ha_adapter_target[bus]) {
1419                                 continue;
1420                         }
1421                         for (lun = 0; lun <= sc->ha_MaxLun; ++lun) {
1422                                 PI2O_LCT_ENTRY Device;
1423                                 tid_t          TID = (tid_t)-1;
1424                                 tid_t          LastTID;
1425
1426                                 /*
1427                                  * See if the cached TID changed. Search for
1428                                  * the device in our new LCT.
1429                                  */
1430                                 for (Device = sc->ha_LCT->LCTEntry;
1431                                   Device < (PI2O_LCT_ENTRY)(((U32 *)sc->ha_LCT)
1432                                    + I2O_LCT_getTableSize(sc->ha_LCT));
1433                                   ++Device) {
1434                                         if ((Device->le_type != I2O_UNKNOWN)
1435                                          && (Device->le_bus == bus)
1436                                          && (Device->le_target == target)
1437                                          && (Device->le_lun == lun)
1438                                          && (I2O_LCT_ENTRY_getUserTID(Device)
1439                                           == 0xFFF)) {
1440                                                 TID = I2O_LCT_ENTRY_getLocalTID(
1441                                                   Device);
1442                                                 break;
1443                                         }
1444                                 }
1445                                 /*
1446                                  * Indicate to the OS that the label needs
1447                                  * to be recalculated, or that the specific
1448                                  * open device is no longer valid (Merde)
1449                                  * because the cached TID changed.
1450                                  */
1451                                 LastTID = ASR_getTid (sc, bus, target, lun);
1452                                 if (LastTID != TID) {
1453                                         struct cam_path * path;
1454
1455                                         if (xpt_create_path(&path,
1456                                           /*periph*/NULL,
1457                                           cam_sim_path(sc->ha_sim[bus]),
1458                                           target, lun) != CAM_REQ_CMP) {
1459                                                 if (TID == (tid_t)-1) {
1460                                                         event |= AC_LOST_DEVICE;
1461                                                 } else {
1462                                                         event |= AC_INQ_CHANGED
1463                                                                | AC_GETDEV_CHANGED;
1464                                                 }
1465                                         } else {
1466                                                 if (TID == (tid_t)-1) {
1467                                                         xpt_async(
1468                                                           AC_LOST_DEVICE,
1469                                                           path, NULL);
1470                                                 } else if (LastTID == (tid_t)-1) {
1471                                                         struct ccb_getdev ccb;
1472
1473                                                         xpt_setup_ccb(
1474                                                           &(ccb.ccb_h),
1475                                                           path, /*priority*/5);
1476                                                         xpt_async(
1477                                                           AC_FOUND_DEVICE,
1478                                                           path,
1479                                                           &ccb);
1480                                                 } else {
1481                                                         xpt_async(
1482                                                           AC_INQ_CHANGED,
1483                                                           path, NULL);
1484                                                         xpt_async(
1485                                                           AC_GETDEV_CHANGED,
1486                                                           path, NULL);
1487                                                 }
1488                                         }
1489                                 }
1490                                 /*
1491                                  *      We have the option of clearing the
1492                                  * cached TID for it to be rescanned, or to
1493                                  * set it now even if the device never got
1494                                  * accessed. We chose the later since we
1495                                  * currently do not use the condition that
1496                                  * the TID ever got cached.
1497                                  */
1498                                 ASR_setTid (sc, bus, target, lun, TID);
1499                         }
1500                 }
1501                 /*
1502                  *      The xpt layer can not handle multiple events at the
1503                  * same call.
1504                  */
1505                 if (event & AC_LOST_DEVICE) {
1506                         xpt_async(AC_LOST_DEVICE, sc->ha_path[bus], NULL);
1507                 }
1508                 if (event & AC_INQ_CHANGED) {
1509                         xpt_async(AC_INQ_CHANGED, sc->ha_path[bus], NULL);
1510                 }
1511                 if (event & AC_GETDEV_CHANGED) {
1512                         xpt_async(AC_GETDEV_CHANGED, sc->ha_path[bus], NULL);
1513                 }
1514         } while (--bus >= 0);
1515         return (error);
1516 } /* ASR_rescan */
1517
1518 /*-------------------------------------------------------------------------*/
1519 /*                    Function ASR_reset                                   */
1520 /*-------------------------------------------------------------------------*/
1521 /* The Parameters Passed To This Function Are :                            */
1522 /*     Asr_softc_t *      : HBA miniport driver's adapter data storage.    */
1523 /*                                                                         */
1524 /* This Function Will reset the adapter and resynchronize any data         */
1525 /*                                                                         */
1526 /* Return : None                                                           */
1527 /*-------------------------------------------------------------------------*/
1528
1529 STATIC INLINE int
1530 ASR_reset(
1531         IN Asr_softc_t * sc)
1532 {
1533         int              s, retVal;
1534
1535         s = splcam();
1536         if ((sc->ha_in_reset == HA_IN_RESET)
1537          || (sc->ha_in_reset == HA_OFF_LINE_RECOVERY)) {
1538                 splx (s);
1539                 return (EBUSY);
1540         }
1541         /*
1542          *      Promotes HA_OPERATIONAL to HA_IN_RESET,
1543          * or HA_OFF_LINE to HA_OFF_LINE_RECOVERY.
1544          */
1545         ++(sc->ha_in_reset);
1546         if (ASR_resetIOP (sc->ha_Virt, sc->ha_Fvirt) == 0) {
1547                 debug_asr_printf ("ASR_resetIOP failed\n");
1548                 /*
1549                  *      We really need to take this card off-line, easier said
1550                  * than make sense. Better to keep retrying for now since if a
1551                  * UART cable is connected the blinkLEDs the adapter is now in
1552                  * a hard state requiring action from the monitor commands to
1553                  * the HBA to continue. For debugging waiting forever is a
1554                  * good thing. In a production system, however, one may wish
1555                  * to instead take the card off-line ...
1556                  */
1557 #               if 0 && (defined(HA_OFF_LINE))
1558                         /*
1559                          * Take adapter off-line.
1560                          */
1561                         printf ("asr%d: Taking adapter off-line\n",
1562                           sc->ha_path[0]
1563                             ? cam_sim_unit(xpt_path_sim(sc->ha_path[0]))
1564                             : 0);
1565                         sc->ha_in_reset = HA_OFF_LINE;
1566                         splx (s);
1567                         return (ENXIO);
1568 #               else
1569                         /* Wait Forever */
1570                         while (ASR_resetIOP (sc->ha_Virt, sc->ha_Fvirt) == 0);
1571 #               endif
1572         }
1573         retVal = ASR_init (sc);
1574         splx (s);
1575         if (retVal != 0) {
1576                 debug_asr_printf ("ASR_init failed\n");
1577                 sc->ha_in_reset = HA_OFF_LINE;
1578                 return (ENXIO);
1579         }
1580         if (ASR_rescan (sc) != 0) {
1581                 debug_asr_printf ("ASR_rescan failed\n");
1582         }
1583         ASR_failActiveCommands (sc);
1584         if (sc->ha_in_reset == HA_OFF_LINE_RECOVERY) {
1585                 printf ("asr%d: Brining adapter back on-line\n",
1586                   sc->ha_path[0]
1587                     ? cam_sim_unit(xpt_path_sim(sc->ha_path[0]))
1588                     : 0);
1589         }
1590         sc->ha_in_reset = HA_OPERATIONAL;
1591         return (0);
1592 } /* ASR_reset */
1593
1594 /*
1595  *      Device timeout handler.
1596  */
1597 STATIC void
1598 asr_timeout(
1599         INOUT void  * arg)
1600 {
1601         union asr_ccb * ccb = (union asr_ccb *)arg;
1602         Asr_softc_t   * sc = (Asr_softc_t *)(ccb->ccb_h.spriv_ptr0);
1603         int             s;
1604
1605         debug_asr_print_path(ccb);
1606         debug_asr_printf("timed out");
1607
1608         /*
1609          *      Check if the adapter has locked up?
1610          */
1611         if ((s = ASR_getBlinkLedCode(sc)) != 0) {
1612                 /* Reset Adapter */
1613                 printf ("asr%d: Blink LED 0x%x resetting adapter\n",
1614                   cam_sim_unit(xpt_path_sim(ccb->ccb_h.path)), s);
1615                 if (ASR_reset (sc) == ENXIO) {
1616                         /* Try again later */
1617                         ccb->ccb_h.timeout_ch = timeout(asr_timeout,
1618                           (caddr_t)ccb,
1619                           (ccb->ccb_h.timeout * hz) / 1000);
1620                 }
1621                 return;
1622         }
1623         /*
1624          *      Abort does not function on the ASR card!!! Walking away from
1625          * the SCSI command is also *very* dangerous. A SCSI BUS reset is
1626          * our best bet, followed by a complete adapter reset if that fails.
1627          */
1628         s = splcam();
1629         /* Check if we already timed out once to raise the issue */
1630         if ((ccb->ccb_h.status & CAM_STATUS_MASK) == CAM_CMD_TIMEOUT) {
1631                 debug_asr_printf (" AGAIN\nreinitializing adapter\n");
1632                 if (ASR_reset (sc) == ENXIO) {
1633                         ccb->ccb_h.timeout_ch = timeout(asr_timeout,
1634                           (caddr_t)ccb,
1635                           (ccb->ccb_h.timeout * hz) / 1000);
1636                 }
1637                 splx(s);
1638                 return;
1639         }
1640         debug_asr_printf ("\nresetting bus\n");
1641         /* If the BUS reset does not take, then an adapter reset is next! */
1642         ccb->ccb_h.status &= ~CAM_STATUS_MASK;
1643         ccb->ccb_h.status |= CAM_CMD_TIMEOUT;
1644         ccb->ccb_h.timeout_ch = timeout(asr_timeout, (caddr_t)ccb,
1645           (ccb->ccb_h.timeout * hz) / 1000);
1646         ASR_resetBus (sc, cam_sim_bus(xpt_path_sim(ccb->ccb_h.path)));
1647         xpt_async (AC_BUS_RESET, ccb->ccb_h.path, NULL);
1648         splx(s);
1649 } /* asr_timeout */
1650
1651 /*
1652  * send a message asynchronously
1653  */
1654 STATIC INLINE int
1655 ASR_queue(
1656         IN Asr_softc_t      * sc,
1657         IN PI2O_MESSAGE_FRAME Message)
1658 {
1659         OUT U32               MessageOffset;
1660         union asr_ccb       * ccb;
1661
1662         debug_asr_printf ("Host Command Dump:\n");
1663         debug_asr_dump_message (Message);
1664
1665         ccb = (union asr_ccb *)(long)
1666           I2O_MESSAGE_FRAME_getInitiatorContext64(Message);
1667
1668         if ((MessageOffset = ASR_getMessage(sc->ha_Virt)) != EMPTY_QUEUE) {
1669 #ifdef ASR_MEASURE_PERFORMANCE
1670                 int     startTimeIndex;
1671
1672                 if (ccb) {
1673                         ++sc->ha_performance.command_count[
1674                           (int) ccb->csio.cdb_io.cdb_bytes[0]];
1675                         DEQ_TIMEQ_FREE_LIST(startTimeIndex,
1676                           sc->ha_timeQFreeList,
1677                           sc->ha_timeQFreeHead,
1678                           sc->ha_timeQFreeTail);
1679                         if (-1 != startTimeIndex) {
1680                                 microtime(&(sc->ha_timeQ[startTimeIndex]));
1681                         }
1682                         /* Time stamp the command before we send it out */
1683                         ((PRIVATE_SCSI_SCB_EXECUTE_MESSAGE *) Message)->
1684                           PrivateMessageFrame.TransactionContext
1685                             = (I2O_TRANSACTION_CONTEXT) startTimeIndex;
1686
1687                         ++sc->ha_submitted_ccbs_count;
1688                         if (sc->ha_performance.max_submit_count
1689                           < sc->ha_submitted_ccbs_count) {
1690                                 sc->ha_performance.max_submit_count
1691                                   = sc->ha_submitted_ccbs_count;
1692                         }
1693                 }
1694 #endif
1695                 bcopy (Message, sc->ha_Fvirt + MessageOffset,
1696                   I2O_MESSAGE_FRAME_getMessageSize(Message) << 2);
1697                 if (ccb) {
1698                         ASR_ccbAdd (sc, ccb);
1699                 }
1700                 /* Post the command */
1701                 sc->ha_Virt->ToFIFO = MessageOffset;
1702         } else {
1703                 if (ASR_getBlinkLedCode(sc)) {
1704                         /*
1705                          *      Unlikely we can do anything if we can't grab a
1706                          * message frame :-(, but lets give it a try.
1707                          */
1708                         (void)ASR_reset (sc);
1709                 }
1710         }
1711         return (MessageOffset);
1712 } /* ASR_queue */
1713
1714
1715 /* Simple Scatter Gather elements */
1716 #define SG(SGL,Index,Flags,Buffer,Size)                            \
1717         I2O_FLAGS_COUNT_setCount(                                  \
1718           &(((PI2O_SG_ELEMENT)(SGL))->u.Simple[Index].FlagsCount), \
1719           Size);                                                   \
1720         I2O_FLAGS_COUNT_setFlags(                                  \
1721           &(((PI2O_SG_ELEMENT)(SGL))->u.Simple[Index].FlagsCount), \
1722           I2O_SGL_FLAGS_SIMPLE_ADDRESS_ELEMENT | (Flags));         \
1723         I2O_SGE_SIMPLE_ELEMENT_setPhysicalAddress(                 \
1724           &(((PI2O_SG_ELEMENT)(SGL))->u.Simple[Index]),            \
1725           (Buffer == NULL) ? NULL : KVTOPHYS(Buffer))
1726
1727 /*
1728  *      Retrieve Parameter Group.
1729  *              Buffer must be allocated using defAlignLong macro.
1730  */
1731 STATIC void *
1732 ASR_getParams(
1733         IN Asr_softc_t                     * sc,
1734         IN tid_t                             TID,
1735         IN int                               Group,
1736         OUT void                           * Buffer,
1737         IN unsigned                          BufferSize)
1738 {
1739         struct paramGetMessage {
1740                 I2O_UTIL_PARAMS_GET_MESSAGE M;
1741                 char                         F[
1742                   sizeof(I2O_SGE_SIMPLE_ELEMENT)*2 - sizeof(I2O_SG_ELEMENT)];
1743                 struct Operations {
1744                         I2O_PARAM_OPERATIONS_LIST_HEADER Header;
1745                         I2O_PARAM_OPERATION_ALL_TEMPLATE Template[1];
1746                 }                            O;
1747         };
1748         defAlignLong(struct paramGetMessage, Message);
1749         struct Operations                  * Operations_Ptr;
1750         I2O_UTIL_PARAMS_GET_MESSAGE        * Message_Ptr;
1751         struct ParamBuffer {
1752                 I2O_PARAM_RESULTS_LIST_HEADER       Header;
1753                 I2O_PARAM_READ_OPERATION_RESULT     Read;
1754                 char                                Info[1];
1755         }                                  * Buffer_Ptr;
1756
1757         Message_Ptr = (I2O_UTIL_PARAMS_GET_MESSAGE *)ASR_fillMessage(Message,
1758           sizeof(I2O_UTIL_PARAMS_GET_MESSAGE)
1759             + sizeof(I2O_SGE_SIMPLE_ELEMENT)*2 - sizeof(I2O_SG_ELEMENT));
1760         Operations_Ptr = (struct Operations *)((char *)Message_Ptr
1761           + sizeof(I2O_UTIL_PARAMS_GET_MESSAGE)
1762           + sizeof(I2O_SGE_SIMPLE_ELEMENT)*2 - sizeof(I2O_SG_ELEMENT));
1763         bzero ((void *)Operations_Ptr, sizeof(struct Operations));
1764         I2O_PARAM_OPERATIONS_LIST_HEADER_setOperationCount(
1765           &(Operations_Ptr->Header), 1);
1766         I2O_PARAM_OPERATION_ALL_TEMPLATE_setOperation(
1767           &(Operations_Ptr->Template[0]), I2O_PARAMS_OPERATION_FIELD_GET);
1768         I2O_PARAM_OPERATION_ALL_TEMPLATE_setFieldCount(
1769           &(Operations_Ptr->Template[0]), 0xFFFF);
1770         I2O_PARAM_OPERATION_ALL_TEMPLATE_setGroupNumber(
1771           &(Operations_Ptr->Template[0]), Group);
1772         bzero ((void *)(Buffer_Ptr = getAlignLong(struct ParamBuffer, Buffer)),
1773           BufferSize);
1774
1775         I2O_MESSAGE_FRAME_setVersionOffset(&(Message_Ptr->StdMessageFrame),
1776           I2O_VERSION_11
1777           + (((sizeof(I2O_UTIL_PARAMS_GET_MESSAGE) - sizeof(I2O_SG_ELEMENT))
1778             / sizeof(U32)) << 4));
1779         I2O_MESSAGE_FRAME_setTargetAddress (&(Message_Ptr->StdMessageFrame),
1780           TID);
1781         I2O_MESSAGE_FRAME_setFunction (&(Message_Ptr->StdMessageFrame),
1782           I2O_UTIL_PARAMS_GET);
1783         /*
1784          *  Set up the buffers as scatter gather elements.
1785          */
1786         SG(&(Message_Ptr->SGL), 0,
1787           I2O_SGL_FLAGS_DIR | I2O_SGL_FLAGS_END_OF_BUFFER,
1788           Operations_Ptr, sizeof(struct Operations));
1789         SG(&(Message_Ptr->SGL), 1,
1790           I2O_SGL_FLAGS_LAST_ELEMENT | I2O_SGL_FLAGS_END_OF_BUFFER,
1791           Buffer_Ptr, BufferSize);
1792
1793         if ((ASR_queue_c(sc, (PI2O_MESSAGE_FRAME)Message_Ptr) == CAM_REQ_CMP)
1794          && (Buffer_Ptr->Header.ResultCount)) {
1795                 return ((void *)(Buffer_Ptr->Info));
1796         }
1797         return ((void *)NULL);
1798 } /* ASR_getParams */
1799
1800 /*
1801  *      Acquire the LCT information.
1802  */
1803 STATIC INLINE int
1804 ASR_acquireLct (
1805         INOUT Asr_softc_t          * sc)
1806 {
1807         PI2O_EXEC_LCT_NOTIFY_MESSAGE Message_Ptr;
1808         PI2O_SGE_SIMPLE_ELEMENT      sg;
1809         int                          MessageSizeInBytes;
1810         caddr_t                      v;
1811         int                          len;
1812         I2O_LCT                      Table;
1813         PI2O_LCT_ENTRY               Entry;
1814
1815         /*
1816          *      sc value assumed valid
1817          */
1818         MessageSizeInBytes = sizeof(I2O_EXEC_LCT_NOTIFY_MESSAGE)
1819           - sizeof(I2O_SG_ELEMENT) + sizeof(I2O_SGE_SIMPLE_ELEMENT);
1820         if ((Message_Ptr = (PI2O_EXEC_LCT_NOTIFY_MESSAGE)malloc (
1821           MessageSizeInBytes, M_TEMP, M_WAITOK))
1822           == (PI2O_EXEC_LCT_NOTIFY_MESSAGE)NULL) {
1823                 return (ENOMEM);
1824         }
1825         (void)ASR_fillMessage((char *)Message_Ptr, MessageSizeInBytes);
1826         I2O_MESSAGE_FRAME_setVersionOffset(&(Message_Ptr->StdMessageFrame),
1827           (I2O_VERSION_11 +
1828           (((sizeof(I2O_EXEC_LCT_NOTIFY_MESSAGE) - sizeof(I2O_SG_ELEMENT))
1829                         / sizeof(U32)) << 4)));
1830         I2O_MESSAGE_FRAME_setFunction(&(Message_Ptr->StdMessageFrame),
1831           I2O_EXEC_LCT_NOTIFY);
1832         I2O_EXEC_LCT_NOTIFY_MESSAGE_setClassIdentifier(Message_Ptr,
1833           I2O_CLASS_MATCH_ANYCLASS);
1834         /*
1835          *      Call the LCT table to determine the number of device entries
1836          * to reserve space for.
1837          */
1838         SG(&(Message_Ptr->SGL), 0,
1839           I2O_SGL_FLAGS_LAST_ELEMENT | I2O_SGL_FLAGS_END_OF_BUFFER, &Table,
1840           sizeof(I2O_LCT));
1841         /*
1842          *      since this code is reused in several systems, code efficiency
1843          * is greater by using a shift operation rather than a divide by
1844          * sizeof(u_int32_t).
1845          */
1846         I2O_LCT_setTableSize(&Table,
1847           (sizeof(I2O_LCT) - sizeof(I2O_LCT_ENTRY)) >> 2);
1848         (void)ASR_queue_c(sc, (PI2O_MESSAGE_FRAME)Message_Ptr);
1849         /*
1850          *      Determine the size of the LCT table.
1851          */
1852         if (sc->ha_LCT) {
1853                 free (sc->ha_LCT, M_TEMP);
1854         }
1855         /*
1856          *      malloc only generates contiguous memory when less than a
1857          * page is expected. We must break the request up into an SG list ...
1858          */
1859         if (((len = (I2O_LCT_getTableSize(&Table) << 2)) <=
1860           (sizeof(I2O_LCT) - sizeof(I2O_LCT_ENTRY)))
1861          || (len > (128 * 1024))) {     /* Arbitrary */
1862                 free (Message_Ptr, M_TEMP);
1863                 return (EINVAL);
1864         }
1865         if ((sc->ha_LCT = (PI2O_LCT)malloc (len, M_TEMP, M_WAITOK))
1866           == (PI2O_LCT)NULL) {
1867                 free (Message_Ptr, M_TEMP);
1868                 return (ENOMEM);
1869         }
1870         /*
1871          *      since this code is reused in several systems, code efficiency
1872          * is greater by using a shift operation rather than a divide by
1873          * sizeof(u_int32_t).
1874          */
1875         I2O_LCT_setTableSize(sc->ha_LCT,
1876           (sizeof(I2O_LCT) - sizeof(I2O_LCT_ENTRY)) >> 2);
1877         /*
1878          *      Convert the access to the LCT table into a SG list.
1879          */
1880         sg = Message_Ptr->SGL.u.Simple;
1881         v = (caddr_t)(sc->ha_LCT);
1882         for (;;) {
1883                 int next, base, span;
1884
1885                 span = 0;
1886                 next = base = KVTOPHYS(v);
1887                 I2O_SGE_SIMPLE_ELEMENT_setPhysicalAddress(sg, base);
1888
1889                 /* How far can we go contiguously */
1890                 while ((len > 0) && (base == next)) {
1891                         int size;
1892
1893                         next = trunc_page(base) + PAGE_SIZE;
1894                         size = next - base;
1895                         if (size > len) {
1896                                 size = len;
1897                         }
1898                         span += size;
1899                         v += size;
1900                         len -= size;
1901                         base = KVTOPHYS(v);
1902                 }
1903
1904                 /* Construct the Flags */
1905                 I2O_FLAGS_COUNT_setCount(&(sg->FlagsCount), span);
1906                 {
1907                         int rw = I2O_SGL_FLAGS_SIMPLE_ADDRESS_ELEMENT;
1908                         if (len <= 0) {
1909                                 rw = (I2O_SGL_FLAGS_SIMPLE_ADDRESS_ELEMENT
1910                                     | I2O_SGL_FLAGS_LAST_ELEMENT
1911                                     | I2O_SGL_FLAGS_END_OF_BUFFER);
1912                         }
1913                         I2O_FLAGS_COUNT_setFlags(&(sg->FlagsCount), rw);
1914                 }
1915
1916                 if (len <= 0) {
1917                         break;
1918                 }
1919
1920                 /*
1921                  * Incrementing requires resizing of the packet.
1922                  */
1923                 ++sg;
1924                 MessageSizeInBytes += sizeof(*sg);
1925                 I2O_MESSAGE_FRAME_setMessageSize(
1926                   &(Message_Ptr->StdMessageFrame),
1927                   I2O_MESSAGE_FRAME_getMessageSize(
1928                     &(Message_Ptr->StdMessageFrame))
1929                   + (sizeof(*sg) / sizeof(U32)));
1930                 {
1931                         PI2O_EXEC_LCT_NOTIFY_MESSAGE NewMessage_Ptr;
1932
1933                         if ((NewMessage_Ptr = (PI2O_EXEC_LCT_NOTIFY_MESSAGE)
1934                             malloc (MessageSizeInBytes, M_TEMP, M_WAITOK))
1935                             == (PI2O_EXEC_LCT_NOTIFY_MESSAGE)NULL) {
1936                                 free (sc->ha_LCT, M_TEMP);
1937                                 sc->ha_LCT = (PI2O_LCT)NULL;
1938                                 free (Message_Ptr, M_TEMP);
1939                                 return (ENOMEM);
1940                         }
1941                         span = ((caddr_t)sg) - (caddr_t)Message_Ptr;
1942                         bcopy ((caddr_t)Message_Ptr,
1943                           (caddr_t)NewMessage_Ptr, span);
1944                         free (Message_Ptr, M_TEMP);
1945                         sg = (PI2O_SGE_SIMPLE_ELEMENT)
1946                           (((caddr_t)NewMessage_Ptr) + span);
1947                         Message_Ptr = NewMessage_Ptr;
1948                 }
1949         }
1950         {       int retval;
1951
1952                 retval = ASR_queue_c(sc, (PI2O_MESSAGE_FRAME)Message_Ptr);
1953                 free (Message_Ptr, M_TEMP);
1954                 if (retval != CAM_REQ_CMP) {
1955                         return (ENODEV);
1956                 }
1957         }
1958         /* If the LCT table grew, lets truncate accesses */
1959         if (I2O_LCT_getTableSize(&Table) < I2O_LCT_getTableSize(sc->ha_LCT)) {
1960                 I2O_LCT_setTableSize(sc->ha_LCT, I2O_LCT_getTableSize(&Table));
1961         }
1962         for (Entry = sc->ha_LCT->LCTEntry; Entry < (PI2O_LCT_ENTRY)
1963           (((U32 *)sc->ha_LCT)+I2O_LCT_getTableSize(sc->ha_LCT));
1964           ++Entry) {
1965                 Entry->le_type = I2O_UNKNOWN;
1966                 switch (I2O_CLASS_ID_getClass(&(Entry->ClassID))) {
1967
1968                 case I2O_CLASS_RANDOM_BLOCK_STORAGE:
1969                         Entry->le_type = I2O_BSA;
1970                         break;
1971
1972                 case I2O_CLASS_SCSI_PERIPHERAL:
1973                         Entry->le_type = I2O_SCSI;
1974                         break;
1975
1976                 case I2O_CLASS_FIBRE_CHANNEL_PERIPHERAL:
1977                         Entry->le_type = I2O_FCA;
1978                         break;
1979
1980                 case I2O_CLASS_BUS_ADAPTER_PORT:
1981                         Entry->le_type = I2O_PORT | I2O_SCSI;
1982                         /* FALLTHRU */
1983                 case I2O_CLASS_FIBRE_CHANNEL_PORT:
1984                         if (I2O_CLASS_ID_getClass(&(Entry->ClassID)) ==
1985                           I2O_CLASS_FIBRE_CHANNEL_PORT) {
1986                                 Entry->le_type = I2O_PORT | I2O_FCA;
1987                         }
1988                 {       struct ControllerInfo {
1989                                 I2O_PARAM_RESULTS_LIST_HEADER       Header;
1990                                 I2O_PARAM_READ_OPERATION_RESULT     Read;
1991                                 I2O_HBA_SCSI_CONTROLLER_INFO_SCALAR Info;
1992                         };
1993                         defAlignLong(struct ControllerInfo, Buffer);
1994                         PI2O_HBA_SCSI_CONTROLLER_INFO_SCALAR Info;
1995
1996                         Entry->le_bus = 0xff;
1997                         Entry->le_target = 0xff;
1998                         Entry->le_lun = 0xff;
1999
2000                         if ((Info = (PI2O_HBA_SCSI_CONTROLLER_INFO_SCALAR)
2001                           ASR_getParams(sc,
2002                             I2O_LCT_ENTRY_getLocalTID(Entry),
2003                             I2O_HBA_SCSI_CONTROLLER_INFO_GROUP_NO,
2004                             Buffer, sizeof(struct ControllerInfo)))
2005                         == (PI2O_HBA_SCSI_CONTROLLER_INFO_SCALAR)NULL) {
2006                                 continue;
2007                         }
2008                         Entry->le_target
2009                           = I2O_HBA_SCSI_CONTROLLER_INFO_SCALAR_getInitiatorID(
2010                             Info);
2011                         Entry->le_lun = 0;
2012                 }       /* FALLTHRU */
2013                 default:
2014                         continue;
2015                 }
2016                 {       struct DeviceInfo {
2017                                 I2O_PARAM_RESULTS_LIST_HEADER   Header;
2018                                 I2O_PARAM_READ_OPERATION_RESULT Read;
2019                                 I2O_DPT_DEVICE_INFO_SCALAR      Info;
2020                         };
2021                         defAlignLong (struct DeviceInfo, Buffer);
2022                         PI2O_DPT_DEVICE_INFO_SCALAR      Info;
2023
2024                         Entry->le_bus = 0xff;
2025                         Entry->le_target = 0xff;
2026                         Entry->le_lun = 0xff;
2027
2028                         if ((Info = (PI2O_DPT_DEVICE_INFO_SCALAR)
2029                           ASR_getParams(sc,
2030                             I2O_LCT_ENTRY_getLocalTID(Entry),
2031                             I2O_DPT_DEVICE_INFO_GROUP_NO,
2032                             Buffer, sizeof(struct DeviceInfo)))
2033                         == (PI2O_DPT_DEVICE_INFO_SCALAR)NULL) {
2034                                 continue;
2035                         }
2036                         Entry->le_type
2037                           |= I2O_DPT_DEVICE_INFO_SCALAR_getDeviceType(Info);
2038                         Entry->le_bus
2039                           = I2O_DPT_DEVICE_INFO_SCALAR_getBus(Info);
2040                         if ((Entry->le_bus > sc->ha_MaxBus)
2041                          && (Entry->le_bus <= MAX_CHANNEL)) {
2042                                 sc->ha_MaxBus = Entry->le_bus;
2043                         }
2044                         Entry->le_target
2045                           = I2O_DPT_DEVICE_INFO_SCALAR_getIdentifier(Info);
2046                         Entry->le_lun
2047                           = I2O_DPT_DEVICE_INFO_SCALAR_getLunInfo(Info);
2048                 }
2049         }
2050         /*
2051          *      A zero return value indicates success.
2052          */
2053         return (0);
2054 } /* ASR_acquireLct */
2055
2056 /*
2057  * Initialize a message frame.
2058  * We assume that the CDB has already been set up, so all we do here is
2059  * generate the Scatter Gather list.
2060  */
2061 STATIC INLINE PI2O_MESSAGE_FRAME
2062 ASR_init_message(
2063         IN union asr_ccb      * ccb,
2064         OUT PI2O_MESSAGE_FRAME  Message)
2065 {
2066         int                     next, span, base, rw;
2067         OUT PI2O_MESSAGE_FRAME  Message_Ptr;
2068         Asr_softc_t           * sc = (Asr_softc_t *)(ccb->ccb_h.spriv_ptr0);
2069         PI2O_SGE_SIMPLE_ELEMENT sg;
2070         caddr_t                 v;
2071         vm_size_t               size, len;
2072         U32                     MessageSize;
2073
2074         /* We only need to zero out the PRIVATE_SCSI_SCB_EXECUTE_MESSAGE */
2075         bzero (Message_Ptr = getAlignLong(I2O_MESSAGE_FRAME, Message),
2076           (sizeof(PRIVATE_SCSI_SCB_EXECUTE_MESSAGE) - sizeof(I2O_SG_ELEMENT)));
2077
2078         {
2079                 int   target = ccb->ccb_h.target_id;
2080                 int   lun = ccb->ccb_h.target_lun;
2081                 int   bus = cam_sim_bus(xpt_path_sim(ccb->ccb_h.path));
2082                 tid_t TID;
2083
2084                 if ((TID = ASR_getTid (sc, bus, target, lun)) == (tid_t)-1) {
2085                         PI2O_LCT_ENTRY Device;
2086
2087                         TID = (tid_t)0;
2088                         for (Device = sc->ha_LCT->LCTEntry; Device < (PI2O_LCT_ENTRY)
2089                           (((U32 *)sc->ha_LCT)+I2O_LCT_getTableSize(sc->ha_LCT));
2090                           ++Device) {
2091                                 if ((Device->le_type != I2O_UNKNOWN)
2092                                  && (Device->le_bus == bus)
2093                                  && (Device->le_target == target)
2094                                  && (Device->le_lun == lun)
2095                                  && (I2O_LCT_ENTRY_getUserTID(Device) == 0xFFF)) {
2096                                         TID = I2O_LCT_ENTRY_getLocalTID(Device);
2097                                         ASR_setTid (sc, Device->le_bus,
2098                                           Device->le_target, Device->le_lun,
2099                                           TID);
2100                                         break;
2101                                 }
2102                         }
2103                 }
2104                 if (TID == (tid_t)0) {
2105                         return ((PI2O_MESSAGE_FRAME)NULL);
2106                 }
2107                 I2O_MESSAGE_FRAME_setTargetAddress(Message_Ptr, TID);
2108                 PRIVATE_SCSI_SCB_EXECUTE_MESSAGE_setTID(
2109                   (PPRIVATE_SCSI_SCB_EXECUTE_MESSAGE)Message_Ptr, TID);
2110         }
2111         I2O_MESSAGE_FRAME_setVersionOffset(Message_Ptr, I2O_VERSION_11 |
2112           (((sizeof(PRIVATE_SCSI_SCB_EXECUTE_MESSAGE) - sizeof(I2O_SG_ELEMENT))
2113                 / sizeof(U32)) << 4));
2114         I2O_MESSAGE_FRAME_setMessageSize(Message_Ptr,
2115           (sizeof(PRIVATE_SCSI_SCB_EXECUTE_MESSAGE)
2116           - sizeof(I2O_SG_ELEMENT)) / sizeof(U32));
2117         I2O_MESSAGE_FRAME_setInitiatorAddress (Message_Ptr, 1);
2118         I2O_MESSAGE_FRAME_setFunction(Message_Ptr, I2O_PRIVATE_MESSAGE);
2119         I2O_PRIVATE_MESSAGE_FRAME_setXFunctionCode (
2120           (PI2O_PRIVATE_MESSAGE_FRAME)Message_Ptr, I2O_SCSI_SCB_EXEC);
2121         PRIVATE_SCSI_SCB_EXECUTE_MESSAGE_setSCBFlags (
2122           (PPRIVATE_SCSI_SCB_EXECUTE_MESSAGE)Message_Ptr,
2123             I2O_SCB_FLAG_ENABLE_DISCONNECT
2124           | I2O_SCB_FLAG_SIMPLE_QUEUE_TAG
2125           | I2O_SCB_FLAG_SENSE_DATA_IN_BUFFER);
2126         /*
2127          * We do not need any (optional byteswapping) method access to
2128          * the Initiator & Transaction context field.
2129          */
2130         I2O_MESSAGE_FRAME_setInitiatorContext64(Message, (long)ccb);
2131
2132         I2O_PRIVATE_MESSAGE_FRAME_setOrganizationID(
2133           (PI2O_PRIVATE_MESSAGE_FRAME)Message_Ptr, DPT_ORGANIZATION_ID);
2134         /*
2135          * copy the cdb over
2136          */
2137         PRIVATE_SCSI_SCB_EXECUTE_MESSAGE_setCDBLength(
2138           (PPRIVATE_SCSI_SCB_EXECUTE_MESSAGE)Message_Ptr, ccb->csio.cdb_len);
2139         bcopy (&(ccb->csio.cdb_io),
2140           ((PPRIVATE_SCSI_SCB_EXECUTE_MESSAGE)Message_Ptr)->CDB, ccb->csio.cdb_len);
2141
2142         /*
2143          * Given a buffer describing a transfer, set up a scatter/gather map
2144          * in a ccb to map that SCSI transfer.
2145          */
2146
2147         rw = (ccb->ccb_h.flags & CAM_DIR_IN) ? 0 : I2O_SGL_FLAGS_DIR;
2148
2149         PRIVATE_SCSI_SCB_EXECUTE_MESSAGE_setSCBFlags (
2150           (PPRIVATE_SCSI_SCB_EXECUTE_MESSAGE)Message_Ptr,
2151           (ccb->csio.dxfer_len)
2152             ? ((rw) ? (I2O_SCB_FLAG_XFER_TO_DEVICE
2153                      | I2O_SCB_FLAG_ENABLE_DISCONNECT
2154                      | I2O_SCB_FLAG_SIMPLE_QUEUE_TAG
2155                      | I2O_SCB_FLAG_SENSE_DATA_IN_BUFFER)
2156                     : (I2O_SCB_FLAG_XFER_FROM_DEVICE
2157                      | I2O_SCB_FLAG_ENABLE_DISCONNECT
2158                      | I2O_SCB_FLAG_SIMPLE_QUEUE_TAG
2159                      | I2O_SCB_FLAG_SENSE_DATA_IN_BUFFER))
2160             :         (I2O_SCB_FLAG_ENABLE_DISCONNECT
2161                      | I2O_SCB_FLAG_SIMPLE_QUEUE_TAG
2162                      | I2O_SCB_FLAG_SENSE_DATA_IN_BUFFER));
2163
2164         /*
2165          * Given a transfer described by a `data', fill in the SG list.
2166          */
2167         sg = &((PPRIVATE_SCSI_SCB_EXECUTE_MESSAGE)Message_Ptr)->SGL.u.Simple[0];
2168
2169         len = ccb->csio.dxfer_len;
2170         v = ccb->csio.data_ptr;
2171         ASSERT (ccb->csio.dxfer_len >= 0);
2172         MessageSize = I2O_MESSAGE_FRAME_getMessageSize(Message_Ptr);
2173         PRIVATE_SCSI_SCB_EXECUTE_MESSAGE_setByteCount(
2174           (PPRIVATE_SCSI_SCB_EXECUTE_MESSAGE)Message_Ptr, len);
2175         while ((len > 0) && (sg < &((PPRIVATE_SCSI_SCB_EXECUTE_MESSAGE)
2176           Message_Ptr)->SGL.u.Simple[SG_SIZE])) {
2177                 span = 0;
2178                 next = base = KVTOPHYS(v);
2179                 I2O_SGE_SIMPLE_ELEMENT_setPhysicalAddress(sg, base);
2180
2181                 /* How far can we go contiguously */
2182                 while ((len > 0) && (base == next)) {
2183                         next = trunc_page(base) + PAGE_SIZE;
2184                         size = next - base;
2185                         if (size > len) {
2186                                 size = len;
2187                         }
2188                         span += size;
2189                         v += size;
2190                         len -= size;
2191                         base = KVTOPHYS(v);
2192                 }
2193
2194                 I2O_FLAGS_COUNT_setCount(&(sg->FlagsCount), span);
2195                 if (len == 0) {
2196                         rw |= I2O_SGL_FLAGS_LAST_ELEMENT;
2197                 }
2198                 I2O_FLAGS_COUNT_setFlags(&(sg->FlagsCount),
2199                   I2O_SGL_FLAGS_SIMPLE_ADDRESS_ELEMENT | rw);
2200                 ++sg;
2201                 MessageSize += sizeof(*sg) / sizeof(U32);
2202         }
2203         /* We always do the request sense ... */
2204         if ((span = ccb->csio.sense_len) == 0) {
2205                 span = sizeof(ccb->csio.sense_data);
2206         }
2207         SG(sg, 0, I2O_SGL_FLAGS_LAST_ELEMENT | I2O_SGL_FLAGS_END_OF_BUFFER,
2208           &(ccb->csio.sense_data), span);
2209         I2O_MESSAGE_FRAME_setMessageSize(Message_Ptr,
2210           MessageSize + (sizeof(*sg) / sizeof(U32)));
2211         return (Message_Ptr);
2212 } /* ASR_init_message */
2213
2214 /*
2215  *      Reset the adapter.
2216  */
2217 STATIC INLINE U32
2218 ASR_initOutBound (
2219         INOUT Asr_softc_t                     * sc)
2220 {
2221         struct initOutBoundMessage {
2222                 I2O_EXEC_OUTBOUND_INIT_MESSAGE M;
2223                 U32                            R;
2224         };
2225         defAlignLong(struct initOutBoundMessage,Message);
2226         PI2O_EXEC_OUTBOUND_INIT_MESSAGE         Message_Ptr;
2227         OUT U32                      * volatile Reply_Ptr;
2228         U32                                     Old;
2229
2230         /*
2231          *  Build up our copy of the Message.
2232          */
2233         Message_Ptr = (PI2O_EXEC_OUTBOUND_INIT_MESSAGE)ASR_fillMessage(Message,
2234           sizeof(I2O_EXEC_OUTBOUND_INIT_MESSAGE));
2235         I2O_MESSAGE_FRAME_setFunction(&(Message_Ptr->StdMessageFrame),
2236           I2O_EXEC_OUTBOUND_INIT);
2237         I2O_EXEC_OUTBOUND_INIT_MESSAGE_setHostPageFrameSize(Message_Ptr, PAGE_SIZE);
2238         I2O_EXEC_OUTBOUND_INIT_MESSAGE_setOutboundMFrameSize(Message_Ptr,
2239           sizeof(I2O_SCSI_ERROR_REPLY_MESSAGE_FRAME));
2240         /*
2241          *  Reset the Reply Status
2242          */
2243         *(Reply_Ptr = (U32 *)((char *)Message_Ptr
2244           + sizeof(I2O_EXEC_OUTBOUND_INIT_MESSAGE))) = 0;
2245         SG (&(Message_Ptr->SGL), 0, I2O_SGL_FLAGS_LAST_ELEMENT, Reply_Ptr,
2246           sizeof(U32));
2247         /*
2248          *      Send the Message out
2249          */
2250         if ((Old = ASR_initiateCp (sc->ha_Virt, sc->ha_Fvirt, (PI2O_MESSAGE_FRAME)Message_Ptr)) != (U32)-1L) {
2251                 u_long size, addr;
2252
2253                 /*
2254                  *      Wait for a response (Poll).
2255                  */
2256                 while (*Reply_Ptr < I2O_EXEC_OUTBOUND_INIT_REJECTED);
2257                 /*
2258                  *      Re-enable the interrupts.
2259                  */
2260                 sc->ha_Virt->Mask = Old;
2261                 /*
2262                  *      Populate the outbound table.
2263                  */
2264                 if (sc->ha_Msgs == (PI2O_SCSI_ERROR_REPLY_MESSAGE_FRAME)NULL) {
2265
2266                         /* Allocate the reply frames */
2267                         size = sizeof(I2O_SCSI_ERROR_REPLY_MESSAGE_FRAME)
2268                           * sc->ha_Msgs_Count;
2269
2270                         /*
2271                          *      contigmalloc only works reliably at
2272                          * initialization time.
2273                          */
2274                         if ((sc->ha_Msgs = (PI2O_SCSI_ERROR_REPLY_MESSAGE_FRAME)
2275                           contigmalloc (size, M_DEVBUF, M_WAITOK, 0ul,
2276                             0xFFFFFFFFul, (u_long)sizeof(U32), 0ul))
2277                           != (PI2O_SCSI_ERROR_REPLY_MESSAGE_FRAME)NULL) {
2278                                 (void)bzero ((char *)sc->ha_Msgs, size);
2279                                 sc->ha_Msgs_Phys = KVTOPHYS(sc->ha_Msgs);
2280                         }
2281                 }
2282
2283                 /* Initialize the outbound FIFO */
2284                 if (sc->ha_Msgs != (PI2O_SCSI_ERROR_REPLY_MESSAGE_FRAME)NULL)
2285                 for (size = sc->ha_Msgs_Count, addr = sc->ha_Msgs_Phys;
2286                   size; --size) {
2287                         sc->ha_Virt->FromFIFO = addr;
2288                         addr += sizeof(I2O_SCSI_ERROR_REPLY_MESSAGE_FRAME);
2289                 }
2290                 return (*Reply_Ptr);
2291         }
2292         return (0);
2293 } /* ASR_initOutBound */
2294
2295 /*
2296  *      Set the system table
2297  */
2298 STATIC INLINE int
2299 ASR_setSysTab(
2300         IN Asr_softc_t              * sc)
2301 {
2302         PI2O_EXEC_SYS_TAB_SET_MESSAGE Message_Ptr;
2303         PI2O_SET_SYSTAB_HEADER        SystemTable;
2304         Asr_softc_t                 * ha;
2305         PI2O_SGE_SIMPLE_ELEMENT       sg;
2306         int                           retVal;
2307
2308         if ((SystemTable = (PI2O_SET_SYSTAB_HEADER)malloc (
2309           sizeof(I2O_SET_SYSTAB_HEADER), M_TEMP, M_WAITOK))
2310           == (PI2O_SET_SYSTAB_HEADER)NULL) {
2311                 return (ENOMEM);
2312         }
2313         bzero (SystemTable, sizeof(I2O_SET_SYSTAB_HEADER));
2314         for (ha = Asr_softc; ha; ha = ha->ha_next) {
2315                 ++SystemTable->NumberEntries;
2316         }
2317         if ((Message_Ptr = (PI2O_EXEC_SYS_TAB_SET_MESSAGE)malloc (
2318           sizeof(I2O_EXEC_SYS_TAB_SET_MESSAGE) - sizeof(I2O_SG_ELEMENT)
2319            + ((3+SystemTable->NumberEntries) * sizeof(I2O_SGE_SIMPLE_ELEMENT)),
2320           M_TEMP, M_WAITOK)) == (PI2O_EXEC_SYS_TAB_SET_MESSAGE)NULL) {
2321                 free (SystemTable, M_TEMP);
2322                 return (ENOMEM);
2323         }
2324         (void)ASR_fillMessage((char *)Message_Ptr,
2325           sizeof(I2O_EXEC_SYS_TAB_SET_MESSAGE) - sizeof(I2O_SG_ELEMENT)
2326            + ((3+SystemTable->NumberEntries) * sizeof(I2O_SGE_SIMPLE_ELEMENT)));
2327         I2O_MESSAGE_FRAME_setVersionOffset(&(Message_Ptr->StdMessageFrame),
2328           (I2O_VERSION_11 +
2329           (((sizeof(I2O_EXEC_SYS_TAB_SET_MESSAGE) - sizeof(I2O_SG_ELEMENT))
2330                         / sizeof(U32)) << 4)));
2331         I2O_MESSAGE_FRAME_setFunction(&(Message_Ptr->StdMessageFrame),
2332           I2O_EXEC_SYS_TAB_SET);
2333         /*
2334          *      Call the LCT table to determine the number of device entries
2335          * to reserve space for.
2336          *      since this code is reused in several systems, code efficiency
2337          * is greater by using a shift operation rather than a divide by
2338          * sizeof(u_int32_t).
2339          */
2340         sg = (PI2O_SGE_SIMPLE_ELEMENT)((char *)Message_Ptr
2341           + ((I2O_MESSAGE_FRAME_getVersionOffset(
2342               &(Message_Ptr->StdMessageFrame)) & 0xF0) >> 2));
2343         SG(sg, 0, I2O_SGL_FLAGS_DIR, SystemTable, sizeof(I2O_SET_SYSTAB_HEADER));
2344         ++sg;
2345         for (ha = Asr_softc; ha; ha = ha->ha_next) {
2346                 SG(sg, 0,
2347                   ((ha->ha_next)
2348                     ? (I2O_SGL_FLAGS_DIR)
2349                     : (I2O_SGL_FLAGS_DIR | I2O_SGL_FLAGS_END_OF_BUFFER)),
2350                   &(ha->ha_SystemTable), sizeof(ha->ha_SystemTable));
2351                 ++sg;
2352         }
2353         SG(sg, 0, I2O_SGL_FLAGS_DIR | I2O_SGL_FLAGS_END_OF_BUFFER, NULL, 0);
2354         SG(sg, 1, I2O_SGL_FLAGS_DIR | I2O_SGL_FLAGS_LAST_ELEMENT
2355             | I2O_SGL_FLAGS_END_OF_BUFFER, NULL, 0);
2356         retVal = ASR_queue_c(sc, (PI2O_MESSAGE_FRAME)Message_Ptr);
2357         free (Message_Ptr, M_TEMP);
2358         free (SystemTable, M_TEMP);
2359         return (retVal);
2360 } /* ASR_setSysTab */
2361
2362 STATIC INLINE int
2363 ASR_acquireHrt (
2364         INOUT Asr_softc_t                   * sc)
2365 {
2366         defAlignLong(I2O_EXEC_HRT_GET_MESSAGE,Message);
2367         I2O_EXEC_HRT_GET_MESSAGE *            Message_Ptr;
2368         struct {
2369                 I2O_HRT       Header;
2370                 I2O_HRT_ENTRY Entry[MAX_CHANNEL];
2371         }                                     Hrt;
2372         u_int8_t                              NumberOfEntries;
2373         PI2O_HRT_ENTRY                        Entry;
2374
2375         bzero ((void *)&Hrt, sizeof (Hrt));
2376         Message_Ptr = (I2O_EXEC_HRT_GET_MESSAGE *)ASR_fillMessage(Message,
2377           sizeof(I2O_EXEC_HRT_GET_MESSAGE) - sizeof(I2O_SG_ELEMENT)
2378           + sizeof(I2O_SGE_SIMPLE_ELEMENT));
2379         I2O_MESSAGE_FRAME_setVersionOffset(&(Message_Ptr->StdMessageFrame),
2380           (I2O_VERSION_11
2381           + (((sizeof(I2O_EXEC_HRT_GET_MESSAGE) - sizeof(I2O_SG_ELEMENT))
2382                    / sizeof(U32)) << 4)));
2383         I2O_MESSAGE_FRAME_setFunction (&(Message_Ptr->StdMessageFrame),
2384           I2O_EXEC_HRT_GET);
2385
2386         /*
2387          *  Set up the buffers as scatter gather elements.
2388          */
2389         SG(&(Message_Ptr->SGL), 0,
2390           I2O_SGL_FLAGS_LAST_ELEMENT | I2O_SGL_FLAGS_END_OF_BUFFER,
2391           &Hrt, sizeof(Hrt));
2392         if (ASR_queue_c(sc, (PI2O_MESSAGE_FRAME)Message_Ptr) != CAM_REQ_CMP) {
2393                 return (ENODEV);
2394         }
2395         if ((NumberOfEntries = I2O_HRT_getNumberEntries(&Hrt.Header))
2396           > (MAX_CHANNEL + 1)) {
2397                 NumberOfEntries = MAX_CHANNEL + 1;
2398         }
2399         for (Entry = Hrt.Header.HRTEntry;
2400           NumberOfEntries != 0;
2401           ++Entry, --NumberOfEntries) {
2402                 PI2O_LCT_ENTRY Device;
2403
2404                 for (Device = sc->ha_LCT->LCTEntry; Device < (PI2O_LCT_ENTRY)
2405                   (((U32 *)sc->ha_LCT)+I2O_LCT_getTableSize(sc->ha_LCT));
2406                   ++Device) {
2407                         if (I2O_LCT_ENTRY_getLocalTID(Device)
2408                           == (I2O_HRT_ENTRY_getAdapterID(Entry) & 0xFFF)) {
2409                                 Device->le_bus = I2O_HRT_ENTRY_getAdapterID(
2410                                   Entry) >> 16;
2411                                 if ((Device->le_bus > sc->ha_MaxBus)
2412                                  && (Device->le_bus <= MAX_CHANNEL)) {
2413                                         sc->ha_MaxBus = Device->le_bus;
2414                                 }
2415                         }
2416                 }
2417         }
2418         return (0);
2419 } /* ASR_acquireHrt */
2420
2421 /*
2422  *      Enable the adapter.
2423  */
2424 STATIC INLINE int
2425 ASR_enableSys (
2426         IN Asr_softc_t                         * sc)
2427 {
2428         defAlignLong(I2O_EXEC_SYS_ENABLE_MESSAGE,Message);
2429         PI2O_EXEC_SYS_ENABLE_MESSAGE             Message_Ptr;
2430
2431         Message_Ptr = (PI2O_EXEC_SYS_ENABLE_MESSAGE)ASR_fillMessage(Message,
2432           sizeof(I2O_EXEC_SYS_ENABLE_MESSAGE));
2433         I2O_MESSAGE_FRAME_setFunction(&(Message_Ptr->StdMessageFrame),
2434           I2O_EXEC_SYS_ENABLE);
2435         return (ASR_queue_c(sc, (PI2O_MESSAGE_FRAME)Message_Ptr) != 0);
2436 } /* ASR_enableSys */
2437
2438 /*
2439  *      Perform the stages necessary to initialize the adapter
2440  */
2441 STATIC int
2442 ASR_init(
2443         IN Asr_softc_t * sc)
2444 {
2445         return ((ASR_initOutBound(sc) == 0)
2446          || (ASR_setSysTab(sc) != CAM_REQ_CMP)
2447          || (ASR_enableSys(sc) != CAM_REQ_CMP));
2448 } /* ASR_init */
2449
2450 /*
2451  *      Send a Synchronize Cache command to the target device.
2452  */
2453 STATIC INLINE void
2454 ASR_sync (
2455         IN Asr_softc_t * sc,
2456         IN int           bus,
2457         IN int           target,
2458         IN int           lun)
2459 {
2460         tid_t            TID;
2461
2462         /*
2463          * We will not synchronize the device when there are outstanding
2464          * commands issued by the OS (this is due to a locked up device,
2465          * as the OS normally would flush all outstanding commands before
2466          * issuing a shutdown or an adapter reset).
2467          */
2468         if ((sc != (Asr_softc_t *)NULL)
2469          && (LIST_FIRST(&(sc->ha_ccb)) != (struct ccb_hdr *)NULL)
2470          && ((TID = ASR_getTid (sc, bus, target, lun)) != (tid_t)-1)
2471          && (TID != (tid_t)0)) {
2472                 defAlignLong(PRIVATE_SCSI_SCB_EXECUTE_MESSAGE,Message);
2473                 PPRIVATE_SCSI_SCB_EXECUTE_MESSAGE             Message_Ptr;
2474
2475                 bzero (Message_Ptr
2476                   = getAlignLong(PRIVATE_SCSI_SCB_EXECUTE_MESSAGE, Message),
2477                   sizeof(PRIVATE_SCSI_SCB_EXECUTE_MESSAGE)
2478                   - sizeof(I2O_SG_ELEMENT) + sizeof(I2O_SGE_SIMPLE_ELEMENT));
2479
2480                 I2O_MESSAGE_FRAME_setVersionOffset(
2481                   (PI2O_MESSAGE_FRAME)Message_Ptr,
2482                   I2O_VERSION_11
2483                     | (((sizeof(PRIVATE_SCSI_SCB_EXECUTE_MESSAGE)
2484                     - sizeof(I2O_SG_ELEMENT))
2485                         / sizeof(U32)) << 4));
2486                 I2O_MESSAGE_FRAME_setMessageSize(
2487                   (PI2O_MESSAGE_FRAME)Message_Ptr,
2488                   (sizeof(PRIVATE_SCSI_SCB_EXECUTE_MESSAGE)
2489                   - sizeof(I2O_SG_ELEMENT))
2490                         / sizeof(U32));
2491                 I2O_MESSAGE_FRAME_setInitiatorAddress (
2492                   (PI2O_MESSAGE_FRAME)Message_Ptr, 1);
2493                 I2O_MESSAGE_FRAME_setFunction(
2494                   (PI2O_MESSAGE_FRAME)Message_Ptr, I2O_PRIVATE_MESSAGE);
2495                 I2O_MESSAGE_FRAME_setTargetAddress(
2496                   (PI2O_MESSAGE_FRAME)Message_Ptr, TID);
2497                 I2O_PRIVATE_MESSAGE_FRAME_setXFunctionCode (
2498                   (PI2O_PRIVATE_MESSAGE_FRAME)Message_Ptr,
2499                   I2O_SCSI_SCB_EXEC);
2500                 PRIVATE_SCSI_SCB_EXECUTE_MESSAGE_setTID(Message_Ptr, TID);
2501                 PRIVATE_SCSI_SCB_EXECUTE_MESSAGE_setSCBFlags (Message_Ptr,
2502                     I2O_SCB_FLAG_ENABLE_DISCONNECT
2503                   | I2O_SCB_FLAG_SIMPLE_QUEUE_TAG
2504                   | I2O_SCB_FLAG_SENSE_DATA_IN_BUFFER);
2505                 I2O_PRIVATE_MESSAGE_FRAME_setOrganizationID(
2506                   (PI2O_PRIVATE_MESSAGE_FRAME)Message_Ptr,
2507                   DPT_ORGANIZATION_ID);
2508                 PRIVATE_SCSI_SCB_EXECUTE_MESSAGE_setCDBLength(Message_Ptr, 6);
2509                 Message_Ptr->CDB[0] = SYNCHRONIZE_CACHE;
2510                 Message_Ptr->CDB[1] = (lun << 5);
2511
2512                 PRIVATE_SCSI_SCB_EXECUTE_MESSAGE_setSCBFlags (Message_Ptr,
2513                   (I2O_SCB_FLAG_XFER_FROM_DEVICE
2514                     | I2O_SCB_FLAG_ENABLE_DISCONNECT
2515                     | I2O_SCB_FLAG_SIMPLE_QUEUE_TAG
2516                     | I2O_SCB_FLAG_SENSE_DATA_IN_BUFFER));
2517
2518                 (void)ASR_queue_c(sc, (PI2O_MESSAGE_FRAME)Message_Ptr);
2519
2520         }
2521 }
2522
2523 STATIC INLINE void
2524 ASR_synchronize (
2525         IN Asr_softc_t * sc)
2526 {
2527         int              bus, target, lun;
2528
2529         for (bus = 0; bus <= sc->ha_MaxBus; ++bus) {
2530                 for (target = 0; target <= sc->ha_MaxId; ++target) {
2531                         for (lun = 0; lun <= sc->ha_MaxLun; ++lun) {
2532                                 ASR_sync(sc,bus,target,lun);
2533                         }
2534                 }
2535         }
2536 }
2537
2538 /*
2539  *      Reset the HBA, targets and BUS.
2540  *              Currently this resets *all* the SCSI busses.
2541  */
2542 STATIC INLINE void
2543 asr_hbareset(
2544         IN Asr_softc_t * sc)
2545 {
2546         ASR_synchronize (sc);
2547         (void)ASR_reset (sc);
2548 } /* asr_hbareset */
2549
2550 /*
2551  *      A reduced copy of the real pci_map_mem, incorporating the MAX_MAP
2552  * limit and a reduction in error checking (in the pre 4.0 case).
2553  */
2554 STATIC int
2555 asr_pci_map_mem (
2556 #if defined(__DragonFly__) || __FreeBSD_version >= 400000
2557         IN device_t      tag,
2558 #else
2559         IN pcici_t       tag,
2560 #endif
2561         IN Asr_softc_t * sc)
2562 {
2563         int              rid;
2564         u_int32_t        p, l, s;
2565
2566 #if defined(__DragonFly__) || __FreeBSD_version >= 400000
2567         /*
2568          * I2O specification says we must find first *memory* mapped BAR
2569          */
2570         for (rid = PCIR_MAPS;
2571           rid < (PCIR_MAPS + 4 * sizeof(u_int32_t));
2572           rid += sizeof(u_int32_t)) {
2573                 p = pci_read_config(tag, rid, sizeof(p));
2574                 if ((p & 1) == 0) {
2575                         break;
2576                 }
2577         }
2578         /*
2579          *      Give up?
2580          */
2581         if (rid >= (PCIR_MAPS + 4 * sizeof(u_int32_t))) {
2582                 rid = PCIR_MAPS;
2583         }
2584         p = pci_read_config(tag, rid, sizeof(p));
2585         pci_write_config(tag, rid, -1, sizeof(p));
2586         l = 0 - (pci_read_config(tag, rid, sizeof(l)) & ~15);
2587         pci_write_config(tag, rid, p, sizeof(p));
2588         if (l > MAX_MAP) {
2589                 l = MAX_MAP;
2590         }
2591         /*
2592          * The 2005S Zero Channel RAID solution is not a perfect PCI
2593          * citizen. It asks for 4MB on BAR0, and 0MB on BAR1, once
2594          * enabled it rewrites the size of BAR0 to 2MB, sets BAR1 to
2595          * BAR0+2MB and sets it's size to 2MB. The IOP registers are
2596          * accessible via BAR0, the messaging registers are accessible
2597          * via BAR1. If the subdevice code is 50 to 59 decimal.
2598          */
2599         s = pci_read_config(tag, PCIR_DEVVENDOR, sizeof(s));
2600         if (s != 0xA5111044) {
2601                 s = pci_read_config(tag, PCIR_SUBVEND_0, sizeof(s));
2602                 if ((((ADPTDOMINATOR_SUB_ID_START ^ s) & 0xF000FFFF) == 0)
2603                  && (ADPTDOMINATOR_SUB_ID_START <= s)
2604                  && (s <= ADPTDOMINATOR_SUB_ID_END)) {
2605                         l = MAX_MAP; /* Conjoined BAR Raptor Daptor */
2606                 }
2607         }
2608         p &= ~15;
2609         sc->ha_mem_res = bus_alloc_resource(tag, SYS_RES_MEMORY, &rid,
2610           p, p + l, l, RF_ACTIVE);
2611         if (sc->ha_mem_res == (struct resource *)NULL) {
2612                 return (0);
2613         }
2614         sc->ha_Base = (void *)rman_get_start(sc->ha_mem_res);
2615         if (sc->ha_Base == (void *)NULL) {
2616                 return (0);
2617         }
2618         sc->ha_Virt = (i2oRegs_t *) rman_get_virtual(sc->ha_mem_res);
2619         if (s == 0xA5111044) { /* Split BAR Raptor Daptor */
2620                 if ((rid += sizeof(u_int32_t))
2621                   >= (PCIR_MAPS + 4 * sizeof(u_int32_t))) {
2622                         return (0);
2623                 }
2624                 p = pci_read_config(tag, rid, sizeof(p));
2625                 pci_write_config(tag, rid, -1, sizeof(p));
2626                 l = 0 - (pci_read_config(tag, rid, sizeof(l)) & ~15);
2627                 pci_write_config(tag, rid, p, sizeof(p));
2628                 if (l > MAX_MAP) {
2629                         l = MAX_MAP;
2630                 }
2631                 p &= ~15;
2632                 sc->ha_mes_res = bus_alloc_resource(tag, SYS_RES_MEMORY, &rid,
2633                   p, p + l, l, RF_ACTIVE);
2634                 if (sc->ha_mes_res == (struct resource *)NULL) {
2635                         return (0);
2636                 }
2637                 if ((void *)rman_get_start(sc->ha_mes_res) == (void *)NULL) {
2638                         return (0);
2639                 }
2640                 sc->ha_Fvirt = (U8 *) rman_get_virtual(sc->ha_mes_res);
2641         } else {
2642                 sc->ha_Fvirt = (U8 *)(sc->ha_Virt);
2643         }
2644 #else
2645         vm_size_t psize, poffs;
2646
2647         /*
2648          * I2O specification says we must find first *memory* mapped BAR
2649          */
2650         for (rid = PCI_MAP_REG_START;
2651           rid < (PCI_MAP_REG_START + 4 * sizeof(u_int32_t));
2652           rid += sizeof(u_int32_t)) {
2653                 p = pci_conf_read (tag, rid);
2654                 if ((p & 1) == 0) {
2655                         break;
2656                 }
2657         }
2658         if (rid >= (PCI_MAP_REG_START + 4 * sizeof(u_int32_t))) {
2659                 rid = PCI_MAP_REG_START;
2660         }
2661         /*
2662         **      save old mapping, get size and type of memory
2663         **
2664         **      type is in the lowest four bits.
2665         **      If device requires 2^n bytes, the next
2666         **      n-4 bits are read as 0.
2667         */
2668
2669         sc->ha_Base = (void *)((p = pci_conf_read (tag, rid))
2670           & PCI_MAP_MEMORY_ADDRESS_MASK);
2671         pci_conf_write (tag, rid, 0xfffffffful);
2672         l = pci_conf_read (tag, rid);
2673         pci_conf_write (tag, rid, p);
2674
2675         /*
2676         **      check the type
2677         */
2678
2679         if (!((l & PCI_MAP_MEMORY_TYPE_MASK) == PCI_MAP_MEMORY_TYPE_32BIT_1M
2680            && ((u_long)sc->ha_Base & ~0xfffff) == 0)
2681           && ((l & PCI_MAP_MEMORY_TYPE_MASK) != PCI_MAP_MEMORY_TYPE_32BIT)) {
2682                 debug_asr_printf (
2683                   "asr_pci_map_mem failed: bad memory type=0x%x\n",
2684                   (unsigned) l);
2685                 return (0);
2686         };
2687
2688         /*
2689         **      get the size.
2690         */
2691
2692         psize = -(l & PCI_MAP_MEMORY_ADDRESS_MASK);
2693         if (psize > MAX_MAP) {
2694                 psize = MAX_MAP;
2695         }
2696         /*
2697          * The 2005S Zero Channel RAID solution is not a perfect PCI
2698          * citizen. It asks for 4MB on BAR0, and 0MB on BAR1, once
2699          * enabled it rewrites the size of BAR0 to 2MB, sets BAR1 to
2700          * BAR0+2MB and sets it's size to 2MB. The IOP registers are
2701          * accessible via BAR0, the messaging registers are accessible
2702          * via BAR1. If the subdevice code is 50 to 59 decimal.
2703          */
2704         s = pci_read_config(tag, PCIR_DEVVENDOR, sizeof(s));
2705         if (s != 0xA5111044) {
2706                 s = pci_conf_read (tag, PCIR_SUBVEND_0)
2707                 if ((((ADPTDOMINATOR_SUB_ID_START ^ s) & 0xF000FFFF) == 0)
2708                  && (ADPTDOMINATOR_SUB_ID_START <= s)
2709                  && (s <= ADPTDOMINATOR_SUB_ID_END)) {
2710                         psize = MAX_MAP;
2711                 }
2712         }
2713
2714         if ((sc->ha_Base == (void *)NULL)
2715          || (sc->ha_Base == (void *)PCI_MAP_MEMORY_ADDRESS_MASK)) {
2716                 debug_asr_printf ("asr_pci_map_mem: not configured by bios.\n");
2717                 return (0);
2718         };
2719
2720         /*
2721         **      Truncate sc->ha_Base to page boundary.
2722         **      (Or does pmap_mapdev the job?)
2723         */
2724
2725         poffs = (u_long)sc->ha_Base - trunc_page ((u_long)sc->ha_Base);
2726         sc->ha_Virt = (i2oRegs_t *)pmap_mapdev ((u_long)sc->ha_Base - poffs,
2727           psize + poffs);
2728
2729         if (sc->ha_Virt == (i2oRegs_t *)NULL) {
2730                 return (0);
2731         }
2732
2733         sc->ha_Virt = (i2oRegs_t *)((u_long)sc->ha_Virt + poffs);
2734         if (s == 0xA5111044) {
2735                 if ((rid += sizeof(u_int32_t))
2736                   >= (PCI_MAP_REG_START + 4 * sizeof(u_int32_t))) {
2737                         return (0);
2738                 }
2739
2740                 /*
2741                 **      save old mapping, get size and type of memory
2742                 **
2743                 **      type is in the lowest four bits.
2744                 **      If device requires 2^n bytes, the next
2745                 **      n-4 bits are read as 0.
2746                 */
2747
2748                 if ((((p = pci_conf_read (tag, rid))
2749                   & PCI_MAP_MEMORY_ADDRESS_MASK) == 0L)
2750                  || ((p & PCI_MAP_MEMORY_ADDRESS_MASK)
2751                   == PCI_MAP_MEMORY_ADDRESS_MASK)) {
2752                         debug_asr_printf ("asr_pci_map_mem: not configured by bios.\n");
2753                 }
2754                 pci_conf_write (tag, rid, 0xfffffffful);
2755                 l = pci_conf_read (tag, rid);
2756                 pci_conf_write (tag, rid, p);
2757                 p &= PCI_MAP_MEMORY_TYPE_MASK;
2758
2759                 /*
2760                 **      check the type
2761                 */
2762
2763                 if (!((l & PCI_MAP_MEMORY_TYPE_MASK)
2764                     == PCI_MAP_MEMORY_TYPE_32BIT_1M
2765                    && (p & ~0xfffff) == 0)
2766                   && ((l & PCI_MAP_MEMORY_TYPE_MASK)
2767                    != PCI_MAP_MEMORY_TYPE_32BIT)) {
2768                         debug_asr_printf (
2769                           "asr_pci_map_mem failed: bad memory type=0x%x\n",
2770                           (unsigned) l);
2771                         return (0);
2772                 };
2773
2774                 /*
2775                 **      get the size.
2776                 */
2777
2778                 psize = -(l & PCI_MAP_MEMORY_ADDRESS_MASK);
2779                 if (psize > MAX_MAP) {
2780                         psize = MAX_MAP;
2781                 }
2782
2783                 /*
2784                 **      Truncate p to page boundary.
2785                 **      (Or does pmap_mapdev the job?)
2786                 */
2787
2788                 poffs = p - trunc_page (p);
2789                 sc->ha_Fvirt = (U8 *)pmap_mapdev (p - poffs, psize + poffs);
2790
2791                 if (sc->ha_Fvirt == (U8 *)NULL) {
2792                         return (0);
2793                 }
2794
2795                 sc->ha_Fvirt = (U8 *)((u_long)sc->ha_Fvirt + poffs);
2796         } else {
2797                 sc->ha_Fvirt = (U8 *)(sc->ha_Virt);
2798         }
2799 #endif
2800         return (1);
2801 } /* asr_pci_map_mem */
2802
2803 /*
2804  *      A simplified copy of the real pci_map_int with additional
2805  * registration requirements.
2806  */
2807 STATIC int
2808 asr_pci_map_int (
2809 #if defined(__DragonFly__) || __FreeBSD_version >= 400000
2810         IN device_t      tag,
2811 #else
2812         IN pcici_t       tag,
2813 #endif
2814         IN Asr_softc_t * sc)
2815 {
2816 #if defined(__DragonFly__) || __FreeBSD_version >= 400000
2817         int              rid = 0;
2818
2819         sc->ha_irq_res = bus_alloc_resource(tag, SYS_RES_IRQ, &rid,
2820           0, ~0, 1, RF_ACTIVE | RF_SHAREABLE);
2821         if (sc->ha_irq_res == (struct resource *)NULL) {
2822                 return (0);
2823         }
2824         if (bus_setup_intr(tag, sc->ha_irq_res, INTR_TYPE_CAM,
2825           (driver_intr_t *)asr_intr, (void *)sc, &(sc->ha_intr))) {
2826                 return (0);
2827         }
2828         sc->ha_irq = pci_read_config(tag, PCIR_INTLINE, sizeof(char));
2829 #else
2830         if (!pci_map_int(tag, (pci_inthand_t *)asr_intr,
2831           (void *)sc, &cam_imask)) {
2832                 return (0);
2833         }
2834         sc->ha_irq = pci_conf_read(tag, PCIR_INTLINE);
2835 #endif
2836         return (1);
2837 } /* asr_pci_map_int */
2838
2839 /*
2840  *      Attach the devices, and virtual devices to the driver list.
2841  */
2842 STATIC ATTACH_RET
2843 asr_attach (ATTACH_ARGS)
2844 {
2845         Asr_softc_t              * sc;
2846         struct scsi_inquiry_data * iq;
2847         ATTACH_SET();
2848
2849         if ((sc = malloc(sizeof(*sc), M_DEVBUF, M_NOWAIT)) == (Asr_softc_t *)NULL) {
2850                 ATTACH_RETURN(ENOMEM);
2851         }
2852         if (Asr_softc == (Asr_softc_t *)NULL) {
2853                 /*
2854                  *      Fixup the OS revision as saved in the dptsig for the
2855                  *      engine (dptioctl.h) to pick up.
2856                  */
2857                 bcopy (osrelease, &ASR_sig.dsDescription[16], 5);
2858                 printf ("asr%d: major=%d\n", unit, asr_cdevsw.d_maj);
2859         }
2860         /*
2861          *      Initialize the software structure
2862          */
2863         bzero (sc, sizeof(*sc));
2864         LIST_INIT(&(sc->ha_ccb));
2865 #       ifdef ASR_MEASURE_PERFORMANCE
2866                 {
2867                         u_int32_t i;
2868
2869                         // initialize free list for timeQ
2870                         sc->ha_timeQFreeHead = 0;
2871                         sc->ha_timeQFreeTail = MAX_TIMEQ_SIZE - 1;
2872                         for (i = 0; i < MAX_TIMEQ_SIZE; i++) {
2873                                 sc->ha_timeQFreeList[i] = i;
2874                         }
2875                 }
2876 #       endif
2877         /* Link us into the HA list */
2878         {
2879                 Asr_softc_t **ha;
2880
2881                 for (ha = &Asr_softc; *ha; ha = &((*ha)->ha_next));
2882                 *(ha) = sc;
2883         }
2884         {
2885                 PI2O_EXEC_STATUS_GET_REPLY status;
2886                 int size;
2887
2888                 /*
2889                  *      This is the real McCoy!
2890                  */
2891                 if (!asr_pci_map_mem(tag, sc)) {
2892                         printf ("asr%d: could not map memory\n", unit);
2893                         ATTACH_RETURN(ENXIO);
2894                 }
2895                 /* Enable if not formerly enabled */
2896 #if defined(__DragonFly__) || __FreeBSD_version >= 400000
2897                 pci_write_config (tag, PCIR_COMMAND,
2898                   pci_read_config (tag, PCIR_COMMAND, sizeof(char))
2899                   | PCIM_CMD_MEMEN | PCIM_CMD_BUSMASTEREN, sizeof(char));
2900                 /* Knowledge is power, responsibility is direct */
2901                 {
2902                         struct pci_devinfo {
2903                                 STAILQ_ENTRY(pci_devinfo) pci_links;
2904                                 struct resource_list      resources;
2905                                 pcicfgregs                cfg;
2906                         } * dinfo = device_get_ivars(tag);
2907                         sc->ha_pciBusNum = dinfo->cfg.bus;
2908                         sc->ha_pciDeviceNum = (dinfo->cfg.slot << 3)
2909                                             | dinfo->cfg.func;
2910                 }
2911 #else
2912                 pci_conf_write (tag, PCIR_COMMAND,
2913                   pci_conf_read (tag, PCIR_COMMAND)
2914                   | PCIM_CMD_MEMEN | PCIM_CMD_BUSMASTEREN);
2915                 /* Knowledge is power, responsibility is direct */
2916                 switch (pci_mechanism) {
2917
2918                 case 1:
2919                         sc->ha_pciBusNum = tag.cfg1 >> 16;
2920                         sc->ha_pciDeviceNum = tag.cfg1 >> 8;
2921
2922                 case 2:
2923                         sc->ha_pciBusNum = tag.cfg2.forward;
2924                         sc->ha_pciDeviceNum = ((tag.cfg2.enable >> 1) & 7)
2925                                             | (tag.cfg2.port >> 5);
2926                 }
2927 #endif
2928                 /* Check if the device is there? */
2929                 if ((ASR_resetIOP(sc->ha_Virt, sc->ha_Fvirt) == 0)
2930                  || ((status = (PI2O_EXEC_STATUS_GET_REPLY)malloc (
2931                   sizeof(I2O_EXEC_STATUS_GET_REPLY), M_TEMP, M_WAITOK))
2932                   == (PI2O_EXEC_STATUS_GET_REPLY)NULL)
2933                  || (ASR_getStatus(sc->ha_Virt, sc->ha_Fvirt, status) == NULL)) {
2934                         printf ("asr%d: could not initialize hardware\n", unit);
2935                         ATTACH_RETURN(ENODEV);  /* Get next, maybe better luck */
2936                 }
2937                 sc->ha_SystemTable.OrganizationID = status->OrganizationID;
2938                 sc->ha_SystemTable.IOP_ID = status->IOP_ID;
2939                 sc->ha_SystemTable.I2oVersion = status->I2oVersion;
2940                 sc->ha_SystemTable.IopState = status->IopState;
2941                 sc->ha_SystemTable.MessengerType = status->MessengerType;
2942                 sc->ha_SystemTable.InboundMessageFrameSize
2943                   = status->InboundMFrameSize;
2944                 sc->ha_SystemTable.MessengerInfo.InboundMessagePortAddressLow
2945                   = (U32)(sc->ha_Base) + (U32)(&(((i2oRegs_t *)NULL)->ToFIFO));
2946
2947                 if (!asr_pci_map_int(tag, (void *)sc)) {
2948                         printf ("asr%d: could not map interrupt\n", unit);
2949                         ATTACH_RETURN(ENXIO);
2950                 }
2951
2952                 /* Adjust the maximim inbound count */
2953                 if (((sc->ha_QueueSize
2954                   = I2O_EXEC_STATUS_GET_REPLY_getMaxInboundMFrames(status))
2955                      > MAX_INBOUND)
2956                  || (sc->ha_QueueSize == 0)) {
2957                         sc->ha_QueueSize = MAX_INBOUND;
2958                 }
2959
2960                 /* Adjust the maximum outbound count */
2961                 if (((sc->ha_Msgs_Count
2962                   = I2O_EXEC_STATUS_GET_REPLY_getMaxOutboundMFrames(status))
2963                      > MAX_OUTBOUND)
2964                  || (sc->ha_Msgs_Count == 0)) {
2965                         sc->ha_Msgs_Count = MAX_OUTBOUND;
2966                 }
2967                 if (sc->ha_Msgs_Count > sc->ha_QueueSize) {
2968                         sc->ha_Msgs_Count = sc->ha_QueueSize;
2969                 }
2970
2971                 /* Adjust the maximum SG size to adapter */
2972                 if ((size = (I2O_EXEC_STATUS_GET_REPLY_getInboundMFrameSize(
2973                   status) << 2)) > MAX_INBOUND_SIZE) {
2974                         size = MAX_INBOUND_SIZE;
2975                 }
2976                 free (status, M_TEMP);
2977                 sc->ha_SgSize = (size - sizeof(PRIVATE_SCSI_SCB_EXECUTE_MESSAGE)
2978                   + sizeof(I2O_SG_ELEMENT)) / sizeof(I2O_SGE_SIMPLE_ELEMENT);
2979         }
2980
2981         /*
2982          *      Only do a bus/HBA reset on the first time through. On this
2983          * first time through, we do not send a flush to the devices.
2984          */
2985         if (ASR_init(sc) == 0) {
2986                 struct BufferInfo {
2987                         I2O_PARAM_RESULTS_LIST_HEADER       Header;
2988                         I2O_PARAM_READ_OPERATION_RESULT     Read;
2989                         I2O_DPT_EXEC_IOP_BUFFERS_SCALAR     Info;
2990                 };
2991                 defAlignLong (struct BufferInfo, Buffer);
2992                 PI2O_DPT_EXEC_IOP_BUFFERS_SCALAR Info;
2993 #                       define FW_DEBUG_BLED_OFFSET 8
2994
2995                 if ((Info = (PI2O_DPT_EXEC_IOP_BUFFERS_SCALAR)
2996                   ASR_getParams(sc, 0,
2997                     I2O_DPT_EXEC_IOP_BUFFERS_GROUP_NO,
2998                     Buffer, sizeof(struct BufferInfo)))
2999                 != (PI2O_DPT_EXEC_IOP_BUFFERS_SCALAR)NULL) {
3000                         sc->ha_blinkLED = sc->ha_Fvirt
3001                           + I2O_DPT_EXEC_IOP_BUFFERS_SCALAR_getSerialOutputOffset(Info)
3002                           + FW_DEBUG_BLED_OFFSET;
3003                 }
3004                 if (ASR_acquireLct(sc) == 0) {
3005                         (void)ASR_acquireHrt(sc);
3006                 }
3007         } else {
3008                 printf ("asr%d: failed to initialize\n", unit);
3009                 ATTACH_RETURN(ENXIO);
3010         }
3011         /*
3012          *      Add in additional probe responses for more channels. We
3013          * are reusing the variable `target' for a channel loop counter.
3014          * Done here because of we need both the acquireLct and
3015          * acquireHrt data.
3016          */
3017         {       PI2O_LCT_ENTRY Device;
3018
3019                 for (Device = sc->ha_LCT->LCTEntry; Device < (PI2O_LCT_ENTRY)
3020                   (((U32 *)sc->ha_LCT)+I2O_LCT_getTableSize(sc->ha_LCT));
3021                   ++Device) {
3022                         if (Device->le_type == I2O_UNKNOWN) {
3023                                 continue;
3024                         }
3025                         if (I2O_LCT_ENTRY_getUserTID(Device) == 0xFFF) {
3026                                 if (Device->le_target > sc->ha_MaxId) {
3027                                         sc->ha_MaxId = Device->le_target;
3028                                 }
3029                                 if (Device->le_lun > sc->ha_MaxLun) {
3030                                         sc->ha_MaxLun = Device->le_lun;
3031                                 }
3032                         }
3033                         if (((Device->le_type & I2O_PORT) != 0)
3034                          && (Device->le_bus <= MAX_CHANNEL)) {
3035                                 /* Do not increase MaxId for efficiency */
3036                                 sc->ha_adapter_target[Device->le_bus]
3037                                         = Device->le_target;
3038                         }
3039                 }
3040         }
3041
3042
3043         /*
3044          *      Print the HBA model number as inquired from the card.
3045          */
3046
3047         printf ("asr%d:", unit);
3048
3049         if ((iq = (struct scsi_inquiry_data *)malloc (
3050             sizeof(struct scsi_inquiry_data), M_TEMP, M_WAITOK))
3051           != (struct scsi_inquiry_data *)NULL) {
3052                 defAlignLong(PRIVATE_SCSI_SCB_EXECUTE_MESSAGE,Message);
3053                 PPRIVATE_SCSI_SCB_EXECUTE_MESSAGE             Message_Ptr;
3054                 int                                           posted = 0;
3055
3056                 bzero (iq, sizeof(struct scsi_inquiry_data));
3057                 bzero (Message_Ptr
3058                   = getAlignLong(PRIVATE_SCSI_SCB_EXECUTE_MESSAGE, Message),
3059                   sizeof(PRIVATE_SCSI_SCB_EXECUTE_MESSAGE)
3060                   - sizeof(I2O_SG_ELEMENT) + sizeof(I2O_SGE_SIMPLE_ELEMENT));
3061
3062                 I2O_MESSAGE_FRAME_setVersionOffset(
3063                   (PI2O_MESSAGE_FRAME)Message_Ptr,
3064                   I2O_VERSION_11
3065                     | (((sizeof(PRIVATE_SCSI_SCB_EXECUTE_MESSAGE)
3066                     - sizeof(I2O_SG_ELEMENT))
3067                         / sizeof(U32)) << 4));
3068                 I2O_MESSAGE_FRAME_setMessageSize(
3069                   (PI2O_MESSAGE_FRAME)Message_Ptr,
3070                   (sizeof(PRIVATE_SCSI_SCB_EXECUTE_MESSAGE)
3071                   - sizeof(I2O_SG_ELEMENT) + sizeof(I2O_SGE_SIMPLE_ELEMENT))
3072                         / sizeof(U32));
3073                 I2O_MESSAGE_FRAME_setInitiatorAddress (
3074                   (PI2O_MESSAGE_FRAME)Message_Ptr, 1);
3075                 I2O_MESSAGE_FRAME_setFunction(
3076                   (PI2O_MESSAGE_FRAME)Message_Ptr, I2O_PRIVATE_MESSAGE);
3077                 I2O_PRIVATE_MESSAGE_FRAME_setXFunctionCode (
3078                   (PI2O_PRIVATE_MESSAGE_FRAME)Message_Ptr,
3079                   I2O_SCSI_SCB_EXEC);
3080                 PRIVATE_SCSI_SCB_EXECUTE_MESSAGE_setSCBFlags (Message_Ptr,
3081                     I2O_SCB_FLAG_ENABLE_DISCONNECT
3082                   | I2O_SCB_FLAG_SIMPLE_QUEUE_TAG
3083                   | I2O_SCB_FLAG_SENSE_DATA_IN_BUFFER);
3084                 PRIVATE_SCSI_SCB_EXECUTE_MESSAGE_setInterpret(Message_Ptr, 1);
3085                 I2O_PRIVATE_MESSAGE_FRAME_setOrganizationID(
3086                   (PI2O_PRIVATE_MESSAGE_FRAME)Message_Ptr,
3087                   DPT_ORGANIZATION_ID);
3088                 PRIVATE_SCSI_SCB_EXECUTE_MESSAGE_setCDBLength(Message_Ptr, 6);
3089                 Message_Ptr->CDB[0] = INQUIRY;
3090                 Message_Ptr->CDB[4] = (unsigned char)sizeof(struct scsi_inquiry_data);
3091                 if (Message_Ptr->CDB[4] == 0) {
3092                         Message_Ptr->CDB[4] = 255;
3093                 }
3094
3095                 PRIVATE_SCSI_SCB_EXECUTE_MESSAGE_setSCBFlags (Message_Ptr,
3096                   (I2O_SCB_FLAG_XFER_FROM_DEVICE
3097                     | I2O_SCB_FLAG_ENABLE_DISCONNECT
3098                     | I2O_SCB_FLAG_SIMPLE_QUEUE_TAG
3099                     | I2O_SCB_FLAG_SENSE_DATA_IN_BUFFER));
3100
3101                 PRIVATE_SCSI_SCB_EXECUTE_MESSAGE_setByteCount(
3102                   (PPRIVATE_SCSI_SCB_EXECUTE_MESSAGE)Message_Ptr,
3103                   sizeof(struct scsi_inquiry_data));
3104                 SG(&(Message_Ptr->SGL), 0,
3105                   I2O_SGL_FLAGS_LAST_ELEMENT | I2O_SGL_FLAGS_END_OF_BUFFER,
3106                   iq, sizeof(struct scsi_inquiry_data));
3107                 (void)ASR_queue_c(sc, (PI2O_MESSAGE_FRAME)Message_Ptr);
3108
3109                 if (iq->vendor[0] && (iq->vendor[0] != ' ')) {
3110                         printf (" ");
3111                         ASR_prstring (iq->vendor, 8);
3112                         ++posted;
3113                 }
3114                 if (iq->product[0] && (iq->product[0] != ' ')) {
3115                         printf (" ");
3116                         ASR_prstring (iq->product, 16);
3117                         ++posted;
3118                 }
3119                 if (iq->revision[0] && (iq->revision[0] != ' ')) {
3120                         printf (" FW Rev. ");
3121                         ASR_prstring (iq->revision, 4);
3122                         ++posted;
3123                 }
3124                 free ((caddr_t)iq, M_TEMP);
3125                 if (posted) {
3126                         printf (",");
3127                 }
3128         }
3129         printf (" %d channel, %d CCBs, Protocol I2O\n", sc->ha_MaxBus + 1,
3130           (sc->ha_QueueSize > MAX_INBOUND) ? MAX_INBOUND : sc->ha_QueueSize);
3131
3132         /*
3133          * fill in the prototype cam_path.
3134          */
3135         {
3136                 int             bus;
3137                 union asr_ccb * ccb;
3138
3139                 if ((ccb = asr_alloc_ccb (sc)) == (union asr_ccb *)NULL) {
3140                         printf ("asr%d: CAM could not be notified of asynchronous callback parameters\n", unit);
3141                         ATTACH_RETURN(ENOMEM);
3142                 }
3143                 for (bus = 0; bus <= sc->ha_MaxBus; ++bus) {
3144                         int                 QueueSize = sc->ha_QueueSize;
3145
3146                         if (QueueSize > MAX_INBOUND) {
3147                                 QueueSize = MAX_INBOUND;
3148                         }
3149
3150                         /*
3151                          *      Construct our first channel SIM entry
3152                          */
3153                         sc->ha_sim[bus] = cam_sim_alloc(
3154                           asr_action, asr_poll, "asr", sc,
3155                           unit, 1, QueueSize, NULL);
3156                         if (sc->ha_sim[bus] == NULL)
3157                                 continue;
3158
3159                         if (xpt_bus_register(sc->ha_sim[bus], bus)
3160                           != CAM_SUCCESS) {
3161                                 cam_sim_free(sc->ha_sim[bus]);
3162                                 sc->ha_sim[bus] = NULL;
3163                                 continue;
3164                         }
3165
3166                         if (xpt_create_path(&(sc->ha_path[bus]), /*periph*/NULL,
3167                           cam_sim_path(sc->ha_sim[bus]), CAM_TARGET_WILDCARD,
3168                           CAM_LUN_WILDCARD) != CAM_REQ_CMP) {
3169                                 xpt_bus_deregister(
3170                                   cam_sim_path(sc->ha_sim[bus]));
3171                                 cam_sim_free(sc->ha_sim[bus]);
3172                                 sc->ha_sim[bus] = NULL;
3173                                 continue;
3174                         }
3175                 }
3176                 asr_free_ccb (ccb);
3177         }
3178         /*
3179          *      Generate the device node information
3180          */
3181         make_dev(&asr_cdevsw, unit, 0, 0, S_IRWXU, "rasr%d", unit);
3182         ATTACH_RETURN(0);
3183 } /* asr_attach */
3184
3185 STATIC void
3186 asr_poll(
3187         IN struct cam_sim *sim)
3188 {
3189         asr_intr(cam_sim_softc(sim));
3190 } /* asr_poll */
3191
3192 STATIC void
3193 asr_action(
3194         IN struct cam_sim * sim,
3195         IN union ccb      * ccb)
3196 {
3197         struct Asr_softc  * sc;
3198
3199         debug_asr_printf ("asr_action(%lx,%lx{%x})\n",
3200           (u_long)sim, (u_long)ccb, ccb->ccb_h.func_code);
3201
3202         CAM_DEBUG(ccb->ccb_h.path, CAM_DEBUG_TRACE, ("asr_action\n"));
3203
3204         ccb->ccb_h.spriv_ptr0 = sc = (struct Asr_softc *)cam_sim_softc(sim);
3205
3206         switch (ccb->ccb_h.func_code) {
3207
3208         /* Common cases first */
3209         case XPT_SCSI_IO:       /* Execute the requested I/O operation */
3210         {
3211                 struct Message {
3212                         char M[MAX_INBOUND_SIZE];
3213                 };
3214                 defAlignLong(struct Message,Message);
3215                 PI2O_MESSAGE_FRAME   Message_Ptr;
3216
3217                 /* Reject incoming commands while we are resetting the card */
3218                 if (sc->ha_in_reset != HA_OPERATIONAL) {
3219                         ccb->ccb_h.status &= ~CAM_STATUS_MASK;
3220                         if (sc->ha_in_reset >= HA_OFF_LINE) {
3221                                 /* HBA is now off-line */
3222                                 ccb->ccb_h.status |= CAM_UNREC_HBA_ERROR;
3223                         } else {
3224                                 /* HBA currently resetting, try again later. */
3225                                 ccb->ccb_h.status |= CAM_REQUEUE_REQ;
3226                         }
3227                         debug_asr_cmd_printf (" e\n");
3228                         xpt_done(ccb);
3229                         debug_asr_cmd_printf (" q\n");
3230                         break;
3231                 }
3232                 if ((ccb->ccb_h.status & CAM_STATUS_MASK) != CAM_REQ_INPROG) {
3233                         printf(
3234                           "asr%d WARNING: scsi_cmd(%x) already done on b%dt%du%d\n",
3235                           cam_sim_unit(xpt_path_sim(ccb->ccb_h.path)),
3236                           ccb->csio.cdb_io.cdb_bytes[0],
3237                           cam_sim_bus(sim),
3238                           ccb->ccb_h.target_id,
3239                           ccb->ccb_h.target_lun);
3240                 }
3241                 debug_asr_cmd_printf ("(%d,%d,%d,%d)",
3242                   cam_sim_unit(sim),
3243                   cam_sim_bus(sim),
3244                   ccb->ccb_h.target_id,
3245                   ccb->ccb_h.target_lun);
3246                 debug_asr_cmd_dump_ccb(ccb);
3247
3248                 if ((Message_Ptr = ASR_init_message ((union asr_ccb *)ccb,
3249                   (PI2O_MESSAGE_FRAME)Message)) != (PI2O_MESSAGE_FRAME)NULL) {
3250                         debug_asr_cmd2_printf ("TID=%x:\n",
3251                           PRIVATE_SCSI_SCB_EXECUTE_MESSAGE_getTID(
3252                             (PPRIVATE_SCSI_SCB_EXECUTE_MESSAGE)Message_Ptr));
3253                         debug_asr_cmd2_dump_message(Message_Ptr);
3254                         debug_asr_cmd1_printf (" q");
3255
3256                         if (ASR_queue (sc, Message_Ptr) == EMPTY_QUEUE) {
3257 #ifdef ASR_MEASURE_PERFORMANCE
3258                                 ++sc->ha_performance.command_too_busy;
3259 #endif
3260                                 ccb->ccb_h.status &= ~CAM_STATUS_MASK;
3261                                 ccb->ccb_h.status |= CAM_REQUEUE_REQ;
3262                                 debug_asr_cmd_printf (" E\n");
3263                                 xpt_done(ccb);
3264                         }
3265                         debug_asr_cmd_printf (" Q\n");
3266                         break;
3267                 }
3268                 /*
3269                  *      We will get here if there is no valid TID for the device
3270                  * referenced in the scsi command packet.
3271                  */
3272                 ccb->ccb_h.status &= ~CAM_STATUS_MASK;
3273                 ccb->ccb_h.status |= CAM_SEL_TIMEOUT;
3274                 debug_asr_cmd_printf (" B\n");
3275                 xpt_done(ccb);
3276                 break;
3277         }
3278
3279         case XPT_RESET_DEV:     /* Bus Device Reset the specified SCSI device */
3280                 /* Rese HBA device ... */
3281                 asr_hbareset (sc);
3282                 ccb->ccb_h.status = CAM_REQ_CMP;
3283                 xpt_done(ccb);
3284                 break;
3285
3286 #       if (defined(REPORT_LUNS))
3287         case REPORT_LUNS:
3288 #       endif
3289         case XPT_ABORT:                 /* Abort the specified CCB */
3290                 /* XXX Implement */
3291                 ccb->ccb_h.status = CAM_REQ_INVALID;
3292                 xpt_done(ccb);
3293                 break;
3294
3295         case XPT_SET_TRAN_SETTINGS:
3296                 /* XXX Implement */
3297                 ccb->ccb_h.status = CAM_FUNC_NOTAVAIL;
3298                 xpt_done(ccb);
3299                 break;
3300
3301         case XPT_GET_TRAN_SETTINGS:
3302         /* Get default/user set transfer settings for the target */
3303         {
3304                 struct  ccb_trans_settings *cts;
3305                 u_int   target_mask;
3306
3307                 cts = &(ccb->cts);
3308                 target_mask = 0x01 << ccb->ccb_h.target_id;
3309                 if ((cts->flags & CCB_TRANS_USER_SETTINGS) != 0) {
3310                         cts->flags = CCB_TRANS_DISC_ENB|CCB_TRANS_TAG_ENB;
3311                         cts->bus_width = MSG_EXT_WDTR_BUS_16_BIT;
3312                         cts->sync_period = 6; /* 40MHz */
3313                         cts->sync_offset = 15;
3314
3315                         cts->valid = CCB_TRANS_SYNC_RATE_VALID
3316                                    | CCB_TRANS_SYNC_OFFSET_VALID
3317                                    | CCB_TRANS_BUS_WIDTH_VALID
3318                                    | CCB_TRANS_DISC_VALID
3319                                    | CCB_TRANS_TQ_VALID;
3320                         ccb->ccb_h.status = CAM_REQ_CMP;
3321                 } else {
3322                         ccb->ccb_h.status = CAM_FUNC_NOTAVAIL;
3323                 }
3324                 xpt_done(ccb);
3325                 break;
3326         }
3327
3328         case XPT_CALC_GEOMETRY:
3329         {
3330                 struct    ccb_calc_geometry *ccg;
3331                 u_int32_t size_mb;
3332                 u_int32_t secs_per_cylinder;
3333
3334                 ccg = &(ccb->ccg);
3335                 size_mb = ccg->volume_size
3336                         / ((1024L * 1024L) / ccg->block_size);
3337
3338                 if (size_mb > 4096) {
3339                         ccg->heads = 255;
3340                         ccg->secs_per_track = 63;
3341                 } else if (size_mb > 2048) {
3342                         ccg->heads = 128;
3343                         ccg->secs_per_track = 63;
3344                 } else if (size_mb > 1024) {
3345                         ccg->heads = 65;
3346                         ccg->secs_per_track = 63;
3347                 } else {
3348                         ccg->heads = 64;
3349                         ccg->secs_per_track = 32;
3350                 }
3351                 secs_per_cylinder = ccg->heads * ccg->secs_per_track;
3352                 ccg->cylinders = ccg->volume_size / secs_per_cylinder;
3353                 ccb->ccb_h.status = CAM_REQ_CMP;
3354                 xpt_done(ccb);
3355                 break;
3356         }
3357
3358         case XPT_RESET_BUS:             /* Reset the specified SCSI bus */
3359                 ASR_resetBus (sc, cam_sim_bus(sim));
3360                 ccb->ccb_h.status = CAM_REQ_CMP;
3361                 xpt_done(ccb);
3362                 break;
3363
3364         case XPT_TERM_IO:               /* Terminate the I/O process */
3365                 /* XXX Implement */
3366                 ccb->ccb_h.status = CAM_REQ_INVALID;
3367                 xpt_done(ccb);
3368                 break;
3369
3370         case XPT_PATH_INQ:              /* Path routing inquiry */
3371         {
3372                 struct ccb_pathinq *cpi = &(ccb->cpi);
3373
3374                 cpi->version_num = 1; /* XXX??? */
3375                 cpi->hba_inquiry = PI_SDTR_ABLE|PI_TAG_ABLE|PI_WIDE_16;
3376                 cpi->target_sprt = 0;
3377                 /* Not necessary to reset bus, done by HDM initialization */
3378                 cpi->hba_misc = PIM_NOBUSRESET;
3379                 cpi->hba_eng_cnt = 0;
3380                 cpi->max_target = sc->ha_MaxId;
3381                 cpi->max_lun = sc->ha_MaxLun;
3382                 cpi->initiator_id = sc->ha_adapter_target[cam_sim_bus(sim)];
3383                 cpi->bus_id = cam_sim_bus(sim);
3384                 cpi->base_transfer_speed = 3300;
3385                 strncpy(cpi->sim_vid, "FreeBSD", SIM_IDLEN);
3386                 strncpy(cpi->hba_vid, "Adaptec", HBA_IDLEN);
3387                 strncpy(cpi->dev_name, cam_sim_name(sim), DEV_IDLEN);
3388                 cpi->unit_number = cam_sim_unit(sim);
3389                 cpi->ccb_h.status = CAM_REQ_CMP;
3390                 xpt_done(ccb);
3391                 break;
3392         }
3393         default:
3394                 ccb->ccb_h.status = CAM_REQ_INVALID;
3395                 xpt_done(ccb);
3396                 break;
3397         }
3398 } /* asr_action */
3399
3400 #ifdef ASR_MEASURE_PERFORMANCE
3401 #define WRITE_OP 1
3402 #define READ_OP 2
3403 #define min_submitR     sc->ha_performance.read_by_size_min_time[index]
3404 #define max_submitR     sc->ha_performance.read_by_size_max_time[index]
3405 #define min_submitW     sc->ha_performance.write_by_size_min_time[index]
3406 #define max_submitW     sc->ha_performance.write_by_size_max_time[index]
3407
3408 STATIC INLINE void
3409 asr_IObySize(
3410         IN Asr_softc_t * sc,
3411         IN u_int32_t     submitted_time,
3412         IN int           op,
3413         IN int           index)
3414 {
3415         struct timeval   submitted_timeval;
3416
3417         submitted_timeval.tv_sec = 0;
3418         submitted_timeval.tv_usec = submitted_time;
3419
3420         if ( op == READ_OP ) {
3421                 ++sc->ha_performance.read_by_size_count[index];
3422
3423                 if ( submitted_time != 0xffffffff ) {
3424                         timevaladd(
3425                           &(sc->ha_performance.read_by_size_total_time[index]),
3426                           &submitted_timeval);
3427                         if ( (min_submitR == 0)
3428                           || (submitted_time < min_submitR) ) {
3429                                 min_submitR = submitted_time;
3430                         }
3431
3432                         if ( submitted_time > max_submitR ) {
3433                                 max_submitR = submitted_time;
3434                         }
3435                 }
3436         } else {
3437                 ++sc->ha_performance.write_by_size_count[index];
3438                 if ( submitted_time != 0xffffffff ) {
3439                         timevaladd(
3440                           &(sc->ha_performance.write_by_size_total_time[index]),
3441                           &submitted_timeval);
3442                         if ( (submitted_time < min_submitW)
3443                           || (min_submitW == 0) ) {
3444                                 min_submitW = submitted_time;
3445                         }
3446
3447                         if ( submitted_time > max_submitW ) {
3448                                 max_submitW = submitted_time;
3449                         }
3450                 }
3451         }
3452 } /* asr_IObySize */
3453 #endif
3454
3455 /*
3456  * Handle processing of current CCB as pointed to by the Status.
3457  */
3458 STATIC int
3459 asr_intr (
3460         IN Asr_softc_t * sc)
3461 {
3462         OUT int          processed;
3463
3464 #ifdef ASR_MEASURE_PERFORMANCE
3465         struct timeval junk;
3466
3467         microtime(&junk);
3468         sc->ha_performance.intr_started = junk;
3469 #endif
3470
3471         for (processed = 0;
3472           sc->ha_Virt->Status & Mask_InterruptsDisabled;
3473           processed = 1) {
3474                 union asr_ccb                     * ccb;
3475                 U32                                 ReplyOffset;
3476                 PI2O_SCSI_ERROR_REPLY_MESSAGE_FRAME Reply;
3477
3478                 if (((ReplyOffset = sc->ha_Virt->FromFIFO) == EMPTY_QUEUE)
3479                  && ((ReplyOffset = sc->ha_Virt->FromFIFO) == EMPTY_QUEUE)) {
3480                         break;
3481                 }
3482                 Reply = (PI2O_SCSI_ERROR_REPLY_MESSAGE_FRAME)(ReplyOffset
3483                   - sc->ha_Msgs_Phys + (char *)(sc->ha_Msgs));
3484                 /*
3485                  * We do not need any (optional byteswapping) method access to
3486                  * the Initiator context field.
3487                  */
3488                 ccb = (union asr_ccb *)(long)
3489                   I2O_MESSAGE_FRAME_getInitiatorContext64(
3490                     &(Reply->StdReplyFrame.StdMessageFrame));
3491                 if (I2O_MESSAGE_FRAME_getMsgFlags(
3492                   &(Reply->StdReplyFrame.StdMessageFrame))
3493                   & I2O_MESSAGE_FLAGS_FAIL) {
3494                         defAlignLong(I2O_UTIL_NOP_MESSAGE,Message);
3495                         PI2O_UTIL_NOP_MESSAGE             Message_Ptr;
3496                         U32                               MessageOffset;
3497
3498                         MessageOffset = (u_long)
3499                           I2O_FAILURE_REPLY_MESSAGE_FRAME_getPreservedMFA(
3500                             (PI2O_FAILURE_REPLY_MESSAGE_FRAME)Reply);
3501                         /*
3502                          *  Get the Original Message Frame's address, and get
3503                          * it's Transaction Context into our space. (Currently
3504                          * unused at original authorship, but better to be
3505                          * safe than sorry). Straight copy means that we
3506                          * need not concern ourselves with the (optional
3507                          * byteswapping) method access.
3508                          */
3509                         Reply->StdReplyFrame.TransactionContext
3510                           = ((PI2O_SINGLE_REPLY_MESSAGE_FRAME)
3511                             (sc->ha_Fvirt + MessageOffset))->TransactionContext;
3512                         /*
3513                          *      For 64 bit machines, we need to reconstruct the
3514                          * 64 bit context.
3515                          */
3516                         ccb = (union asr_ccb *)(long)
3517                           I2O_MESSAGE_FRAME_getInitiatorContext64(
3518                             &(Reply->StdReplyFrame.StdMessageFrame));
3519                         /*
3520                          * Unique error code for command failure.
3521                          */
3522                         I2O_SINGLE_REPLY_MESSAGE_FRAME_setDetailedStatusCode(
3523                           &(Reply->StdReplyFrame), (u_int16_t)-2);
3524                         /*
3525                          *  Modify the message frame to contain a NOP and
3526                          * re-issue it to the controller.
3527                          */
3528                         Message_Ptr = (PI2O_UTIL_NOP_MESSAGE)ASR_fillMessage(
3529                           Message, sizeof(I2O_UTIL_NOP_MESSAGE));
3530 #                       if (I2O_UTIL_NOP != 0)
3531                                 I2O_MESSAGE_FRAME_setFunction (
3532                                   &(Message_Ptr->StdMessageFrame),
3533                                   I2O_UTIL_NOP);
3534 #                       endif
3535                         /*
3536                          *  Copy the packet out to the Original Message
3537                          */
3538                         bcopy ((caddr_t)Message_Ptr,
3539                           sc->ha_Fvirt + MessageOffset,
3540                           sizeof(I2O_UTIL_NOP_MESSAGE));
3541                         /*
3542                          *  Issue the NOP
3543                          */
3544                         sc->ha_Virt->ToFIFO = MessageOffset;
3545                 }
3546
3547                 /*
3548                  *      Asynchronous command with no return requirements,
3549                  * and a generic handler for immunity against odd error
3550                  * returns from the adapter.
3551                  */
3552                 if (ccb == (union asr_ccb *)NULL) {
3553                         /*
3554                          * Return Reply so that it can be used for the
3555                          * next command
3556                          */
3557                         sc->ha_Virt->FromFIFO = ReplyOffset;
3558                         continue;
3559                 }
3560
3561                 /* Welease Wadjah! (and stop timeouts) */
3562                 ASR_ccbRemove (sc, ccb);
3563
3564                 switch (
3565                   I2O_SINGLE_REPLY_MESSAGE_FRAME_getDetailedStatusCode(
3566                     &(Reply->StdReplyFrame))) {
3567
3568                 case I2O_SCSI_DSC_SUCCESS:
3569                         ccb->ccb_h.status &= ~CAM_STATUS_MASK;
3570                         ccb->ccb_h.status |= CAM_REQ_CMP;
3571                         break;
3572
3573                 case I2O_SCSI_DSC_CHECK_CONDITION:
3574                         ccb->ccb_h.status &= ~CAM_STATUS_MASK;
3575                         ccb->ccb_h.status |= CAM_REQ_CMP|CAM_AUTOSNS_VALID;
3576                         break;
3577
3578                 case I2O_SCSI_DSC_BUSY:
3579                         /* FALLTHRU */
3580                 case I2O_SCSI_HBA_DSC_ADAPTER_BUSY:
3581                         /* FALLTHRU */
3582                 case I2O_SCSI_HBA_DSC_SCSI_BUS_RESET:
3583                         /* FALLTHRU */
3584                 case I2O_SCSI_HBA_DSC_BUS_BUSY:
3585                         ccb->ccb_h.status &= ~CAM_STATUS_MASK;
3586                         ccb->ccb_h.status |= CAM_SCSI_BUSY;
3587                         break;
3588
3589                 case I2O_SCSI_HBA_DSC_SELECTION_TIMEOUT:
3590                         ccb->ccb_h.status &= ~CAM_STATUS_MASK;
3591                         ccb->ccb_h.status |= CAM_SEL_TIMEOUT;
3592                         break;
3593
3594                 case I2O_SCSI_HBA_DSC_COMMAND_TIMEOUT:
3595                         /* FALLTHRU */
3596                 case I2O_SCSI_HBA_DSC_DEVICE_NOT_PRESENT:
3597                         /* FALLTHRU */
3598                 case I2O_SCSI_HBA_DSC_LUN_INVALID:
3599                         /* FALLTHRU */
3600                 case I2O_SCSI_HBA_DSC_SCSI_TID_INVALID:
3601                         ccb->ccb_h.status &= ~CAM_STATUS_MASK;
3602                         ccb->ccb_h.status |= CAM_CMD_TIMEOUT;
3603                         break;
3604
3605                 case I2O_SCSI_HBA_DSC_DATA_OVERRUN:
3606                         /* FALLTHRU */
3607                 case I2O_SCSI_HBA_DSC_REQUEST_LENGTH_ERROR:
3608                         ccb->ccb_h.status &= ~CAM_STATUS_MASK;
3609                         ccb->ccb_h.status |= CAM_DATA_RUN_ERR;
3610                         break;
3611
3612                 default:
3613                         ccb->ccb_h.status &= ~CAM_STATUS_MASK;
3614                         ccb->ccb_h.status |= CAM_REQUEUE_REQ;
3615                         break;
3616                 }
3617                 if ((ccb->csio.resid = ccb->csio.dxfer_len) != 0) {
3618                         ccb->csio.resid -=
3619                           I2O_SCSI_ERROR_REPLY_MESSAGE_FRAME_getTransferCount(
3620                             Reply);
3621                 }
3622
3623 #ifdef ASR_MEASURE_PERFORMANCE
3624                 {
3625                         struct timeval  endTime;
3626                         u_int32_t       submitted_time;
3627                         u_int32_t       size;
3628                         int             op_type;
3629                         int             startTimeIndex;
3630
3631                         --sc->ha_submitted_ccbs_count;
3632                         startTimeIndex
3633                           = (int)Reply->StdReplyFrame.TransactionContext;
3634                         if (-1 != startTimeIndex) {
3635                                 /* Compute the time spent in device/adapter */
3636                                 microtime(&endTime);
3637                                 submitted_time = asr_time_delta(sc->ha_timeQ[
3638                                   startTimeIndex], endTime);
3639                                 /* put the startTimeIndex back on free list */
3640                                 ENQ_TIMEQ_FREE_LIST(startTimeIndex,
3641                                   sc->ha_timeQFreeList,
3642                                   sc->ha_timeQFreeHead,
3643                                   sc->ha_timeQFreeTail);
3644                         } else {
3645                                 submitted_time = 0xffffffff;
3646                         }
3647
3648 #define maxctime sc->ha_performance.max_command_time[ccb->csio.cdb_io.cdb_bytes[0]]
3649 #define minctime sc->ha_performance.min_command_time[ccb->csio.cdb_io.cdb_bytes[0]]
3650                         if (submitted_time != 0xffffffff) {
3651                                 if ( maxctime < submitted_time ) {
3652                                         maxctime = submitted_time;
3653                                 }
3654                                 if ( (minctime == 0)
3655                                   || (minctime > submitted_time) ) {
3656                                         minctime = submitted_time;
3657                                 }
3658
3659                                 if ( sc->ha_performance.max_submit_time
3660                                   < submitted_time ) {
3661                                         sc->ha_performance.max_submit_time
3662                                           = submitted_time;
3663                                 }
3664                                 if ( sc->ha_performance.min_submit_time == 0
3665                                   || sc->ha_performance.min_submit_time
3666                                     > submitted_time) {
3667                                         sc->ha_performance.min_submit_time
3668                                           = submitted_time;
3669                                 }
3670
3671                                 switch ( ccb->csio.cdb_io.cdb_bytes[0] ) {
3672
3673                                 case 0xa8:      /* 12-byte READ */
3674                                         /* FALLTHRU */
3675                                 case 0x08:      /* 6-byte READ  */
3676                                         /* FALLTHRU */
3677                                 case 0x28:      /* 10-byte READ */
3678                                         op_type = READ_OP;
3679                                         break;
3680
3681                                 case 0x0a:      /* 6-byte WRITE */
3682                                         /* FALLTHRU */
3683                                 case 0xaa:      /* 12-byte WRITE */
3684                                         /* FALLTHRU */
3685                                 case 0x2a:      /* 10-byte WRITE */
3686                                         op_type = WRITE_OP;
3687                                         break;
3688
3689                                 default:
3690                                         op_type = 0;
3691                                         break;
3692                                 }
3693
3694                                 if ( op_type != 0 ) {
3695                                         struct scsi_rw_big * cmd;
3696
3697                                         cmd = (struct scsi_rw_big *)
3698                                           &(ccb->csio.cdb_io);
3699
3700                                         size = (((u_int32_t) cmd->length2 << 8)
3701                                           | ((u_int32_t) cmd->length1)) << 9;
3702
3703                                         switch ( size ) {
3704
3705                                         case 512:
3706                                                 asr_IObySize(sc,
3707                                                   submitted_time, op_type,
3708                                                   SIZE_512);
3709                                                 break;
3710
3711                                         case 1024:
3712                                                 asr_IObySize(sc,
3713                                                   submitted_time, op_type,
3714                                                   SIZE_1K);
3715                                                 break;
3716
3717                                         case 2048:
3718                                                 asr_IObySize(sc,
3719                                                   submitted_time, op_type,
3720                                                   SIZE_2K);
3721                                                 break;
3722
3723                                         case 4096: