sys/dev/netif/ipw/if_ipw.c

   1 /*-
   2  * Copyright (c) 2004, 2005
   3  *      Damien Bergamini <damien.bergamini@free.fr>. All rights reserved.
   4  *
   5  * Redistribution and use in source and binary forms, with or without
   6  * modification, are permitted provided that the following conditions
   7  * are met:
   8  * 1. Redistributions of source code must retain the above copyright
   9  *    notice unmodified, this list of conditions, and the following
  10  *    disclaimer.
  11  * 2. Redistributions in binary form must reproduce the above copyright
  12  *    notice, this list of conditions and the following disclaimer in the
  13  *    documentation and/or other materials provided with the distribution.
  14  *
  15  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
  16  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  17  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
  18  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
  19  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  20  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
  21  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
  22  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
  23  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
  24  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
  25  * SUCH DAMAGE.
  26  *
  27  *
  28  * $Id: if_ipw.c,v 1.7.2.1 2005/01/13 20:01:03 damien Exp $
  29  * $FreeBSD: src/sys/dev/ipw/if_ipw.c,v 1.7.2.4 2006/01/29 15:13:01 damien Exp $
  30  * $DragonFly: src/sys/dev/netif/ipw/Attic/if_ipw.c,v 1.16 2006/09/05 00:55:40 dillon Exp $
  31  */
  32
  33 /*-
  34  * Intel(R) PRO/Wireless 2100 MiniPCI driver
  35  * http://www.intel.com/network/connectivity/products/wireless/prowireless_mobile.htm
  36  */
  37
  38 #include <sys/param.h>
  39 #include <sys/sysctl.h>
  40 #include <sys/sockio.h>
  41 #include <sys/mbuf.h>
  42 #include <sys/kernel.h>
  43 #include <sys/socket.h>
  44 #include <sys/systm.h>
  45 #include <sys/malloc.h>
  46 #include <sys/module.h>
  47 #include <sys/bus.h>
  48 #include <sys/endian.h>
  49 #include <sys/proc.h>
  50 #include <sys/ucred.h>
  51 #include <sys/serialize.h>
  52 #include <sys/thread2.h>
  53
  54 #include <machine/bus.h>
  55 #include <machine/resource.h>
  56 #include <machine/clock.h>
  57 #include <sys/rman.h>
  58
  59 #include <bus/pci/pcireg.h>
  60 #include <bus/pci/pcivar.h>
  61 #include <bus/pci/pcidevs.h>
  62
  63 #include <net/bpf.h>
  64 #include <net/if.h>
  65 #include <net/if_arp.h>
  66 #include <net/ethernet.h>
  67 #include <net/if_dl.h>
  68 #include <net/if_media.h>
  69 #include <net/if_types.h>
  70 #include <net/ifq_var.h>
  71
  72 #include <netinet/in.h>
  73 #include <netinet/in_systm.h>
  74 #include <netinet/in_var.h>
  75 #include <netinet/ip.h>
  76 #include <netinet/if_ether.h>
  77
  78 #include <netproto/802_11/ieee80211_var.h>
  79 #include <netproto/802_11/ieee80211_ioctl.h>
  80 #include <netproto/802_11/ieee80211_radiotap.h>
  81 #include <netproto/802_11/if_wavelan_ieee.h>
  82
  83 #include <dev/netif/ipw/if_ipwreg.h>
  84 #include <dev/netif/ipw/if_ipwvar.h>
  85
  86 #ifdef IPW_DEBUG
  87 #define DPRINTF(x)      if (ipw_debug > 0) printf x
  88 #define DPRINTFN(n, x)  if (ipw_debug >= (n)) printf x
  89 int ipw_debug = 0;
  90 SYSCTL_INT(_debug, OID_AUTO, ipw, CTLFLAG_RW, &ipw_debug, 0, "ipw debug level");
  91 #else
  92 #define DPRINTF(x)
  93 #define DPRINTFN(n, x)
  94 #endif
  95
  96 MODULE_DEPEND(ipw, pci,  1, 1, 1);
  97 MODULE_DEPEND(ipw, wlan, 1, 1, 1);
  98
  99 struct ipw_ident {
 100         u_int16_t       vendor;
 101         u_int16_t       device;
 102         const char      *name;
 103 };
 104
 105 static const struct ipw_ident ipw_ident_table[] = {
 106         { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_PRO_WL_2100,
 107           "Intel(R) PRO/Wireless 2100 MiniPCI" },
 108
 109         { 0, 0, NULL }
 110 };
 111
 112 static const struct ieee80211_rateset ipw_rateset_11b =
 113         { 4, { 2, 4, 11, 22 } };
 114
 115 static int              ipw_dma_alloc(device_t);
 116 static void             ipw_release(struct ipw_softc *);
 117 static int              ipw_media_change(struct ifnet *);
 118 static void             ipw_media_status(struct ifnet *, struct ifmediareq *);
 119 static int              ipw_newstate(struct ieee80211com *,
 120                             enum ieee80211_state, int);
 121 static u_int16_t        ipw_read_prom_word(struct ipw_softc *, u_int8_t);
 122 static void             ipw_command_intr(struct ipw_softc *,
 123                             struct ipw_soft_buf *);
 124 static void             ipw_newstate_intr(struct ipw_softc *,
 125                             struct ipw_soft_buf *);
 126 static void             ipw_data_intr(struct ipw_softc *, struct ipw_status *,
 127                             struct ipw_soft_bd *, struct ipw_soft_buf *);
 128 static void             ipw_notification_intr(struct ipw_softc *,
 129                             struct ipw_soft_buf *);
 130 static void             ipw_rx_intr(struct ipw_softc *);
 131 static void             ipw_release_sbd(struct ipw_softc *,
 132                             struct ipw_soft_bd *);
 133 static void             ipw_tx_intr(struct ipw_softc *);
 134 static void             ipw_intr(void *);
 135 static void             ipw_dma_map_txbuf(void *, bus_dma_segment_t *, int,
 136                             bus_size_t, int);
 137 static void             ipw_dma_map_addr(void *, bus_dma_segment_t *, int, int);
 138 static int              ipw_cmd(struct ipw_softc *, u_int32_t, void *,
 139                             u_int32_t);
 140 static int              ipw_tx_start(struct ifnet *, struct mbuf *,
 141                             struct ieee80211_node *);
 142 static void             ipw_start(struct ifnet *);
 143 static void             ipw_watchdog(struct ifnet *);
 144 static int              ipw_ioctl(struct ifnet *, u_long, caddr_t,
 145                                 struct ucred *cr);
 146 static void             ipw_stop_master(struct ipw_softc *);
 147 static int              ipw_reset(struct ipw_softc *);
 148 static int              ipw_load_ucode(struct ipw_softc *, u_char *, int);
 149 static int              ipw_load_firmware(struct ipw_softc *, u_char *, int);
 150 static int              ipw_cache_firmware(struct ipw_softc *, void *);
 151 static void             ipw_free_firmware(struct ipw_softc *);
 152 static int              ipw_config(struct ipw_softc *);
 153 static void             ipw_init(void *);
 154 static void             ipw_stop(void *);
 155 static int              ipw_sysctl_stats(SYSCTL_HANDLER_ARGS);
 156 static int              ipw_sysctl_radio(SYSCTL_HANDLER_ARGS);
 157 static u_int32_t        ipw_read_table1(struct ipw_softc *, u_int32_t);
 158 static void             ipw_write_table1(struct ipw_softc *, u_int32_t,
 159                             u_int32_t);
 160 static int              ipw_read_table2(struct ipw_softc *, u_int32_t, void *,
 161                             u_int32_t *);
 162 static void             ipw_read_mem_1(struct ipw_softc *, bus_size_t,
 163                             u_int8_t *, bus_size_t);
 164 static void             ipw_write_mem_1(struct ipw_softc *, bus_size_t,
 165                             u_int8_t *, bus_size_t);
 166
 167 static __inline u_int8_t
 168 MEM_READ_1(struct ipw_softc *sc, u_int32_t addr)
 169 {
 170         CSR_WRITE_4(sc, IPW_CSR_INDIRECT_ADDR, addr);
 171         return CSR_READ_1(sc, IPW_CSR_INDIRECT_DATA);
 172 }
 173
 174 static __inline u_int32_t
 175 MEM_READ_4(struct ipw_softc *sc, u_int32_t addr)
 176 {
 177         CSR_WRITE_4(sc, IPW_CSR_INDIRECT_ADDR, addr);
 178         return CSR_READ_4(sc, IPW_CSR_INDIRECT_DATA);
 179 }
 180
 181 static int ipw_probe(device_t);
 182 static int ipw_attach(device_t);
 183 static int ipw_detach(device_t);
 184 static int ipw_shutdown(device_t);
 185 static int ipw_suspend(device_t);
 186 static int ipw_resume(device_t);
 187
 188 static device_method_t ipw_methods[] = {
 189         /* Device interface */
 190         DEVMETHOD(device_probe,         ipw_probe),
 191         DEVMETHOD(device_attach,        ipw_attach),
 192         DEVMETHOD(device_detach,        ipw_detach),
 193         DEVMETHOD(device_shutdown,      ipw_shutdown),
 194         DEVMETHOD(device_suspend,       ipw_suspend),
 195         DEVMETHOD(device_resume,        ipw_resume),
 196
 197         { 0, 0 }
 198 };
 199
 200 static DEFINE_CLASS_0(ipw, ipw_driver, ipw_methods, sizeof(struct ipw_softc));
 201 static devclass_t ipw_devclass;
 202
 203 DRIVER_MODULE(ipw, pci, ipw_driver, ipw_devclass, 0, 0);
 204
 205 static int
 206 ipw_probe(device_t dev)
 207 {
 208         const struct ipw_ident *ident;
 209
 210         for (ident = ipw_ident_table; ident->name != NULL; ident++) {
 211                 if (pci_get_vendor(dev) == ident->vendor &&
 212                     pci_get_device(dev) == ident->device) {
 213                         device_set_desc(dev, ident->name);
 214                         return 0;
 215                 }
 216         }
 217         return ENXIO;
 218 }
 219
 220 /* Base Address Register */
 221 #define IPW_PCI_BAR0    0x10
 222
 223 static int
 224 ipw_attach(device_t dev)
 225 {
 226         struct ipw_softc *sc = device_get_softc(dev);
 227         struct ieee80211com *ic = &sc->sc_ic;
 228         struct ifnet *ifp = &ic->ic_if;
 229         struct sysctl_oid *sysctl_tree;
 230         u_int16_t val;
 231         int error, i;
 232
 233         if (pci_get_powerstate(dev) != PCI_POWERSTATE_D0) {
 234                 device_printf(dev, "chip is in D%d power mode "
 235                     "-- setting to D0\n", pci_get_powerstate(dev));
 236                 pci_set_powerstate(dev, PCI_POWERSTATE_D0);
 237         }
 238
 239         pci_write_config(dev, 0x41, 0, 1);
 240
 241         /* enable bus-mastering */
 242         pci_enable_busmaster(dev);
 243
 244         /* map the register window */
 245         sc->mem_rid = IPW_PCI_BAR0;
 246         sc->mem = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &sc->mem_rid,
 247                                          RF_ACTIVE);
 248         if (sc->mem == NULL) {
 249                 device_printf(dev, "could not allocate memory resource\n");
 250                 goto fail;
 251         }
 252
 253         sc->sc_st = rman_get_bustag(sc->mem);
 254         sc->sc_sh = rman_get_bushandle(sc->mem);
 255
 256         sc->irq_rid = 0;
 257         sc->irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, &sc->irq_rid,
 258                                          RF_ACTIVE | RF_SHAREABLE);
 259         if (sc->irq == NULL) {
 260                 device_printf(dev, "could not allocate interrupt resource\n");
 261                 goto fail;
 262         }
 263
 264         if_initname(ifp, device_get_name(dev), device_get_unit(dev));
 265
 266         if (ipw_reset(sc) != 0) {
 267                 device_printf(dev, "could not reset adapter\n");
 268                 goto fail;
 269         }
 270
 271         sysctl_ctx_init(&sc->sysctl_ctx);
 272         sysctl_tree = SYSCTL_ADD_NODE(&sc->sysctl_ctx,
 273                 SYSCTL_STATIC_CHILDREN(_hw),
 274                 OID_AUTO,
 275                 device_get_nameunit(dev),
 276                 CTLFLAG_RD,
 277                 0, "");
 278
 279         if (ipw_dma_alloc(dev) != 0) {
 280                 device_printf(dev, "could not allocate DMA resources\n");
 281                 goto fail;
 282         }
 283
 284         ic->ic_phytype = IEEE80211_T_DS;
 285         ic->ic_opmode = IEEE80211_M_STA;
 286         ic->ic_state = IEEE80211_S_INIT;
 287
 288         /* set device capabilities */
 289        ic->ic_caps = IEEE80211_C_SHPREAMBLE | IEEE80211_C_TXPMGT |
 290            IEEE80211_C_PMGT | IEEE80211_C_IBSS | IEEE80211_C_MONITOR |
 291            IEEE80211_C_WEP;
 292
 293         /* read MAC address from EEPROM */
 294         val = ipw_read_prom_word(sc, IPW_EEPROM_MAC + 0);
 295         ic->ic_myaddr[0] = val >> 8;
 296         ic->ic_myaddr[1] = val & 0xff;
 297         val = ipw_read_prom_word(sc, IPW_EEPROM_MAC + 1);
 298         ic->ic_myaddr[2] = val >> 8;
 299         ic->ic_myaddr[3] = val & 0xff;
 300         val = ipw_read_prom_word(sc, IPW_EEPROM_MAC + 2);
 301         ic->ic_myaddr[4] = val >> 8;
 302         ic->ic_myaddr[5] = val & 0xff;
 303
 304         /* set supported .11b rates */
 305         ic->ic_sup_rates[IEEE80211_MODE_11B] = ipw_rateset_11b;
 306
 307         /* set supported .11b channels (read from EEPROM) */
 308         if ((val = ipw_read_prom_word(sc, IPW_EEPROM_CHANNEL_LIST)) == 0)
 309                 val = 0x7ff; /* default to channels 1-11 */
 310         val <<= 1;
 311         for (i = 1; i < 16; i++) {
 312                 if (val & (1 << i)) {
 313                         ic->ic_channels[i].ic_freq =
 314                             ieee80211_ieee2mhz(i, IEEE80211_CHAN_B);
 315                         ic->ic_channels[i].ic_flags = IEEE80211_CHAN_B;
 316                 }
 317         }
 318
 319         /* check support for radio transmitter switch in EEPROM */
 320         if (!(ipw_read_prom_word(sc, IPW_EEPROM_RADIO) & 8))
 321                 sc->flags |= IPW_FLAG_HAS_RADIO_SWITCH;
 322
 323         /* IBSS channel undefined for now */
 324         ic->ic_ibss_chan = &ic->ic_channels[0];
 325
 326         ifp->if_softc = sc;
 327         ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST;
 328         ifp->if_init = ipw_init;
 329         ifp->if_ioctl = ipw_ioctl;
 330         ifp->if_start = ipw_start;
 331         ifp->if_watchdog = ipw_watchdog;
 332         ifq_set_maxlen(&ifp->if_snd, IFQ_MAXLEN);
 333         ifq_set_ready(&ifp->if_snd);
 334
 335         ieee80211_ifattach(ic);
 336         /* override state transition machine */
 337         sc->sc_newstate = ic->ic_newstate;
 338         ic->ic_newstate = ipw_newstate;
 339         ieee80211_media_init(ic, ipw_media_change, ipw_media_status);
 340
 341         bpfattach_dlt(ifp, DLT_IEEE802_11_RADIO,
 342             sizeof (struct ieee80211_frame) + 64, &sc->sc_drvbpf);
 343
 344         sc->sc_rxtap_len = sizeof sc->sc_rxtapu;
 345         sc->sc_rxtap.wr_ihdr.it_len = htole16(sc->sc_rxtap_len);
 346         sc->sc_rxtap.wr_ihdr.it_present = htole32(IPW_RX_RADIOTAP_PRESENT);
 347
 348         sc->sc_txtap_len = sizeof sc->sc_txtapu;
 349         sc->sc_txtap.wt_ihdr.it_len = htole16(sc->sc_txtap_len);
 350         sc->sc_txtap.wt_ihdr.it_present = htole32(IPW_TX_RADIOTAP_PRESENT);
 351
 352         sc->dwelltime = 100;
 353
 354         SYSCTL_ADD_PROC(&sc->sysctl_ctx,
 355             SYSCTL_CHILDREN(sysctl_tree), OID_AUTO, "radio",
 356             CTLTYPE_INT | CTLFLAG_RD, sc, 0, ipw_sysctl_radio, "I",
 357             "Radio transmitter switch");
 358
 359         SYSCTL_ADD_PROC(&sc->sysctl_ctx,
 360             SYSCTL_CHILDREN(sysctl_tree), OID_AUTO, "stats",
 361             CTLTYPE_OPAQUE | CTLFLAG_RD, sc, 0, ipw_sysctl_stats, "S",
 362             "Statistics");
 363
 364         SYSCTL_ADD_INT(&sc->sysctl_ctx,
 365             SYSCTL_CHILDREN(sysctl_tree), OID_AUTO, "dwell",
 366             CTLFLAG_RW, &sc->dwelltime, 0,
 367             "Channel dwell time (ms) for AP/station scanning");
 368
 369         /*
 370          * Hook our interrupt after all initialization is complete
 371          */
 372         error = bus_setup_intr(dev, sc->irq, INTR_MPSAFE,
 373                                ipw_intr, sc, &sc->sc_ih, ifp->if_serializer);
 374         if (error != 0) {
 375                 device_printf(dev, "could not set up interrupt\n");
 376                 bpfdetach(ifp);
 377                 ieee80211_ifdetach(ic);
 378                 goto fail;
 379         }
 380
 381         if (bootverbose)
 382                 ieee80211_announce(ic);
 383
 384         return 0;
 385
 386 fail:
 387         ipw_detach(dev);
 388         return ENXIO;
 389 }
 390
 391 static int
 392 ipw_detach(device_t dev)
 393 {
 394         struct ipw_softc *sc = device_get_softc(dev);
 395         struct ifnet *ifp = &sc->sc_ic.ic_if;
 396
 397         if (device_is_attached(dev)) {
 398                 lwkt_serialize_enter(ifp->if_serializer);
 399                 ipw_stop(sc);
 400                 ipw_free_firmware(sc);
 401                 bus_teardown_intr(dev, sc->irq, sc->sc_ih);
 402                 lwkt_serialize_exit(ifp->if_serializer);
 403
 404                 bpfdetach(ifp);
 405                 ieee80211_ifdetach(&sc->sc_ic);
 406         }
 407
 408         ipw_release(sc);
 409
 410         if (sc->irq != NULL)
 411                 bus_release_resource(dev, SYS_RES_IRQ, sc->irq_rid, sc->irq);
 412
 413         if (sc->mem != NULL)
 414                 bus_release_resource(dev, SYS_RES_MEMORY, sc->mem_rid, sc->mem);
 415
 416         sysctl_ctx_free(&sc->sysctl_ctx);
 417
 418         return 0;
 419 }
 420
 421 static int
 422 ipw_dma_alloc(device_t dev)
 423 {
 424         struct ipw_soft_bd *sbd;
 425         struct ipw_soft_hdr *shdr;
 426         struct ipw_soft_buf *sbuf;
 427         bus_addr_t physaddr;
 428         int error, i;
 429         struct ipw_softc *sc;
 430
 431         sc = device_get_softc(dev);
 432         /*
 433          * Allocate and map tx ring
 434          */
 435         error = bus_dma_tag_create(NULL, 4, 0, BUS_SPACE_MAXADDR_32BIT,
 436             BUS_SPACE_MAXADDR, NULL, NULL, IPW_TBD_SZ, 1, IPW_TBD_SZ, 0,
 437             &sc->tbd_dmat);
 438         if (error != 0) {
 439                 device_printf(dev, "could not create tx ring DMA tag\n");
 440                 goto fail;
 441         }
 442
 443         error = bus_dmamem_alloc(sc->tbd_dmat, (void **)&sc->tbd_list,
 444             BUS_DMA_WAITOK | BUS_DMA_ZERO, &sc->tbd_map);
 445         if (error != 0) {
 446                 device_printf(dev, "could not allocate tx ring DMA memory\n");
 447                 goto fail;
 448         }
 449
 450         error = bus_dmamap_load(sc->tbd_dmat, sc->tbd_map, sc->tbd_list,
 451             IPW_TBD_SZ, ipw_dma_map_addr, &sc->tbd_phys, 0);
 452         if (error != 0) {
 453                 device_printf(dev, "could not map tx ring DMA memory\n");
 454                 goto fail;
 455         }
 456
 457         /*
 458          * Allocate and map rx ring
 459          */
 460         error = bus_dma_tag_create(NULL, 4, 0, BUS_SPACE_MAXADDR_32BIT,
 461             BUS_SPACE_MAXADDR, NULL, NULL, IPW_RBD_SZ, 1, IPW_RBD_SZ, 0,
 462             &sc->rbd_dmat);
 463         if (error != 0) {
 464                 device_printf(dev, "could not create rx ring DMA tag\n");
 465                 goto fail;
 466         }
 467
 468         error = bus_dmamem_alloc(sc->rbd_dmat, (void **)&sc->rbd_list,
 469             BUS_DMA_WAITOK | BUS_DMA_ZERO, &sc->rbd_map);
 470         if (error != 0) {
 471                 device_printf(dev, "could not allocate rx ring DMA memory\n");
 472                 goto fail;
 473         }
 474
 475         error = bus_dmamap_load(sc->rbd_dmat, sc->rbd_map, sc->rbd_list,
 476             IPW_RBD_SZ, ipw_dma_map_addr, &sc->rbd_phys, 0);
 477         if (error != 0) {
 478                 device_printf(dev, "could not map rx ring DMA memory\n");
 479                 goto fail;
 480         }
 481
 482         /*
 483          * Allocate and map status ring
 484          */
 485         error = bus_dma_tag_create(NULL, 4, 0, BUS_SPACE_MAXADDR_32BIT,
 486             BUS_SPACE_MAXADDR, NULL, NULL, IPW_STATUS_SZ, 1, IPW_STATUS_SZ, 0,
 487             &sc->status_dmat);
 488         if (error != 0) {
 489                 device_printf(dev, "could not create status ring DMA tag\n");
 490                 goto fail;
 491         }
 492
 493         error = bus_dmamem_alloc(sc->status_dmat, (void **)&sc->status_list,
 494             BUS_DMA_WAITOK | BUS_DMA_ZERO, &sc->status_map);
 495         if (error != 0) {
 496                 device_printf(dev,
 497                     "could not allocate status ring DMA memory\n");
 498                 goto fail;
 499         }
 500
 501         error = bus_dmamap_load(sc->status_dmat, sc->status_map,
 502             sc->status_list, IPW_STATUS_SZ, ipw_dma_map_addr, &sc->status_phys,
 503             0);
 504         if (error != 0) {
 505                 device_printf(dev, "could not map status ring DMA memory\n");
 506                 goto fail;
 507         }
 508
 509         /*
 510          * Allocate command DMA map
 511          */
 512         error = bus_dma_tag_create(NULL, 1, 0, BUS_SPACE_MAXADDR_32BIT,
 513             BUS_SPACE_MAXADDR, NULL, NULL, sizeof (struct ipw_cmd), 1,
 514             sizeof (struct ipw_cmd), 0, &sc->cmd_dmat);
 515         if (error != 0) {
 516                 device_printf(dev, "could not create command DMA tag\n");
 517                 goto fail;
 518         }
 519
 520         error = bus_dmamap_create(sc->cmd_dmat, 0, &sc->cmd_map);
 521         if (error != 0) {
 522                 device_printf(dev, "could not create command DMA map\n");
 523                 goto fail;
 524         }
 525
 526         /*
 527          * Allocate headers DMA maps
 528          */
 529         error = bus_dma_tag_create(NULL, 1, 0, BUS_SPACE_MAXADDR_32BIT,
 530             BUS_SPACE_MAXADDR, NULL, NULL, sizeof (struct ipw_hdr), 1,
 531             sizeof (struct ipw_hdr), 0, &sc->hdr_dmat);
 532         if (error != 0) {
 533                 device_printf(dev, "could not create header DMA tag\n");
 534                 goto fail;
 535         }
 536
 537         SLIST_INIT(&sc->free_shdr);
 538         for (i = 0; i < IPW_NDATA; i++) {
 539                 shdr = &sc->shdr_list[i];
 540                 error = bus_dmamap_create(sc->hdr_dmat, 0, &shdr->map);
 541                 if (error != 0) {
 542                         device_printf(dev, "could not create header DMA map\n");
 543                         goto fail;
 544                 }
 545                 SLIST_INSERT_HEAD(&sc->free_shdr, shdr, next);
 546         }
 547
 548         /*
 549          * Allocate tx buffers DMA maps
 550          */
 551         error = bus_dma_tag_create(NULL, 1, 0, BUS_SPACE_MAXADDR_32BIT,
 552             BUS_SPACE_MAXADDR, NULL, NULL, MCLBYTES, IPW_MAX_NSEG, MCLBYTES, 0,
 553             &sc->txbuf_dmat);
 554         if (error != 0) {
 555                 device_printf(dev, "could not create tx DMA tag\n");
 556                 goto fail;
 557         }
 558
 559         SLIST_INIT(&sc->free_sbuf);
 560         for (i = 0; i < IPW_NDATA; i++) {
 561                 sbuf = &sc->tx_sbuf_list[i];
 562                 error = bus_dmamap_create(sc->txbuf_dmat, 0, &sbuf->map);
 563                 if (error != 0) {
 564                         device_printf(dev, "could not create tx DMA map\n");
 565                         goto fail;
 566                 }
 567                 SLIST_INSERT_HEAD(&sc->free_sbuf, sbuf, next);
 568         }
 569
 570         /*
 571          * Initialize tx ring
 572          */
 573         for (i = 0; i < IPW_NTBD; i++) {
 574                 sbd = &sc->stbd_list[i];
 575                 sbd->bd = &sc->tbd_list[i];
 576                 sbd->type = IPW_SBD_TYPE_NOASSOC;
 577         }
 578
 579         /*
 580          * Pre-allocate rx buffers and DMA maps
 581          */
 582         error = bus_dma_tag_create(NULL, 1, 0, BUS_SPACE_MAXADDR_32BIT,
 583             BUS_SPACE_MAXADDR, NULL, NULL, MCLBYTES, IPW_NRBD, MCLBYTES, 0,
 584             &sc->rxbuf_dmat);
 585         if (error != 0) {
 586                 device_printf(dev, "could not create rx DMA tag\n");
 587                 goto fail;
 588         }
 589
 590         for (i = 0; i < IPW_NRBD; i++) {
 591                 sbd = &sc->srbd_list[i];
 592                 sbuf = &sc->rx_sbuf_list[i];
 593                 sbd->bd = &sc->rbd_list[i];
 594
 595                 sbuf->m = m_getcl(MB_DONTWAIT, MT_DATA, M_PKTHDR);
 596                 if (sbuf->m == NULL) {
 597                         device_printf(dev, "could not allocate rx mbuf\n");
 598                         error = ENOMEM;
 599                         goto fail;
 600                 }
 601
 602                 error = bus_dmamap_create(sc->rxbuf_dmat, 0, &sbuf->map);
 603                 if (error != 0) {
 604                         device_printf(dev, "could not create rx DMA map\n");
 605                         goto fail;
 606                 }
 607
 608                 error = bus_dmamap_load(sc->rxbuf_dmat, sbuf->map,
 609                     mtod(sbuf->m, void *), MCLBYTES, ipw_dma_map_addr,
 610                     &physaddr, 0);
 611                 if (error != 0) {
 612                         device_printf(dev, "could not map rx DMA memory\n");
 613                         goto fail;
 614                 }
 615
 616                 sbd->type = IPW_SBD_TYPE_DATA;
 617                 sbd->priv = sbuf;
 618                 sbd->bd->physaddr = htole32(physaddr);
 619                 sbd->bd->len = htole32(MCLBYTES);
 620         }
 621
 622         bus_dmamap_sync(sc->rbd_dmat, sc->rbd_map, BUS_DMASYNC_PREWRITE);
 623
 624         return 0;
 625
 626 fail:   ipw_release(sc);
 627         return error;
 628 }
 629
 630 static void
 631 ipw_release(struct ipw_softc *sc)
 632 {
 633         struct ipw_soft_buf *sbuf;
 634         int i;
 635
 636         if (sc->tbd_dmat != NULL) {
 637                 if (sc->stbd_list != NULL) {
 638                         bus_dmamap_sync(sc->tbd_dmat, sc->tbd_map,
 639                             BUS_DMASYNC_POSTWRITE);
 640                         bus_dmamap_unload(sc->tbd_dmat, sc->tbd_map);
 641                         bus_dmamem_free(sc->tbd_dmat, sc->tbd_list,
 642                             sc->tbd_map);
 643                 }
 644                 bus_dma_tag_destroy(sc->tbd_dmat);
 645         }
 646
 647         if (sc->rbd_dmat != NULL) {
 648                 if (sc->rbd_list != NULL) {
 649                         bus_dmamap_sync(sc->rbd_dmat, sc->rbd_map,
 650                             BUS_DMASYNC_POSTWRITE);
 651                         bus_dmamap_unload(sc->rbd_dmat, sc->rbd_map);
 652                         bus_dmamem_free(sc->rbd_dmat, sc->rbd_list,
 653                             sc->rbd_map);
 654                 }
 655                 bus_dma_tag_destroy(sc->rbd_dmat);
 656         }
 657
 658         if (sc->status_dmat != NULL) {
 659                 if (sc->status_list != NULL) {
 660                         bus_dmamap_sync(sc->status_dmat, sc->status_map,
 661                             BUS_DMASYNC_POSTWRITE);
 662                         bus_dmamap_unload(sc->status_dmat, sc->status_map);
 663                         bus_dmamem_free(sc->status_dmat, sc->status_list,
 664                             sc->status_map);
 665                 }
 666                 bus_dma_tag_destroy(sc->status_dmat);
 667         }
 668
 669         for (i = 0; i < IPW_NTBD; i++)
 670                 ipw_release_sbd(sc, &sc->stbd_list[i]);
 671
 672         if (sc->cmd_dmat != NULL) {
 673                 bus_dmamap_destroy(sc->cmd_dmat, sc->cmd_map);
 674                 bus_dma_tag_destroy(sc->cmd_dmat);
 675         }
 676
 677         if (sc->hdr_dmat != NULL) {
 678                 for (i = 0; i < IPW_NDATA; i++)
 679                         bus_dmamap_destroy(sc->hdr_dmat, sc->shdr_list[i].map);
 680                 bus_dma_tag_destroy(sc->hdr_dmat);
 681         }
 682
 683         if (sc->txbuf_dmat != NULL) {
 684                 for (i = 0; i < IPW_NDATA; i++) {
 685                         bus_dmamap_destroy(sc->txbuf_dmat,
 686                             sc->tx_sbuf_list[i].map);
 687                 }
 688                 bus_dma_tag_destroy(sc->txbuf_dmat);
 689         }
 690
 691         if (sc->rxbuf_dmat != NULL) {
 692                 for (i = 0; i < IPW_NRBD; i++) {
 693                         sbuf = &sc->rx_sbuf_list[i];
 694                         if (sbuf->m != NULL) {
 695                                 bus_dmamap_sync(sc->rxbuf_dmat, sbuf->map,
 696                                     BUS_DMASYNC_POSTREAD);
 697                                 bus_dmamap_unload(sc->rxbuf_dmat, sbuf->map);
 698                                 m_freem(sbuf->m);
 699                         }
 700                         bus_dmamap_destroy(sc->rxbuf_dmat, sbuf->map);
 701                 }
 702                 bus_dma_tag_destroy(sc->rxbuf_dmat);
 703         }
 704 }
 705
 706 static int
 707 ipw_shutdown(device_t dev)
 708 {
 709         struct ipw_softc *sc = device_get_softc(dev);
 710         struct ifnet *ifp = &sc->sc_ic.ic_if;
 711
 712         lwkt_serialize_enter(ifp->if_serializer);
 713         ipw_stop(sc);
 714         lwkt_serialize_exit(ifp->if_serializer);
 715
 716         return 0;
 717 }
 718
 719 static int
 720 ipw_suspend(device_t dev)
 721 {
 722         struct ipw_softc *sc = device_get_softc(dev);
 723         struct ifnet *ifp = &sc->sc_ic.ic_if;
 724
 725         lwkt_serialize_enter(ifp->if_serializer);
 726         ipw_stop(sc);
 727         lwkt_serialize_exit(ifp->if_serializer);
 728
 729         return 0;
 730 }
 731
 732 static int
 733 ipw_resume(device_t dev)
 734 {
 735         struct ipw_softc *sc = device_get_softc(dev);
 736         struct ifnet *ifp = &sc->sc_ic.ic_if;
 737
 738         lwkt_serialize_enter(ifp->if_serializer);
 739         pci_write_config(dev, 0x41, 0, 1);
 740
 741         if (ifp->if_flags & IFF_UP) {
 742                 ifp->if_init(ifp->if_softc);
 743                 if (ifp->if_flags & IFF_RUNNING)
 744                         ifp->if_start(ifp);
 745         }
 746         lwkt_serialize_exit(ifp->if_serializer);
 747
 748         return 0;
 749 }
 750
 751 static int
 752 ipw_media_change(struct ifnet *ifp)
 753 {
 754         struct ipw_softc *sc = ifp->if_softc;
 755         int error;
 756
 757         error = ieee80211_media_change(ifp);
 758         if (error != ENETRESET)
 759                 return error;
 760
 761         if ((ifp->if_flags & (IFF_UP | IFF_RUNNING)) == (IFF_UP | IFF_RUNNING))
 762                 ipw_init(sc);
 763
 764         return 0;
 765 }
 766
 767 static void
 768 ipw_media_status(struct ifnet *ifp, struct ifmediareq *imr)
 769 {
 770         struct ipw_softc *sc = ifp->if_softc;
 771         struct ieee80211com *ic = &sc->sc_ic;
 772 #define N(a)    (sizeof (a) / sizeof (a[0]))
 773         static const struct {
 774                 u_int32_t       val;
 775                 int             rate;
 776         } rates[] = {
 777                 { IPW_RATE_DS1,   2 },
 778                 { IPW_RATE_DS2,   4 },
 779                 { IPW_RATE_DS5,  11 },
 780                 { IPW_RATE_DS11, 22 },
 781         };
 782         u_int32_t val, i;
 783         int rate;
 784
 785         imr->ifm_status = IFM_AVALID;
 786         imr->ifm_active = IFM_IEEE80211;
 787         if (ic->ic_state == IEEE80211_S_RUN)
 788                 imr->ifm_status |= IFM_ACTIVE;
 789
 790         /* read current transmission rate from adapter */
 791         val = ipw_read_table1(sc, IPW_INFO_CURRENT_TX_RATE) & 0xf;
 792
 793         /* convert rate to 802.11 rate */
 794         for (i = 0; i < N(rates) && rates[i].val != val; i++);
 795         rate = (i < N(rates)) ? rates[i].rate : 0;
 796
 797         imr->ifm_active |= IFM_IEEE80211_11B;
 798         imr->ifm_active |= ieee80211_rate2media(ic, rate, IEEE80211_MODE_11B);
 799         switch (ic->ic_opmode) {
 800         case IEEE80211_M_STA:
 801                 break;
 802
 803         case IEEE80211_M_IBSS:
 804                 imr->ifm_active |= IFM_IEEE80211_IBSS;
 805                 break;
 806
 807         case IEEE80211_M_MONITOR:
 808                 imr->ifm_active |= IFM_IEEE80211_MONITOR;
 809                 break;
 810
 811         case IEEE80211_M_AHDEMO:
 812         case IEEE80211_M_HOSTAP:
 813                 /* should not get there */
 814                 break;
 815         }
 816 #undef N
 817 }
 818
 819 static int
 820 ipw_newstate(struct ieee80211com *ic, enum ieee80211_state nstate, int arg __unused)
 821 {
 822         struct ipw_softc *sc = ic->ic_if.if_softc;
 823         struct ieee80211_node *ni;
 824         uint8_t macaddr[IEEE80211_ADDR_LEN];
 825         uint32_t len;
 826
 827         switch (nstate) {
 828         case IEEE80211_S_RUN:
 829                 DELAY(200); /* firmware needs a short delay here */
 830
 831                 len = IEEE80211_ADDR_LEN;
 832                 ipw_read_table2(sc, IPW_INFO_CURRENT_BSSID, macaddr, &len);
 833                 ni = ieee80211_find_node(&ic->ic_scan, macaddr);
 834                 if (ni == NULL)
 835                         break;
 836
 837                 ieee80211_ref_node(ni);
 838                 ieee80211_sta_join(ic, ni);
 839                 ieee80211_node_authorize(ni);
 840
 841                 if (ic->ic_opmode == IEEE80211_M_STA)
 842                         ieee80211_notify_node_join(ic, ni, 1);
 843                 break;
 844
 845         case IEEE80211_S_INIT:
 846         case IEEE80211_S_SCAN:
 847         case IEEE80211_S_AUTH:
 848         case IEEE80211_S_ASSOC:
 849                 break;
 850         }
 851
 852         ic->ic_state = nstate;
 853         return 0;
 854 }
 855
 856 /*
 857  * Read 16 bits at address 'addr' from the Microwire EEPROM.
 858  * DON'T PLAY WITH THIS CODE UNLESS YOU KNOW *EXACTLY* WHAT YOU'RE DOING!
 859  */
 860 static u_int16_t
 861 ipw_read_prom_word(struct ipw_softc *sc, u_int8_t addr)
 862 {
 863         u_int32_t tmp;
 864         u_int16_t val;
 865         int n;
 866
 867         /* Clock C once before the first command */
 868         IPW_EEPROM_CTL(sc, 0);
 869         IPW_EEPROM_CTL(sc, IPW_EEPROM_S);
 870         IPW_EEPROM_CTL(sc, IPW_EEPROM_S | IPW_EEPROM_C);
 871         IPW_EEPROM_CTL(sc, IPW_EEPROM_S);
 872
 873         /* Write start bit (1) */
 874         IPW_EEPROM_CTL(sc, IPW_EEPROM_S | IPW_EEPROM_D);
 875         IPW_EEPROM_CTL(sc, IPW_EEPROM_S | IPW_EEPROM_D | IPW_EEPROM_C);
 876
 877         /* Write READ opcode (10) */
 878         IPW_EEPROM_CTL(sc, IPW_EEPROM_S | IPW_EEPROM_D);
 879         IPW_EEPROM_CTL(sc, IPW_EEPROM_S | IPW_EEPROM_D | IPW_EEPROM_C);
 880         IPW_EEPROM_CTL(sc, IPW_EEPROM_S);
 881         IPW_EEPROM_CTL(sc, IPW_EEPROM_S | IPW_EEPROM_C);
 882
 883         /* Write address A7-A0 */
 884         for (n = 7; n >= 0; n--) {
 885                 IPW_EEPROM_CTL(sc, IPW_EEPROM_S |
 886                     (((addr >> n) & 1) << IPW_EEPROM_SHIFT_D));
 887                 IPW_EEPROM_CTL(sc, IPW_EEPROM_S |
 888                     (((addr >> n) & 1) << IPW_EEPROM_SHIFT_D) | IPW_EEPROM_C);
 889         }
 890
 891         IPW_EEPROM_CTL(sc, IPW_EEPROM_S);
 892
 893         /* Read data Q15-Q0 */
 894         val = 0;
 895         for (n = 15; n >= 0; n--) {
 896                 IPW_EEPROM_CTL(sc, IPW_EEPROM_S | IPW_EEPROM_C);
 897                 IPW_EEPROM_CTL(sc, IPW_EEPROM_S);
 898                 tmp = MEM_READ_4(sc, IPW_MEM_EEPROM_CTL);
 899                 val |= ((tmp & IPW_EEPROM_Q) >> IPW_EEPROM_SHIFT_Q) << n;
 900         }
 901
 902         IPW_EEPROM_CTL(sc, 0);
 903
 904         /* Clear Chip Select and clock C */
 905         IPW_EEPROM_CTL(sc, IPW_EEPROM_S);
 906         IPW_EEPROM_CTL(sc, 0);
 907         IPW_EEPROM_CTL(sc, IPW_EEPROM_C);
 908
 909         return le16toh(val);
 910 }
 911
 912 static void
 913 ipw_command_intr(struct ipw_softc *sc, struct ipw_soft_buf *sbuf)
 914 {
 915         struct ipw_cmd *cmd;
 916
 917         bus_dmamap_sync(sc->rxbuf_dmat, sbuf->map, BUS_DMASYNC_POSTREAD);
 918
 919         cmd = mtod(sbuf->m, struct ipw_cmd *);
 920
 921         DPRINTFN(2, ("RX!CMD!%u!%u!%u!%u!%u\n",
 922             le32toh(cmd->type), le32toh(cmd->subtype), le32toh(cmd->seq),
 923             le32toh(cmd->len), le32toh(cmd->status)));
 924
 925         wakeup(sc);
 926 }
 927
 928 static void
 929 ipw_newstate_intr(struct ipw_softc *sc, struct ipw_soft_buf *sbuf)
 930 {
 931         struct ieee80211com *ic = &sc->sc_ic;
 932         u_int32_t state;
 933
 934         bus_dmamap_sync(sc->rxbuf_dmat, sbuf->map, BUS_DMASYNC_POSTREAD);
 935
 936         state = le32toh(*mtod(sbuf->m, u_int32_t *));
 937
 938         DPRINTFN(2, ("RX!NEWSTATE!%u\n", state));
 939
 940         switch (state) {
 941         case IPW_STATE_ASSOCIATED:
 942                 ieee80211_new_state(ic, IEEE80211_S_RUN, -1);
 943                 break;
 944
 945         case IPW_STATE_SCANNING:
 946                 /* don't leave run state on background scan */
 947                 if (ic->ic_state != IEEE80211_S_RUN)
 948                         ieee80211_new_state(ic, IEEE80211_S_SCAN, -1);
 949
 950                 ic->ic_flags |= IEEE80211_F_SCAN;
 951                 break;
 952
 953         case IPW_STATE_SCAN_COMPLETE:
 954                 ieee80211_notify_scan_done(ic);
 955                 ic->ic_flags &= ~IEEE80211_F_SCAN;
 956                 break;
 957
 958         case IPW_STATE_ASSOCIATION_LOST:
 959                 ieee80211_new_state(ic, IEEE80211_S_INIT, -1);
 960                 break;
 961
 962         case IPW_STATE_RADIO_DISABLED:
 963                 ic->ic_if.if_flags &= ~IFF_UP;
 964                 ipw_stop(sc);
 965                 break;
 966         }
 967 }
 968
 969 /*
 970  * XXX: Hack to set the current channel to the value advertised in beacons or
 971  * probe responses. Only used during AP detection.
 972  */
 973 static void
 974 ipw_fix_channel(struct ieee80211com *ic, struct mbuf *m)
 975 {
 976         struct ieee80211_frame *wh;
 977         uint8_t subtype;
 978         uint8_t *frm, *efrm;
 979
 980         wh = mtod(m, struct ieee80211_frame *);
 981
 982         if ((wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK) != IEEE80211_FC0_TYPE_MGT)
 983                 return;
 984
 985         subtype = wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_MASK;
 986
 987         if (subtype != IEEE80211_FC0_SUBTYPE_BEACON &&
 988             subtype != IEEE80211_FC0_SUBTYPE_PROBE_RESP)
 989                 return;
 990
 991         frm = (uint8_t *)(wh + 1);
 992         efrm = mtod(m, uint8_t *) + m->m_len;
 993
 994         frm += 12;      /* skip tstamp, bintval and capinfo fields */
 995         while (frm < efrm) {
 996                 if (*frm == IEEE80211_ELEMID_DSPARMS)
 997 #if IEEE80211_CHAN_MAX < 255
 998                 if (frm[2] <= IEEE80211_CHAN_MAX)
 999 #endif
1000                         ic->ic_curchan = &ic->ic_channels[frm[2]];
1001
1002                 frm += frm[1] + 2;
1003         }
1004 }
1005
1006 static void
1007 ipw_data_intr(struct ipw_softc *sc, struct ipw_status *status,
1008     struct ipw_soft_bd *sbd, struct ipw_soft_buf *sbuf)
1009 {
1010         struct ieee80211com *ic = &sc->sc_ic;
1011         struct ifnet *ifp = &ic->ic_if;
1012         struct mbuf *mnew, *m;
1013         struct ieee80211_frame *wh;
1014         struct ieee80211_node *ni;
1015         bus_addr_t physaddr;
1016         int error;
1017
1018         DPRINTFN(5, ("RX!DATA!%u!%u\n", le32toh(status->len), status->rssi));
1019
1020         if (le32toh(status->len) < sizeof (struct ieee80211_frame_min) ||
1021             le32toh(status->len) > MCLBYTES) {
1022                 if_printf(ifp, "bad frame length\n");
1023                 return;
1024         }
1025
1026         /*
1027          * Try to allocate a new mbuf for this ring element and load it before
1028          * processing the current mbuf. If the ring element cannot be loaded,
1029          * drop the received packet and reuse the old mbuf. In the unlikely
1030          * case that the old mbuf can't be reloaded either, explicitly panic.
1031          */
1032         mnew = m_getcl(MB_DONTWAIT, MT_DATA, M_PKTHDR);
1033         if (mnew == NULL) {
1034                 ifp->if_ierrors++;
1035                 return;
1036         }
1037
1038         bus_dmamap_sync(sc->rxbuf_dmat, sbuf->map, BUS_DMASYNC_POSTREAD);
1039         bus_dmamap_unload(sc->rxbuf_dmat, sbuf->map);
1040
1041         error = bus_dmamap_load(sc->rxbuf_dmat, sbuf->map, mtod(mnew, void *),
1042             MCLBYTES, ipw_dma_map_addr, &physaddr, 0);
1043         if (error != 0) {
1044                 m_freem(mnew);
1045
1046                 /* try to reload the old mbuf */
1047                 error = bus_dmamap_load(sc->rxbuf_dmat, sbuf->map,
1048                     mtod(sbuf->m, void *), MCLBYTES, ipw_dma_map_addr,
1049                     &physaddr, 0);
1050                 if (error != 0) /* XXX very unlikely that it will fail... */
1051                         panic("%s: could not load old rx mbuf", ifp->if_xname);
1052                 ifp->if_ierrors++;
1053                 return;
1054         }
1055
1056         /*
1057          * New mbuf successfully loaded, update Rx ring and continue
1058          * processing.
1059          */
1060         m = sbuf->m;
1061         sbuf->m = mnew;
1062         sbd->bd->physaddr = htole32(physaddr);
1063
1064         /* finalize mbuf */
1065         m->m_pkthdr.rcvif = ifp;
1066         m->m_pkthdr.len = m->m_len = le32toh(status->len);
1067
1068         if (sc->sc_drvbpf != NULL) {
1069                 struct ipw_rx_radiotap_header *tap = &sc->sc_rxtap;
1070
1071                 tap->wr_flags = 0;
1072                 tap->wr_antsignal = status->rssi;
1073                 tap->wr_chan_freq = htole16(ic->ic_ibss_chan->ic_freq);
1074                 tap->wr_chan_flags = htole16(ic->ic_ibss_chan->ic_flags);
1075
1076                 bpf_ptap(sc->sc_drvbpf, m, tap, sc->sc_rxtap_len);
1077         }
1078
1079         if (ic->ic_state == IEEE80211_S_SCAN)
1080                 ipw_fix_channel(ic, m);
1081
1082         wh = mtod(m, struct ieee80211_frame *);
1083         ni = ieee80211_find_rxnode(ic, (struct ieee80211_frame_min *)wh);
1084
1085         /* send the frame to the 802.11 layer */
1086         ieee80211_input(ic, m, ni, status->rssi, 0);
1087
1088         /* node is no longer needed */
1089         ieee80211_free_node(ni);
1090
1091         bus_dmamap_sync(sc->rbd_dmat, sc->rbd_map, BUS_DMASYNC_PREWRITE);
1092 }
1093
1094 static void
1095 ipw_notification_intr(struct ipw_softc *sc __unused, struct ipw_soft_buf *sbuf __unused)
1096 {
1097         DPRINTFN(2, ("RX!NOTIFICATION\n"));
1098 }
1099
1100 static void
1101 ipw_rx_intr(struct ipw_softc *sc)
1102 {
1103         struct ipw_status *status;
1104         struct ipw_soft_bd *sbd;
1105         struct ipw_soft_buf *sbuf;
1106         u_int32_t r, i;
1107
1108         if (!(sc->flags & IPW_FLAG_FW_INITED))
1109                 return;
1110
1111         r = CSR_READ_4(sc, IPW_CSR_RX_READ_INDEX);
1112
1113         bus_dmamap_sync(sc->status_dmat, sc->status_map, BUS_DMASYNC_POSTREAD);
1114
1115         for (i = (sc->rxcur + 1) % IPW_NRBD; i != r; i = (i + 1) % IPW_NRBD) {
1116
1117                 status = &sc->status_list[i];
1118                 sbd = &sc->srbd_list[i];
1119                 sbuf = sbd->priv;
1120
1121                 switch (le16toh(status->code) & 0xf) {
1122                 case IPW_STATUS_CODE_COMMAND:
1123                         ipw_command_intr(sc, sbuf);
1124                         break;
1125
1126                 case IPW_STATUS_CODE_NEWSTATE:
1127                         ipw_newstate_intr(sc, sbuf);
1128                         break;
1129
1130                 case IPW_STATUS_CODE_DATA_802_3:
1131                 case IPW_STATUS_CODE_DATA_802_11:
1132                         ipw_data_intr(sc, status, sbd, sbuf);
1133                         break;
1134
1135                 case IPW_STATUS_CODE_NOTIFICATION:
1136                         ipw_notification_intr(sc, sbuf);
1137                         break;
1138
1139                 default:
1140                         if_printf(&sc->sc_ic.ic_if, "unknown status code %u\n",
1141                                   le16toh(status->code));
1142                 }
1143
1144                 /* firmware was killed, stop processing received frames */
1145                 if (!(sc->flags & IPW_FLAG_FW_INITED))
1146                         return;
1147
1148                 sbd->bd->flags = 0;
1149         }
1150         /* Some buffer descriptors may have changed */
1151         bus_dmamap_sync(sc->rbd_dmat, sc->rbd_map, BUS_DMASYNC_PREWRITE);
1152
1153         /* Tell the firmware what we have processed */
1154         sc->rxcur = (r == 0) ? IPW_NRBD - 1 : r - 1;
1155         CSR_WRITE_4(sc, IPW_CSR_RX_WRITE_INDEX, sc->rxcur);
1156 }
1157
1158 static void
1159 ipw_release_sbd(struct ipw_softc *sc, struct ipw_soft_bd *sbd)
1160 {
1161         struct ipw_soft_hdr *shdr;
1162         struct ipw_soft_buf *sbuf;
1163
1164         switch (sbd->type) {
1165         case IPW_SBD_TYPE_COMMAND:
1166                 bus_dmamap_sync(sc->cmd_dmat, sc->cmd_map,
1167                     BUS_DMASYNC_POSTWRITE);
1168                 bus_dmamap_unload(sc->cmd_dmat, sc->cmd_map);
1169                 break;
1170
1171         case IPW_SBD_TYPE_HEADER:
1172                 shdr = sbd->priv;
1173                 bus_dmamap_sync(sc->hdr_dmat, shdr->map, BUS_DMASYNC_POSTWRITE);
1174                 bus_dmamap_unload(sc->hdr_dmat, shdr->map);
1175                 SLIST_INSERT_HEAD(&sc->free_shdr, shdr, next);
1176                 break;
1177
1178         case IPW_SBD_TYPE_DATA:
1179                 sbuf = sbd->priv;
1180                 bus_dmamap_sync(sc->txbuf_dmat, sbuf->map,
1181                     BUS_DMASYNC_POSTWRITE);
1182                 bus_dmamap_unload(sc->txbuf_dmat, sbuf->map);
1183                 SLIST_INSERT_HEAD(&sc->free_sbuf, sbuf, next);
1184
1185                 m_freem(sbuf->m);
1186                 ieee80211_free_node(sbuf->ni);
1187
1188                 /* kill watchdog timer */
1189                 sc->sc_tx_timer = 0;
1190                 break;
1191         }
1192         sbd->type = IPW_SBD_TYPE_NOASSOC;
1193 }
1194
1195 static void
1196 ipw_tx_intr(struct ipw_softc *sc)
1197 {
1198         struct ifnet *ifp = &sc->sc_ic.ic_if;
1199         u_int32_t r, i;
1200
1201         if (!(sc->flags & IPW_FLAG_FW_INITED))
1202                 return;
1203
1204         r = CSR_READ_4(sc, IPW_CSR_TX_READ_INDEX);
1205
1206         for (i = (sc->txold + 1) % IPW_NTBD; i != r; i = (i + 1) % IPW_NTBD) {
1207                 struct ipw_soft_bd *sbd;
1208
1209                 sbd = &sc->stbd_list[i];
1210                 if (sbd->type == IPW_SBD_TYPE_DATA)
1211                         ifp->if_opackets++;
1212
1213                 ipw_release_sbd(sc, sbd);
1214                 sc->txfree++;
1215         }
1216
1217         /* Remember what the firmware has processed */
1218         sc->txold = (r == 0) ? IPW_NTBD - 1 : r - 1;
1219
1220         /* Call start() since some buffer descriptors have been released */
1221         ifp->if_flags &= ~IFF_OACTIVE;
1222         (*ifp->if_start)(ifp);
1223 }
1224
1225 static void
1226 ipw_intr(void *arg)
1227 {
1228         struct ipw_softc *sc = arg;
1229         u_int32_t r;
1230
1231         if ((r = CSR_READ_4(sc, IPW_CSR_INTR)) == 0 || r == 0xffffffff)
1232                 return;
1233
1234         /* Disable interrupts */
1235         CSR_WRITE_4(sc, IPW_CSR_INTR_MASK, 0);
1236
1237         DPRINTFN(8, ("INTR!0x%08x\n", r));
1238
1239         if (r & (IPW_INTR_FATAL_ERROR | IPW_INTR_PARITY_ERROR)) {
1240                 if_printf(&sc->sc_ic.ic_if, "fatal error\n");
1241                 sc->sc_ic.ic_if.if_flags &= ~IFF_UP;
1242                 ipw_stop(sc);
1243         }
1244
1245         if (r & IPW_INTR_FW_INIT_DONE) {
1246                 if (!(r & (IPW_INTR_FATAL_ERROR | IPW_INTR_PARITY_ERROR)))
1247                         wakeup(sc);
1248         }
1249
1250         if (r & IPW_INTR_RX_TRANSFER)
1251                 ipw_rx_intr(sc);
1252
1253         if (r & IPW_INTR_TX_TRANSFER)
1254                 ipw_tx_intr(sc);
1255
1256         /* Acknowledge interrupts */
1257         CSR_WRITE_4(sc, IPW_CSR_INTR, r);
1258
1259         /* Re-enable interrupts */
1260         CSR_WRITE_4(sc, IPW_CSR_INTR_MASK, IPW_INTR_MASK);
1261 }
1262
1263 static void
1264 ipw_dma_map_txbuf(void *arg, bus_dma_segment_t *segs, int nseg,
1265     bus_size_t mapsize, int error)
1266 {
1267         struct ipw_dma_mapping *map = arg;
1268
1269         if (error != 0)
1270                 return;
1271
1272         KASSERT(nseg <= IPW_MAX_NSEG, ("too many DMA segments %d", nseg));
1273
1274         bcopy(segs, map->segs, nseg * sizeof (bus_dma_segment_t));
1275         map->nseg = nseg;
1276         map->mapsize = mapsize;
1277 }
1278
1279 static void
1280 ipw_dma_map_addr(void *arg, bus_dma_segment_t *segs, int nseg __unused, int error)
1281 {
1282         if (error != 0)
1283                 return;
1284
1285         KASSERT(nseg == 1, ("too many DMA segments, %d should be 1", nseg));
1286
1287         *(bus_addr_t *)arg = segs[0].ds_addr;
1288 }
1289
1290 static int
1291 ipw_cmd(struct ipw_softc *sc, u_int32_t type, void *data, u_int32_t len)
1292 {
1293         struct ifnet *ifp = &sc->sc_ic.ic_if;
1294         struct ipw_soft_bd *sbd;
1295         bus_addr_t physaddr;
1296         int error;
1297
1298         sbd = &sc->stbd_list[sc->txcur];
1299
1300         error = bus_dmamap_load(sc->cmd_dmat, sc->cmd_map, &sc->cmd,
1301             sizeof (struct ipw_cmd), ipw_dma_map_addr, &physaddr, 0);
1302         if (error != 0) {
1303                 if_printf(&sc->sc_ic.ic_if,
1304                           "could not map command DMA memory\n");
1305                 return error;
1306         }
1307
1308         sc->cmd.type = htole32(type);
1309         sc->cmd.subtype = htole32(0);
1310         sc->cmd.len = htole32(len);
1311         sc->cmd.seq = htole32(0);
1312         if (data != NULL)
1313                 bcopy(data, sc->cmd.data, len);
1314
1315         sbd->type = IPW_SBD_TYPE_COMMAND;
1316         sbd->bd->physaddr = htole32(physaddr);
1317         sbd->bd->len = htole32(sizeof (struct ipw_cmd));
1318         sbd->bd->nfrag = 1;
1319         sbd->bd->flags = IPW_BD_FLAG_TX_FRAME_COMMAND |
1320                          IPW_BD_FLAG_TX_LAST_FRAGMENT;
1321
1322         bus_dmamap_sync(sc->cmd_dmat, sc->cmd_map, BUS_DMASYNC_PREWRITE);
1323         bus_dmamap_sync(sc->tbd_dmat, sc->tbd_map, BUS_DMASYNC_PREWRITE);
1324
1325         /* kick firmware */
1326         sc->txcur = (sc->txcur + 1) % IPW_NTBD;
1327         sc->txfree--;
1328         CSR_WRITE_4(sc, IPW_CSR_TX_WRITE_INDEX, sc->txcur);
1329
1330         /*
1331          * This is kinda messy.  Since we may be MP, a combination of
1332          * a critical section for a local cpu interrupt and
1333          * tsleep_interlock() for a remote cpu interrupt is required to
1334          * avoid command completion racing the tsleep.
1335          */
1336         crit_enter();
1337         tsleep_interlock(sc);
1338         CSR_WRITE_4(sc, IPW_CSR_TX_WRITE_INDEX, sc->txcur);
1339         lwkt_serialize_exit(ifp->if_serializer);
1340         error = tsleep(sc, 0, "ipwcmd", hz);
1341         crit_exit();
1342         lwkt_serialize_enter(ifp->if_serializer);
1343         return (error);
1344 }
1345
1346 static int
1347 ipw_tx_start(struct ifnet *ifp, struct mbuf *m0, struct ieee80211_node *ni)
1348 {
1349         struct ipw_softc *sc = ifp->if_softc;
1350         struct ieee80211com *ic = &sc->sc_ic;
1351         struct ieee80211_frame *wh;
1352         struct ipw_dma_mapping map;
1353         struct ipw_soft_bd *sbd;
1354         struct ipw_soft_hdr *shdr;
1355         struct ipw_soft_buf *sbuf;
1356         struct mbuf *mnew;
1357         bus_addr_t physaddr;
1358         int error, i;
1359
1360         wh = mtod(m0, struct ieee80211_frame *);
1361         if (wh->i_fc[1] & IEEE80211_FC1_WEP) {
1362                 if (ieee80211_crypto_encap(ic, ni, m0) == NULL) {
1363                         m_freem(m0);
1364                         return ENOBUFS;
1365                 }
1366
1367                 /* packet header may have moved, reset our local pointer */
1368                 wh = mtod(m0, struct ieee80211_frame *);
1369         }
1370
1371         if (sc->sc_drvbpf != NULL) {
1372                 struct ipw_tx_radiotap_header *tap = &sc->sc_txtap;
1373
1374                 tap->wt_flags = 0;
1375                 tap->wt_chan_freq = htole16(ic->ic_ibss_chan->ic_freq);
1376                 tap->wt_chan_flags = htole16(ic->ic_ibss_chan->ic_flags);
1377
1378                 bpf_ptap(sc->sc_drvbpf, m0, tap, sc->sc_txtap_len);
1379         }
1380
1381         shdr = SLIST_FIRST(&sc->free_shdr);
1382         sbuf = SLIST_FIRST(&sc->free_sbuf);
1383         KASSERT(shdr != NULL && sbuf != NULL, ("empty sw hdr/buf pool"));
1384
1385         shdr->hdr.type = htole32(IPW_HDR_TYPE_SEND);
1386         shdr->hdr.subtype = htole32(0);
1387         shdr->hdr.encrypted = (wh->i_fc[1] & IEEE80211_FC1_WEP) ? 1 : 0;
1388         shdr->hdr.encrypt = 0;
1389         shdr->hdr.keyidx = 0;
1390         shdr->hdr.keysz = 0;
1391         shdr->hdr.fragmentsz = htole16(0);
1392         IEEE80211_ADDR_COPY(shdr->hdr.src_addr, wh->i_addr2);
1393         if (ic->ic_opmode == IEEE80211_M_STA)
1394                 IEEE80211_ADDR_COPY(shdr->hdr.dst_addr, wh->i_addr3);
1395         else
1396                 IEEE80211_ADDR_COPY(shdr->hdr.dst_addr, wh->i_addr1);
1397
1398         /* trim IEEE802.11 header */
1399         m_adj(m0, sizeof (struct ieee80211_frame));
1400
1401         error = bus_dmamap_load_mbuf(sc->txbuf_dmat, sbuf->map, m0,
1402             ipw_dma_map_txbuf, &map, 0);
1403         if (error != 0 && error != EFBIG) {
1404                 if_printf(ifp, "could not map mbuf (error %d)\n", error);
1405                 m_freem(m0);
1406                 return error;
1407         }
1408         if (error != 0) {
1409                 mnew = m_defrag(m0, MB_DONTWAIT);
1410                 if (mnew == NULL) {
1411                         if_printf(ifp, "could not defragment mbuf\n");
1412                         m_freem(m0);
1413                         return ENOBUFS;
1414                 }
1415                 m0 = mnew;
1416
1417                 error = bus_dmamap_load_mbuf(sc->txbuf_dmat, sbuf->map, m0,
1418                     ipw_dma_map_txbuf, &map, 0);
1419                 if (error != 0) {
1420                         if_printf(ifp,
1421                                   "could not map mbuf (error %d)\n", error);
1422                         m_freem(m0);
1423                         return error;
1424                 }
1425         }
1426
1427         error = bus_dmamap_load(sc->hdr_dmat, shdr->map, &shdr->hdr,
1428             sizeof (struct ipw_hdr), ipw_dma_map_addr, &physaddr, 0);
1429         if (error != 0) {
1430                 if_printf(ifp, "could not map header DMA memory\n");
1431                 bus_dmamap_unload(sc->txbuf_dmat, sbuf->map);
1432                 m_freem(m0);
1433                 return error;
1434         }
1435
1436         SLIST_REMOVE_HEAD(&sc->free_sbuf, next);
1437         SLIST_REMOVE_HEAD(&sc->free_shdr, next);
1438
1439         sbd = &sc->stbd_list[sc->txcur];
1440         sbd->type = IPW_SBD_TYPE_HEADER;
1441         sbd->priv = shdr;
1442         sbd->bd->physaddr = htole32(physaddr);
1443         sbd->bd->len = htole32(sizeof (struct ipw_hdr));
1444         sbd->bd->nfrag = 1 + map.nseg;
1445         sbd->bd->flags = IPW_BD_FLAG_TX_FRAME_802_3 |
1446                          IPW_BD_FLAG_TX_NOT_LAST_FRAGMENT;
1447
1448         DPRINTFN(5, ("TX!HDR!%u!%u!%u!%u!%6D!%6D\n", shdr->hdr.type,
1449             shdr->hdr.subtype, shdr->hdr.encrypted, shdr->hdr.encrypt,
1450             shdr->hdr.src_addr, ":", shdr->hdr.dst_addr, ":"));
1451         sc->txcur = (sc->txcur + 1) % IPW_NTBD;
1452         sc->txfree--;
1453
1454         sbuf->m = m0;
1455         sbuf->ni = ni;
1456
1457         for (i = 0; i < map.nseg; i++) {
1458                 sbd = &sc->stbd_list[sc->txcur];
1459
1460                 sbd->bd->physaddr = htole32(map.segs[i].ds_addr);
1461                 sbd->bd->len = htole32(map.segs[i].ds_len);
1462                 sbd->bd->nfrag = 0; /* used only in first bd */
1463                 sbd->bd->flags = IPW_BD_FLAG_TX_FRAME_802_3;
1464                 if (i == map.nseg - 1) {
1465                         sbd->type = IPW_SBD_TYPE_DATA;
1466                         sbd->priv = sbuf;
1467                         sbd->bd->flags |= IPW_BD_FLAG_TX_LAST_FRAGMENT;
1468                 } else {
1469                         sbd->type = IPW_SBD_TYPE_NOASSOC;
1470                         sbd->bd->flags |= IPW_BD_FLAG_TX_NOT_LAST_FRAGMENT;
1471                 }
1472
1473                 DPRINTFN(5, ("TX!FRAG!%d!%d\n", i, map.segs[i].ds_len));
1474                 sc->txcur = (sc->txcur + 1) % IPW_NTBD;
1475                 sc->txfree--;
1476         }
1477
1478         bus_dmamap_sync(sc->hdr_dmat, shdr->map, BUS_DMASYNC_PREWRITE);
1479         bus_dmamap_sync(sc->txbuf_dmat, sbuf->map, BUS_DMASYNC_PREWRITE);
1480         bus_dmamap_sync(sc->tbd_dmat, sc->tbd_map, BUS_DMASYNC_PREWRITE);
1481
1482         /* Inform firmware about this new packet */
1483         CSR_WRITE_4(sc, IPW_CSR_TX_WRITE_INDEX, sc->txcur);
1484
1485         return 0;
1486 }
1487
1488 static void
1489 ipw_start(struct ifnet *ifp)
1490 {
1491         struct ipw_softc *sc = ifp->if_softc;
1492         struct ieee80211com *ic = &sc->sc_ic;
1493         struct mbuf *m0;
1494         struct ieee80211_node *ni;
1495
1496         if (ic->ic_state != IEEE80211_S_RUN) {
1497                 return;
1498         }
1499
1500         for (;;) {
1501                 struct ether_header *eh;
1502
1503                 m0 = ifq_poll(&ifp->if_snd);
1504                 if (m0 == NULL)
1505                         break;
1506                 if (sc->txfree < 1 + IPW_MAX_NSEG) {
1507                         ifp->if_flags |= IFF_OACTIVE;
1508                         break;
1509                 }
1510                 ifq_dequeue(&ifp->if_snd, m0);
1511
1512                 if (m0->m_len < sizeof (struct ether_header) &&
1513                     (m0 = m_pullup(m0, sizeof (struct ether_header))) == NULL)
1514                         continue;
1515
1516                 eh = mtod(m0, struct ether_header *);
1517                 ni = ieee80211_find_txnode(ic, eh->ether_dhost);
1518                 if (ni == NULL) {
1519                         m_freem(m0);
1520                         continue;
1521                 }
1522
1523                 BPF_MTAP(ifp, m0);
1524
1525                 m0 = ieee80211_encap(ic, m0, ni);
1526                 if (m0 == NULL) {
1527                         ieee80211_free_node(ni);
1528                         continue;
1529                 }
1530
1531                 if (ic->ic_rawbpf != NULL)
1532                         bpf_mtap(ic->ic_rawbpf, m0);
1533
1534                 if (ipw_tx_start(ifp, m0, ni) != 0) {
1535                         ieee80211_free_node(ni);
1536                         ifp->if_oerrors++;
1537                         break;
1538                 }
1539
1540                 /* start watchdog timer */
1541                 sc->sc_tx_timer = 5;
1542                 ifp->if_timer = 1;
1543         }
1544 }
1545
1546 static void
1547 ipw_watchdog(struct ifnet *ifp)
1548 {
1549         struct ipw_softc *sc = ifp->if_softc;
1550
1551         ifp->if_timer = 0;
1552
1553         if (sc->sc_tx_timer > 0) {
1554                 if (--sc->sc_tx_timer == 0) {
1555                         if_printf(ifp, "device timeout\n");
1556                         ifp->if_oerrors++;
1557                         ifp->if_flags &= ~IFF_UP;
1558                         ipw_stop(sc);
1559                         return;
1560                 }
1561                 ifp->if_timer = 1;
1562         }
1563
1564         ieee80211_watchdog(&sc->sc_ic);
1565 }
1566
1567 static int
1568 ipw_ioctl(struct ifnet *ifp, u_long cmd, caddr_t data, struct ucred *cr)
1569 {
1570         struct ipw_softc *sc = ifp->if_softc;
1571         struct ieee80211com *ic = &sc->sc_ic;
1572         struct ifreq *ifr;
1573         int error = 0;
1574
1575         switch (cmd) {
1576         case SIOCSIFFLAGS:
1577                 if (ifp->if_flags & IFF_UP) {
1578                         if (!(ifp->if_flags & IFF_RUNNING))
1579                                 ipw_init(sc);
1580                 } else {
1581                         if (ifp->if_flags & IFF_RUNNING)
1582                                 ipw_stop(sc);
1583                 }
1584                 break;
1585
1586         case SIOCSLOADFW:
1587                 /* only super-user can do that! */
1588                 if ((error = suser(curthread)) != 0)
1589                         break;
1590
1591                 ifr = (struct ifreq *)data;
1592                 error = ipw_cache_firmware(sc, ifr->ifr_data);
1593                 break;
1594
1595         case SIOCSKILLFW:
1596                 /* only super-user can do that! */
1597                 if ((error = suser(curthread)) != 0)
1598                         break;
1599
1600                 ifp->if_flags &= ~IFF_UP;
1601                 ipw_stop(sc);
1602                 ipw_free_firmware(sc);
1603                 break;
1604
1605         default:
1606                 error = ieee80211_ioctl(ic, cmd, data, cr);
1607         }
1608
1609         if (error == ENETRESET) {
1610                 if ((ifp->if_flags & (IFF_UP | IFF_RUNNING)) ==
1611                     (IFF_UP | IFF_RUNNING))
1612                         ipw_init(sc);
1613                 error = 0;
1614         }
1615
1616         return error;
1617 }
1618
1619 static void
1620 ipw_stop_master(struct ipw_softc *sc)
1621 {
1622         int ntries;
1623
1624         /* Disable interrupts */
1625         CSR_WRITE_4(sc, IPW_CSR_INTR_MASK, 0);
1626
1627         CSR_WRITE_4(sc, IPW_CSR_RST, IPW_RST_STOP_MASTER);
1628         for (ntries = 0; ntries < 50; ntries++) {
1629                 if (CSR_READ_4(sc, IPW_CSR_RST) & IPW_RST_MASTER_DISABLED)
1630                         break;
1631                 DELAY(10);
1632         }
1633         if (ntries == 50)
1634                 if_printf(&sc->sc_ic.ic_if, "timeout waiting for master\n");
1635
1636         CSR_WRITE_4(sc, IPW_CSR_RST, CSR_READ_4(sc, IPW_CSR_RST) |
1637             IPW_RST_PRINCETON_RESET);
1638
1639         sc->flags &= ~IPW_FLAG_FW_INITED;
1640 }
1641
1642 static int
1643 ipw_reset(struct ipw_softc *sc)
1644 {
1645         int ntries;
1646
1647         ipw_stop_master(sc);
1648
1649         /* Move adapter to D0 state */
1650         CSR_WRITE_4(sc, IPW_CSR_CTL, CSR_READ_4(sc, IPW_CSR_CTL) |
1651             IPW_CTL_INIT);
1652
1653         /* Wait for clock stabilization */
1654         for (ntries = 0; ntries < 1000; ntries++) {
1655                 if (CSR_READ_4(sc, IPW_CSR_CTL) & IPW_CTL_CLOCK_READY)
1656                         break;
1657                 DELAY(200);
1658         }
1659         if (ntries == 1000)
1660                 return EIO;
1661
1662         CSR_WRITE_4(sc, IPW_CSR_RST, CSR_READ_4(sc, IPW_CSR_RST) |
1663             IPW_RST_SW_RESET);
1664
1665         DELAY(10);
1666
1667         CSR_WRITE_4(sc, IPW_CSR_CTL, CSR_READ_4(sc, IPW_CSR_CTL) |
1668             IPW_CTL_INIT);
1669
1670         return 0;
1671 }
1672
1673 static int
1674 ipw_load_ucode(struct ipw_softc *sc, u_char *uc, int size)
1675 {
1676         int ntries;
1677
1678         MEM_WRITE_4(sc, 0x3000e0, 0x80000000);
1679         CSR_WRITE_4(sc, IPW_CSR_RST, 0);
1680
1681         MEM_WRITE_2(sc, 0x220000, 0x0703);
1682         MEM_WRITE_2(sc, 0x220000, 0x0707);
1683
1684         MEM_WRITE_1(sc, 0x210014, 0x72);
1685         MEM_WRITE_1(sc, 0x210014, 0x72);
1686
1687         MEM_WRITE_1(sc, 0x210000, 0x40);
1688         MEM_WRITE_1(sc, 0x210000, 0x00);
1689         MEM_WRITE_1(sc, 0x210000, 0x40);
1690
1691         MEM_WRITE_MULTI_1(sc, 0x210010, uc, size);
1692
1693         MEM_WRITE_1(sc, 0x210000, 0x00);
1694         MEM_WRITE_1(sc, 0x210000, 0x00);
1695         MEM_WRITE_1(sc, 0x210000, 0x80);
1696
1697         MEM_WRITE_2(sc, 0x220000, 0x0703);
1698         MEM_WRITE_2(sc, 0x220000, 0x0707);
1699
1700         MEM_WRITE_1(sc, 0x210014, 0x72);
1701         MEM_WRITE_1(sc, 0x210014, 0x72);
1702
1703         MEM_WRITE_1(sc, 0x210000, 0x00);
1704         MEM_WRITE_1(sc, 0x210000, 0x80);
1705
1706         for (ntries = 0; ntries < 100; ntries++) {
1707                 if (MEM_READ_1(sc, 0x210000) & 1)
1708                         break;
1709                 DELAY(1000);
1710         }
1711         if (ntries == 100) {
1712                 if_printf(&sc->sc_ic.ic_if,
1713                           "timeout waiting for ucode to initialize\n");
1714                 return EIO;
1715         }
1716
1717         MEM_WRITE_4(sc, 0x3000e0, 0);
1718
1719         return 0;
1720 }
1721
1722 /* set of macros to handle unaligned little endian data in firmware image */
1723 #define GETLE32(p) ((p)[0] | (p)[1] << 8 | (p)[2] << 16 | (p)[3] << 24)
1724 #define GETLE16(p) ((p)[0] | (p)[1] << 8)
1725 static int
1726 ipw_load_firmware(struct ipw_softc *sc, u_char *fw, int size)
1727 {
1728         struct ifnet *ifp = &sc->sc_ic.ic_if;
1729         u_char *p, *end;
1730         u_int32_t dst;
1731         u_int16_t len;
1732         int error;
1733
1734         p = fw;
1735         end = fw + size;
1736         while (p < end) {
1737                 if (p + 6 > end)
1738                         return EINVAL;
1739
1740                 dst = GETLE32(p); p += 4;
1741                 len = GETLE16(p); p += 2;
1742
1743                 if (p + len > end)
1744                         return EINVAL;
1745
1746                 ipw_write_mem_1(sc, dst, p, len);
1747                 p += len;
1748         }
1749
1750         CSR_WRITE_4(sc, IPW_CSR_IO, IPW_IO_GPIO1_ENABLE | IPW_IO_GPIO3_MASK |
1751             IPW_IO_LED_OFF);
1752
1753         /* Allow interrupts so we know when the firmware is inited */
1754         CSR_WRITE_4(sc, IPW_CSR_INTR_MASK, IPW_INTR_MASK);
1755
1756         /*
1757          * Tell the adapter to initialize the firmware.
1758          *
1759          * This is kinda messy.  Since we may be MP, a combination of
1760          * a critical section for a local cpu interrupt and
1761          * tsleep_interlock() for a remote cpu interrupt is required to
1762          * avoid command completion racing the tsleep.
1763          */
1764         crit_enter();
1765         CSR_WRITE_4(sc, IPW_CSR_RST, 0);
1766         CSR_WRITE_4(sc, IPW_CSR_CTL, CSR_READ_4(sc, IPW_CSR_CTL) |
1767             IPW_CTL_ALLOW_STANDBY);
1768
1769         tsleep_interlock(sc);
1770         lwkt_serialize_exit(ifp->if_serializer);
1771         error = tsleep(sc, 0, "ipwinit", hz);
1772         crit_exit();
1773         lwkt_serialize_enter(ifp->if_serializer);
1774         if (error) {
1775                 if_printf(&sc->sc_ic.ic_if, "timeout waiting for firmware "
1776                     "initialization to complete\n");
1777                 return error;
1778         }
1779
1780         CSR_WRITE_4(sc, IPW_CSR_IO, CSR_READ_4(sc, IPW_CSR_IO) |
1781             IPW_IO_GPIO1_MASK | IPW_IO_GPIO3_MASK);
1782
1783         return 0;
1784 }
1785
1786 /*
1787  * Store firmware into kernel memory so we can download it when we need to,
1788  * e.g when the adapter wakes up from suspend mode.
1789  */
1790 static int
1791 ipw_cache_firmware(struct ipw_softc *sc, void *data)
1792 {
1793         struct ipw_firmware *fw = &sc->fw;
1794         struct ipw_firmware_hdr hdr;
1795         u_char *p = data;
1796         int error;
1797
1798         ipw_free_firmware(sc);
1799
1800         /*
1801          * mutex(9): no mutexes should be held across functions which access
1802          * memory in userspace, such as copyin(9) [...]
1803          */
1804
1805         if ((error = copyin(data, &hdr, sizeof hdr)) != 0)
1806                 goto fail1;
1807
1808         fw->main_size  = le32toh(hdr.main_size);
1809         fw->ucode_size = le32toh(hdr.ucode_size);
1810         p += sizeof hdr;
1811
1812         fw->main = kmalloc(fw->main_size, M_DEVBUF, M_WAITOK);
1813         if (fw->main == NULL) {
1814                 error = ENOMEM;
1815                 goto fail1;
1816         }
1817
1818         fw->ucode = kmalloc(fw->ucode_size, M_DEVBUF, M_WAITOK);
1819         if (fw->ucode == NULL) {
1820                 error = ENOMEM;
1821                 goto fail2;
1822         }
1823
1824         if ((error = copyin(p, fw->main, fw->main_size)) != 0)
1825                 goto fail3;
1826
1827         p += fw->main_size;
1828         if ((error = copyin(p, fw->ucode, fw->ucode_size)) != 0)
1829                 goto fail3;
1830
1831         DPRINTF(("Firmware cached: main %u, ucode %u\n", fw->main_size,
1832             fw->ucode_size));
1833
1834         sc->flags |= IPW_FLAG_FW_CACHED;
1835
1836         return 0;
1837
1838 fail3:  kfree(fw->ucode, M_DEVBUF);
1839 fail2:  kfree(fw->main, M_DEVBUF);
1840 fail1:
1841
1842         return error;
1843 }
1844
1845 static void
1846 ipw_free_firmware(struct ipw_softc *sc)
1847 {
1848         if (!(sc->flags & IPW_FLAG_FW_CACHED))
1849                 return;
1850
1851         kfree(sc->fw.main, M_DEVBUF);
1852         kfree(sc->fw.ucode, M_DEVBUF);
1853
1854         sc->flags &= ~IPW_FLAG_FW_CACHED;
1855 }
1856
1857 static int
1858 ipw_config(struct ipw_softc *sc)
1859 {
1860         struct ieee80211com *ic = &sc->sc_ic;
1861         struct ifnet *ifp = &ic->ic_if;
1862         struct ipw_security security;
1863         struct ieee80211_key *k;
1864         struct ipw_wep_key wepkey;
1865         struct ipw_scan_options options;
1866         struct ipw_configuration config;
1867         u_int32_t data;
1868         int error, i;
1869
1870         switch (ic->ic_opmode) {
1871         case IEEE80211_M_STA:
1872         case IEEE80211_M_HOSTAP:
1873                 data = htole32(IPW_MODE_BSS);
1874                 break;
1875
1876         case IEEE80211_M_IBSS:
1877         case IEEE80211_M_AHDEMO:
1878                 data = htole32(IPW_MODE_IBSS);
1879                 break;
1880
1881         case IEEE80211_M_MONITOR:
1882                 data = htole32(IPW_MODE_MONITOR);
1883                 break;
1884         }
1885         DPRINTF(("Setting mode to %u\n", le32toh(data)));
1886         error = ipw_cmd(sc, IPW_CMD_SET_MODE, &data, sizeof data);
1887         if (error != 0)
1888                 return error;
1889
1890         if (ic->ic_opmode == IEEE80211_M_IBSS ||
1891             ic->ic_opmode == IEEE80211_M_MONITOR) {
1892                 data = htole32(ieee80211_chan2ieee(ic, ic->ic_ibss_chan));
1893                 DPRINTF(("Setting channel to %u\n", le32toh(data)));
1894                 error = ipw_cmd(sc, IPW_CMD_SET_CHANNEL, &data, sizeof data);
1895                 if (error != 0)
1896                         return error;
1897         }
1898
1899         if (ic->ic_opmode == IEEE80211_M_MONITOR) {
1900                 DPRINTF(("Enabling adapter\n"));
1901                 return ipw_cmd(sc, IPW_CMD_ENABLE, NULL, 0);
1902         }
1903
1904         IEEE80211_ADDR_COPY(((struct arpcom *)ifp)->ac_enaddr, ic->ic_myaddr);
1905         IEEE80211_ADDR_COPY(IF_LLADDR(ifp), ic->ic_myaddr);
1906         DPRINTF(("Setting MAC address to %6D\n", ic->ic_myaddr, ":"));
1907         error = ipw_cmd(sc, IPW_CMD_SET_MAC_ADDRESS, ic->ic_myaddr,
1908             IEEE80211_ADDR_LEN);
1909         if (error != 0)
1910                 return error;
1911
1912         config.flags = htole32(IPW_CFG_BSS_MASK | IPW_CFG_IBSS_MASK |
1913             IPW_CFG_PREAMBLE_AUTO | IPW_CFG_802_1x_ENABLE);
1914         if (ic->ic_opmode == IEEE80211_M_IBSS)
1915                 config.flags |= htole32(IPW_CFG_IBSS_AUTO_START);
1916         if (ifp->if_flags & IFF_PROMISC)
1917                 config.flags |= htole32(IPW_CFG_PROMISCUOUS);
1918         config.bss_chan = htole32(0x3fff); /* channels 1-14 */
1919         config.ibss_chan = htole32(0x7ff); /* channels 1-11 */
1920         DPRINTF(("Setting configuration to 0x%x\n", le32toh(config.flags)));
1921         error = ipw_cmd(sc, IPW_CMD_SET_CONFIGURATION, &config, sizeof config);
1922         if (error != 0)
1923                 return error;
1924
1925         data = htole32(0x3); /* 1, 2 */
1926         DPRINTF(("Setting basic tx rates to 0x%x\n", le32toh(data)));
1927         error = ipw_cmd(sc, IPW_CMD_SET_BASIC_TX_RATES, &data, sizeof data);
1928         if (error != 0)
1929                 return error;
1930
1931         data = htole32(0xf); /* 1, 2, 5.5, 11 */
1932         DPRINTF(("Setting tx rates to 0x%x\n", le32toh(data)));
1933         error = ipw_cmd(sc, IPW_CMD_SET_TX_RATES, &data, sizeof data);
1934         if (error != 0)
1935                 return error;
1936
1937         data = htole32(IPW_POWER_MODE_CAM);
1938         DPRINTF(("Setting power mode to %u\n", le32toh(data)));
1939         error = ipw_cmd(sc, IPW_CMD_SET_POWER_MODE, &data, sizeof data);
1940         if (error != 0)
1941                 return error;
1942
1943         if (ic->ic_opmode == IEEE80211_M_IBSS) {
1944                 data = htole32(32); /* default value */
1945                 DPRINTF(("Setting tx power index to %u\n", le32toh(data)));
1946                 error = ipw_cmd(sc, IPW_CMD_SET_TX_POWER_INDEX, &data,
1947                     sizeof data);
1948                 if (error != 0)
1949                         return error;
1950         }
1951
1952         data = htole32(ic->ic_rtsthreshold);
1953         DPRINTF(("Setting RTS threshold to %u\n", le32toh(data)));
1954         error = ipw_cmd(sc, IPW_CMD_SET_RTS_THRESHOLD, &data, sizeof data);
1955         if (error != 0)
1956                 return error;
1957
1958         data = htole32(ic->ic_fragthreshold);
1959         DPRINTF(("Setting frag threshold to %u\n", le32toh(data)));
1960         error = ipw_cmd(sc, IPW_CMD_SET_FRAG_THRESHOLD, &data, sizeof data);
1961         if (error != 0)
1962                 return error;
1963
1964 #ifdef IPW_DEBUG
1965         if (ipw_debug > 0) {
1966                 printf("Setting ESSID to ");
1967                 ieee80211_print_essid(ic->ic_des_essid, ic->ic_des_esslen);
1968                 printf("\n");
1969         }
1970 #endif
1971         error = ipw_cmd(sc, IPW_CMD_SET_ESSID, ic->ic_des_essid,
1972             ic->ic_des_esslen);
1973         if (error != 0)
1974                 return error;
1975
1976         /* no mandatory BSSID */
1977         DPRINTF(("Setting mandatory BSSID to null\n"));
1978         error = ipw_cmd(sc, IPW_CMD_SET_MANDATORY_BSSID, NULL, 0);
1979         if (error != 0)
1980                 return error;
1981
1982         if (ic->ic_flags & IEEE80211_F_DESBSSID) {
1983                 DPRINTF(("Setting desired BSSID to %6D\n", ic->ic_des_bssid,
1984                     ":"));
1985                 error = ipw_cmd(sc, IPW_CMD_SET_DESIRED_BSSID,
1986                     ic->ic_des_bssid, IEEE80211_ADDR_LEN);
1987                 if (error != 0)
1988                         return error;
1989         }
1990
1991         bzero(&security, sizeof security);
1992         security.authmode = (ic->ic_bss->ni_authmode == IEEE80211_AUTH_SHARED) ?
1993             IPW_AUTH_SHARED : IPW_AUTH_OPEN;
1994         security.ciphers = htole32(IPW_CIPHER_NONE);
1995         DPRINTF(("Setting authmode to %u\n", security.authmode));
1996         error = ipw_cmd(sc, IPW_CMD_SET_SECURITY_INFORMATION, &security,
1997             sizeof security);
1998         if (error != 0)
1999                 return error;
2000
2001         if (ic->ic_flags & IEEE80211_F_PRIVACY) {
2002                 k = ic->ic_crypto.cs_nw_keys;
2003                 for (i = 0; i < IEEE80211_WEP_NKID; i++, k++) {
2004                         if (k->wk_keylen == 0)
2005                                 continue;
2006
2007                         wepkey.idx = i;
2008                         wepkey.len = k->wk_keylen;
2009                         bzero(wepkey.key, sizeof wepkey.key);
2010                         bcopy(k->wk_key, wepkey.key, k->wk_keylen);
2011                         DPRINTF(("Setting wep key index %u len %u\n",
2012                             wepkey.idx, wepkey.len));
2013                         error = ipw_cmd(sc, IPW_CMD_SET_WEP_KEY, &wepkey,
2014                             sizeof wepkey);
2015                         if (error != 0)
2016                                 return error;
2017                 }
2018
2019                 data = htole32(ic->ic_crypto.cs_def_txkey);
2020                 DPRINTF(("Setting wep tx key index to %u\n", le32toh(data)));
2021                 error = ipw_cmd(sc, IPW_CMD_SET_WEP_KEY_INDEX, &data,
2022                     sizeof data);
2023                 if (error != 0)
2024                         return error;
2025         }
2026
2027         data = htole32((ic->ic_flags & IEEE80211_F_PRIVACY) ? IPW_WEPON : 0);
2028         DPRINTF(("Setting wep flags to 0x%x\n", le32toh(data)));
2029         error = ipw_cmd(sc, IPW_CMD_SET_WEP_FLAGS, &data, sizeof data);
2030         if (error != 0)
2031                 return error;
2032
2033 #if 0
2034         struct ipw_wpa_ie ie;
2035
2036         memset(&ie, 0, sizeof ie);
2037         ie.len = htole32(sizeof (struct ieee80211_ie_wpa));
2038         DPRINTF(("Setting wpa ie\n"));
2039         error = ipw_cmd(sc, IPW_CMD_SET_WPA_IE, &ie, sizeof ie);
2040         if (error != 0)
2041                 return error;
2042 #endif
2043
2044         if (ic->ic_opmode == IEEE80211_M_IBSS ||
2045             ic->ic_opmode == IEEE80211_M_HOSTAP) {
2046                 data = htole32(ic->ic_bintval);
2047                 DPRINTF(("Setting beacon interval to %u\n", le32toh(data)));
2048                 error = ipw_cmd(sc, IPW_CMD_SET_BEACON_INTERVAL, &data,
2049                     sizeof data);
2050                 if (error != 0)
2051                         return error;
2052         }
2053
2054         options.flags = htole32(0);
2055         options.channels = htole32(0x3fff); /* scan channels 1-14 */
2056         DPRINTF(("Setting scan options to 0x%x\n", le32toh(options.flags)));
2057         error = ipw_cmd(sc, IPW_CMD_SET_SCAN_OPTIONS, &options, sizeof options);
2058         if (error != 0)
2059                 return error;
2060
2061         /* finally, enable adapter (start scanning for an access point) */
2062         DPRINTF(("Enabling adapter\n"));
2063         return ipw_cmd(sc, IPW_CMD_ENABLE, NULL, 0);
2064 }
2065
2066 static void
2067 ipw_init(void *priv)
2068 {
2069         struct ipw_softc *sc = priv;
2070         struct ieee80211com *ic = &sc->sc_ic;
2071         struct ifnet *ifp = &ic->ic_if;
2072         struct ipw_firmware *fw = &sc->fw;
2073
2074         /* exit immediately if firmware has not been ioctl'd */
2075         if (!(sc->flags & IPW_FLAG_FW_CACHED)) {
2076                 if (!(sc->flags & IPW_FLAG_FW_WARNED))
2077                         if_printf(ifp, "Please load firmware\n");
2078                 sc->flags |= IPW_FLAG_FW_WARNED;
2079                 ifp->if_flags &= ~IFF_UP;
2080                 return;
2081         }
2082
2083         ipw_stop(sc);
2084
2085         if (ipw_reset(sc) != 0) {
2086                 if_printf(ifp, "could not reset adapter\n");
2087                 goto fail;
2088         }
2089
2090         if (ipw_load_ucode(sc, fw->ucode, fw->ucode_size) != 0) {
2091                 if_printf(ifp, "could not load microcode\n");
2092                 goto fail;
2093         }
2094
2095         ipw_stop_master(sc);
2096
2097         /*
2098          * Setup tx, rx and status rings
2099          */
2100         CSR_WRITE_4(sc, IPW_CSR_TX_BD_BASE, sc->tbd_phys);
2101         CSR_WRITE_4(sc, IPW_CSR_TX_BD_SIZE, IPW_NTBD);
2102         CSR_WRITE_4(sc, IPW_CSR_TX_READ_INDEX, 0);
2103         CSR_WRITE_4(sc, IPW_CSR_TX_WRITE_INDEX, 0);
2104         sc->txold = IPW_NTBD - 1; /* latest bd index ack'ed by firmware */
2105         sc->txcur = 0; /* bd index to write to */
2106         sc->txfree = IPW_NTBD - 2;
2107
2108         CSR_WRITE_4(sc, IPW_CSR_RX_BD_BASE, sc->rbd_phys);
2109         CSR_WRITE_4(sc, IPW_CSR_RX_BD_SIZE, IPW_NRBD);
2110         CSR_WRITE_4(sc, IPW_CSR_RX_READ_INDEX, 0);
2111         CSR_WRITE_4(sc, IPW_CSR_RX_WRITE_INDEX, IPW_NRBD - 1);
2112         sc->rxcur = IPW_NRBD - 1; /* latest bd index I've read */
2113
2114         CSR_WRITE_4(sc, IPW_CSR_RX_STATUS_BASE, sc->status_phys);
2115
2116         if (ipw_load_firmware(sc, fw->main, fw->main_size) != 0) {
2117                 if_printf(ifp, "could not load firmware\n");
2118                 goto fail;
2119         }
2120
2121         sc->flags |= IPW_FLAG_FW_INITED;
2122
2123         /* Retrieve information tables base addresses */
2124         sc->table1_base = CSR_READ_4(sc, IPW_CSR_TABLE1_BASE);
2125         sc->table2_base = CSR_READ_4(sc, IPW_CSR_TABLE2_BASE);
2126
2127         ipw_write_table1(sc, IPW_INFO_LOCK, 0);
2128
2129         if (ipw_config(sc) != 0) {
2130                 if_printf(ifp, "device configuration failed\n");
2131                 goto fail;
2132         }
2133
2134         ifp->if_flags &= ~IFF_OACTIVE;
2135         ifp->if_flags |= IFF_RUNNING;
2136
2137         return;
2138
2139 fail:   ifp->if_flags &= ~IFF_UP;
2140         ipw_stop(sc);
2141 }
2142
2143 static void
2144 ipw_stop(void *priv)
2145 {
2146         struct ipw_softc *sc = priv;
2147         struct ieee80211com *ic = &sc->sc_ic;
2148         struct ifnet *ifp = &ic->ic_if;
2149         int i;
2150
2151         ipw_stop_master(sc);
2152         CSR_WRITE_4(sc, IPW_CSR_RST, IPW_RST_SW_RESET);
2153
2154         /*
2155          * Release tx buffers
2156          */
2157         for (i = 0; i < IPW_NTBD; i++)
2158                 ipw_release_sbd(sc, &sc->stbd_list[i]);
2159
2160         sc->sc_tx_timer = 0;
2161         ifp->if_timer = 0;
2162         ifp->if_flags &= ~(IFF_RUNNING | IFF_OACTIVE);
2163
2164         ieee80211_new_state(ic, IEEE80211_S_INIT, -1);
2165 }
2166
2167 static int
2168 ipw_sysctl_stats(SYSCTL_HANDLER_ARGS)
2169 {
2170         struct ipw_softc *sc = arg1;
2171         struct ifnet *ifp = &sc->sc_ic.ic_if;
2172         u_int32_t i, size, buf[256];
2173
2174         (void)arg2; /* silence WARNS == 6 */
2175         (void)oidp; /* silence WARNS == 6 */
2176
2177         lwkt_serialize_enter(ifp->if_serializer);
2178
2179         if (!(sc->flags & IPW_FLAG_FW_INITED)) {
2180                 bzero(buf, sizeof buf);
2181                 goto back;
2182         }
2183
2184         CSR_WRITE_4(sc, IPW_CSR_AUTOINC_ADDR, sc->table1_base);
2185
2186         size = min(CSR_READ_4(sc, IPW_CSR_AUTOINC_DATA), 256);
2187         for (i = 1; i < size; i++)
2188                 buf[i] = MEM_READ_4(sc, CSR_READ_4(sc, IPW_CSR_AUTOINC_DATA));
2189 back:
2190         lwkt_serialize_exit(ifp->if_serializer);
2191         return SYSCTL_OUT(req, buf, sizeof buf);
2192 }
2193
2194 static int
2195 ipw_sysctl_radio(SYSCTL_HANDLER_ARGS)
2196 {
2197         struct ipw_softc *sc = arg1;
2198         struct ifnet *ifp = &sc->sc_ic.ic_if;
2199         int val;
2200
2201         (void)arg2; /* silence WARNS == 6 */
2202         (void)oidp; /* silence WARNS == 6 */
2203
2204         lwkt_serialize_enter(ifp->if_serializer);
2205         val = !((sc->flags & IPW_FLAG_HAS_RADIO_SWITCH) &&
2206                 (CSR_READ_4(sc, IPW_CSR_IO) & IPW_IO_RADIO_DISABLED));
2207         lwkt_serialize_exit(ifp->if_serializer);
2208
2209         return SYSCTL_OUT(req, &val, sizeof val);
2210 }
2211
2212 static u_int32_t
2213 ipw_read_table1(struct ipw_softc *sc, u_int32_t off)
2214 {
2215         return MEM_READ_4(sc, MEM_READ_4(sc, sc->table1_base + off));
2216 }
2217
2218 static void
2219 ipw_write_table1(struct ipw_softc *sc, u_int32_t off, u_int32_t info)
2220 {
2221         MEM_WRITE_4(sc, MEM_READ_4(sc, sc->table1_base + off), info);
2222 }
2223
2224 static int
2225 ipw_read_table2(struct ipw_softc *sc, u_int32_t off, void *buf, u_int32_t *len)
2226 {
2227         u_int32_t addr, info;
2228         u_int16_t count, size;
2229         u_int32_t total;
2230
2231         /* addr[4] + count[2] + size[2] */
2232         addr = MEM_READ_4(sc, sc->table2_base + off);
2233         info = MEM_READ_4(sc, sc->table2_base + off + 4);
2234
2235         count = info >> 16;
2236         size = info & 0xffff;
2237         total = count * size;
2238
2239         if (total > *len) {
2240                 *len = total;
2241                 return EINVAL;
2242         }
2243
2244         *len = total;
2245         ipw_read_mem_1(sc, addr, buf, total);
2246
2247         return 0;
2248 }
2249
2250 static void
2251 ipw_read_mem_1(struct ipw_softc *sc, bus_size_t offset, u_int8_t *datap,
2252     bus_size_t count)
2253 {
2254         for (; count > 0; offset++, datap++, count--) {
2255                 CSR_WRITE_4(sc, IPW_CSR_INDIRECT_ADDR, offset & ~3);
2256                 *datap = CSR_READ_1(sc, IPW_CSR_INDIRECT_DATA + (offset & 3));
2257         }
2258 }
2259
2260 static void
2261 ipw_write_mem_1(struct ipw_softc *sc, bus_size_t offset, u_int8_t *datap,
2262     bus_size_t count)
2263 {
2264         for (; count > 0; offset++, datap++, count--) {
2265                 CSR_WRITE_4(sc, IPW_CSR_INDIRECT_ADDR, offset & ~3);
2266                 CSR_WRITE_1(sc, IPW_CSR_INDIRECT_DATA + (offset & 3), *datap);
2267         }
2268 }