2 * Copyright 2008 Advanced Micro Devices, Inc.
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
22 * Author: Stanislaw Skowronek
24 * $FreeBSD: head/sys/dev/drm2/radeon/atom.c 254894 2013-08-26 06:31:57Z dumbbell $
30 #include "atom-names.h"
31 #include "atom-bits.h"
34 #define ATOM_COND_ABOVE 0
35 #define ATOM_COND_ABOVEOREQUAL 1
36 #define ATOM_COND_ALWAYS 2
37 #define ATOM_COND_BELOW 3
38 #define ATOM_COND_BELOWOREQUAL 4
39 #define ATOM_COND_EQUAL 5
40 #define ATOM_COND_NOTEQUAL 6
42 #define ATOM_PORT_ATI 0
43 #define ATOM_PORT_PCI 1
44 #define ATOM_PORT_SYSIO 2
46 #define ATOM_UNIT_MICROSEC 0
47 #define ATOM_UNIT_MILLISEC 1
53 struct atom_context *ctx;
58 unsigned long last_jump_jiffies;
63 static int atom_execute_table_locked(struct atom_context *ctx, int index, uint32_t * params);
65 static uint32_t atom_arg_mask[8] =
66 { 0xFFFFFFFF, 0xFFFF, 0xFFFF00, 0xFFFF0000, 0xFF, 0xFF00, 0xFF0000,
68 static int atom_arg_shift[8] = { 0, 0, 8, 16, 0, 8, 16, 24 };
70 static int atom_dst_to_src[8][4] = {
71 /* translate destination alignment field to the source alignment encoding */
81 static int atom_def_dst[8] = { 0, 0, 1, 2, 0, 1, 2, 3 };
83 static int debug_depth = 0;
85 static void debug_print_spaces(int n)
91 #define ATOM_DEBUG_PRINT(...) do if (atom_debug) { kprintf(__FILE__ __VA_ARGS__); } while (0)
92 #define ATOM_SDEBUG_PRINT(...) do if (atom_debug) { kprintf(__FILE__); debug_print_spaces(debug_depth); kprintf(__VA_ARGS__); } while (0)
94 #define ATOM_DEBUG_PRINT(...) do { } while (0)
95 #define ATOM_SDEBUG_PRINT(...) do { } while (0)
98 static uint32_t atom_iio_execute(struct atom_context *ctx, int base,
99 uint32_t index, uint32_t data)
101 struct radeon_device *rdev = ctx->card->dev->dev_private;
102 uint32_t temp = 0xCDCDCDCD;
110 temp = ctx->card->ioreg_read(ctx->card, CU16(base + 1));
114 if (rdev->family == CHIP_RV515)
115 (void)ctx->card->ioreg_read(ctx->card, CU16(base + 1));
116 ctx->card->ioreg_write(ctx->card, CU16(base + 1), temp);
121 ~((0xFFFFFFFF >> (32 - CU8(base + 1))) <<
127 (0xFFFFFFFF >> (32 - CU8(base + 1))) << CU8(base +
131 case ATOM_IIO_MOVE_INDEX:
133 ~((0xFFFFFFFF >> (32 - CU8(base + 1))) <<
136 ((index >> CU8(base + 2)) &
137 (0xFFFFFFFF >> (32 - CU8(base + 1)))) << CU8(base +
141 case ATOM_IIO_MOVE_DATA:
143 ~((0xFFFFFFFF >> (32 - CU8(base + 1))) <<
146 ((data >> CU8(base + 2)) &
147 (0xFFFFFFFF >> (32 - CU8(base + 1)))) << CU8(base +
151 case ATOM_IIO_MOVE_ATTR:
153 ~((0xFFFFFFFF >> (32 - CU8(base + 1))) <<
157 io_attr >> CU8(base + 2)) & (0xFFFFFFFF >> (32 -
168 DRM_INFO("Unknown IIO opcode.\n");
173 static uint32_t atom_get_src_int(atom_exec_context *ctx, uint8_t attr,
174 int *ptr, uint32_t *saved, int print)
176 uint32_t idx, val = 0xCDCDCDCD, align, arg;
177 struct atom_context *gctx = ctx->ctx;
179 align = (attr >> 3) & 7;
185 ATOM_DEBUG_PRINT("REG[0x%04X]", idx);
186 idx += gctx->reg_block;
187 switch (gctx->io_mode) {
189 val = gctx->card->reg_read(gctx->card, idx);
193 "PCI registers are not implemented.\n");
197 "SYSIO registers are not implemented.\n");
200 if (!(gctx->io_mode & 0x80)) {
201 DRM_INFO("Bad IO mode.\n");
204 if (!gctx->iio[gctx->io_mode & 0x7F]) {
206 "Undefined indirect IO read method %d.\n",
207 gctx->io_mode & 0x7F);
211 atom_iio_execute(gctx,
212 gctx->iio[gctx->io_mode & 0x7F],
219 /* get_unaligned_le32 avoids unaligned accesses from atombios
220 * tables, noticed on a DEC Alpha. */
221 val = get_unaligned_le32((u32 *)&ctx->ps[idx]);
223 ATOM_DEBUG_PRINT("PS[0x%02X,0x%04X]", idx, val);
229 ATOM_DEBUG_PRINT("WS[0x%02X]", idx);
231 case ATOM_WS_QUOTIENT:
232 val = gctx->divmul[0];
234 case ATOM_WS_REMAINDER:
235 val = gctx->divmul[1];
237 case ATOM_WS_DATAPTR:
238 val = gctx->data_block;
243 case ATOM_WS_OR_MASK:
244 val = 1 << gctx->shift;
246 case ATOM_WS_AND_MASK:
247 val = ~(1 << gctx->shift);
249 case ATOM_WS_FB_WINDOW:
252 case ATOM_WS_ATTRIBUTES:
256 val = gctx->reg_block;
266 if (gctx->data_block)
267 ATOM_DEBUG_PRINT("ID[0x%04X+%04X]", idx, gctx->data_block);
269 ATOM_DEBUG_PRINT("ID[0x%04X]", idx);
271 val = U32(idx + gctx->data_block);
276 if ((gctx->fb_base + (idx * 4)) > gctx->scratch_size_bytes) {
277 DRM_ERROR("ATOM: fb read beyond scratch region: %d vs. %d\n",
278 gctx->fb_base + (idx * 4), gctx->scratch_size_bytes);
281 val = gctx->scratch[(gctx->fb_base / 4) + idx];
283 ATOM_DEBUG_PRINT("FB[0x%02X]", idx);
291 ATOM_DEBUG_PRINT("IMM 0x%08X\n", val);
295 case ATOM_SRC_WORD16:
299 ATOM_DEBUG_PRINT("IMM 0x%04X\n", val);
303 case ATOM_SRC_BYTE16:
304 case ATOM_SRC_BYTE24:
308 ATOM_DEBUG_PRINT("IMM 0x%02X\n", val);
316 ATOM_DEBUG_PRINT("PLL[0x%02X]", idx);
317 val = gctx->card->pll_read(gctx->card, idx);
323 ATOM_DEBUG_PRINT("MC[0x%02X]", idx);
324 val = gctx->card->mc_read(gctx->card, idx);
329 val &= atom_arg_mask[align];
330 val >>= atom_arg_shift[align];
334 ATOM_DEBUG_PRINT(".[31:0] -> 0x%08X\n", val);
337 ATOM_DEBUG_PRINT(".[15:0] -> 0x%04X\n", val);
340 ATOM_DEBUG_PRINT(".[23:8] -> 0x%04X\n", val);
342 case ATOM_SRC_WORD16:
343 ATOM_DEBUG_PRINT(".[31:16] -> 0x%04X\n", val);
346 ATOM_DEBUG_PRINT(".[7:0] -> 0x%02X\n", val);
349 ATOM_DEBUG_PRINT(".[15:8] -> 0x%02X\n", val);
351 case ATOM_SRC_BYTE16:
352 ATOM_DEBUG_PRINT(".[23:16] -> 0x%02X\n", val);
354 case ATOM_SRC_BYTE24:
355 ATOM_DEBUG_PRINT(".[31:24] -> 0x%02X\n", val);
361 static void atom_skip_src_int(atom_exec_context *ctx, uint8_t attr, int *ptr)
363 uint32_t align = (attr >> 3) & 7, arg = attr & 7;
383 case ATOM_SRC_WORD16:
388 case ATOM_SRC_BYTE16:
389 case ATOM_SRC_BYTE24:
397 static uint32_t atom_get_src(atom_exec_context *ctx, uint8_t attr, int *ptr)
399 return atom_get_src_int(ctx, attr, ptr, NULL, 1);
402 static uint32_t atom_get_src_direct(atom_exec_context *ctx, uint8_t align, int *ptr)
404 uint32_t val = 0xCDCDCDCD;
413 case ATOM_SRC_WORD16:
419 case ATOM_SRC_BYTE16:
420 case ATOM_SRC_BYTE24:
428 static uint32_t atom_get_dst(atom_exec_context *ctx, int arg, uint8_t attr,
429 int *ptr, uint32_t *saved, int print)
431 return atom_get_src_int(ctx,
432 arg | atom_dst_to_src[(attr >> 3) &
433 7][(attr >> 6) & 3] << 3,
437 static void atom_skip_dst(atom_exec_context *ctx, int arg, uint8_t attr, int *ptr)
439 atom_skip_src_int(ctx,
440 arg | atom_dst_to_src[(attr >> 3) & 7][(attr >> 6) &
444 static void atom_put_dst(atom_exec_context *ctx, int arg, uint8_t attr,
445 int *ptr, uint32_t val, uint32_t saved)
448 atom_dst_to_src[(attr >> 3) & 7][(attr >> 6) & 3], old_val =
450 struct atom_context *gctx = ctx->ctx;
451 old_val &= atom_arg_mask[align] >> atom_arg_shift[align];
452 val <<= atom_arg_shift[align];
453 val &= atom_arg_mask[align];
454 saved &= ~atom_arg_mask[align];
460 ATOM_DEBUG_PRINT("REG[0x%04X]", idx);
461 idx += gctx->reg_block;
462 switch (gctx->io_mode) {
465 gctx->card->reg_write(gctx->card, idx,
468 gctx->card->reg_write(gctx->card, idx, val);
472 "PCI registers are not implemented.\n");
476 "SYSIO registers are not implemented.\n");
479 if (!(gctx->io_mode & 0x80)) {
480 DRM_INFO("Bad IO mode.\n");
483 if (!gctx->iio[gctx->io_mode & 0xFF]) {
485 "Undefined indirect IO write method %d.\n",
486 gctx->io_mode & 0x7F);
489 atom_iio_execute(gctx, gctx->iio[gctx->io_mode & 0xFF],
496 ATOM_DEBUG_PRINT("PS[0x%02X]", idx);
497 ctx->ps[idx] = cpu_to_le32(val);
502 ATOM_DEBUG_PRINT("WS[0x%02X]", idx);
504 case ATOM_WS_QUOTIENT:
505 gctx->divmul[0] = val;
507 case ATOM_WS_REMAINDER:
508 gctx->divmul[1] = val;
510 case ATOM_WS_DATAPTR:
511 gctx->data_block = val;
516 case ATOM_WS_OR_MASK:
517 case ATOM_WS_AND_MASK:
519 case ATOM_WS_FB_WINDOW:
522 case ATOM_WS_ATTRIBUTES:
526 gctx->reg_block = val;
535 if ((gctx->fb_base + (idx * 4)) > gctx->scratch_size_bytes) {
536 DRM_ERROR("ATOM: fb write beyond scratch region: %d vs. %d\n",
537 gctx->fb_base + (idx * 4), gctx->scratch_size_bytes);
539 gctx->scratch[(gctx->fb_base / 4) + idx] = val;
540 ATOM_DEBUG_PRINT("FB[0x%02X]", idx);
545 ATOM_DEBUG_PRINT("PLL[0x%02X]", idx);
546 gctx->card->pll_write(gctx->card, idx, val);
551 ATOM_DEBUG_PRINT("MC[0x%02X]", idx);
552 gctx->card->mc_write(gctx->card, idx, val);
557 ATOM_DEBUG_PRINT(".[31:0] <- 0x%08X\n", old_val);
560 ATOM_DEBUG_PRINT(".[15:0] <- 0x%04X\n", old_val);
563 ATOM_DEBUG_PRINT(".[23:8] <- 0x%04X\n", old_val);
565 case ATOM_SRC_WORD16:
566 ATOM_DEBUG_PRINT(".[31:16] <- 0x%04X\n", old_val);
569 ATOM_DEBUG_PRINT(".[7:0] <- 0x%02X\n", old_val);
572 ATOM_DEBUG_PRINT(".[15:8] <- 0x%02X\n", old_val);
574 case ATOM_SRC_BYTE16:
575 ATOM_DEBUG_PRINT(".[23:16] <- 0x%02X\n", old_val);
577 case ATOM_SRC_BYTE24:
578 ATOM_DEBUG_PRINT(".[31:24] <- 0x%02X\n", old_val);
583 static void atom_op_add(atom_exec_context *ctx, int *ptr, int arg)
585 uint8_t attr = U8((*ptr)++);
586 uint32_t dst, src, saved;
588 ATOM_SDEBUG_PRINT(" dst: ");
589 dst = atom_get_dst(ctx, arg, attr, ptr, &saved, 1);
590 ATOM_SDEBUG_PRINT(" src: ");
591 src = atom_get_src(ctx, attr, ptr);
593 ATOM_SDEBUG_PRINT(" dst: ");
594 atom_put_dst(ctx, arg, attr, &dptr, dst, saved);
597 static void atom_op_and(atom_exec_context *ctx, int *ptr, int arg)
599 uint8_t attr = U8((*ptr)++);
600 uint32_t dst, src, saved;
602 ATOM_SDEBUG_PRINT(" dst: ");
603 dst = atom_get_dst(ctx, arg, attr, ptr, &saved, 1);
604 ATOM_SDEBUG_PRINT(" src: ");
605 src = atom_get_src(ctx, attr, ptr);
607 ATOM_SDEBUG_PRINT(" dst: ");
608 atom_put_dst(ctx, arg, attr, &dptr, dst, saved);
611 static void atom_op_beep(atom_exec_context *ctx, int *ptr, int arg)
613 DRM_INFO("ATOM BIOS beeped!\n");
616 static void atom_op_calltable(atom_exec_context *ctx, int *ptr, int arg)
618 int idx = U8((*ptr)++);
621 if (idx < ATOM_TABLE_NAMES_CNT)
622 ATOM_SDEBUG_PRINT(" table: %d (%s)\n", idx, atom_table_names[idx]);
624 ATOM_SDEBUG_PRINT(" table: %d\n", idx);
625 if (U16(ctx->ctx->cmd_table + 4 + 2 * idx))
626 r = atom_execute_table_locked(ctx->ctx, idx, ctx->ps + ctx->ps_shift);
632 static void atom_op_clear(atom_exec_context *ctx, int *ptr, int arg)
634 uint8_t attr = U8((*ptr)++);
638 attr |= atom_def_dst[attr >> 3] << 6;
639 atom_get_dst(ctx, arg, attr, ptr, &saved, 0);
640 ATOM_SDEBUG_PRINT(" dst: ");
641 atom_put_dst(ctx, arg, attr, &dptr, 0, saved);
644 static void atom_op_compare(atom_exec_context *ctx, int *ptr, int arg)
646 uint8_t attr = U8((*ptr)++);
648 ATOM_SDEBUG_PRINT(" src1: ");
649 dst = atom_get_dst(ctx, arg, attr, ptr, NULL, 1);
650 ATOM_SDEBUG_PRINT(" src2: ");
651 src = atom_get_src(ctx, attr, ptr);
652 ctx->ctx->cs_equal = (dst == src);
653 ctx->ctx->cs_above = (dst > src);
654 ATOM_SDEBUG_PRINT(" result: %s %s\n", ctx->ctx->cs_equal ? "EQ" : "NE",
655 ctx->ctx->cs_above ? "GT" : "LE");
658 static void atom_op_delay(atom_exec_context *ctx, int *ptr, int arg)
660 unsigned count = U8((*ptr)++);
661 ATOM_SDEBUG_PRINT(" count: %d\n", count);
662 if (arg == ATOM_UNIT_MICROSEC)
664 else if (!drm_can_sleep())
670 static void atom_op_div(atom_exec_context *ctx, int *ptr, int arg)
672 uint8_t attr = U8((*ptr)++);
674 ATOM_SDEBUG_PRINT(" src1: ");
675 dst = atom_get_dst(ctx, arg, attr, ptr, NULL, 1);
676 ATOM_SDEBUG_PRINT(" src2: ");
677 src = atom_get_src(ctx, attr, ptr);
679 ctx->ctx->divmul[0] = dst / src;
680 ctx->ctx->divmul[1] = dst % src;
682 ctx->ctx->divmul[0] = 0;
683 ctx->ctx->divmul[1] = 0;
687 static void atom_op_eot(atom_exec_context *ctx, int *ptr, int arg)
689 /* functionally, a nop */
692 static void atom_op_jump(atom_exec_context *ctx, int *ptr, int arg)
694 int execute = 0, target = U16(*ptr);
695 unsigned long cjiffies;
699 case ATOM_COND_ABOVE:
700 execute = ctx->ctx->cs_above;
702 case ATOM_COND_ABOVEOREQUAL:
703 execute = ctx->ctx->cs_above || ctx->ctx->cs_equal;
705 case ATOM_COND_ALWAYS:
708 case ATOM_COND_BELOW:
709 execute = !(ctx->ctx->cs_above || ctx->ctx->cs_equal);
711 case ATOM_COND_BELOWOREQUAL:
712 execute = !ctx->ctx->cs_above;
714 case ATOM_COND_EQUAL:
715 execute = ctx->ctx->cs_equal;
717 case ATOM_COND_NOTEQUAL:
718 execute = !ctx->ctx->cs_equal;
721 if (arg != ATOM_COND_ALWAYS)
722 ATOM_SDEBUG_PRINT(" taken: %s\n", execute ? "yes" : "no");
723 ATOM_SDEBUG_PRINT(" target: 0x%04X\n", target);
725 if (ctx->last_jump == (ctx->start + target)) {
727 if (time_after(cjiffies, ctx->last_jump_jiffies)) {
728 cjiffies -= ctx->last_jump_jiffies;
729 if ((jiffies_to_msecs(cjiffies) > 5000)) {
730 DRM_ERROR("atombios stuck in loop for more than 5secs aborting\n");
734 /* jiffies wrap around we will just wait a little longer */
735 ctx->last_jump_jiffies = jiffies;
738 ctx->last_jump = ctx->start + target;
739 ctx->last_jump_jiffies = jiffies;
741 *ptr = ctx->start + target;
745 static void atom_op_mask(atom_exec_context *ctx, int *ptr, int arg)
747 uint8_t attr = U8((*ptr)++);
748 uint32_t dst, mask, src, saved;
750 ATOM_SDEBUG_PRINT(" dst: ");
751 dst = atom_get_dst(ctx, arg, attr, ptr, &saved, 1);
752 mask = atom_get_src_direct(ctx, ((attr >> 3) & 7), ptr);
753 ATOM_SDEBUG_PRINT(" mask: 0x%08x", mask);
754 ATOM_SDEBUG_PRINT(" src: ");
755 src = atom_get_src(ctx, attr, ptr);
758 ATOM_SDEBUG_PRINT(" dst: ");
759 atom_put_dst(ctx, arg, attr, &dptr, dst, saved);
762 static void atom_op_move(atom_exec_context *ctx, int *ptr, int arg)
764 uint8_t attr = U8((*ptr)++);
767 if (((attr >> 3) & 7) != ATOM_SRC_DWORD)
768 atom_get_dst(ctx, arg, attr, ptr, &saved, 0);
770 atom_skip_dst(ctx, arg, attr, ptr);
773 ATOM_SDEBUG_PRINT(" src: ");
774 src = atom_get_src(ctx, attr, ptr);
775 ATOM_SDEBUG_PRINT(" dst: ");
776 atom_put_dst(ctx, arg, attr, &dptr, src, saved);
779 static void atom_op_mul(atom_exec_context *ctx, int *ptr, int arg)
781 uint8_t attr = U8((*ptr)++);
783 ATOM_SDEBUG_PRINT(" src1: ");
784 dst = atom_get_dst(ctx, arg, attr, ptr, NULL, 1);
785 ATOM_SDEBUG_PRINT(" src2: ");
786 src = atom_get_src(ctx, attr, ptr);
787 ctx->ctx->divmul[0] = dst * src;
790 static void atom_op_nop(atom_exec_context *ctx, int *ptr, int arg)
795 static void atom_op_or(atom_exec_context *ctx, int *ptr, int arg)
797 uint8_t attr = U8((*ptr)++);
798 uint32_t dst, src, saved;
800 ATOM_SDEBUG_PRINT(" dst: ");
801 dst = atom_get_dst(ctx, arg, attr, ptr, &saved, 1);
802 ATOM_SDEBUG_PRINT(" src: ");
803 src = atom_get_src(ctx, attr, ptr);
805 ATOM_SDEBUG_PRINT(" dst: ");
806 atom_put_dst(ctx, arg, attr, &dptr, dst, saved);
809 static void atom_op_postcard(atom_exec_context *ctx, int *ptr, int arg)
811 uint8_t val = U8((*ptr)++);
812 ATOM_SDEBUG_PRINT("POST card output: 0x%02X\n", val);
815 static void atom_op_repeat(atom_exec_context *ctx, int *ptr, int arg)
817 DRM_INFO("unimplemented!\n");
820 static void atom_op_restorereg(atom_exec_context *ctx, int *ptr, int arg)
822 DRM_INFO("unimplemented!\n");
825 static void atom_op_savereg(atom_exec_context *ctx, int *ptr, int arg)
827 DRM_INFO("unimplemented!\n");
830 static void atom_op_setdatablock(atom_exec_context *ctx, int *ptr, int arg)
834 ATOM_SDEBUG_PRINT(" block: %d\n", idx);
836 ctx->ctx->data_block = 0;
838 ctx->ctx->data_block = ctx->start;
840 ctx->ctx->data_block = U16(ctx->ctx->data_table + 4 + 2 * idx);
841 ATOM_SDEBUG_PRINT(" base: 0x%04X\n", ctx->ctx->data_block);
844 static void atom_op_setfbbase(atom_exec_context *ctx, int *ptr, int arg)
846 uint8_t attr = U8((*ptr)++);
847 ATOM_SDEBUG_PRINT(" fb_base: ");
848 ctx->ctx->fb_base = atom_get_src(ctx, attr, ptr);
851 static void atom_op_setport(atom_exec_context *ctx, int *ptr, int arg)
857 if (port < ATOM_IO_NAMES_CNT)
858 ATOM_SDEBUG_PRINT(" port: %d (%s)\n", port, atom_io_names[port]);
860 ATOM_SDEBUG_PRINT(" port: %d\n", port);
862 ctx->ctx->io_mode = ATOM_IO_MM;
864 ctx->ctx->io_mode = ATOM_IO_IIO | port;
868 ctx->ctx->io_mode = ATOM_IO_PCI;
871 case ATOM_PORT_SYSIO:
872 ctx->ctx->io_mode = ATOM_IO_SYSIO;
878 static void atom_op_setregblock(atom_exec_context *ctx, int *ptr, int arg)
880 ctx->ctx->reg_block = U16(*ptr);
882 ATOM_SDEBUG_PRINT(" base: 0x%04X\n", ctx->ctx->reg_block);
885 static void atom_op_shift_left(atom_exec_context *ctx, int *ptr, int arg)
887 uint8_t attr = U8((*ptr)++), shift;
891 attr |= atom_def_dst[attr >> 3] << 6;
892 ATOM_SDEBUG_PRINT(" dst: ");
893 dst = atom_get_dst(ctx, arg, attr, ptr, &saved, 1);
894 shift = atom_get_src_direct(ctx, ATOM_SRC_BYTE0, ptr);
895 ATOM_SDEBUG_PRINT(" shift: %d\n", shift);
897 ATOM_SDEBUG_PRINT(" dst: ");
898 atom_put_dst(ctx, arg, attr, &dptr, dst, saved);
901 static void atom_op_shift_right(atom_exec_context *ctx, int *ptr, int arg)
903 uint8_t attr = U8((*ptr)++), shift;
907 attr |= atom_def_dst[attr >> 3] << 6;
908 ATOM_SDEBUG_PRINT(" dst: ");
909 dst = atom_get_dst(ctx, arg, attr, ptr, &saved, 1);
910 shift = atom_get_src_direct(ctx, ATOM_SRC_BYTE0, ptr);
911 ATOM_SDEBUG_PRINT(" shift: %d\n", shift);
913 ATOM_SDEBUG_PRINT(" dst: ");
914 atom_put_dst(ctx, arg, attr, &dptr, dst, saved);
917 static void atom_op_shl(atom_exec_context *ctx, int *ptr, int arg)
919 uint8_t attr = U8((*ptr)++), shift;
922 uint32_t dst_align = atom_dst_to_src[(attr >> 3) & 7][(attr >> 6) & 3];
923 ATOM_SDEBUG_PRINT(" dst: ");
924 dst = atom_get_dst(ctx, arg, attr, ptr, &saved, 1);
925 /* op needs to full dst value */
927 shift = atom_get_src(ctx, attr, ptr);
928 ATOM_SDEBUG_PRINT(" shift: %d\n", shift);
930 dst &= atom_arg_mask[dst_align];
931 dst >>= atom_arg_shift[dst_align];
932 ATOM_SDEBUG_PRINT(" dst: ");
933 atom_put_dst(ctx, arg, attr, &dptr, dst, saved);
936 static void atom_op_shr(atom_exec_context *ctx, int *ptr, int arg)
938 uint8_t attr = U8((*ptr)++), shift;
941 uint32_t dst_align = atom_dst_to_src[(attr >> 3) & 7][(attr >> 6) & 3];
942 ATOM_SDEBUG_PRINT(" dst: ");
943 dst = atom_get_dst(ctx, arg, attr, ptr, &saved, 1);
944 /* op needs to full dst value */
946 shift = atom_get_src(ctx, attr, ptr);
947 ATOM_SDEBUG_PRINT(" shift: %d\n", shift);
949 dst &= atom_arg_mask[dst_align];
950 dst >>= atom_arg_shift[dst_align];
951 ATOM_SDEBUG_PRINT(" dst: ");
952 atom_put_dst(ctx, arg, attr, &dptr, dst, saved);
955 static void atom_op_sub(atom_exec_context *ctx, int *ptr, int arg)
957 uint8_t attr = U8((*ptr)++);
958 uint32_t dst, src, saved;
960 ATOM_SDEBUG_PRINT(" dst: ");
961 dst = atom_get_dst(ctx, arg, attr, ptr, &saved, 1);
962 ATOM_SDEBUG_PRINT(" src: ");
963 src = atom_get_src(ctx, attr, ptr);
965 ATOM_SDEBUG_PRINT(" dst: ");
966 atom_put_dst(ctx, arg, attr, &dptr, dst, saved);
969 static void atom_op_switch(atom_exec_context *ctx, int *ptr, int arg)
971 uint8_t attr = U8((*ptr)++);
972 uint32_t src, val, target;
973 ATOM_SDEBUG_PRINT(" switch: ");
974 src = atom_get_src(ctx, attr, ptr);
975 while (U16(*ptr) != ATOM_CASE_END)
976 if (U8(*ptr) == ATOM_CASE_MAGIC) {
978 ATOM_SDEBUG_PRINT(" case: ");
980 atom_get_src(ctx, (attr & 0x38) | ATOM_ARG_IMM,
984 ATOM_SDEBUG_PRINT(" target: %04X\n", target);
985 *ptr = ctx->start + target;
990 DRM_INFO("Bad case.\n");
996 static void atom_op_test(atom_exec_context *ctx, int *ptr, int arg)
998 uint8_t attr = U8((*ptr)++);
1000 ATOM_SDEBUG_PRINT(" src1: ");
1001 dst = atom_get_dst(ctx, arg, attr, ptr, NULL, 1);
1002 ATOM_SDEBUG_PRINT(" src2: ");
1003 src = atom_get_src(ctx, attr, ptr);
1004 ctx->ctx->cs_equal = ((dst & src) == 0);
1005 ATOM_SDEBUG_PRINT(" result: %s\n", ctx->ctx->cs_equal ? "EQ" : "NE");
1008 static void atom_op_xor(atom_exec_context *ctx, int *ptr, int arg)
1010 uint8_t attr = U8((*ptr)++);
1011 uint32_t dst, src, saved;
1013 ATOM_SDEBUG_PRINT(" dst: ");
1014 dst = atom_get_dst(ctx, arg, attr, ptr, &saved, 1);
1015 ATOM_SDEBUG_PRINT(" src: ");
1016 src = atom_get_src(ctx, attr, ptr);
1018 ATOM_SDEBUG_PRINT(" dst: ");
1019 atom_put_dst(ctx, arg, attr, &dptr, dst, saved);
1022 static void atom_op_debug(atom_exec_context *ctx, int *ptr, int arg)
1024 DRM_INFO("unimplemented!\n");
1028 void (*func) (atom_exec_context *, int *, int);
1030 } opcode_table[ATOM_OP_CNT] = {
1033 atom_op_move, ATOM_ARG_REG}, {
1034 atom_op_move, ATOM_ARG_PS}, {
1035 atom_op_move, ATOM_ARG_WS}, {
1036 atom_op_move, ATOM_ARG_FB}, {
1037 atom_op_move, ATOM_ARG_PLL}, {
1038 atom_op_move, ATOM_ARG_MC}, {
1039 atom_op_and, ATOM_ARG_REG}, {
1040 atom_op_and, ATOM_ARG_PS}, {
1041 atom_op_and, ATOM_ARG_WS}, {
1042 atom_op_and, ATOM_ARG_FB}, {
1043 atom_op_and, ATOM_ARG_PLL}, {
1044 atom_op_and, ATOM_ARG_MC}, {
1045 atom_op_or, ATOM_ARG_REG}, {
1046 atom_op_or, ATOM_ARG_PS}, {
1047 atom_op_or, ATOM_ARG_WS}, {
1048 atom_op_or, ATOM_ARG_FB}, {
1049 atom_op_or, ATOM_ARG_PLL}, {
1050 atom_op_or, ATOM_ARG_MC}, {
1051 atom_op_shift_left, ATOM_ARG_REG}, {
1052 atom_op_shift_left, ATOM_ARG_PS}, {
1053 atom_op_shift_left, ATOM_ARG_WS}, {
1054 atom_op_shift_left, ATOM_ARG_FB}, {
1055 atom_op_shift_left, ATOM_ARG_PLL}, {
1056 atom_op_shift_left, ATOM_ARG_MC}, {
1057 atom_op_shift_right, ATOM_ARG_REG}, {
1058 atom_op_shift_right, ATOM_ARG_PS}, {
1059 atom_op_shift_right, ATOM_ARG_WS}, {
1060 atom_op_shift_right, ATOM_ARG_FB}, {
1061 atom_op_shift_right, ATOM_ARG_PLL}, {
1062 atom_op_shift_right, ATOM_ARG_MC}, {
1063 atom_op_mul, ATOM_ARG_REG}, {
1064 atom_op_mul, ATOM_ARG_PS}, {
1065 atom_op_mul, ATOM_ARG_WS}, {
1066 atom_op_mul, ATOM_ARG_FB}, {
1067 atom_op_mul, ATOM_ARG_PLL}, {
1068 atom_op_mul, ATOM_ARG_MC}, {
1069 atom_op_div, ATOM_ARG_REG}, {
1070 atom_op_div, ATOM_ARG_PS}, {
1071 atom_op_div, ATOM_ARG_WS}, {
1072 atom_op_div, ATOM_ARG_FB}, {
1073 atom_op_div, ATOM_ARG_PLL}, {
1074 atom_op_div, ATOM_ARG_MC}, {
1075 atom_op_add, ATOM_ARG_REG}, {
1076 atom_op_add, ATOM_ARG_PS}, {
1077 atom_op_add, ATOM_ARG_WS}, {
1078 atom_op_add, ATOM_ARG_FB}, {
1079 atom_op_add, ATOM_ARG_PLL}, {
1080 atom_op_add, ATOM_ARG_MC}, {
1081 atom_op_sub, ATOM_ARG_REG}, {
1082 atom_op_sub, ATOM_ARG_PS}, {
1083 atom_op_sub, ATOM_ARG_WS}, {
1084 atom_op_sub, ATOM_ARG_FB}, {
1085 atom_op_sub, ATOM_ARG_PLL}, {
1086 atom_op_sub, ATOM_ARG_MC}, {
1087 atom_op_setport, ATOM_PORT_ATI}, {
1088 atom_op_setport, ATOM_PORT_PCI}, {
1089 atom_op_setport, ATOM_PORT_SYSIO}, {
1090 atom_op_setregblock, 0}, {
1091 atom_op_setfbbase, 0}, {
1092 atom_op_compare, ATOM_ARG_REG}, {
1093 atom_op_compare, ATOM_ARG_PS}, {
1094 atom_op_compare, ATOM_ARG_WS}, {
1095 atom_op_compare, ATOM_ARG_FB}, {
1096 atom_op_compare, ATOM_ARG_PLL}, {
1097 atom_op_compare, ATOM_ARG_MC}, {
1098 atom_op_switch, 0}, {
1099 atom_op_jump, ATOM_COND_ALWAYS}, {
1100 atom_op_jump, ATOM_COND_EQUAL}, {
1101 atom_op_jump, ATOM_COND_BELOW}, {
1102 atom_op_jump, ATOM_COND_ABOVE}, {
1103 atom_op_jump, ATOM_COND_BELOWOREQUAL}, {
1104 atom_op_jump, ATOM_COND_ABOVEOREQUAL}, {
1105 atom_op_jump, ATOM_COND_NOTEQUAL}, {
1106 atom_op_test, ATOM_ARG_REG}, {
1107 atom_op_test, ATOM_ARG_PS}, {
1108 atom_op_test, ATOM_ARG_WS}, {
1109 atom_op_test, ATOM_ARG_FB}, {
1110 atom_op_test, ATOM_ARG_PLL}, {
1111 atom_op_test, ATOM_ARG_MC}, {
1112 atom_op_delay, ATOM_UNIT_MILLISEC}, {
1113 atom_op_delay, ATOM_UNIT_MICROSEC}, {
1114 atom_op_calltable, 0}, {
1115 atom_op_repeat, 0}, {
1116 atom_op_clear, ATOM_ARG_REG}, {
1117 atom_op_clear, ATOM_ARG_PS}, {
1118 atom_op_clear, ATOM_ARG_WS}, {
1119 atom_op_clear, ATOM_ARG_FB}, {
1120 atom_op_clear, ATOM_ARG_PLL}, {
1121 atom_op_clear, ATOM_ARG_MC}, {
1124 atom_op_mask, ATOM_ARG_REG}, {
1125 atom_op_mask, ATOM_ARG_PS}, {
1126 atom_op_mask, ATOM_ARG_WS}, {
1127 atom_op_mask, ATOM_ARG_FB}, {
1128 atom_op_mask, ATOM_ARG_PLL}, {
1129 atom_op_mask, ATOM_ARG_MC}, {
1130 atom_op_postcard, 0}, {
1132 atom_op_savereg, 0}, {
1133 atom_op_restorereg, 0}, {
1134 atom_op_setdatablock, 0}, {
1135 atom_op_xor, ATOM_ARG_REG}, {
1136 atom_op_xor, ATOM_ARG_PS}, {
1137 atom_op_xor, ATOM_ARG_WS}, {
1138 atom_op_xor, ATOM_ARG_FB}, {
1139 atom_op_xor, ATOM_ARG_PLL}, {
1140 atom_op_xor, ATOM_ARG_MC}, {
1141 atom_op_shl, ATOM_ARG_REG}, {
1142 atom_op_shl, ATOM_ARG_PS}, {
1143 atom_op_shl, ATOM_ARG_WS}, {
1144 atom_op_shl, ATOM_ARG_FB}, {
1145 atom_op_shl, ATOM_ARG_PLL}, {
1146 atom_op_shl, ATOM_ARG_MC}, {
1147 atom_op_shr, ATOM_ARG_REG}, {
1148 atom_op_shr, ATOM_ARG_PS}, {
1149 atom_op_shr, ATOM_ARG_WS}, {
1150 atom_op_shr, ATOM_ARG_FB}, {
1151 atom_op_shr, ATOM_ARG_PLL}, {
1152 atom_op_shr, ATOM_ARG_MC}, {
1153 atom_op_debug, 0},};
1155 static int atom_execute_table_locked(struct atom_context *ctx, int index, uint32_t * params)
1157 int base = CU16(ctx->cmd_table + 4 + 2 * index);
1158 int len, ws, ps, ptr;
1160 atom_exec_context ectx;
1166 len = CU16(base + ATOM_CT_SIZE_PTR);
1167 ws = CU8(base + ATOM_CT_WS_PTR);
1168 ps = CU8(base + ATOM_CT_PS_PTR) & ATOM_CT_PS_MASK;
1169 ptr = base + ATOM_CT_CODE_PTR;
1171 ATOM_SDEBUG_PRINT(">> execute %04X (len %d, WS %d, PS %d)\n", base, len, ws, ps);
1174 ectx.ps_shift = ps / 4;
1180 ectx.ws = kmalloc(4 * ws, DRM_MEM_DRIVER, M_ZERO | M_WAITOK);
1187 if (op < ATOM_OP_NAMES_CNT)
1188 ATOM_SDEBUG_PRINT("%s @ 0x%04X\n", atom_op_names[op], ptr - 1);
1190 ATOM_SDEBUG_PRINT("[%d] @ 0x%04X\n", op, ptr - 1);
1192 DRM_ERROR("atombios stuck executing %04X (len %d, WS %d, PS %d) @ 0x%04X\n",
1193 base, len, ws, ps, ptr - 1);
1198 if (op < ATOM_OP_CNT && op > 0)
1199 opcode_table[op].func(&ectx, &ptr,
1200 opcode_table[op].arg);
1204 if (op == ATOM_OP_EOT)
1208 ATOM_SDEBUG_PRINT("<<\n");
1212 drm_free(ectx.ws, DRM_MEM_DRIVER);
1216 int atom_execute_table(struct atom_context *ctx, int index, uint32_t * params)
1220 lockmgr(&ctx->mutex, LK_EXCLUSIVE);
1221 /* reset reg block */
1223 /* reset fb window */
1226 ctx->io_mode = ATOM_IO_MM;
1227 r = atom_execute_table_locked(ctx, index, params);
1228 lockmgr(&ctx->mutex, LK_RELEASE);
1232 static int atom_iio_len[] = { 1, 2, 3, 3, 3, 3, 4, 4, 4, 3 };
1234 static void atom_index_iio(struct atom_context *ctx, int base)
1236 ctx->iio = kmalloc(2 * 256, DRM_MEM_DRIVER, M_ZERO | M_WAITOK);
1237 while (CU8(base) == ATOM_IIO_START) {
1238 ctx->iio[CU8(base + 1)] = base + 2;
1240 while (CU8(base) != ATOM_IIO_END)
1241 base += atom_iio_len[CU8(base)];
1246 struct atom_context *atom_parse(struct card_info *card, void *bios)
1249 struct atom_context *ctx =
1250 kmalloc(sizeof(struct atom_context), DRM_MEM_DRIVER,
1262 if (CU16(0) != ATOM_BIOS_MAGIC) {
1263 DRM_INFO("Invalid BIOS magic.\n");
1264 drm_free(ctx, DRM_MEM_DRIVER);
1268 (CSTR(ATOM_ATI_MAGIC_PTR), ATOM_ATI_MAGIC,
1269 strlen(ATOM_ATI_MAGIC))) {
1270 DRM_INFO("Invalid ATI magic.\n");
1271 drm_free(ctx, DRM_MEM_DRIVER);
1275 base = CU16(ATOM_ROM_TABLE_PTR);
1277 (CSTR(base + ATOM_ROM_MAGIC_PTR), ATOM_ROM_MAGIC,
1278 strlen(ATOM_ROM_MAGIC))) {
1279 DRM_INFO("Invalid ATOM magic.\n");
1280 drm_free(ctx, DRM_MEM_DRIVER);
1284 ctx->cmd_table = CU16(base + ATOM_ROM_CMD_PTR);
1285 ctx->data_table = CU16(base + ATOM_ROM_DATA_PTR);
1286 atom_index_iio(ctx, CU16(ctx->data_table + ATOM_DATA_IIO_PTR) + 4);
1288 str = CSTR(CU16(base + ATOM_ROM_MSG_PTR));
1289 while (*str && ((*str == '\n') || (*str == '\r')))
1291 /* name string isn't always 0 terminated */
1292 for (i = 0; i < 511; i++) {
1294 if (name[i] < '.' || name[i] > 'z') {
1299 DRM_INFO("ATOM BIOS: %s\n", name);
1304 int atom_asic_init(struct atom_context *ctx)
1306 struct radeon_device *rdev = ctx->card->dev->dev_private;
1307 int hwi = CU16(ctx->data_table + ATOM_DATA_FWI_PTR);
1313 ps[0] = cpu_to_le32(CU32(hwi + ATOM_FWI_DEFSCLK_PTR));
1314 ps[1] = cpu_to_le32(CU32(hwi + ATOM_FWI_DEFMCLK_PTR));
1315 if (!ps[0] || !ps[1])
1318 if (!CU16(ctx->cmd_table + 4 + 2 * ATOM_CMD_INIT))
1320 ret = atom_execute_table(ctx, ATOM_CMD_INIT, ps);
1326 if (rdev->family < CHIP_R600) {
1327 if (CU16(ctx->cmd_table + 4 + 2 * ATOM_CMD_SPDFANCNTL))
1328 atom_execute_table(ctx, ATOM_CMD_SPDFANCNTL, ps);
1333 void atom_destroy(struct atom_context *ctx)
1336 drm_free(ctx->iio, DRM_MEM_DRIVER);
1337 drm_free(ctx, DRM_MEM_DRIVER);
1340 bool atom_parse_data_header(struct atom_context *ctx, int index,
1341 uint16_t * size, uint8_t * frev, uint8_t * crev,
1342 uint16_t * data_start)
1344 int offset = index * 2 + 4;
1345 int idx = CU16(ctx->data_table + offset);
1346 u16 *mdt = (u16 *)((char *)ctx->bios + ctx->data_table + 4);
1354 *frev = CU8(idx + 2);
1356 *crev = CU8(idx + 3);
1361 bool atom_parse_cmd_header(struct atom_context *ctx, int index, uint8_t * frev,
1364 int offset = index * 2 + 4;
1365 int idx = CU16(ctx->cmd_table + offset);
1366 u16 *mct = (u16 *)((char *)ctx->bios + ctx->cmd_table + 4);
1372 *frev = CU8(idx + 2);
1374 *crev = CU8(idx + 3);
1378 int atom_allocate_fb_scratch(struct atom_context *ctx)
1380 int index = GetIndexIntoMasterTable(DATA, VRAM_UsageByFirmware);
1381 uint16_t data_offset;
1382 int usage_bytes = 0;
1383 struct _ATOM_VRAM_USAGE_BY_FIRMWARE *firmware_usage;
1385 if (atom_parse_data_header(ctx, index, NULL, NULL, NULL, &data_offset)) {
1386 firmware_usage = (struct _ATOM_VRAM_USAGE_BY_FIRMWARE *)((char *)ctx->bios + data_offset);
1388 DRM_DEBUG("atom firmware requested %08x %dkb\n",
1389 firmware_usage->asFirmwareVramReserveInfo[0].ulStartAddrUsedByFirmware,
1390 firmware_usage->asFirmwareVramReserveInfo[0].usFirmwareUseInKb);
1392 usage_bytes = firmware_usage->asFirmwareVramReserveInfo[0].usFirmwareUseInKb * 1024;
1394 ctx->scratch_size_bytes = 0;
1395 if (usage_bytes == 0)
1396 usage_bytes = 20 * 1024;
1397 /* allocate some scratch memory */
1398 ctx->scratch = kmalloc(usage_bytes, DRM_MEM_DRIVER, M_ZERO | M_WAITOK);
1401 ctx->scratch_size_bytes = usage_bytes;