1 /**************************************************************************
3 Copyright (c) 2004 Joerg Sonnenberger <joerg@bec.de>. All rights reserved.
5 Copyright (c) 2001-2003, Intel Corporation
8 Redistribution and use in source and binary forms, with or without
9 modification, are permitted provided that the following conditions are met:
11 1. Redistributions of source code must retain the above copyright notice,
12 this list of conditions and the following disclaimer.
14 2. Redistributions in binary form must reproduce the above copyright
15 notice, this list of conditions and the following disclaimer in the
16 documentation and/or other materials provided with the distribution.
18 3. Neither the name of the Intel Corporation nor the names of its
19 contributors may be used to endorse or promote products derived from
20 this software without specific prior written permission.
22 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
23 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
24 IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
25 ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
26 LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
27 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
28 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
29 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
30 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
31 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
32 POSSIBILITY OF SUCH DAMAGE.
34 ***************************************************************************/
36 /*$FreeBSD: src/sys/dev/em/if_em.c,v 1.2.2.15 2003/06/09 22:10:15 pdeuskar Exp $*/
37 /*$DragonFly: src/sys/dev/netif/em/if_em.c,v 1.31 2005/05/24 20:59:01 dillon Exp $*/
40 #include <net/ifq_var.h>
42 /*********************************************************************
43 * Set this to one to display debug statistics
44 *********************************************************************/
45 int em_display_debug_stats = 0;
47 /*********************************************************************
49 *********************************************************************/
51 char em_driver_version[] = "1.7.25";
54 /*********************************************************************
57 * Used by probe to select devices to load on
58 * Last field stores an index into em_strings
59 * Last entry must be all 0s
61 * { Vendor ID, Device ID, SubVendor ID, SubDevice ID, String Index }
62 *********************************************************************/
64 static em_vendor_info_t em_vendor_info_array[] =
66 /* Intel(R) PRO/1000 Network Connection */
67 { 0x8086, 0x1000, PCI_ANY_ID, PCI_ANY_ID, 0},
68 { 0x8086, 0x1001, PCI_ANY_ID, PCI_ANY_ID, 0},
69 { 0x8086, 0x1004, PCI_ANY_ID, PCI_ANY_ID, 0},
70 { 0x8086, 0x1008, PCI_ANY_ID, PCI_ANY_ID, 0},
71 { 0x8086, 0x1009, PCI_ANY_ID, PCI_ANY_ID, 0},
72 { 0x8086, 0x100C, PCI_ANY_ID, PCI_ANY_ID, 0},
73 { 0x8086, 0x100D, PCI_ANY_ID, PCI_ANY_ID, 0},
74 { 0x8086, 0x100E, PCI_ANY_ID, PCI_ANY_ID, 0},
75 { 0x8086, 0x100F, PCI_ANY_ID, PCI_ANY_ID, 0},
76 { 0x8086, 0x1010, PCI_ANY_ID, PCI_ANY_ID, 0},
77 { 0x8086, 0x1011, PCI_ANY_ID, PCI_ANY_ID, 0},
78 { 0x8086, 0x1012, PCI_ANY_ID, PCI_ANY_ID, 0},
79 { 0x8086, 0x1013, PCI_ANY_ID, PCI_ANY_ID, 0},
80 { 0x8086, 0x1014, PCI_ANY_ID, PCI_ANY_ID, 0},
81 { 0x8086, 0x1015, PCI_ANY_ID, PCI_ANY_ID, 0},
82 { 0x8086, 0x1016, PCI_ANY_ID, PCI_ANY_ID, 0},
83 { 0x8086, 0x1017, PCI_ANY_ID, PCI_ANY_ID, 0},
84 { 0x8086, 0x1018, PCI_ANY_ID, PCI_ANY_ID, 0},
85 { 0x8086, 0x1019, PCI_ANY_ID, PCI_ANY_ID, 0},
86 { 0x8086, 0x101A, PCI_ANY_ID, PCI_ANY_ID, 0},
87 { 0x8086, 0x101D, PCI_ANY_ID, PCI_ANY_ID, 0},
88 { 0x8086, 0x101E, PCI_ANY_ID, PCI_ANY_ID, 0},
89 { 0x8086, 0x1026, PCI_ANY_ID, PCI_ANY_ID, 0},
90 { 0x8086, 0x1027, PCI_ANY_ID, PCI_ANY_ID, 0},
91 { 0x8086, 0x1028, PCI_ANY_ID, PCI_ANY_ID, 0},
92 { 0x8086, 0x1075, PCI_ANY_ID, PCI_ANY_ID, 0},
93 { 0x8086, 0x1076, PCI_ANY_ID, PCI_ANY_ID, 0},
94 { 0x8086, 0x1077, PCI_ANY_ID, PCI_ANY_ID, 0},
95 { 0x8086, 0x1078, PCI_ANY_ID, PCI_ANY_ID, 0},
96 { 0x8086, 0x1079, PCI_ANY_ID, PCI_ANY_ID, 0},
97 { 0x8086, 0x107A, PCI_ANY_ID, PCI_ANY_ID, 0},
98 { 0x8086, 0x107B, PCI_ANY_ID, PCI_ANY_ID, 0},
99 /* required last entry */
103 /*********************************************************************
104 * Table of branding strings for all supported NICs.
105 *********************************************************************/
107 static const char *em_strings[] = {
108 "Intel(R) PRO/1000 Network Connection"
111 /*********************************************************************
112 * Function prototypes
113 *********************************************************************/
114 static int em_probe(device_t);
115 static int em_attach(device_t);
116 static int em_detach(device_t);
117 static int em_shutdown(device_t);
118 static void em_intr(void *);
119 static void em_start(struct ifnet *);
120 static int em_ioctl(struct ifnet *, u_long, caddr_t, struct ucred *);
121 static void em_watchdog(struct ifnet *);
122 static void em_init(void *);
123 static void em_stop(void *);
124 static void em_media_status(struct ifnet *, struct ifmediareq *);
125 static int em_media_change(struct ifnet *);
126 static void em_identify_hardware(struct adapter *);
127 static void em_local_timer(void *);
128 static int em_hardware_init(struct adapter *);
129 static void em_setup_interface(device_t, struct adapter *);
130 static int em_setup_transmit_structures(struct adapter *);
131 static void em_initialize_transmit_unit(struct adapter *);
132 static int em_setup_receive_structures(struct adapter *);
133 static void em_initialize_receive_unit(struct adapter *);
134 static void em_enable_intr(struct adapter *);
135 static void em_disable_intr(struct adapter *);
136 static void em_free_transmit_structures(struct adapter *);
137 static void em_free_receive_structures(struct adapter *);
138 static void em_update_stats_counters(struct adapter *);
139 static void em_clean_transmit_interrupts(struct adapter *);
140 static int em_allocate_receive_structures(struct adapter *);
141 static int em_allocate_transmit_structures(struct adapter *);
142 static void em_process_receive_interrupts(struct adapter *, int);
143 static void em_receive_checksum(struct adapter *, struct em_rx_desc *,
145 static void em_transmit_checksum_setup(struct adapter *, struct mbuf *,
146 uint32_t *, uint32_t *);
147 static void em_set_promisc(struct adapter *);
148 static void em_disable_promisc(struct adapter *);
149 static void em_set_multi(struct adapter *);
150 static void em_print_hw_stats(struct adapter *);
151 static void em_print_link_status(struct adapter *);
152 static int em_get_buf(int i, struct adapter *, struct mbuf *, int how);
153 static void em_enable_vlans(struct adapter *);
154 static int em_encap(struct adapter *, struct mbuf *);
155 static void em_smartspeed(struct adapter *);
156 static int em_82547_fifo_workaround(struct adapter *, int);
157 static void em_82547_update_fifo_head(struct adapter *, int);
158 static int em_82547_tx_fifo_reset(struct adapter *);
159 static void em_82547_move_tail(void *arg);
160 static int em_dma_malloc(struct adapter *, bus_size_t,
161 struct em_dma_alloc *, int);
162 static void em_dma_free(struct adapter *, struct em_dma_alloc *);
163 static void em_print_debug_info(struct adapter *);
164 static int em_is_valid_ether_addr(uint8_t *);
165 static int em_sysctl_stats(SYSCTL_HANDLER_ARGS);
166 static int em_sysctl_debug_info(SYSCTL_HANDLER_ARGS);
167 static uint32_t em_fill_descriptors(uint64_t address, uint32_t length,
168 PDESC_ARRAY desc_array);
169 static int em_sysctl_int_delay(SYSCTL_HANDLER_ARGS);
170 static int em_sysctl_int_throttle(SYSCTL_HANDLER_ARGS);
171 static void em_add_int_delay_sysctl(struct adapter *, const char *,
173 struct em_int_delay_info *, int, int);
175 /*********************************************************************
176 * FreeBSD Device Interface Entry Points
177 *********************************************************************/
179 static device_method_t em_methods[] = {
180 /* Device interface */
181 DEVMETHOD(device_probe, em_probe),
182 DEVMETHOD(device_attach, em_attach),
183 DEVMETHOD(device_detach, em_detach),
184 DEVMETHOD(device_shutdown, em_shutdown),
188 static driver_t em_driver = {
189 "em", em_methods, sizeof(struct adapter),
192 static devclass_t em_devclass;
194 DECLARE_DUMMY_MODULE(if_em);
195 DRIVER_MODULE(if_em, pci, em_driver, em_devclass, 0, 0);
197 /*********************************************************************
198 * Tunable default values.
199 *********************************************************************/
201 #define E1000_TICKS_TO_USECS(ticks) ((1024 * (ticks) + 500) / 1000)
202 #define E1000_USECS_TO_TICKS(usecs) ((1000 * (usecs) + 512) / 1024)
204 static int em_tx_int_delay_dflt = E1000_TICKS_TO_USECS(EM_TIDV);
205 static int em_rx_int_delay_dflt = E1000_TICKS_TO_USECS(EM_RDTR);
206 static int em_tx_abs_int_delay_dflt = E1000_TICKS_TO_USECS(EM_TADV);
207 static int em_rx_abs_int_delay_dflt = E1000_TICKS_TO_USECS(EM_RADV);
208 static int em_int_throttle_ceil = 10000;
210 TUNABLE_INT("hw.em.tx_int_delay", &em_tx_int_delay_dflt);
211 TUNABLE_INT("hw.em.rx_int_delay", &em_rx_int_delay_dflt);
212 TUNABLE_INT("hw.em.tx_abs_int_delay", &em_tx_abs_int_delay_dflt);
213 TUNABLE_INT("hw.em.rx_abs_int_delay", &em_rx_abs_int_delay_dflt);
214 TUNABLE_INT("hw.em.int_throttle_ceil", &em_int_throttle_ceil);
216 /*********************************************************************
217 * Device identification routine
219 * em_probe determines if the driver should be loaded on
220 * adapter based on PCI vendor/device id of the adapter.
222 * return 0 on success, positive on failure
223 *********************************************************************/
226 em_probe(device_t dev)
228 em_vendor_info_t *ent;
230 uint16_t pci_vendor_id = 0;
231 uint16_t pci_device_id = 0;
232 uint16_t pci_subvendor_id = 0;
233 uint16_t pci_subdevice_id = 0;
234 char adapter_name[60];
236 INIT_DEBUGOUT("em_probe: begin");
238 pci_vendor_id = pci_get_vendor(dev);
239 if (pci_vendor_id != EM_VENDOR_ID)
242 pci_device_id = pci_get_device(dev);
243 pci_subvendor_id = pci_get_subvendor(dev);
244 pci_subdevice_id = pci_get_subdevice(dev);
246 ent = em_vendor_info_array;
247 while (ent->vendor_id != 0) {
248 if ((pci_vendor_id == ent->vendor_id) &&
249 (pci_device_id == ent->device_id) &&
251 ((pci_subvendor_id == ent->subvendor_id) ||
252 (ent->subvendor_id == PCI_ANY_ID)) &&
254 ((pci_subdevice_id == ent->subdevice_id) ||
255 (ent->subdevice_id == PCI_ANY_ID))) {
256 snprintf(adapter_name, sizeof(adapter_name),
257 "%s, Version - %s", em_strings[ent->index],
259 device_set_desc_copy(dev, adapter_name);
268 /*********************************************************************
269 * Device initialization routine
271 * The attach entry point is called when the driver is being loaded.
272 * This routine identifies the type of hardware, allocates all resources
273 * and initializes the hardware.
275 * return 0 on success, positive on failure
276 *********************************************************************/
279 em_attach(device_t dev)
281 struct adapter *adapter;
286 INIT_DEBUGOUT("em_attach: begin");
288 adapter = device_get_softc(dev);
290 bzero(adapter, sizeof(struct adapter));
292 callout_init(&adapter->timer);
293 callout_init(&adapter->tx_fifo_timer);
296 adapter->osdep.dev = dev;
299 sysctl_ctx_init(&adapter->sysctl_ctx);
300 adapter->sysctl_tree = SYSCTL_ADD_NODE(&adapter->sysctl_ctx,
301 SYSCTL_STATIC_CHILDREN(_hw),
303 device_get_nameunit(dev),
307 if (adapter->sysctl_tree == NULL) {
312 SYSCTL_ADD_PROC(&adapter->sysctl_ctx,
313 SYSCTL_CHILDREN(adapter->sysctl_tree),
314 OID_AUTO, "debug_info", CTLTYPE_INT|CTLFLAG_RW,
316 em_sysctl_debug_info, "I", "Debug Information");
318 SYSCTL_ADD_PROC(&adapter->sysctl_ctx,
319 SYSCTL_CHILDREN(adapter->sysctl_tree),
320 OID_AUTO, "stats", CTLTYPE_INT|CTLFLAG_RW,
322 em_sysctl_stats, "I", "Statistics");
324 /* Determine hardware revision */
325 em_identify_hardware(adapter);
327 /* Set up some sysctls for the tunable interrupt delays */
328 em_add_int_delay_sysctl(adapter, "rx_int_delay",
329 "receive interrupt delay in usecs",
330 &adapter->rx_int_delay,
331 E1000_REG_OFFSET(&adapter->hw, RDTR),
332 em_rx_int_delay_dflt);
333 em_add_int_delay_sysctl(adapter, "tx_int_delay",
334 "transmit interrupt delay in usecs",
335 &adapter->tx_int_delay,
336 E1000_REG_OFFSET(&adapter->hw, TIDV),
337 em_tx_int_delay_dflt);
338 if (adapter->hw.mac_type >= em_82540) {
339 em_add_int_delay_sysctl(adapter, "rx_abs_int_delay",
340 "receive interrupt delay limit in usecs",
341 &adapter->rx_abs_int_delay,
342 E1000_REG_OFFSET(&adapter->hw, RADV),
343 em_rx_abs_int_delay_dflt);
344 em_add_int_delay_sysctl(adapter, "tx_abs_int_delay",
345 "transmit interrupt delay limit in usecs",
346 &adapter->tx_abs_int_delay,
347 E1000_REG_OFFSET(&adapter->hw, TADV),
348 em_tx_abs_int_delay_dflt);
349 SYSCTL_ADD_PROC(&adapter->sysctl_ctx,
350 SYSCTL_CHILDREN(adapter->sysctl_tree),
351 OID_AUTO, "int_throttle_ceil", CTLTYPE_INT|CTLFLAG_RW,
352 adapter, 0, em_sysctl_int_throttle, "I", NULL);
355 /* Parameters (to be read from user) */
356 adapter->num_tx_desc = EM_MAX_TXD;
357 adapter->num_rx_desc = EM_MAX_RXD;
358 adapter->hw.autoneg = DO_AUTO_NEG;
359 adapter->hw.wait_autoneg_complete = WAIT_FOR_AUTO_NEG_DEFAULT;
360 adapter->hw.autoneg_advertised = AUTONEG_ADV_DEFAULT;
361 adapter->hw.tbi_compatibility_en = TRUE;
362 adapter->rx_buffer_len = EM_RXBUFFER_2048;
365 * These parameters control the automatic generation(Tx) and
366 * response(Rx) to Ethernet PAUSE frames.
368 adapter->hw.fc_high_water = FC_DEFAULT_HI_THRESH;
369 adapter->hw.fc_low_water = FC_DEFAULT_LO_THRESH;
370 adapter->hw.fc_pause_time = FC_DEFAULT_TX_TIMER;
371 adapter->hw.fc_send_xon = TRUE;
372 adapter->hw.fc = em_fc_full;
374 adapter->hw.phy_init_script = 1;
375 adapter->hw.phy_reset_disable = FALSE;
377 #ifndef EM_MASTER_SLAVE
378 adapter->hw.master_slave = em_ms_hw_default;
380 adapter->hw.master_slave = EM_MASTER_SLAVE;
384 * Set the max frame size assuming standard ethernet
387 adapter->hw.max_frame_size = ETHERMTU + ETHER_HDR_LEN + ETHER_CRC_LEN;
389 adapter->hw.min_frame_size =
390 MINIMUM_ETHERNET_PACKET_SIZE + ETHER_CRC_LEN;
393 * This controls when hardware reports transmit completion
396 adapter->hw.report_tx_early = 1;
399 adapter->res_memory = bus_alloc_resource_any(dev, SYS_RES_MEMORY,
401 if (!(adapter->res_memory)) {
402 device_printf(dev, "Unable to allocate bus resource: memory\n");
406 adapter->osdep.mem_bus_space_tag =
407 rman_get_bustag(adapter->res_memory);
408 adapter->osdep.mem_bus_space_handle =
409 rman_get_bushandle(adapter->res_memory);
410 adapter->hw.hw_addr = (uint8_t *)&adapter->osdep.mem_bus_space_handle;
412 if (adapter->hw.mac_type > em_82543) {
413 /* Figure our where our IO BAR is ? */
415 for (i = 0; i < 5; i++) {
416 val = pci_read_config(dev, rid, 4);
417 if (val & 0x00000001) {
418 adapter->io_rid = rid;
424 adapter->res_ioport = bus_alloc_resource_any(dev,
425 SYS_RES_IOPORT, &adapter->io_rid, RF_ACTIVE);
426 if (!(adapter->res_ioport)) {
427 device_printf(dev, "Unable to allocate bus resource: ioport\n");
432 adapter->hw.reg_io_tag = rman_get_bustag(adapter->res_ioport);
433 adapter->hw.reg_io_handle = rman_get_bushandle(adapter->res_ioport);
437 adapter->res_interrupt = bus_alloc_resource_any(dev, SYS_RES_IRQ,
438 &rid, RF_SHAREABLE | RF_ACTIVE);
439 if (!(adapter->res_interrupt)) {
440 device_printf(dev, "Unable to allocate bus resource: interrupt\n");
445 adapter->hw.back = &adapter->osdep;
447 /* Initialize eeprom parameters */
448 em_init_eeprom_params(&adapter->hw);
450 tsize = adapter->num_tx_desc * sizeof(struct em_tx_desc);
452 /* Allocate Transmit Descriptor ring */
453 if (em_dma_malloc(adapter, tsize, &adapter->txdma, BUS_DMA_WAITOK)) {
454 device_printf(dev, "Unable to allocate TxDescriptor memory\n");
458 adapter->tx_desc_base = (struct em_tx_desc *) adapter->txdma.dma_vaddr;
460 rsize = adapter->num_rx_desc * sizeof(struct em_rx_desc);
462 /* Allocate Receive Descriptor ring */
463 if (em_dma_malloc(adapter, rsize, &adapter->rxdma, BUS_DMA_WAITOK)) {
464 device_printf(dev, "Unable to allocate rx_desc memory\n");
468 adapter->rx_desc_base = (struct em_rx_desc *) adapter->rxdma.dma_vaddr;
470 /* Initialize the hardware */
471 if (em_hardware_init(adapter)) {
472 device_printf(dev, "Unable to initialize the hardware\n");
477 /* Copy the permanent MAC address out of the EEPROM */
478 if (em_read_mac_addr(&adapter->hw) < 0) {
479 device_printf(dev, "EEPROM read error while reading mac address\n");
484 if (!em_is_valid_ether_addr(adapter->hw.mac_addr)) {
485 device_printf(dev, "Invalid mac address\n");
490 /* Setup OS specific network interface */
491 em_setup_interface(dev, adapter);
493 /* Initialize statistics */
494 em_clear_hw_cntrs(&adapter->hw);
495 em_update_stats_counters(adapter);
496 adapter->hw.get_link_status = 1;
497 em_check_for_link(&adapter->hw);
499 /* Print the link status */
500 if (adapter->link_active == 1) {
501 em_get_speed_and_duplex(&adapter->hw, &adapter->link_speed,
502 &adapter->link_duplex);
503 device_printf(dev, "Speed: %d Mbps, Duplex: %s\n",
505 adapter->link_duplex == FULL_DUPLEX ? "Full" : "Half");
507 device_printf(dev, "Speed: N/A, Duplex:N/A\n");
509 /* Identify 82544 on PCIX */
510 em_get_bus_info(&adapter->hw);
511 if (adapter->hw.bus_type == em_bus_type_pcix &&
512 adapter->hw.mac_type == em_82544)
513 adapter->pcix_82544 = TRUE;
515 adapter->pcix_82544 = FALSE;
517 error = bus_setup_intr(dev, adapter->res_interrupt, INTR_TYPE_NET,
518 (void (*)(void *)) em_intr, adapter,
519 &adapter->int_handler_tag, NULL);
521 device_printf(dev, "Error registering interrupt handler!\n");
522 ether_ifdetach(&adapter->interface_data.ac_if);
526 INIT_DEBUGOUT("em_attach: end");
534 /*********************************************************************
535 * Device removal routine
537 * The detach entry point is called when the driver is being removed.
538 * This routine stops the adapter and deallocates all the resources
539 * that were allocated for driver operation.
541 * return 0 on success, positive on failure
542 *********************************************************************/
545 em_detach(device_t dev)
547 struct adapter * adapter = device_get_softc(dev);
550 INIT_DEBUGOUT("em_detach: begin");
553 adapter->in_detach = 1;
555 if (device_is_attached(dev)) {
557 em_phy_hw_reset(&adapter->hw);
558 ether_ifdetach(&adapter->interface_data.ac_if);
560 bus_generic_detach(dev);
562 if (adapter->res_interrupt != NULL) {
563 bus_teardown_intr(dev, adapter->res_interrupt,
564 adapter->int_handler_tag);
565 bus_release_resource(dev, SYS_RES_IRQ, 0,
566 adapter->res_interrupt);
568 if (adapter->res_memory != NULL) {
569 bus_release_resource(dev, SYS_RES_MEMORY, EM_MMBA,
570 adapter->res_memory);
573 if (adapter->res_ioport != NULL) {
574 bus_release_resource(dev, SYS_RES_IOPORT, adapter->io_rid,
575 adapter->res_ioport);
578 /* Free Transmit Descriptor ring */
579 if (adapter->tx_desc_base != NULL) {
580 em_dma_free(adapter, &adapter->txdma);
581 adapter->tx_desc_base = NULL;
584 /* Free Receive Descriptor ring */
585 if (adapter->rx_desc_base != NULL) {
586 em_dma_free(adapter, &adapter->rxdma);
587 adapter->rx_desc_base = NULL;
590 adapter->sysctl_tree = NULL;
591 sysctl_ctx_free(&adapter->sysctl_ctx);
597 /*********************************************************************
599 * Shutdown entry point
601 **********************************************************************/
604 em_shutdown(device_t dev)
606 struct adapter *adapter = device_get_softc(dev);
611 /*********************************************************************
612 * Transmit entry point
614 * em_start is called by the stack to initiate a transmit.
615 * The driver will remain in this routine as long as there are
616 * packets to transmit and transmit resources are available.
617 * In case resources are not available stack is notified and
618 * the packet is requeued.
619 **********************************************************************/
622 em_start(struct ifnet *ifp)
626 struct adapter *adapter = ifp->if_softc;
628 if (!adapter->link_active)
632 while (!ifq_is_empty(&ifp->if_snd)) {
633 m_head = ifq_poll(&ifp->if_snd);
638 if (em_encap(adapter, m_head)) {
639 ifp->if_flags |= IFF_OACTIVE;
642 m_head = ifq_dequeue(&ifp->if_snd);
644 /* Send a copy of the frame to the BPF listener */
645 BPF_MTAP(ifp, m_head);
647 /* Set timeout in case hardware has problems transmitting */
648 ifp->if_timer = EM_TX_TIMEOUT;
653 /*********************************************************************
656 * em_ioctl is called when the user wants to configure the
659 * return 0 on success, positive on failure
660 **********************************************************************/
663 em_ioctl(struct ifnet *ifp, u_long command, caddr_t data, struct ucred *cr)
665 int s, mask, error = 0;
666 struct ifreq *ifr = (struct ifreq *) data;
667 struct adapter *adapter = ifp->if_softc;
671 if (adapter->in_detach)
677 IOCTL_DEBUGOUT("ioctl rcv'd: SIOCxIFADDR (Get/Set Interface Addr)");
678 ether_ioctl(ifp, command, data);
681 IOCTL_DEBUGOUT("ioctl rcv'd: SIOCSIFMTU (Set Interface MTU)");
682 if (ifr->ifr_mtu > MAX_JUMBO_FRAME_SIZE - ETHER_HDR_LEN) {
685 ifp->if_mtu = ifr->ifr_mtu;
686 adapter->hw.max_frame_size =
687 ifp->if_mtu + ETHER_HDR_LEN + ETHER_CRC_LEN;
692 IOCTL_DEBUGOUT("ioctl rcv'd: SIOCSIFFLAGS (Set Interface Flags)");
693 if (ifp->if_flags & IFF_UP) {
694 if (!(ifp->if_flags & IFF_RUNNING))
696 em_disable_promisc(adapter);
697 em_set_promisc(adapter);
699 if (ifp->if_flags & IFF_RUNNING)
705 IOCTL_DEBUGOUT("ioctl rcv'd: SIOC(ADD|DEL)MULTI");
706 if (ifp->if_flags & IFF_RUNNING) {
707 em_disable_intr(adapter);
708 em_set_multi(adapter);
709 if (adapter->hw.mac_type == em_82542_rev2_0)
710 em_initialize_receive_unit(adapter);
711 #ifdef DEVICE_POLLING
712 if (!(ifp->if_flags & IFF_POLLING))
714 em_enable_intr(adapter);
719 IOCTL_DEBUGOUT("ioctl rcv'd: SIOCxIFMEDIA (Get/Set Interface Media)");
720 error = ifmedia_ioctl(ifp, ifr, &adapter->media, command);
723 IOCTL_DEBUGOUT("ioctl rcv'd: SIOCSIFCAP (Set Capabilities)");
724 mask = ifr->ifr_reqcap ^ ifp->if_capenable;
725 if (mask & IFCAP_HWCSUM) {
726 if (IFCAP_HWCSUM & ifp->if_capenable)
727 ifp->if_capenable &= ~IFCAP_HWCSUM;
729 ifp->if_capenable |= IFCAP_HWCSUM;
730 if (ifp->if_flags & IFF_RUNNING)
735 IOCTL_DEBUGOUT1("ioctl received: UNKNOWN (0x%x)\n", (int)command);
744 /*********************************************************************
745 * Watchdog entry point
747 * This routine is called whenever hardware quits transmitting.
749 **********************************************************************/
752 em_watchdog(struct ifnet *ifp)
754 struct adapter * adapter;
755 adapter = ifp->if_softc;
757 /* If we are in this routine because of pause frames, then
758 * don't reset the hardware.
760 if (E1000_READ_REG(&adapter->hw, STATUS) & E1000_STATUS_TXOFF) {
761 ifp->if_timer = EM_TX_TIMEOUT;
765 if (em_check_for_link(&adapter->hw))
766 if_printf(ifp, "watchdog timeout -- resetting\n");
768 ifp->if_flags &= ~IFF_RUNNING;
775 /*********************************************************************
778 * This routine is used in two ways. It is used by the stack as
779 * init entry point in network interface structure. It is also used
780 * by the driver as a hw/sw initialization routine to get to a
783 * return 0 on success, positive on failure
784 **********************************************************************/
790 struct adapter *adapter = arg;
791 struct ifnet *ifp = &adapter->interface_data.ac_if;
793 INIT_DEBUGOUT("em_init: begin");
799 /* Get the latest mac address, User can use a LAA */
800 bcopy(adapter->interface_data.ac_enaddr, adapter->hw.mac_addr,
803 /* Initialize the hardware */
804 if (em_hardware_init(adapter)) {
805 if_printf(ifp, "Unable to initialize the hardware\n");
810 em_enable_vlans(adapter);
812 /* Prepare transmit descriptors and buffers */
813 if (em_setup_transmit_structures(adapter)) {
814 if_printf(ifp, "Could not setup transmit structures\n");
819 em_initialize_transmit_unit(adapter);
821 /* Setup Multicast table */
822 em_set_multi(adapter);
824 /* Prepare receive descriptors and buffers */
825 if (em_setup_receive_structures(adapter)) {
826 if_printf(ifp, "Could not setup receive structures\n");
831 em_initialize_receive_unit(adapter);
833 /* Don't loose promiscuous settings */
834 em_set_promisc(adapter);
836 ifp->if_flags |= IFF_RUNNING;
837 ifp->if_flags &= ~IFF_OACTIVE;
839 if (adapter->hw.mac_type >= em_82543) {
840 if (ifp->if_capenable & IFCAP_TXCSUM)
841 ifp->if_hwassist = EM_CHECKSUM_FEATURES;
843 ifp->if_hwassist = 0;
846 callout_reset(&adapter->timer, 2*hz, em_local_timer, adapter);
847 em_clear_hw_cntrs(&adapter->hw);
848 #ifdef DEVICE_POLLING
850 * Only enable interrupts if we are not polling, make sure
851 * they are off otherwise.
853 if (ifp->if_flags & IFF_POLLING)
854 em_disable_intr(adapter);
856 #endif /* DEVICE_POLLING */
857 em_enable_intr(adapter);
859 /* Don't reset the phy next time init gets called */
860 adapter->hw.phy_reset_disable = TRUE;
865 #ifdef DEVICE_POLLING
866 static poll_handler_t em_poll;
869 em_poll(struct ifnet *ifp, enum poll_cmd cmd, int count)
871 struct adapter *adapter = ifp->if_softc;
874 if (cmd == POLL_DEREGISTER) { /* final call, enable interrupts */
875 em_enable_intr(adapter);
878 if (cmd == POLL_AND_CHECK_STATUS) {
879 reg_icr = E1000_READ_REG(&adapter->hw, ICR);
880 if (reg_icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC)) {
881 callout_stop(&adapter->timer);
882 adapter->hw.get_link_status = 1;
883 em_check_for_link(&adapter->hw);
884 em_print_link_status(adapter);
885 callout_reset(&adapter->timer, 2*hz, em_local_timer,
889 if (ifp->if_flags & IFF_RUNNING) {
890 em_process_receive_interrupts(adapter, count);
891 em_clean_transmit_interrupts(adapter);
894 if ((ifp->if_flags & IFF_RUNNING) && !ifq_is_empty(&ifp->if_snd))
897 #endif /* DEVICE_POLLING */
899 /*********************************************************************
901 * Interrupt Service routine
903 **********************************************************************/
909 struct adapter *adapter = arg;
911 ifp = &adapter->interface_data.ac_if;
913 #ifdef DEVICE_POLLING
914 if (ifp->if_flags & IFF_POLLING)
917 if (ether_poll_register(em_poll, ifp)) {
918 em_disable_intr(adapter);
922 #endif /* DEVICE_POLLING */
924 reg_icr = E1000_READ_REG(&adapter->hw, ICR);
928 /* Link status change */
929 if (reg_icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC)) {
930 callout_stop(&adapter->timer);
931 adapter->hw.get_link_status = 1;
932 em_check_for_link(&adapter->hw);
933 em_print_link_status(adapter);
934 callout_reset(&adapter->timer, 2*hz, em_local_timer, adapter);
938 * note: do not attempt to improve efficiency by looping. This
939 * only results in unnecessary piecemeal collection of received
940 * packets and unnecessary piecemeal cleanups of the transmit ring.
942 if (ifp->if_flags & IFF_RUNNING) {
943 em_process_receive_interrupts(adapter, -1);
944 em_clean_transmit_interrupts(adapter);
947 if ((ifp->if_flags & IFF_RUNNING) && !ifq_is_empty(&ifp->if_snd))
951 /*********************************************************************
953 * Media Ioctl callback
955 * This routine is called whenever the user queries the status of
956 * the interface using ifconfig.
958 **********************************************************************/
960 em_media_status(struct ifnet *ifp, struct ifmediareq *ifmr)
962 struct adapter * adapter = ifp->if_softc;
964 INIT_DEBUGOUT("em_media_status: begin");
966 em_check_for_link(&adapter->hw);
967 if (E1000_READ_REG(&adapter->hw, STATUS) & E1000_STATUS_LU) {
968 if (adapter->link_active == 0) {
969 em_get_speed_and_duplex(&adapter->hw,
970 &adapter->link_speed,
971 &adapter->link_duplex);
972 adapter->link_active = 1;
975 if (adapter->link_active == 1) {
976 adapter->link_speed = 0;
977 adapter->link_duplex = 0;
978 adapter->link_active = 0;
982 ifmr->ifm_status = IFM_AVALID;
983 ifmr->ifm_active = IFM_ETHER;
985 if (!adapter->link_active)
988 ifmr->ifm_status |= IFM_ACTIVE;
990 if (adapter->hw.media_type == em_media_type_fiber) {
991 ifmr->ifm_active |= IFM_1000_SX | IFM_FDX;
993 switch (adapter->link_speed) {
995 ifmr->ifm_active |= IFM_10_T;
998 ifmr->ifm_active |= IFM_100_TX;
1001 ifmr->ifm_active |= IFM_1000_T;
1004 if (adapter->link_duplex == FULL_DUPLEX)
1005 ifmr->ifm_active |= IFM_FDX;
1007 ifmr->ifm_active |= IFM_HDX;
1011 /*********************************************************************
1013 * Media Ioctl callback
1015 * This routine is called when the user changes speed/duplex using
1016 * media/mediopt option with ifconfig.
1018 **********************************************************************/
1020 em_media_change(struct ifnet *ifp)
1022 struct adapter * adapter = ifp->if_softc;
1023 struct ifmedia *ifm = &adapter->media;
1025 INIT_DEBUGOUT("em_media_change: begin");
1027 if (IFM_TYPE(ifm->ifm_media) != IFM_ETHER)
1030 switch (IFM_SUBTYPE(ifm->ifm_media)) {
1032 adapter->hw.autoneg = DO_AUTO_NEG;
1033 adapter->hw.autoneg_advertised = AUTONEG_ADV_DEFAULT;
1037 adapter->hw.autoneg = DO_AUTO_NEG;
1038 adapter->hw.autoneg_advertised = ADVERTISE_1000_FULL;
1041 adapter->hw.autoneg = FALSE;
1042 adapter->hw.autoneg_advertised = 0;
1043 if ((ifm->ifm_media & IFM_GMASK) == IFM_FDX)
1044 adapter->hw.forced_speed_duplex = em_100_full;
1046 adapter->hw.forced_speed_duplex = em_100_half;
1049 adapter->hw.autoneg = FALSE;
1050 adapter->hw.autoneg_advertised = 0;
1051 if ((ifm->ifm_media & IFM_GMASK) == IFM_FDX)
1052 adapter->hw.forced_speed_duplex = em_10_full;
1054 adapter->hw.forced_speed_duplex = em_10_half;
1057 if_printf(ifp, "Unsupported media type\n");
1060 * As the speed/duplex settings may have changed we need to
1063 adapter->hw.phy_reset_disable = FALSE;
1071 em_tx_cb(void *arg, bus_dma_segment_t *seg, int nsegs, bus_size_t mapsize,
1074 struct em_q *q = arg;
1078 KASSERT(nsegs <= EM_MAX_SCATTER,
1079 ("Too many DMA segments returned when mapping tx packet"));
1081 bcopy(seg, q->segs, nsegs * sizeof(seg[0]));
1084 #define EM_FIFO_HDR 0x10
1085 #define EM_82547_PKT_THRESH 0x3e0
1086 #define EM_82547_TX_FIFO_SIZE 0x2800
1087 #define EM_82547_TX_FIFO_BEGIN 0xf00
1088 /*********************************************************************
1090 * This routine maps the mbufs to tx descriptors.
1092 * return 0 on success, positive on failure
1093 **********************************************************************/
1095 em_encap(struct adapter *adapter, struct mbuf *m_head)
1098 uint32_t txd_lower, txd_used = 0, txd_saved = 0;
1102 /* For 82544 Workaround */
1103 DESC_ARRAY desc_array;
1104 uint32_t array_elements;
1107 struct ifvlan *ifv = NULL;
1109 struct em_buffer *tx_buffer = NULL;
1110 struct em_tx_desc *current_tx_desc = NULL;
1111 struct ifnet *ifp = &adapter->interface_data.ac_if;
1114 * Force a cleanup if number of TX descriptors
1115 * available hits the threshold
1117 if (adapter->num_tx_desc_avail <= EM_TX_CLEANUP_THRESHOLD) {
1118 em_clean_transmit_interrupts(adapter);
1119 if (adapter->num_tx_desc_avail <= EM_TX_CLEANUP_THRESHOLD) {
1120 adapter->no_tx_desc_avail1++;
1125 * Map the packet for DMA.
1127 if (bus_dmamap_create(adapter->txtag, BUS_DMA_NOWAIT, &q.map)) {
1128 adapter->no_tx_map_avail++;
1131 error = bus_dmamap_load_mbuf(adapter->txtag, q.map, m_head, em_tx_cb,
1132 &q, BUS_DMA_NOWAIT);
1134 adapter->no_tx_dma_setup++;
1135 bus_dmamap_destroy(adapter->txtag, q.map);
1138 KASSERT(q.nsegs != 0, ("em_encap: empty packet"));
1140 if (q.nsegs > adapter->num_tx_desc_avail) {
1141 adapter->no_tx_desc_avail2++;
1142 bus_dmamap_unload(adapter->txtag, q.map);
1143 bus_dmamap_destroy(adapter->txtag, q.map);
1147 if (ifp->if_hwassist > 0) {
1148 em_transmit_checksum_setup(adapter, m_head,
1149 &txd_upper, &txd_lower);
1152 txd_upper = txd_lower = 0;
1154 /* Find out if we are in vlan mode */
1155 if ((m_head->m_flags & (M_PROTO1|M_PKTHDR)) == (M_PROTO1|M_PKTHDR) &&
1156 m_head->m_pkthdr.rcvif != NULL &&
1157 m_head->m_pkthdr.rcvif->if_type == IFT_L2VLAN)
1158 ifv = m_head->m_pkthdr.rcvif->if_softc;
1160 i = adapter->next_avail_tx_desc;
1161 if (adapter->pcix_82544) {
1165 for (j = 0; j < q.nsegs; j++) {
1166 /* If adapter is 82544 and on PCIX bus */
1167 if(adapter->pcix_82544) {
1169 address = htole64(q.segs[j].ds_addr);
1171 * Check the Address and Length combination and
1172 * split the data accordingly
1174 array_elements = em_fill_descriptors(address,
1175 htole32(q.segs[j].ds_len),
1177 for (counter = 0; counter < array_elements; counter++) {
1178 if (txd_used == adapter->num_tx_desc_avail) {
1179 adapter->next_avail_tx_desc = txd_saved;
1180 adapter->no_tx_desc_avail2++;
1181 bus_dmamap_unload(adapter->txtag, q.map);
1182 bus_dmamap_destroy(adapter->txtag, q.map);
1185 tx_buffer = &adapter->tx_buffer_area[i];
1186 current_tx_desc = &adapter->tx_desc_base[i];
1187 current_tx_desc->buffer_addr = htole64(
1188 desc_array.descriptor[counter].address);
1189 current_tx_desc->lower.data = htole32(
1190 (adapter->txd_cmd | txd_lower |
1191 (uint16_t)desc_array.descriptor[counter].length));
1192 current_tx_desc->upper.data = htole32((txd_upper));
1193 if (++i == adapter->num_tx_desc)
1196 tx_buffer->m_head = NULL;
1200 tx_buffer = &adapter->tx_buffer_area[i];
1201 current_tx_desc = &adapter->tx_desc_base[i];
1203 current_tx_desc->buffer_addr = htole64(q.segs[j].ds_addr);
1204 current_tx_desc->lower.data = htole32(
1205 adapter->txd_cmd | txd_lower | q.segs[j].ds_len);
1206 current_tx_desc->upper.data = htole32(txd_upper);
1208 if (++i == adapter->num_tx_desc)
1211 tx_buffer->m_head = NULL;
1215 adapter->next_avail_tx_desc = i;
1216 if (adapter->pcix_82544)
1217 adapter->num_tx_desc_avail -= txd_used;
1219 adapter->num_tx_desc_avail -= q.nsegs;
1222 /* Set the vlan id */
1223 current_tx_desc->upper.fields.special = htole16(ifv->ifv_tag);
1225 /* Tell hardware to add tag */
1226 current_tx_desc->lower.data |= htole32(E1000_TXD_CMD_VLE);
1229 tx_buffer->m_head = m_head;
1230 tx_buffer->map = q.map;
1231 bus_dmamap_sync(adapter->txtag, q.map, BUS_DMASYNC_PREWRITE);
1234 * Last Descriptor of Packet needs End Of Packet (EOP)
1236 current_tx_desc->lower.data |= htole32(E1000_TXD_CMD_EOP);
1239 * Advance the Transmit Descriptor Tail (Tdt), this tells the E1000
1240 * that this frame is available to transmit.
1242 if (adapter->hw.mac_type == em_82547 &&
1243 adapter->link_duplex == HALF_DUPLEX) {
1244 em_82547_move_tail(adapter);
1246 E1000_WRITE_REG(&adapter->hw, TDT, i);
1247 if (adapter->hw.mac_type == em_82547) {
1248 em_82547_update_fifo_head(adapter, m_head->m_pkthdr.len);
1255 /*********************************************************************
1257 * 82547 workaround to avoid controller hang in half-duplex environment.
1258 * The workaround is to avoid queuing a large packet that would span
1259 * the internal Tx FIFO ring boundary. We need to reset the FIFO pointers
1260 * in this case. We do that only when FIFO is quiescent.
1262 **********************************************************************/
1264 em_82547_move_tail(void *arg)
1267 struct adapter *adapter = arg;
1270 struct em_tx_desc *tx_desc;
1271 uint16_t length = 0;
1275 hw_tdt = E1000_READ_REG(&adapter->hw, TDT);
1276 sw_tdt = adapter->next_avail_tx_desc;
1278 while (hw_tdt != sw_tdt) {
1279 tx_desc = &adapter->tx_desc_base[hw_tdt];
1280 length += tx_desc->lower.flags.length;
1281 eop = tx_desc->lower.data & E1000_TXD_CMD_EOP;
1282 if(++hw_tdt == adapter->num_tx_desc)
1286 if (em_82547_fifo_workaround(adapter, length)) {
1287 adapter->tx_fifo_wrk++;
1288 callout_reset(&adapter->tx_fifo_timer, 1,
1289 em_82547_move_tail, adapter);
1292 E1000_WRITE_REG(&adapter->hw, TDT, hw_tdt);
1293 em_82547_update_fifo_head(adapter, length);
1301 em_82547_fifo_workaround(struct adapter *adapter, int len)
1303 int fifo_space, fifo_pkt_len;
1305 fifo_pkt_len = EM_ROUNDUP(len + EM_FIFO_HDR, EM_FIFO_HDR);
1307 if (adapter->link_duplex == HALF_DUPLEX) {
1308 fifo_space = EM_82547_TX_FIFO_SIZE - adapter->tx_fifo_head;
1310 if (fifo_pkt_len >= (EM_82547_PKT_THRESH + fifo_space)) {
1311 if (em_82547_tx_fifo_reset(adapter))
1322 em_82547_update_fifo_head(struct adapter *adapter, int len)
1324 int fifo_pkt_len = EM_ROUNDUP(len + EM_FIFO_HDR, EM_FIFO_HDR);
1326 /* tx_fifo_head is always 16 byte aligned */
1327 adapter->tx_fifo_head += fifo_pkt_len;
1328 if (adapter->tx_fifo_head >= EM_82547_TX_FIFO_SIZE)
1329 adapter->tx_fifo_head -= EM_82547_TX_FIFO_SIZE;
1333 em_82547_tx_fifo_reset(struct adapter *adapter)
1337 if ( (E1000_READ_REG(&adapter->hw, TDT) ==
1338 E1000_READ_REG(&adapter->hw, TDH)) &&
1339 (E1000_READ_REG(&adapter->hw, TDFT) ==
1340 E1000_READ_REG(&adapter->hw, TDFH)) &&
1341 (E1000_READ_REG(&adapter->hw, TDFTS) ==
1342 E1000_READ_REG(&adapter->hw, TDFHS)) &&
1343 (E1000_READ_REG(&adapter->hw, TDFPC) == 0)) {
1345 /* Disable TX unit */
1346 tctl = E1000_READ_REG(&adapter->hw, TCTL);
1347 E1000_WRITE_REG(&adapter->hw, TCTL, tctl & ~E1000_TCTL_EN);
1349 /* Reset FIFO pointers */
1350 E1000_WRITE_REG(&adapter->hw, TDFT, EM_82547_TX_FIFO_BEGIN);
1351 E1000_WRITE_REG(&adapter->hw, TDFH, EM_82547_TX_FIFO_BEGIN);
1352 E1000_WRITE_REG(&adapter->hw, TDFTS, EM_82547_TX_FIFO_BEGIN);
1353 E1000_WRITE_REG(&adapter->hw, TDFHS, EM_82547_TX_FIFO_BEGIN);
1355 /* Re-enable TX unit */
1356 E1000_WRITE_REG(&adapter->hw, TCTL, tctl);
1357 E1000_WRITE_FLUSH(&adapter->hw);
1359 adapter->tx_fifo_head = 0;
1360 adapter->tx_fifo_reset++;
1370 em_set_promisc(struct adapter *adapter)
1373 struct ifnet *ifp = &adapter->interface_data.ac_if;
1375 reg_rctl = E1000_READ_REG(&adapter->hw, RCTL);
1377 if (ifp->if_flags & IFF_PROMISC) {
1378 reg_rctl |= (E1000_RCTL_UPE | E1000_RCTL_MPE);
1379 E1000_WRITE_REG(&adapter->hw, RCTL, reg_rctl);
1380 } else if (ifp->if_flags & IFF_ALLMULTI) {
1381 reg_rctl |= E1000_RCTL_MPE;
1382 reg_rctl &= ~E1000_RCTL_UPE;
1383 E1000_WRITE_REG(&adapter->hw, RCTL, reg_rctl);
1388 em_disable_promisc(struct adapter *adapter)
1392 reg_rctl = E1000_READ_REG(&adapter->hw, RCTL);
1394 reg_rctl &= (~E1000_RCTL_UPE);
1395 reg_rctl &= (~E1000_RCTL_MPE);
1396 E1000_WRITE_REG(&adapter->hw, RCTL, reg_rctl);
1399 /*********************************************************************
1402 * This routine is called whenever multicast address list is updated.
1404 **********************************************************************/
1407 em_set_multi(struct adapter *adapter)
1409 uint32_t reg_rctl = 0;
1410 uint8_t mta[MAX_NUM_MULTICAST_ADDRESSES * ETH_LENGTH_OF_ADDRESS];
1411 struct ifmultiaddr *ifma;
1413 struct ifnet *ifp = &adapter->interface_data.ac_if;
1415 IOCTL_DEBUGOUT("em_set_multi: begin");
1417 if (adapter->hw.mac_type == em_82542_rev2_0) {
1418 reg_rctl = E1000_READ_REG(&adapter->hw, RCTL);
1419 if (adapter->hw.pci_cmd_word & CMD_MEM_WRT_INVALIDATE)
1420 em_pci_clear_mwi(&adapter->hw);
1421 reg_rctl |= E1000_RCTL_RST;
1422 E1000_WRITE_REG(&adapter->hw, RCTL, reg_rctl);
1426 LIST_FOREACH(ifma, &ifp->if_multiaddrs, ifma_link) {
1427 if (ifma->ifma_addr->sa_family != AF_LINK)
1430 if (mcnt == MAX_NUM_MULTICAST_ADDRESSES)
1433 bcopy(LLADDR((struct sockaddr_dl *)ifma->ifma_addr),
1434 &mta[mcnt*ETH_LENGTH_OF_ADDRESS], ETH_LENGTH_OF_ADDRESS);
1438 if (mcnt >= MAX_NUM_MULTICAST_ADDRESSES) {
1439 reg_rctl = E1000_READ_REG(&adapter->hw, RCTL);
1440 reg_rctl |= E1000_RCTL_MPE;
1441 E1000_WRITE_REG(&adapter->hw, RCTL, reg_rctl);
1443 em_mc_addr_list_update(&adapter->hw, mta, mcnt, 0, 1);
1445 if (adapter->hw.mac_type == em_82542_rev2_0) {
1446 reg_rctl = E1000_READ_REG(&adapter->hw, RCTL);
1447 reg_rctl &= ~E1000_RCTL_RST;
1448 E1000_WRITE_REG(&adapter->hw, RCTL, reg_rctl);
1450 if (adapter->hw.pci_cmd_word & CMD_MEM_WRT_INVALIDATE)
1451 em_pci_set_mwi(&adapter->hw);
1455 /*********************************************************************
1458 * This routine checks for link status and updates statistics.
1460 **********************************************************************/
1463 em_local_timer(void *arg)
1467 struct adapter *adapter = arg;
1468 ifp = &adapter->interface_data.ac_if;
1472 em_check_for_link(&adapter->hw);
1473 em_print_link_status(adapter);
1474 em_update_stats_counters(adapter);
1475 if (em_display_debug_stats && ifp->if_flags & IFF_RUNNING)
1476 em_print_hw_stats(adapter);
1477 em_smartspeed(adapter);
1479 callout_reset(&adapter->timer, 2*hz, em_local_timer, adapter);
1485 em_print_link_status(struct adapter *adapter)
1487 if (E1000_READ_REG(&adapter->hw, STATUS) & E1000_STATUS_LU) {
1488 if (adapter->link_active == 0) {
1489 em_get_speed_and_duplex(&adapter->hw,
1490 &adapter->link_speed,
1491 &adapter->link_duplex);
1492 device_printf(adapter->dev, "Link is up %d Mbps %s\n",
1493 adapter->link_speed,
1494 ((adapter->link_duplex == FULL_DUPLEX) ?
1495 "Full Duplex" : "Half Duplex"));
1496 adapter->link_active = 1;
1497 adapter->smartspeed = 0;
1500 if (adapter->link_active == 1) {
1501 adapter->link_speed = 0;
1502 adapter->link_duplex = 0;
1503 device_printf(adapter->dev, "Link is Down\n");
1504 adapter->link_active = 0;
1509 /*********************************************************************
1511 * This routine disables all traffic on the adapter by issuing a
1512 * global reset on the MAC and deallocates TX/RX buffers.
1514 **********************************************************************/
1520 struct adapter * adapter = arg;
1521 ifp = &adapter->interface_data.ac_if;
1523 INIT_DEBUGOUT("em_stop: begin");
1524 em_disable_intr(adapter);
1525 em_reset_hw(&adapter->hw);
1526 callout_stop(&adapter->timer);
1527 callout_stop(&adapter->tx_fifo_timer);
1528 em_free_transmit_structures(adapter);
1529 em_free_receive_structures(adapter);
1531 /* Tell the stack that the interface is no longer active */
1532 ifp->if_flags &= ~(IFF_RUNNING | IFF_OACTIVE);
1536 /*********************************************************************
1538 * Determine hardware revision.
1540 **********************************************************************/
1542 em_identify_hardware(struct adapter * adapter)
1544 device_t dev = adapter->dev;
1546 /* Make sure our PCI config space has the necessary stuff set */
1547 adapter->hw.pci_cmd_word = pci_read_config(dev, PCIR_COMMAND, 2);
1548 if (!((adapter->hw.pci_cmd_word & PCIM_CMD_BUSMASTEREN) &&
1549 (adapter->hw.pci_cmd_word & PCIM_CMD_MEMEN))) {
1550 device_printf(dev, "Memory Access and/or Bus Master bits were not set!\n");
1551 adapter->hw.pci_cmd_word |=
1552 (PCIM_CMD_BUSMASTEREN | PCIM_CMD_MEMEN);
1553 pci_write_config(dev, PCIR_COMMAND, adapter->hw.pci_cmd_word, 2);
1556 /* Save off the information about this board */
1557 adapter->hw.vendor_id = pci_get_vendor(dev);
1558 adapter->hw.device_id = pci_get_device(dev);
1559 adapter->hw.revision_id = pci_get_revid(dev);
1560 adapter->hw.subsystem_vendor_id = pci_get_subvendor(dev);
1561 adapter->hw.subsystem_id = pci_get_subdevice(dev);
1563 /* Identify the MAC */
1564 if (em_set_mac_type(&adapter->hw))
1565 device_printf(dev, "Unknown MAC Type\n");
1567 if (adapter->hw.mac_type == em_82541 ||
1568 adapter->hw.mac_type == em_82541_rev_2 ||
1569 adapter->hw.mac_type == em_82547 ||
1570 adapter->hw.mac_type == em_82547_rev_2)
1571 adapter->hw.phy_init_script = TRUE;
1574 /*********************************************************************
1576 * Initialize the hardware to a configuration as specified by the
1577 * adapter structure. The controller is reset, the EEPROM is
1578 * verified, the MAC address is set, then the shared initialization
1579 * routines are called.
1581 **********************************************************************/
1583 em_hardware_init(struct adapter *adapter)
1585 INIT_DEBUGOUT("em_hardware_init: begin");
1586 /* Issue a global reset */
1587 em_reset_hw(&adapter->hw);
1589 /* When hardware is reset, fifo_head is also reset */
1590 adapter->tx_fifo_head = 0;
1592 /* Make sure we have a good EEPROM before we read from it */
1593 if (em_validate_eeprom_checksum(&adapter->hw) < 0) {
1594 device_printf(adapter->dev, "The EEPROM Checksum Is Not Valid\n");
1598 if (em_read_part_num(&adapter->hw, &(adapter->part_num)) < 0) {
1599 device_printf(adapter->dev, "EEPROM read error while reading part number\n");
1603 if (em_init_hw(&adapter->hw) < 0) {
1604 device_printf(adapter->dev, "Hardware Initialization Failed");
1608 em_check_for_link(&adapter->hw);
1609 if (E1000_READ_REG(&adapter->hw, STATUS) & E1000_STATUS_LU)
1610 adapter->link_active = 1;
1612 adapter->link_active = 0;
1614 if (adapter->link_active) {
1615 em_get_speed_and_duplex(&adapter->hw,
1616 &adapter->link_speed,
1617 &adapter->link_duplex);
1619 adapter->link_speed = 0;
1620 adapter->link_duplex = 0;
1626 /*********************************************************************
1628 * Setup networking device structure and register an interface.
1630 **********************************************************************/
1632 em_setup_interface(device_t dev, struct adapter *adapter)
1635 INIT_DEBUGOUT("em_setup_interface: begin");
1637 ifp = &adapter->interface_data.ac_if;
1638 if_initname(ifp, device_get_name(dev), device_get_unit(dev));
1639 ifp->if_mtu = ETHERMTU;
1640 ifp->if_baudrate = 1000000000;
1641 ifp->if_init = em_init;
1642 ifp->if_softc = adapter;
1643 ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST;
1644 ifp->if_ioctl = em_ioctl;
1645 ifp->if_start = em_start;
1646 ifp->if_watchdog = em_watchdog;
1647 ifq_set_maxlen(&ifp->if_snd, adapter->num_tx_desc - 1);
1648 ifq_set_ready(&ifp->if_snd);
1650 ether_ifattach(ifp, adapter->hw.mac_addr);
1652 if (adapter->hw.mac_type >= em_82543) {
1653 ifp->if_capabilities = IFCAP_HWCSUM;
1654 ifp->if_capenable = ifp->if_capabilities;
1658 * Tell the upper layer(s) we support long frames.
1660 ifp->if_data.ifi_hdrlen = sizeof(struct ether_vlan_header);
1661 ifp->if_capabilities |= IFCAP_VLAN_HWTAGGING | IFCAP_VLAN_MTU;
1664 * Specify the media types supported by this adapter and register
1665 * callbacks to update media and link information
1667 ifmedia_init(&adapter->media, IFM_IMASK, em_media_change,
1669 if (adapter->hw.media_type == em_media_type_fiber) {
1670 ifmedia_add(&adapter->media, IFM_ETHER | IFM_1000_SX | IFM_FDX,
1672 ifmedia_add(&adapter->media, IFM_ETHER | IFM_1000_SX,
1675 ifmedia_add(&adapter->media, IFM_ETHER | IFM_10_T, 0, NULL);
1676 ifmedia_add(&adapter->media, IFM_ETHER | IFM_10_T | IFM_FDX,
1678 ifmedia_add(&adapter->media, IFM_ETHER | IFM_100_TX,
1680 ifmedia_add(&adapter->media, IFM_ETHER | IFM_100_TX | IFM_FDX,
1682 ifmedia_add(&adapter->media, IFM_ETHER | IFM_1000_T | IFM_FDX,
1684 ifmedia_add(&adapter->media, IFM_ETHER | IFM_1000_T, 0, NULL);
1686 ifmedia_add(&adapter->media, IFM_ETHER | IFM_AUTO, 0, NULL);
1687 ifmedia_set(&adapter->media, IFM_ETHER | IFM_AUTO);
1690 /*********************************************************************
1692 * Workaround for SmartSpeed on 82541 and 82547 controllers
1694 **********************************************************************/
1696 em_smartspeed(struct adapter *adapter)
1700 if (adapter->link_active || (adapter->hw.phy_type != em_phy_igp) ||
1701 !adapter->hw.autoneg ||
1702 !(adapter->hw.autoneg_advertised & ADVERTISE_1000_FULL))
1705 if (adapter->smartspeed == 0) {
1707 * If Master/Slave config fault is asserted twice,
1708 * we assume back-to-back.
1710 em_read_phy_reg(&adapter->hw, PHY_1000T_STATUS, &phy_tmp);
1711 if (!(phy_tmp & SR_1000T_MS_CONFIG_FAULT))
1713 em_read_phy_reg(&adapter->hw, PHY_1000T_STATUS, &phy_tmp);
1714 if (phy_tmp & SR_1000T_MS_CONFIG_FAULT) {
1715 em_read_phy_reg(&adapter->hw, PHY_1000T_CTRL,
1717 if (phy_tmp & CR_1000T_MS_ENABLE) {
1718 phy_tmp &= ~CR_1000T_MS_ENABLE;
1719 em_write_phy_reg(&adapter->hw,
1720 PHY_1000T_CTRL, phy_tmp);
1721 adapter->smartspeed++;
1722 if (adapter->hw.autoneg &&
1723 !em_phy_setup_autoneg(&adapter->hw) &&
1724 !em_read_phy_reg(&adapter->hw, PHY_CTRL,
1726 phy_tmp |= (MII_CR_AUTO_NEG_EN |
1727 MII_CR_RESTART_AUTO_NEG);
1728 em_write_phy_reg(&adapter->hw,
1734 } else if (adapter->smartspeed == EM_SMARTSPEED_DOWNSHIFT) {
1735 /* If still no link, perhaps using 2/3 pair cable */
1736 em_read_phy_reg(&adapter->hw, PHY_1000T_CTRL, &phy_tmp);
1737 phy_tmp |= CR_1000T_MS_ENABLE;
1738 em_write_phy_reg(&adapter->hw, PHY_1000T_CTRL, phy_tmp);
1739 if (adapter->hw.autoneg &&
1740 !em_phy_setup_autoneg(&adapter->hw) &&
1741 !em_read_phy_reg(&adapter->hw, PHY_CTRL, &phy_tmp)) {
1742 phy_tmp |= (MII_CR_AUTO_NEG_EN |
1743 MII_CR_RESTART_AUTO_NEG);
1744 em_write_phy_reg(&adapter->hw, PHY_CTRL, phy_tmp);
1747 /* Restart process after EM_SMARTSPEED_MAX iterations */
1748 if (adapter->smartspeed++ == EM_SMARTSPEED_MAX)
1749 adapter->smartspeed = 0;
1753 * Manage DMA'able memory.
1756 em_dmamap_cb(void *arg, bus_dma_segment_t *segs, int nseg, int error)
1760 *(bus_addr_t*) arg = segs->ds_addr;
1764 em_dma_malloc(struct adapter *adapter, bus_size_t size,
1765 struct em_dma_alloc *dma, int mapflags)
1768 device_t dev = adapter->dev;
1770 r = bus_dma_tag_create(NULL, /* parent */
1771 PAGE_SIZE, 0, /* alignment, bounds */
1772 BUS_SPACE_MAXADDR, /* lowaddr */
1773 BUS_SPACE_MAXADDR, /* highaddr */
1774 NULL, NULL, /* filter, filterarg */
1777 size, /* maxsegsize */
1778 BUS_DMA_ALLOCNOW, /* flags */
1781 device_printf(dev, "em_dma_malloc: bus_dma_tag_create failed; "
1786 r = bus_dmamem_alloc(dma->dma_tag, (void**) &dma->dma_vaddr,
1787 BUS_DMA_NOWAIT, &dma->dma_map);
1789 device_printf(dev, "em_dma_malloc: bus_dmammem_alloc failed; "
1790 "size %llu, error %d\n", (uintmax_t)size, r);
1794 r = bus_dmamap_load(dma->dma_tag, dma->dma_map, dma->dma_vaddr,
1798 mapflags | BUS_DMA_NOWAIT);
1800 device_printf(dev, "em_dma_malloc: bus_dmamap_load failed; "
1805 dma->dma_size = size;
1809 bus_dmamap_unload(dma->dma_tag, dma->dma_map);
1811 bus_dmamem_free(dma->dma_tag, dma->dma_vaddr, dma->dma_map);
1812 bus_dma_tag_destroy(dma->dma_tag);
1814 dma->dma_map = NULL;
1815 dma->dma_tag = NULL;
1820 em_dma_free(struct adapter *adapter, struct em_dma_alloc *dma)
1822 bus_dmamap_unload(dma->dma_tag, dma->dma_map);
1823 bus_dmamem_free(dma->dma_tag, dma->dma_vaddr, dma->dma_map);
1824 bus_dma_tag_destroy(dma->dma_tag);
1827 /*********************************************************************
1829 * Allocate memory for tx_buffer structures. The tx_buffer stores all
1830 * the information needed to transmit a packet on the wire.
1832 **********************************************************************/
1834 em_allocate_transmit_structures(struct adapter * adapter)
1836 adapter->tx_buffer_area = malloc(sizeof(struct em_buffer) *
1837 adapter->num_tx_desc, M_DEVBUF, M_NOWAIT | M_ZERO);
1838 if (adapter->tx_buffer_area == NULL) {
1839 device_printf(adapter->dev, "Unable to allocate tx_buffer memory\n");
1846 /*********************************************************************
1848 * Allocate and initialize transmit structures.
1850 **********************************************************************/
1852 em_setup_transmit_structures(struct adapter * adapter)
1855 * Setup DMA descriptor areas.
1857 if (bus_dma_tag_create(NULL, /* parent */
1858 1, 0, /* alignment, bounds */
1859 BUS_SPACE_MAXADDR, /* lowaddr */
1860 BUS_SPACE_MAXADDR, /* highaddr */
1861 NULL, NULL, /* filter, filterarg */
1862 MCLBYTES * 8, /* maxsize */
1863 EM_MAX_SCATTER, /* nsegments */
1864 MCLBYTES * 8, /* maxsegsize */
1865 BUS_DMA_ALLOCNOW, /* flags */
1867 device_printf(adapter->dev, "Unable to allocate TX DMA tag\n");
1871 if (em_allocate_transmit_structures(adapter))
1874 bzero((void *) adapter->tx_desc_base,
1875 (sizeof(struct em_tx_desc)) * adapter->num_tx_desc);
1877 adapter->next_avail_tx_desc = 0;
1878 adapter->oldest_used_tx_desc = 0;
1880 /* Set number of descriptors available */
1881 adapter->num_tx_desc_avail = adapter->num_tx_desc;
1883 /* Set checksum context */
1884 adapter->active_checksum_context = OFFLOAD_NONE;
1889 /*********************************************************************
1891 * Enable transmit unit.
1893 **********************************************************************/
1895 em_initialize_transmit_unit(struct adapter * adapter)
1898 uint32_t reg_tipg = 0;
1901 INIT_DEBUGOUT("em_initialize_transmit_unit: begin");
1903 /* Setup the Base and Length of the Tx Descriptor Ring */
1904 bus_addr = adapter->txdma.dma_paddr;
1905 E1000_WRITE_REG(&adapter->hw, TDBAL, (uint32_t)bus_addr);
1906 E1000_WRITE_REG(&adapter->hw, TDBAH, (uint32_t)(bus_addr >> 32));
1907 E1000_WRITE_REG(&adapter->hw, TDLEN,
1908 adapter->num_tx_desc * sizeof(struct em_tx_desc));
1910 /* Setup the HW Tx Head and Tail descriptor pointers */
1911 E1000_WRITE_REG(&adapter->hw, TDH, 0);
1912 E1000_WRITE_REG(&adapter->hw, TDT, 0);
1914 HW_DEBUGOUT2("Base = %x, Length = %x\n",
1915 E1000_READ_REG(&adapter->hw, TDBAL),
1916 E1000_READ_REG(&adapter->hw, TDLEN));
1918 /* Set the default values for the Tx Inter Packet Gap timer */
1919 switch (adapter->hw.mac_type) {
1920 case em_82542_rev2_0:
1921 case em_82542_rev2_1:
1922 reg_tipg = DEFAULT_82542_TIPG_IPGT;
1923 reg_tipg |= DEFAULT_82542_TIPG_IPGR1 << E1000_TIPG_IPGR1_SHIFT;
1924 reg_tipg |= DEFAULT_82542_TIPG_IPGR2 << E1000_TIPG_IPGR2_SHIFT;
1927 if (adapter->hw.media_type == em_media_type_fiber)
1928 reg_tipg = DEFAULT_82543_TIPG_IPGT_FIBER;
1930 reg_tipg = DEFAULT_82543_TIPG_IPGT_COPPER;
1931 reg_tipg |= DEFAULT_82543_TIPG_IPGR1 << E1000_TIPG_IPGR1_SHIFT;
1932 reg_tipg |= DEFAULT_82543_TIPG_IPGR2 << E1000_TIPG_IPGR2_SHIFT;
1935 E1000_WRITE_REG(&adapter->hw, TIPG, reg_tipg);
1936 E1000_WRITE_REG(&adapter->hw, TIDV, adapter->tx_int_delay.value);
1937 if (adapter->hw.mac_type >= em_82540)
1938 E1000_WRITE_REG(&adapter->hw, TADV,
1939 adapter->tx_abs_int_delay.value);
1941 /* Program the Transmit Control Register */
1942 reg_tctl = E1000_TCTL_PSP | E1000_TCTL_EN |
1943 (E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT);
1944 if (adapter->link_duplex == 1)
1945 reg_tctl |= E1000_FDX_COLLISION_DISTANCE << E1000_COLD_SHIFT;
1947 reg_tctl |= E1000_HDX_COLLISION_DISTANCE << E1000_COLD_SHIFT;
1948 E1000_WRITE_REG(&adapter->hw, TCTL, reg_tctl);
1950 /* Setup Transmit Descriptor Settings for this adapter */
1951 adapter->txd_cmd = E1000_TXD_CMD_IFCS | E1000_TXD_CMD_RS;
1953 if (adapter->tx_int_delay.value > 0)
1954 adapter->txd_cmd |= E1000_TXD_CMD_IDE;
1957 /*********************************************************************
1959 * Free all transmit related data structures.
1961 **********************************************************************/
1963 em_free_transmit_structures(struct adapter * adapter)
1965 struct em_buffer *tx_buffer;
1968 INIT_DEBUGOUT("free_transmit_structures: begin");
1970 if (adapter->tx_buffer_area != NULL) {
1971 tx_buffer = adapter->tx_buffer_area;
1972 for (i = 0; i < adapter->num_tx_desc; i++, tx_buffer++) {
1973 if (tx_buffer->m_head != NULL) {
1974 bus_dmamap_unload(adapter->txtag, tx_buffer->map);
1975 bus_dmamap_destroy(adapter->txtag, tx_buffer->map);
1976 m_freem(tx_buffer->m_head);
1978 tx_buffer->m_head = NULL;
1981 if (adapter->tx_buffer_area != NULL) {
1982 free(adapter->tx_buffer_area, M_DEVBUF);
1983 adapter->tx_buffer_area = NULL;
1985 if (adapter->txtag != NULL) {
1986 bus_dma_tag_destroy(adapter->txtag);
1987 adapter->txtag = NULL;
1991 /*********************************************************************
1993 * The offload context needs to be set when we transfer the first
1994 * packet of a particular protocol (TCP/UDP). We change the
1995 * context only if the protocol type changes.
1997 **********************************************************************/
1999 em_transmit_checksum_setup(struct adapter * adapter,
2001 uint32_t *txd_upper,
2002 uint32_t *txd_lower)
2004 struct em_context_desc *TXD;
2005 struct em_buffer *tx_buffer;
2008 if (mp->m_pkthdr.csum_flags) {
2009 if (mp->m_pkthdr.csum_flags & CSUM_TCP) {
2010 *txd_upper = E1000_TXD_POPTS_TXSM << 8;
2011 *txd_lower = E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D;
2012 if (adapter->active_checksum_context == OFFLOAD_TCP_IP)
2015 adapter->active_checksum_context = OFFLOAD_TCP_IP;
2016 } else if (mp->m_pkthdr.csum_flags & CSUM_UDP) {
2017 *txd_upper = E1000_TXD_POPTS_TXSM << 8;
2018 *txd_lower = E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D;
2019 if (adapter->active_checksum_context == OFFLOAD_UDP_IP)
2022 adapter->active_checksum_context = OFFLOAD_UDP_IP;
2034 /* If we reach this point, the checksum offload context
2035 * needs to be reset.
2037 curr_txd = adapter->next_avail_tx_desc;
2038 tx_buffer = &adapter->tx_buffer_area[curr_txd];
2039 TXD = (struct em_context_desc *) &adapter->tx_desc_base[curr_txd];
2041 TXD->lower_setup.ip_fields.ipcss = ETHER_HDR_LEN;
2042 TXD->lower_setup.ip_fields.ipcso =
2043 ETHER_HDR_LEN + offsetof(struct ip, ip_sum);
2044 TXD->lower_setup.ip_fields.ipcse =
2045 htole16(ETHER_HDR_LEN + sizeof(struct ip) - 1);
2047 TXD->upper_setup.tcp_fields.tucss =
2048 ETHER_HDR_LEN + sizeof(struct ip);
2049 TXD->upper_setup.tcp_fields.tucse = htole16(0);
2051 if (adapter->active_checksum_context == OFFLOAD_TCP_IP) {
2052 TXD->upper_setup.tcp_fields.tucso =
2053 ETHER_HDR_LEN + sizeof(struct ip) +
2054 offsetof(struct tcphdr, th_sum);
2055 } else if (adapter->active_checksum_context == OFFLOAD_UDP_IP) {
2056 TXD->upper_setup.tcp_fields.tucso =
2057 ETHER_HDR_LEN + sizeof(struct ip) +
2058 offsetof(struct udphdr, uh_sum);
2061 TXD->tcp_seg_setup.data = htole32(0);
2062 TXD->cmd_and_length = htole32(adapter->txd_cmd | E1000_TXD_CMD_DEXT);
2064 tx_buffer->m_head = NULL;
2066 if (++curr_txd == adapter->num_tx_desc)
2069 adapter->num_tx_desc_avail--;
2070 adapter->next_avail_tx_desc = curr_txd;
2073 /**********************************************************************
2075 * Examine each tx_buffer in the used queue. If the hardware is done
2076 * processing the packet then free associated resources. The
2077 * tx_buffer is put back on the free queue.
2079 **********************************************************************/
2082 em_clean_transmit_interrupts(struct adapter *adapter)
2086 struct em_buffer *tx_buffer;
2087 struct em_tx_desc *tx_desc;
2088 struct ifnet *ifp = &adapter->interface_data.ac_if;
2090 if (adapter->num_tx_desc_avail == adapter->num_tx_desc)
2095 adapter->clean_tx_interrupts++;
2097 num_avail = adapter->num_tx_desc_avail;
2098 i = adapter->oldest_used_tx_desc;
2100 tx_buffer = &adapter->tx_buffer_area[i];
2101 tx_desc = &adapter->tx_desc_base[i];
2103 while(tx_desc->upper.fields.status & E1000_TXD_STAT_DD) {
2104 tx_desc->upper.data = 0;
2107 if (tx_buffer->m_head) {
2109 bus_dmamap_sync(adapter->txtag, tx_buffer->map,
2110 BUS_DMASYNC_POSTWRITE);
2111 bus_dmamap_unload(adapter->txtag, tx_buffer->map);
2112 bus_dmamap_destroy(adapter->txtag, tx_buffer->map);
2114 m_freem(tx_buffer->m_head);
2115 tx_buffer->m_head = NULL;
2118 if (++i == adapter->num_tx_desc)
2121 tx_buffer = &adapter->tx_buffer_area[i];
2122 tx_desc = &adapter->tx_desc_base[i];
2125 adapter->oldest_used_tx_desc = i;
2128 * If we have enough room, clear IFF_OACTIVE to tell the stack
2129 * that it is OK to send packets.
2130 * If there are no pending descriptors, clear the timeout. Otherwise,
2131 * if some descriptors have been freed, restart the timeout.
2133 if (num_avail > EM_TX_CLEANUP_THRESHOLD) {
2134 ifp->if_flags &= ~IFF_OACTIVE;
2135 if (num_avail == adapter->num_tx_desc)
2137 else if (num_avail == adapter->num_tx_desc_avail)
2138 ifp->if_timer = EM_TX_TIMEOUT;
2140 adapter->num_tx_desc_avail = num_avail;
2144 /*********************************************************************
2146 * Get a buffer from system mbuf buffer pool.
2148 **********************************************************************/
2150 em_get_buf(int i, struct adapter *adapter, struct mbuf *nmp, int how)
2152 struct mbuf *mp = nmp;
2153 struct em_buffer *rx_buffer;
2158 ifp = &adapter->interface_data.ac_if;
2161 mp = m_getcl(how, MT_DATA, M_PKTHDR);
2163 adapter->mbuf_cluster_failed++;
2166 mp->m_len = mp->m_pkthdr.len = MCLBYTES;
2168 mp->m_len = mp->m_pkthdr.len = MCLBYTES;
2169 mp->m_data = mp->m_ext.ext_buf;
2172 if (ifp->if_mtu <= ETHERMTU)
2173 m_adj(mp, ETHER_ALIGN);
2175 rx_buffer = &adapter->rx_buffer_area[i];
2178 * Using memory from the mbuf cluster pool, invoke the
2179 * bus_dma machinery to arrange the memory mapping.
2181 error = bus_dmamap_load(adapter->rxtag, rx_buffer->map,
2182 mtod(mp, void *), mp->m_len,
2183 em_dmamap_cb, &paddr, 0);
2188 rx_buffer->m_head = mp;
2189 adapter->rx_desc_base[i].buffer_addr = htole64(paddr);
2190 bus_dmamap_sync(adapter->rxtag, rx_buffer->map, BUS_DMASYNC_PREREAD);
2195 /*********************************************************************
2197 * Allocate memory for rx_buffer structures. Since we use one
2198 * rx_buffer per received packet, the maximum number of rx_buffer's
2199 * that we'll need is equal to the number of receive descriptors
2200 * that we've allocated.
2202 **********************************************************************/
2204 em_allocate_receive_structures(struct adapter *adapter)
2207 struct em_buffer *rx_buffer;
2209 size = adapter->num_rx_desc * sizeof(struct em_buffer);
2210 adapter->rx_buffer_area = malloc(size, M_DEVBUF, M_WAITOK | M_ZERO);
2212 error = bus_dma_tag_create(NULL, /* parent */
2213 1, 0, /* alignment, bounds */
2214 BUS_SPACE_MAXADDR, /* lowaddr */
2215 BUS_SPACE_MAXADDR, /* highaddr */
2216 NULL, NULL, /* filter, filterarg */
2217 MCLBYTES, /* maxsize */
2219 MCLBYTES, /* maxsegsize */
2220 BUS_DMA_ALLOCNOW, /* flags */
2223 device_printf(adapter->dev, "em_allocate_receive_structures: "
2224 "bus_dma_tag_create failed; error %u\n", error);
2228 rx_buffer = adapter->rx_buffer_area;
2229 for (i = 0; i < adapter->num_rx_desc; i++, rx_buffer++) {
2230 error = bus_dmamap_create(adapter->rxtag, BUS_DMA_NOWAIT,
2233 device_printf(adapter->dev,
2234 "em_allocate_receive_structures: "
2235 "bus_dmamap_create failed; error %u\n",
2241 for (i = 0; i < adapter->num_rx_desc; i++) {
2242 error = em_get_buf(i, adapter, NULL, MB_WAIT);
2244 adapter->rx_buffer_area[i].m_head = NULL;
2245 adapter->rx_desc_base[i].buffer_addr = 0;
2253 bus_dma_tag_destroy(adapter->rxtag);
2255 adapter->rxtag = NULL;
2256 free(adapter->rx_buffer_area, M_DEVBUF);
2257 adapter->rx_buffer_area = NULL;
2261 /*********************************************************************
2263 * Allocate and initialize receive structures.
2265 **********************************************************************/
2267 em_setup_receive_structures(struct adapter *adapter)
2269 bzero((void *) adapter->rx_desc_base,
2270 (sizeof(struct em_rx_desc)) * adapter->num_rx_desc);
2272 if (em_allocate_receive_structures(adapter))
2275 /* Setup our descriptor pointers */
2276 adapter->next_rx_desc_to_check = 0;
2280 /*********************************************************************
2282 * Enable receive unit.
2284 **********************************************************************/
2286 em_initialize_receive_unit(struct adapter *adapter)
2289 uint32_t reg_rxcsum;
2293 INIT_DEBUGOUT("em_initialize_receive_unit: begin");
2295 ifp = &adapter->interface_data.ac_if;
2297 /* Make sure receives are disabled while setting up the descriptor ring */
2298 E1000_WRITE_REG(&adapter->hw, RCTL, 0);
2300 /* Set the Receive Delay Timer Register */
2301 E1000_WRITE_REG(&adapter->hw, RDTR,
2302 adapter->rx_int_delay.value | E1000_RDT_FPDB);
2304 if(adapter->hw.mac_type >= em_82540) {
2305 E1000_WRITE_REG(&adapter->hw, RADV,
2306 adapter->rx_abs_int_delay.value);
2308 /* Set the interrupt throttling rate in 256ns increments */
2309 if (em_int_throttle_ceil) {
2310 E1000_WRITE_REG(&adapter->hw, ITR,
2311 1000000000 / 256 / em_int_throttle_ceil);
2313 E1000_WRITE_REG(&adapter->hw, ITR, 0);
2317 /* Setup the Base and Length of the Rx Descriptor Ring */
2318 bus_addr = adapter->rxdma.dma_paddr;
2319 E1000_WRITE_REG(&adapter->hw, RDBAL, (uint32_t)bus_addr);
2320 E1000_WRITE_REG(&adapter->hw, RDBAH, (uint32_t)(bus_addr >> 32));
2321 E1000_WRITE_REG(&adapter->hw, RDLEN, adapter->num_rx_desc *
2322 sizeof(struct em_rx_desc));
2324 /* Setup the HW Rx Head and Tail Descriptor Pointers */
2325 E1000_WRITE_REG(&adapter->hw, RDH, 0);
2326 E1000_WRITE_REG(&adapter->hw, RDT, adapter->num_rx_desc - 1);
2328 /* Setup the Receive Control Register */
2329 reg_rctl = E1000_RCTL_EN | E1000_RCTL_BAM | E1000_RCTL_LBM_NO |
2330 E1000_RCTL_RDMTS_HALF |
2331 (adapter->hw.mc_filter_type << E1000_RCTL_MO_SHIFT);
2333 if (adapter->hw.tbi_compatibility_on == TRUE)
2334 reg_rctl |= E1000_RCTL_SBP;
2336 switch (adapter->rx_buffer_len) {
2338 case EM_RXBUFFER_2048:
2339 reg_rctl |= E1000_RCTL_SZ_2048;
2341 case EM_RXBUFFER_4096:
2342 reg_rctl |= E1000_RCTL_SZ_4096 | E1000_RCTL_BSEX | E1000_RCTL_LPE;
2344 case EM_RXBUFFER_8192:
2345 reg_rctl |= E1000_RCTL_SZ_8192 | E1000_RCTL_BSEX | E1000_RCTL_LPE;
2347 case EM_RXBUFFER_16384:
2348 reg_rctl |= E1000_RCTL_SZ_16384 | E1000_RCTL_BSEX | E1000_RCTL_LPE;
2352 if (ifp->if_mtu > ETHERMTU)
2353 reg_rctl |= E1000_RCTL_LPE;
2355 /* Enable 82543 Receive Checksum Offload for TCP and UDP */
2356 if ((adapter->hw.mac_type >= em_82543) &&
2357 (ifp->if_capenable & IFCAP_RXCSUM)) {
2358 reg_rxcsum = E1000_READ_REG(&adapter->hw, RXCSUM);
2359 reg_rxcsum |= (E1000_RXCSUM_IPOFL | E1000_RXCSUM_TUOFL);
2360 E1000_WRITE_REG(&adapter->hw, RXCSUM, reg_rxcsum);
2363 /* Enable Receives */
2364 E1000_WRITE_REG(&adapter->hw, RCTL, reg_rctl);
2367 /*********************************************************************
2369 * Free receive related data structures.
2371 **********************************************************************/
2373 em_free_receive_structures(struct adapter *adapter)
2375 struct em_buffer *rx_buffer;
2378 INIT_DEBUGOUT("free_receive_structures: begin");
2380 if (adapter->rx_buffer_area != NULL) {
2381 rx_buffer = adapter->rx_buffer_area;
2382 for (i = 0; i < adapter->num_rx_desc; i++, rx_buffer++) {
2383 if (rx_buffer->map != NULL) {
2384 bus_dmamap_unload(adapter->rxtag, rx_buffer->map);
2385 bus_dmamap_destroy(adapter->rxtag, rx_buffer->map);
2387 if (rx_buffer->m_head != NULL)
2388 m_freem(rx_buffer->m_head);
2389 rx_buffer->m_head = NULL;
2392 if (adapter->rx_buffer_area != NULL) {
2393 free(adapter->rx_buffer_area, M_DEVBUF);
2394 adapter->rx_buffer_area = NULL;
2396 if (adapter->rxtag != NULL) {
2397 bus_dma_tag_destroy(adapter->rxtag);
2398 adapter->rxtag = NULL;
2402 /*********************************************************************
2404 * This routine executes in interrupt context. It replenishes
2405 * the mbufs in the descriptor and sends data which has been
2406 * dma'ed into host memory to upper layer.
2408 * We loop at most count times if count is > 0, or until done if
2411 *********************************************************************/
2413 em_process_receive_interrupts(struct adapter *adapter, int count)
2417 uint8_t accept_frame = 0;
2419 uint16_t len, desc_len, prev_len_adj;
2422 /* Pointer to the receive descriptor being examined. */
2423 struct em_rx_desc *current_desc;
2425 ifp = &adapter->interface_data.ac_if;
2426 i = adapter->next_rx_desc_to_check;
2427 current_desc = &adapter->rx_desc_base[i];
2429 if (!((current_desc->status) & E1000_RXD_STAT_DD)) {
2431 adapter->no_pkts_avail++;
2435 while ((current_desc->status & E1000_RXD_STAT_DD) && (count != 0)) {
2436 mp = adapter->rx_buffer_area[i].m_head;
2437 bus_dmamap_sync(adapter->rxtag, adapter->rx_buffer_area[i].map,
2438 BUS_DMASYNC_POSTREAD);
2442 desc_len = le16toh(current_desc->length);
2443 if (current_desc->status & E1000_RXD_STAT_EOP) {
2446 if (desc_len < ETHER_CRC_LEN) {
2448 prev_len_adj = ETHER_CRC_LEN - desc_len;
2451 len = desc_len - ETHER_CRC_LEN;
2458 if (current_desc->errors & E1000_RXD_ERR_FRAME_ERR_MASK) {
2460 uint32_t pkt_len = desc_len;
2462 if (adapter->fmp != NULL)
2463 pkt_len += adapter->fmp->m_pkthdr.len;
2465 last_byte = *(mtod(mp, caddr_t) + desc_len - 1);
2467 if (TBI_ACCEPT(&adapter->hw, current_desc->status,
2468 current_desc->errors,
2469 pkt_len, last_byte)) {
2470 em_tbi_adjust_stats(&adapter->hw,
2473 adapter->hw.mac_addr);
2483 if (em_get_buf(i, adapter, NULL, MB_DONTWAIT) == ENOBUFS) {
2484 adapter->dropped_pkts++;
2485 em_get_buf(i, adapter, mp, MB_DONTWAIT);
2486 if (adapter->fmp != NULL)
2487 m_freem(adapter->fmp);
2488 adapter->fmp = NULL;
2489 adapter->lmp = NULL;
2493 /* Assign correct length to the current fragment */
2496 if (adapter->fmp == NULL) {
2497 mp->m_pkthdr.len = len;
2498 adapter->fmp = mp; /* Store the first mbuf */
2501 /* Chain mbuf's together */
2502 mp->m_flags &= ~M_PKTHDR;
2504 * Adjust length of previous mbuf in chain if we
2505 * received less than 4 bytes in the last descriptor.
2507 if (prev_len_adj > 0) {
2508 adapter->lmp->m_len -= prev_len_adj;
2509 adapter->fmp->m_pkthdr.len -= prev_len_adj;
2511 adapter->lmp->m_next = mp;
2512 adapter->lmp = adapter->lmp->m_next;
2513 adapter->fmp->m_pkthdr.len += len;
2517 adapter->fmp->m_pkthdr.rcvif = ifp;
2520 em_receive_checksum(adapter, current_desc,
2522 if (current_desc->status & E1000_RXD_STAT_VP)
2523 VLAN_INPUT_TAG(adapter->fmp,
2524 (current_desc->special &
2525 E1000_RXD_SPC_VLAN_MASK));
2527 (*ifp->if_input)(ifp, adapter->fmp);
2528 adapter->fmp = NULL;
2529 adapter->lmp = NULL;
2532 adapter->dropped_pkts++;
2533 em_get_buf(i, adapter, mp, MB_DONTWAIT);
2534 if (adapter->fmp != NULL)
2535 m_freem(adapter->fmp);
2536 adapter->fmp = NULL;
2537 adapter->lmp = NULL;
2540 /* Zero out the receive descriptors status */
2541 current_desc->status = 0;
2543 /* Advance the E1000's Receive Queue #0 "Tail Pointer". */
2544 E1000_WRITE_REG(&adapter->hw, RDT, i);
2546 /* Advance our pointers to the next descriptor */
2547 if (++i == adapter->num_rx_desc) {
2549 current_desc = adapter->rx_desc_base;
2553 adapter->next_rx_desc_to_check = i;
2556 /*********************************************************************
2558 * Verify that the hardware indicated that the checksum is valid.
2559 * Inform the stack about the status of checksum so that stack
2560 * doesn't spend time verifying the checksum.
2562 *********************************************************************/
2564 em_receive_checksum(struct adapter *adapter,
2565 struct em_rx_desc *rx_desc,
2568 /* 82543 or newer only */
2569 if ((adapter->hw.mac_type < em_82543) ||
2570 /* Ignore Checksum bit is set */
2571 (rx_desc->status & E1000_RXD_STAT_IXSM)) {
2572 mp->m_pkthdr.csum_flags = 0;
2576 if (rx_desc->status & E1000_RXD_STAT_IPCS) {
2578 if (!(rx_desc->errors & E1000_RXD_ERR_IPE)) {
2579 /* IP Checksum Good */
2580 mp->m_pkthdr.csum_flags = CSUM_IP_CHECKED;
2581 mp->m_pkthdr.csum_flags |= CSUM_IP_VALID;
2583 mp->m_pkthdr.csum_flags = 0;
2587 if (rx_desc->status & E1000_RXD_STAT_TCPCS) {
2589 if (!(rx_desc->errors & E1000_RXD_ERR_TCPE)) {
2590 mp->m_pkthdr.csum_flags |=
2591 (CSUM_DATA_VALID | CSUM_PSEUDO_HDR);
2592 mp->m_pkthdr.csum_data = htons(0xffff);
2599 em_enable_vlans(struct adapter *adapter)
2603 E1000_WRITE_REG(&adapter->hw, VET, ETHERTYPE_VLAN);
2605 ctrl = E1000_READ_REG(&adapter->hw, CTRL);
2606 ctrl |= E1000_CTRL_VME;
2607 E1000_WRITE_REG(&adapter->hw, CTRL, ctrl);
2611 * note: we must call bus_enable_intr() prior to enabling the hardware
2612 * interrupt and bus_disable_intr() after disabling the hardware interrupt
2613 * in order to avoid handler execution races from scheduled interrupt
2617 em_enable_intr(struct adapter *adapter)
2619 bus_enable_intr(adapter->dev, adapter->int_handler_tag);
2620 E1000_WRITE_REG(&adapter->hw, IMS, (IMS_ENABLE_MASK));
2624 em_disable_intr(struct adapter *adapter)
2626 E1000_WRITE_REG(&adapter->hw, IMC,
2627 (0xffffffff & ~E1000_IMC_RXSEQ));
2628 bus_disable_intr(adapter->dev, adapter->int_handler_tag);
2632 em_is_valid_ether_addr(uint8_t *addr)
2634 char zero_addr[6] = { 0, 0, 0, 0, 0, 0 };
2636 if ((addr[0] & 1) || (!bcmp(addr, zero_addr, ETHER_ADDR_LEN)))
2643 em_write_pci_cfg(struct em_hw *hw, uint32_t reg, uint16_t *value)
2645 pci_write_config(((struct em_osdep *)hw->back)->dev, reg, *value, 2);
2649 em_read_pci_cfg(struct em_hw *hw, uint32_t reg, uint16_t *value)
2651 *value = pci_read_config(((struct em_osdep *)hw->back)->dev, reg, 2);
2655 em_pci_set_mwi(struct em_hw *hw)
2657 pci_write_config(((struct em_osdep *)hw->back)->dev, PCIR_COMMAND,
2658 (hw->pci_cmd_word | CMD_MEM_WRT_INVALIDATE), 2);
2662 em_pci_clear_mwi(struct em_hw *hw)
2664 pci_write_config(((struct em_osdep *)hw->back)->dev, PCIR_COMMAND,
2665 (hw->pci_cmd_word & ~CMD_MEM_WRT_INVALIDATE), 2);
2669 em_read_reg_io(struct em_hw *hw, uint32_t offset)
2671 bus_space_write_4(hw->reg_io_tag, hw->reg_io_handle, 0, offset);
2672 return(bus_space_read_4(hw->reg_io_tag, hw->reg_io_handle, 4));
2676 em_write_reg_io(struct em_hw *hw, uint32_t offset, uint32_t value)
2678 bus_space_write_4(hw->reg_io_tag, hw->reg_io_handle, 0, offset);
2679 bus_space_write_4(hw->reg_io_tag, hw->reg_io_handle, 4, value);
2682 /*********************************************************************
2683 * 82544 Coexistence issue workaround.
2684 * There are 2 issues.
2685 * 1. Transmit Hang issue.
2686 * To detect this issue, following equation can be used...
2687 * SIZE[3:0] + ADDR[2:0] = SUM[3:0].
2688 * If SUM[3:0] is in between 1 to 4, we will have this issue.
2691 * To detect this issue, following equation can be used...
2692 * SIZE[3:0] + ADDR[2:0] = SUM[3:0].
2693 * If SUM[3:0] is in between 9 to c, we will have this issue.
2697 * Make sure we do not have ending address as 1,2,3,4(Hang) or
2700 *************************************************************************/
2702 em_fill_descriptors(uint64_t address, uint32_t length, PDESC_ARRAY desc_array)
2704 /* Since issue is sensitive to length and address.*/
2705 /* Let us first check the address...*/
2706 uint32_t safe_terminator;
2708 desc_array->descriptor[0].address = address;
2709 desc_array->descriptor[0].length = length;
2710 desc_array->elements = 1;
2711 return(desc_array->elements);
2713 safe_terminator = (uint32_t)((((uint32_t)address & 0x7) + (length & 0xF)) & 0xF);
2714 /* if it does not fall between 0x1 to 0x4 and 0x9 to 0xC then return */
2715 if (safe_terminator == 0 ||
2716 (safe_terminator > 4 && safe_terminator < 9) ||
2717 (safe_terminator > 0xC && safe_terminator <= 0xF)) {
2718 desc_array->descriptor[0].address = address;
2719 desc_array->descriptor[0].length = length;
2720 desc_array->elements = 1;
2721 return(desc_array->elements);
2724 desc_array->descriptor[0].address = address;
2725 desc_array->descriptor[0].length = length - 4;
2726 desc_array->descriptor[1].address = address + (length - 4);
2727 desc_array->descriptor[1].length = 4;
2728 desc_array->elements = 2;
2729 return(desc_array->elements);
2732 /**********************************************************************
2734 * Update the board statistics counters.
2736 **********************************************************************/
2738 em_update_stats_counters(struct adapter *adapter)
2742 if (adapter->hw.media_type == em_media_type_copper ||
2743 (E1000_READ_REG(&adapter->hw, STATUS) & E1000_STATUS_LU)) {
2744 adapter->stats.symerrs += E1000_READ_REG(&adapter->hw, SYMERRS);
2745 adapter->stats.sec += E1000_READ_REG(&adapter->hw, SEC);
2747 adapter->stats.crcerrs += E1000_READ_REG(&adapter->hw, CRCERRS);
2748 adapter->stats.mpc += E1000_READ_REG(&adapter->hw, MPC);
2749 adapter->stats.scc += E1000_READ_REG(&adapter->hw, SCC);
2750 adapter->stats.ecol += E1000_READ_REG(&adapter->hw, ECOL);
2752 adapter->stats.mcc += E1000_READ_REG(&adapter->hw, MCC);
2753 adapter->stats.latecol += E1000_READ_REG(&adapter->hw, LATECOL);
2754 adapter->stats.colc += E1000_READ_REG(&adapter->hw, COLC);
2755 adapter->stats.dc += E1000_READ_REG(&adapter->hw, DC);
2756 adapter->stats.rlec += E1000_READ_REG(&adapter->hw, RLEC);
2757 adapter->stats.xonrxc += E1000_READ_REG(&adapter->hw, XONRXC);
2758 adapter->stats.xontxc += E1000_READ_REG(&adapter->hw, XONTXC);
2759 adapter->stats.xoffrxc += E1000_READ_REG(&adapter->hw, XOFFRXC);
2760 adapter->stats.xofftxc += E1000_READ_REG(&adapter->hw, XOFFTXC);
2761 adapter->stats.fcruc += E1000_READ_REG(&adapter->hw, FCRUC);
2762 adapter->stats.prc64 += E1000_READ_REG(&adapter->hw, PRC64);
2763 adapter->stats.prc127 += E1000_READ_REG(&adapter->hw, PRC127);
2764 adapter->stats.prc255 += E1000_READ_REG(&adapter->hw, PRC255);
2765 adapter->stats.prc511 += E1000_READ_REG(&adapter->hw, PRC511);
2766 adapter->stats.prc1023 += E1000_READ_REG(&adapter->hw, PRC1023);
2767 adapter->stats.prc1522 += E1000_READ_REG(&adapter->hw, PRC1522);
2768 adapter->stats.gprc += E1000_READ_REG(&adapter->hw, GPRC);
2769 adapter->stats.bprc += E1000_READ_REG(&adapter->hw, BPRC);
2770 adapter->stats.mprc += E1000_READ_REG(&adapter->hw, MPRC);
2771 adapter->stats.gptc += E1000_READ_REG(&adapter->hw, GPTC);
2773 /* For the 64-bit byte counters the low dword must be read first. */
2774 /* Both registers clear on the read of the high dword */
2776 adapter->stats.gorcl += E1000_READ_REG(&adapter->hw, GORCL);
2777 adapter->stats.gorch += E1000_READ_REG(&adapter->hw, GORCH);
2778 adapter->stats.gotcl += E1000_READ_REG(&adapter->hw, GOTCL);
2779 adapter->stats.gotch += E1000_READ_REG(&adapter->hw, GOTCH);
2781 adapter->stats.rnbc += E1000_READ_REG(&adapter->hw, RNBC);
2782 adapter->stats.ruc += E1000_READ_REG(&adapter->hw, RUC);
2783 adapter->stats.rfc += E1000_READ_REG(&adapter->hw, RFC);
2784 adapter->stats.roc += E1000_READ_REG(&adapter->hw, ROC);
2785 adapter->stats.rjc += E1000_READ_REG(&adapter->hw, RJC);
2787 adapter->stats.torl += E1000_READ_REG(&adapter->hw, TORL);
2788 adapter->stats.torh += E1000_READ_REG(&adapter->hw, TORH);
2789 adapter->stats.totl += E1000_READ_REG(&adapter->hw, TOTL);
2790 adapter->stats.toth += E1000_READ_REG(&adapter->hw, TOTH);
2792 adapter->stats.tpr += E1000_READ_REG(&adapter->hw, TPR);
2793 adapter->stats.tpt += E1000_READ_REG(&adapter->hw, TPT);
2794 adapter->stats.ptc64 += E1000_READ_REG(&adapter->hw, PTC64);
2795 adapter->stats.ptc127 += E1000_READ_REG(&adapter->hw, PTC127);
2796 adapter->stats.ptc255 += E1000_READ_REG(&adapter->hw, PTC255);
2797 adapter->stats.ptc511 += E1000_READ_REG(&adapter->hw, PTC511);
2798 adapter->stats.ptc1023 += E1000_READ_REG(&adapter->hw, PTC1023);
2799 adapter->stats.ptc1522 += E1000_READ_REG(&adapter->hw, PTC1522);
2800 adapter->stats.mptc += E1000_READ_REG(&adapter->hw, MPTC);
2801 adapter->stats.bptc += E1000_READ_REG(&adapter->hw, BPTC);
2803 if (adapter->hw.mac_type >= em_82543) {
2804 adapter->stats.algnerrc +=
2805 E1000_READ_REG(&adapter->hw, ALGNERRC);
2806 adapter->stats.rxerrc +=
2807 E1000_READ_REG(&adapter->hw, RXERRC);
2808 adapter->stats.tncrs +=
2809 E1000_READ_REG(&adapter->hw, TNCRS);
2810 adapter->stats.cexterr +=
2811 E1000_READ_REG(&adapter->hw, CEXTERR);
2812 adapter->stats.tsctc +=
2813 E1000_READ_REG(&adapter->hw, TSCTC);
2814 adapter->stats.tsctfc +=
2815 E1000_READ_REG(&adapter->hw, TSCTFC);
2817 ifp = &adapter->interface_data.ac_if;
2819 /* Fill out the OS statistics structure */
2820 ifp->if_ibytes = adapter->stats.gorcl;
2821 ifp->if_obytes = adapter->stats.gotcl;
2822 ifp->if_imcasts = adapter->stats.mprc;
2823 ifp->if_collisions = adapter->stats.colc;
2826 ifp->if_ierrors = adapter->dropped_pkts + adapter->stats.rxerrc +
2827 adapter->stats.crcerrs + adapter->stats.algnerrc +
2828 adapter->stats.rlec + adapter->stats.rnbc +
2829 adapter->stats.mpc + adapter->stats.cexterr;
2832 ifp->if_oerrors = adapter->stats.ecol + adapter->stats.latecol;
2836 /**********************************************************************
2838 * This routine is called only when em_display_debug_stats is enabled.
2839 * This routine provides a way to take a look at important statistics
2840 * maintained by the driver and hardware.
2842 **********************************************************************/
2844 em_print_debug_info(struct adapter *adapter)
2846 device_t dev= adapter->dev;
2847 uint8_t *hw_addr = adapter->hw.hw_addr;
2849 device_printf(dev, "Adapter hardware address = %p \n", hw_addr);
2850 device_printf(dev, "tx_int_delay = %d, tx_abs_int_delay = %d\n",
2851 E1000_READ_REG(&adapter->hw, TIDV),
2852 E1000_READ_REG(&adapter->hw, TADV));
2853 device_printf(dev, "rx_int_delay = %d, rx_abs_int_delay = %d\n",
2854 E1000_READ_REG(&adapter->hw, RDTR),
2855 E1000_READ_REG(&adapter->hw, RADV));
2857 device_printf(dev, "Packets not Avail = %ld\n", adapter->no_pkts_avail);
2858 device_printf(dev, "CleanTxInterrupts = %ld\n",
2859 adapter->clean_tx_interrupts);
2861 device_printf(dev, "fifo workaround = %lld, fifo_reset = %lld\n",
2862 (long long)adapter->tx_fifo_wrk,
2863 (long long)adapter->tx_fifo_reset);
2864 device_printf(dev, "hw tdh = %d, hw tdt = %d\n",
2865 E1000_READ_REG(&adapter->hw, TDH),
2866 E1000_READ_REG(&adapter->hw, TDT));
2867 device_printf(dev, "Num Tx descriptors avail = %d\n",
2868 adapter->num_tx_desc_avail);
2869 device_printf(dev, "Tx Descriptors not avail1 = %ld\n",
2870 adapter->no_tx_desc_avail1);
2871 device_printf(dev, "Tx Descriptors not avail2 = %ld\n",
2872 adapter->no_tx_desc_avail2);
2873 device_printf(dev, "Std mbuf failed = %ld\n",
2874 adapter->mbuf_alloc_failed);
2875 device_printf(dev, "Std mbuf cluster failed = %ld\n",
2876 adapter->mbuf_cluster_failed);
2877 device_printf(dev, "Driver dropped packets = %ld\n",
2878 adapter->dropped_pkts);
2882 em_print_hw_stats(struct adapter *adapter)
2884 device_t dev= adapter->dev;
2886 device_printf(dev, "Adapter: %p\n", adapter);
2888 device_printf(dev, "Excessive collisions = %lld\n",
2889 (long long)adapter->stats.ecol);
2890 device_printf(dev, "Symbol errors = %lld\n",
2891 (long long)adapter->stats.symerrs);
2892 device_printf(dev, "Sequence errors = %lld\n",
2893 (long long)adapter->stats.sec);
2894 device_printf(dev, "Defer count = %lld\n",
2895 (long long)adapter->stats.dc);
2897 device_printf(dev, "Missed Packets = %lld\n",
2898 (long long)adapter->stats.mpc);
2899 device_printf(dev, "Receive No Buffers = %lld\n",
2900 (long long)adapter->stats.rnbc);
2901 device_printf(dev, "Receive length errors = %lld\n",
2902 (long long)adapter->stats.rlec);
2903 device_printf(dev, "Receive errors = %lld\n",
2904 (long long)adapter->stats.rxerrc);
2905 device_printf(dev, "Crc errors = %lld\n",
2906 (long long)adapter->stats.crcerrs);
2907 device_printf(dev, "Alignment errors = %lld\n",
2908 (long long)adapter->stats.algnerrc);
2909 device_printf(dev, "Carrier extension errors = %lld\n",
2910 (long long)adapter->stats.cexterr);
2912 device_printf(dev, "XON Rcvd = %lld\n",
2913 (long long)adapter->stats.xonrxc);
2914 device_printf(dev, "XON Xmtd = %lld\n",
2915 (long long)adapter->stats.xontxc);
2916 device_printf(dev, "XOFF Rcvd = %lld\n",
2917 (long long)adapter->stats.xoffrxc);
2918 device_printf(dev, "XOFF Xmtd = %lld\n",
2919 (long long)adapter->stats.xofftxc);
2921 device_printf(dev, "Good Packets Rcvd = %lld\n",
2922 (long long)adapter->stats.gprc);
2923 device_printf(dev, "Good Packets Xmtd = %lld\n",
2924 (long long)adapter->stats.gptc);
2928 em_sysctl_debug_info(SYSCTL_HANDLER_ARGS)
2932 struct adapter *adapter;
2935 error = sysctl_handle_int(oidp, &result, 0, req);
2937 if (error || !req->newptr)
2941 adapter = (struct adapter *)arg1;
2942 em_print_debug_info(adapter);
2949 em_sysctl_stats(SYSCTL_HANDLER_ARGS)
2953 struct adapter *adapter;
2956 error = sysctl_handle_int(oidp, &result, 0, req);
2958 if (error || !req->newptr)
2962 adapter = (struct adapter *)arg1;
2963 em_print_hw_stats(adapter);
2970 em_sysctl_int_delay(SYSCTL_HANDLER_ARGS)
2972 struct em_int_delay_info *info;
2973 struct adapter *adapter;
2980 info = (struct em_int_delay_info *)arg1;
2981 adapter = info->adapter;
2982 usecs = info->value;
2983 error = sysctl_handle_int(oidp, &usecs, 0, req);
2984 if (error != 0 || req->newptr == NULL)
2986 if (usecs < 0 || usecs > E1000_TICKS_TO_USECS(65535))
2988 info->value = usecs;
2989 ticks = E1000_USECS_TO_TICKS(usecs);
2992 regval = E1000_READ_OFFSET(&adapter->hw, info->offset);
2993 regval = (regval & ~0xffff) | (ticks & 0xffff);
2994 /* Handle a few special cases. */
2995 switch (info->offset) {
2997 case E1000_82542_RDTR:
2998 regval |= E1000_RDT_FPDB;
3001 case E1000_82542_TIDV:
3003 adapter->txd_cmd &= ~E1000_TXD_CMD_IDE;
3004 /* Don't write 0 into the TIDV register. */
3007 adapter->txd_cmd |= E1000_TXD_CMD_IDE;
3010 E1000_WRITE_OFFSET(&adapter->hw, info->offset, regval);
3016 em_add_int_delay_sysctl(struct adapter *adapter, const char *name,
3017 const char *description, struct em_int_delay_info *info,
3018 int offset, int value)
3020 info->adapter = adapter;
3021 info->offset = offset;
3022 info->value = value;
3023 SYSCTL_ADD_PROC(&adapter->sysctl_ctx,
3024 SYSCTL_CHILDREN(adapter->sysctl_tree),
3025 OID_AUTO, name, CTLTYPE_INT|CTLFLAG_RW,
3026 info, 0, em_sysctl_int_delay, "I", description);
3030 em_sysctl_int_throttle(SYSCTL_HANDLER_ARGS)
3032 struct adapter *adapter = (void *)arg1;
3036 throttle = em_int_throttle_ceil;
3037 error = sysctl_handle_int(oidp, &throttle, 0, req);
3038 if (error || req->newptr == NULL)
3040 if (throttle < 0 || throttle > 1000000000 / 256)
3044 * Set the interrupt throttling rate in 256ns increments,
3045 * recalculate sysctl value assignment to get exact frequency.
3047 throttle = 1000000000 / 256 / throttle;
3048 em_int_throttle_ceil = 1000000000 / 256 / throttle;
3050 E1000_WRITE_REG(&adapter->hw, ITR, throttle);
3053 em_int_throttle_ceil = 0;
3055 E1000_WRITE_REG(&adapter->hw, ITR, 0);
3058 device_printf(adapter->dev, "Interrupt moderation set to %d/sec\n",
3059 em_int_throttle_ceil);