2 * Copyright (c) 2003,2004 The DragonFly Project. All rights reserved.
4 * This code is derived from software contributed to The DragonFly Project
5 * by Matthew Dillon <dillon@backplane.com>
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
11 * 1. Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer.
13 * 2. Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in
15 * the documentation and/or other materials provided with the
17 * 3. Neither the name of The DragonFly Project nor the names of its
18 * contributors may be used to endorse or promote products derived
19 * from this software without specific, prior written permission.
21 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
22 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
23 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
24 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
25 * COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
26 * INCIDENTAL, SPECIAL, EXEMPLARY OR CONSEQUENTIAL DAMAGES (INCLUDING,
27 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
28 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
29 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
30 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
31 * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
34 * Copyright (c) 1997, by Steve Passe, All rights reserved.
36 * Redistribution and use in source and binary forms, with or without
37 * modification, are permitted provided that the following conditions
39 * 1. Redistributions of source code must retain the above copyright
40 * notice, this list of conditions and the following disclaimer.
41 * 2. The name of the developer may NOT be used to endorse or promote products
42 * derived from this software without specific prior written permission.
44 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
45 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
46 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
47 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
48 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
49 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
50 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
51 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
52 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
53 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
56 * $FreeBSD: src/sys/i386/isa/apic_ipl.s,v 1.27.2.2 2000/09/30 02:49:35 ps Exp $
57 * $DragonFly: src/sys/platform/pc32/apic/apic_ipl.s,v 1.17 2006/11/07 18:50:06 dillon Exp $
62 #include <machine/asmacros.h>
63 #include <machine/segments.h>
64 #include <machine/lock.h>
65 #include <machine/psl.h>
66 #include <machine/trap.h>
78 * Functions to enable and disable a hardware interrupt. The
79 * IRQ number is passed as an argument.
82 APIC_IMASK_LOCK /* enter critical reg */
85 shll $IOAPIC_IM_SZSHIFT, %eax
86 orl $IOAPIC_IM_FLAG_MASKED, CNAME(int_to_apicintpin) + IOAPIC_IM_FLAGS(%eax)
87 movl CNAME(int_to_apicintpin) + IOAPIC_IM_ADDR(%eax), %edx
88 movl CNAME(int_to_apicintpin) + IOAPIC_IM_ENTIDX(%eax), %ecx
91 movl %ecx, (%edx) /* target register index */
92 orl $IOART_INTMASK, IOAPIC_WINDOW(%edx)
93 /* set intmask in target apic reg */
95 APIC_IMASK_UNLOCK /* exit critical reg */
99 APIC_IMASK_LOCK /* enter critical reg */
100 movl 4(%esp), %eax /* mask into %eax */
102 shll $IOAPIC_IM_SZSHIFT, %eax
103 andl $~IOAPIC_IM_FLAG_MASKED, CNAME(int_to_apicintpin) + IOAPIC_IM_FLAGS(%eax)
104 movl CNAME(int_to_apicintpin) + IOAPIC_IM_ADDR(%eax), %edx
105 movl CNAME(int_to_apicintpin) + IOAPIC_IM_ENTIDX(%eax), %ecx
108 movl %ecx, (%edx) /* write the target register index */
109 andl $~IOART_INTMASK, IOAPIC_WINDOW(%edx)
112 APIC_IMASK_UNLOCK /* exit critical reg */
115 /******************************************************************************
120 * u_int io_apic_write(int apic, int select);
123 movl 4(%esp), %ecx /* APIC # */
125 movl (%eax,%ecx,4), %edx /* APIC base register address */
126 movl 8(%esp), %eax /* target register index */
127 movl %eax, (%edx) /* write the target register index */
128 movl IOAPIC_WINDOW(%edx), %eax /* read the APIC register data */
129 ret /* %eax = register value */
132 * void io_apic_write(int apic, int select, int value);
135 movl 4(%esp), %ecx /* APIC # */
137 movl (%eax,%ecx,4), %edx /* APIC base register address */
138 movl 8(%esp), %eax /* target register index */
139 movl %eax, (%edx) /* write the target register index */
140 movl 12(%esp), %eax /* target register value */
141 movl %eax, IOAPIC_WINDOW(%edx) /* write the APIC register data */
142 ret /* %eax = void */
145 * Send an EOI to the local APIC.