sys/platform/pc32/icu/icu_abi.c

   1 /*
   2  * Copyright (c) 2005 The DragonFly Project.  All rights reserved.
   3  * Copyright (c) 1991 The Regents of the University of California.
   4  * All rights reserved.
   5  *
   6  * This code is derived from software contributed to The DragonFly Project
   7  * by Matthew Dillon <dillon@backplane.com>
   8  *
   9  * This code is derived from software contributed to Berkeley by
  10  * William Jolitz.
  11  *
  12  * Redistribution and use in source and binary forms, with or without
  13  * modification, are permitted provided that the following conditions
  14  * are met:
  15  *
  16  * 1. Redistributions of source code must retain the above copyright
  17  *    notice, this list of conditions and the following disclaimer.
  18  * 2. Redistributions in binary form must reproduce the above copyright
  19  *    notice, this list of conditions and the following disclaimer in
  20  *    the documentation and/or other materials provided with the
  21  *    distribution.
  22  * 3. Neither the name of The DragonFly Project nor the names of its
  23  *    contributors may be used to endorse or promote products derived
  24  *    from this software without specific, prior written permission.
  25  *
  26  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  27  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  28  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
  29  * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
  30  * COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
  31  * INCIDENTAL, SPECIAL, EXEMPLARY OR CONSEQUENTIAL DAMAGES (INCLUDING,
  32  * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
  33  * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
  34  * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
  35  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
  36  * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
  37  * SUCH DAMAGE.
  38  *
  39  * $DragonFly: src/sys/platform/pc32/icu/icu_abi.c,v 1.14 2007/07/07 12:13:47 sephe Exp $
  40  */
  41
  42 #include <sys/param.h>
  43 #include <sys/systm.h>
  44 #include <sys/kernel.h>
  45 #include <sys/machintr.h>
  46 #include <sys/interrupt.h>
  47 #include <sys/rman.h>
  48 #include <sys/bus.h>
  49
  50 #include <machine/segments.h>
  51 #include <machine/md_var.h>
  52 #include <machine/intr_machdep.h>
  53 #include <machine/globaldata.h>
  54 #include <machine/smp.h>
  55
  56 #include <sys/thread2.h>
  57
  58 #include <machine_base/icu/elcr_var.h>
  59
  60 #include <machine_base/icu/icu.h>
  61 #include <machine_base/icu/icu_ipl.h>
  62 #include <machine_base/apic/ioapic.h>
  63
  64 extern inthand_t
  65         IDTVEC(icu_intr0),      IDTVEC(icu_intr1),
  66         IDTVEC(icu_intr2),      IDTVEC(icu_intr3),
  67         IDTVEC(icu_intr4),      IDTVEC(icu_intr5),
  68         IDTVEC(icu_intr6),      IDTVEC(icu_intr7),
  69         IDTVEC(icu_intr8),      IDTVEC(icu_intr9),
  70         IDTVEC(icu_intr10),     IDTVEC(icu_intr11),
  71         IDTVEC(icu_intr12),     IDTVEC(icu_intr13),
  72         IDTVEC(icu_intr14),     IDTVEC(icu_intr15);
  73
  74 static inthand_t *icu_intr[ICU_HWI_VECTORS] = {
  75         &IDTVEC(icu_intr0),     &IDTVEC(icu_intr1),
  76         &IDTVEC(icu_intr2),     &IDTVEC(icu_intr3),
  77         &IDTVEC(icu_intr4),     &IDTVEC(icu_intr5),
  78         &IDTVEC(icu_intr6),     &IDTVEC(icu_intr7),
  79         &IDTVEC(icu_intr8),     &IDTVEC(icu_intr9),
  80         &IDTVEC(icu_intr10),    &IDTVEC(icu_intr11),
  81         &IDTVEC(icu_intr12),    &IDTVEC(icu_intr13),
  82         &IDTVEC(icu_intr14),    &IDTVEC(icu_intr15)
  83 };
  84
  85 static struct icu_irqmap {
  86         int                     im_type;        /* ICU_IMT_ */
  87         enum intr_trigger       im_trig;
  88 } icu_irqmaps[MAXCPU][IDT_HWI_VECTORS];
  89
  90 #define ICU_IMT_UNUSED          0       /* KEEP THIS */
  91 #define ICU_IMT_RESERVED        1
  92 #define ICU_IMT_LINE            2
  93 #define ICU_IMT_SYSCALL         3
  94
  95 #define ICU_IMT_ISHWI(map)      ((map)->im_type != ICU_IMT_RESERVED && \
  96                                  (map)->im_type != ICU_IMT_SYSCALL)
  97
  98 extern void     ICU_INTREN(int);
  99 extern void     ICU_INTRDIS(int);
 100
 101 extern int      imcr_present;
 102
 103 static void     icu_abi_intr_enable(int);
 104 static void     icu_abi_intr_disable(int);
 105 static void     icu_abi_intr_setup(int, int);
 106 static void     icu_abi_intr_teardown(int);
 107 static void     icu_abi_intr_config(int, enum intr_trigger, enum intr_polarity);
 108 static int      icu_abi_intr_cpuid(int);
 109
 110 static void     icu_abi_finalize(void);
 111 static void     icu_abi_cleanup(void);
 112 static void     icu_abi_setdefault(void);
 113 static void     icu_abi_stabilize(void);
 114 static void     icu_abi_initmap(void);
 115 static void     icu_abi_rman_setup(struct rman *);
 116
 117 struct machintr_abi MachIntrABI_ICU = {
 118         MACHINTR_ICU,
 119         .intr_disable   = icu_abi_intr_disable,
 120         .intr_enable    = icu_abi_intr_enable,
 121         .intr_setup     = icu_abi_intr_setup,
 122         .intr_teardown  = icu_abi_intr_teardown,
 123         .intr_config    = icu_abi_intr_config,
 124         .intr_cpuid     = icu_abi_intr_cpuid,
 125
 126         .finalize       = icu_abi_finalize,
 127         .cleanup        = icu_abi_cleanup,
 128         .setdefault     = icu_abi_setdefault,
 129         .stabilize      = icu_abi_stabilize,
 130         .initmap        = icu_abi_initmap,
 131         .rman_setup     = icu_abi_rman_setup
 132 };
 133
 134 /*
 135  * WARNING!  SMP builds can use the ICU now so this code must be MP safe.
 136  */
 137
 138 static void
 139 icu_abi_intr_enable(int irq)
 140 {
 141         const struct icu_irqmap *map;
 142
 143         KASSERT(irq >= 0 && irq < IDT_HWI_VECTORS,
 144             ("icu enable, invalid irq %d\n", irq));
 145
 146         map = &icu_irqmaps[mycpuid][irq];
 147         KASSERT(ICU_IMT_ISHWI(map),
 148             ("icu enable, not hwi irq %d, type %d, cpu%d\n",
 149              irq, map->im_type, mycpuid));
 150         if (map->im_type != ICU_IMT_LINE) {
 151                 kprintf("icu enable, irq %d cpu%d not LINE\n",
 152                     irq, mycpuid);
 153                 return;
 154         }
 155
 156         ICU_INTREN(irq);
 157 }
 158
 159 static void
 160 icu_abi_intr_disable(int irq)
 161 {
 162         const struct icu_irqmap *map;
 163
 164         KASSERT(irq >= 0 && irq < IDT_HWI_VECTORS,
 165             ("icu disable, invalid irq %d\n", irq));
 166
 167         map = &icu_irqmaps[mycpuid][irq];
 168         KASSERT(ICU_IMT_ISHWI(map),
 169             ("icu disable, not hwi irq %d, type %d, cpu%d\n",
 170              irq, map->im_type, mycpuid));
 171         if (map->im_type != ICU_IMT_LINE) {
 172                 kprintf("icu disable, irq %d cpu%d not LINE\n",
 173                     irq, mycpuid);
 174                 return;
 175         }
 176
 177         ICU_INTRDIS(irq);
 178 }
 179
 180 /*
 181  * Called before interrupts are physically enabled
 182  */
 183 static void
 184 icu_abi_stabilize(void)
 185 {
 186         int intr;
 187
 188         for (intr = 0; intr < ICU_HWI_VECTORS; ++intr)
 189                 ICU_INTRDIS(intr);
 190         ICU_INTREN(ICU_IRQ_SLAVE);
 191 }
 192
 193 /*
 194  * Called after interrupts physically enabled but before the
 195  * critical section is released.
 196  */
 197 static void
 198 icu_abi_cleanup(void)
 199 {
 200         bzero(mdcpu->gd_ipending, sizeof(mdcpu->gd_ipending));
 201 }
 202
 203 /*
 204  * Called after stablize and cleanup; critical section is not
 205  * held and interrupts are not physically disabled.
 206  */
 207 static void
 208 icu_abi_finalize(void)
 209 {
 210         KKASSERT(MachIntrABI.type == MACHINTR_ICU);
 211         KKASSERT(!ioapic_enable);
 212
 213         /*
 214          * If an IMCR is present, programming bit 0 disconnects the 8259
 215          * from the BSP.  The 8259 may still be connected to LINT0 on the
 216          * BSP's LAPIC.
 217          *
 218          * If we are running SMP the LAPIC is active, try to use virtual
 219          * wire mode so we can use other interrupt sources within the LAPIC
 220          * in addition to the 8259.
 221          */
 222         if (imcr_present) {
 223                 outb(0x22, 0x70);
 224                 outb(0x23, 0x01);
 225         }
 226 }
 227
 228 static void
 229 icu_abi_intr_setup(int intr, int flags __unused)
 230 {
 231         const struct icu_irqmap *map;
 232         u_long ef;
 233
 234         KASSERT(intr >= 0 && intr < IDT_HWI_VECTORS,
 235             ("icu setup, invalid irq %d\n", intr));
 236
 237         map = &icu_irqmaps[mycpuid][intr];
 238         KASSERT(ICU_IMT_ISHWI(map),
 239             ("icu setup, not hwi irq %d, type %d, cpu%d\n",
 240              intr, map->im_type, mycpuid));
 241         if (map->im_type != ICU_IMT_LINE) {
 242                 kprintf("icu setup, irq %d cpu%d not LINE\n",
 243                     intr, mycpuid);
 244                 return;
 245         }
 246
 247         ef = read_eflags();
 248         cpu_disable_intr();
 249
 250         ICU_INTREN(intr);
 251
 252         write_eflags(ef);
 253 }
 254
 255 static void
 256 icu_abi_intr_teardown(int intr)
 257 {
 258         const struct icu_irqmap *map;
 259         u_long ef;
 260
 261         KASSERT(intr >= 0 && intr < IDT_HWI_VECTORS,
 262             ("icu teardown, invalid irq %d\n", intr));
 263
 264         map = &icu_irqmaps[mycpuid][intr];
 265         KASSERT(ICU_IMT_ISHWI(map),
 266             ("icu teardown, not hwi irq %d, type %d, cpu%d\n",
 267              intr, map->im_type, mycpuid));
 268         if (map->im_type != ICU_IMT_LINE) {
 269                 kprintf("icu teardown, irq %d cpu%d not LINE\n",
 270                     intr, mycpuid);
 271                 return;
 272         }
 273
 274         ef = read_eflags();
 275         cpu_disable_intr();
 276
 277         ICU_INTRDIS(intr);
 278
 279         write_eflags(ef);
 280 }
 281
 282 static void
 283 icu_abi_setdefault(void)
 284 {
 285         int intr;
 286
 287         for (intr = 0; intr < ICU_HWI_VECTORS; ++intr) {
 288                 if (intr == ICU_IRQ_SLAVE)
 289                         continue;
 290                 setidt(IDT_OFFSET + intr, icu_intr[intr], SDT_SYS386IGT,
 291                        SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
 292         }
 293 }
 294
 295 static void
 296 icu_abi_initmap(void)
 297 {
 298         int cpu;
 299
 300         /*
 301          * NOTE: ncpus is not ready yet
 302          */
 303         for (cpu = 0; cpu < MAXCPU; ++cpu) {
 304                 int i;
 305
 306                 if (cpu != 0) {
 307                         for (i = 0; i < ICU_HWI_VECTORS; ++i)
 308                                 icu_irqmaps[cpu][i].im_type = ICU_IMT_RESERVED;
 309                 } else {
 310                         for (i = 0; i < ICU_HWI_VECTORS; ++i)
 311                                 icu_irqmaps[cpu][i].im_type = ICU_IMT_LINE;
 312                         icu_irqmaps[cpu][ICU_IRQ_SLAVE].im_type =
 313                             ICU_IMT_RESERVED;
 314
 315                         if (elcr_found) {
 316                                 for (i = 0; i < ICU_HWI_VECTORS; ++i) {
 317                                         icu_irqmaps[cpu][i].im_trig =
 318                                             elcr_read_trigger(i);
 319                                 }
 320                         } else {
 321                                 /*
 322                                  * NOTE: Trigger mode does not matter at all
 323                                  */
 324                                 for (i = 0; i < ICU_HWI_VECTORS; ++i) {
 325                                         icu_irqmaps[cpu][i].im_trig =
 326                                             INTR_TRIGGER_EDGE;
 327                                 }
 328                         }
 329                 }
 330                 icu_irqmaps[cpu][IDT_OFFSET_SYSCALL - IDT_OFFSET].im_type =
 331                     ICU_IMT_SYSCALL;
 332         }
 333 }
 334
 335 static void
 336 icu_abi_intr_config(int irq, enum intr_trigger trig,
 337     enum intr_polarity pola __unused)
 338 {
 339         struct icu_irqmap *map;
 340
 341         KKASSERT(trig == INTR_TRIGGER_EDGE || trig == INTR_TRIGGER_LEVEL);
 342
 343         KKASSERT(irq >= 0 && irq < IDT_HWI_VECTORS);
 344         map = &icu_irqmaps[0][irq];
 345
 346         KKASSERT(map->im_type == ICU_IMT_LINE);
 347
 348         /* TODO: Check whether it is configured or not */
 349
 350         if (trig == map->im_trig)
 351                 return;
 352
 353         if (bootverbose) {
 354                 kprintf("ICU: irq %d, %s -> %s\n", irq,
 355                         intr_str_trigger(map->im_trig),
 356                         intr_str_trigger(trig));
 357         }
 358         map->im_trig = trig;
 359
 360         if (!elcr_found) {
 361                 if (bootverbose)
 362                         kprintf("ICU: no ELCR, skip irq %d config\n", irq);
 363                 return;
 364         }
 365         elcr_write_trigger(irq, map->im_trig);
 366 }
 367
 368 static int
 369 icu_abi_intr_cpuid(int irq __unused)
 370 {
 371         return 0;
 372 }
 373
 374 static void
 375 icu_abi_rman_setup(struct rman *rm)
 376 {
 377         int start, end, i;
 378
 379         KASSERT(rm->rm_cpuid >= 0 && rm->rm_cpuid < MAXCPU,
 380             ("invalid rman cpuid %d", rm->rm_cpuid));
 381
 382         start = end = -1;
 383         for (i = 0; i < IDT_HWI_VECTORS; ++i) {
 384                 const struct icu_irqmap *map = &icu_irqmaps[rm->rm_cpuid][i];
 385
 386                 if (start < 0) {
 387                         if (ICU_IMT_ISHWI(map))
 388                                 start = end = i;
 389                 } else {
 390                         if (ICU_IMT_ISHWI(map)) {
 391                                 end = i;
 392                         } else {
 393                                 KKASSERT(end >= 0);
 394                                 if (bootverbose) {
 395                                         kprintf("ICU: rman cpu%d %d - %d\n",
 396                                             rm->rm_cpuid, start, end);
 397                                 }
 398                                 if (rman_manage_region(rm, start, end)) {
 399                                         panic("rman_manage_region"
 400                                             "(cpu%d %d - %d)", rm->rm_cpuid,
 401                                             start, end);
 402                                 }
 403                                 start = end = -1;
 404                         }
 405                 }
 406         }
 407         if (start >= 0) {
 408                 KKASSERT(end >= 0);
 409                 if (bootverbose) {
 410                         kprintf("ICU: rman cpu%d %d - %d\n",
 411                             rm->rm_cpuid, start, end);
 412                 }
 413                 if (rman_manage_region(rm, start, end)) {
 414                         panic("rman_manage_region(cpu%d %d - %d)",
 415                             rm->rm_cpuid, start, end);
 416                 }
 417         }
 418 }