em: Utilize mbuf's header length to setup TX csum context
[dragonfly.git] / sys / dev / netif / em / if_em.c
1 /*
2  * Copyright (c) 2004 Joerg Sonnenberger <joerg@bec.de>.  All rights reserved.
3  *
4  * Copyright (c) 2001-2008, Intel Corporation
5  * All rights reserved.
6  *
7  * Redistribution and use in source and binary forms, with or without
8  * modification, are permitted provided that the following conditions are met:
9  *
10  *  1. Redistributions of source code must retain the above copyright notice,
11  *     this list of conditions and the following disclaimer.
12  *
13  *  2. Redistributions in binary form must reproduce the above copyright
14  *     notice, this list of conditions and the following disclaimer in the
15  *     documentation and/or other materials provided with the distribution.
16  *
17  *  3. Neither the name of the Intel Corporation nor the names of its
18  *     contributors may be used to endorse or promote products derived from
19  *     this software without specific prior written permission.
20  *
21  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
22  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
23  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
24  * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
25  * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
26  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
27  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
28  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
29  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
30  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
31  * POSSIBILITY OF SUCH DAMAGE.
32  *
33  *
34  * Copyright (c) 2005 The DragonFly Project.  All rights reserved.
35  *
36  * This code is derived from software contributed to The DragonFly Project
37  * by Matthew Dillon <dillon@backplane.com>
38  *
39  * Redistribution and use in source and binary forms, with or without
40  * modification, are permitted provided that the following conditions
41  * are met:
42  *
43  * 1. Redistributions of source code must retain the above copyright
44  *    notice, this list of conditions and the following disclaimer.
45  * 2. Redistributions in binary form must reproduce the above copyright
46  *    notice, this list of conditions and the following disclaimer in
47  *    the documentation and/or other materials provided with the
48  *    distribution.
49  * 3. Neither the name of The DragonFly Project nor the names of its
50  *    contributors may be used to endorse or promote products derived
51  *    from this software without specific, prior written permission.
52  *
53  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
54  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
55  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
56  * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
57  * COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
58  * INCIDENTAL, SPECIAL, EXEMPLARY OR CONSEQUENTIAL DAMAGES (INCLUDING,
59  * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
60  * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
61  * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
62  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
63  * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
64  * SUCH DAMAGE.
65  *
66  */
67 /*
68  * SERIALIZATION API RULES:
69  *
70  * - If the driver uses the same serializer for the interrupt as for the
71  *   ifnet, most of the serialization will be done automatically for the
72  *   driver.
73  *
74  * - ifmedia entry points will be serialized by the ifmedia code using the
75  *   ifnet serializer.
76  *
77  * - if_* entry points except for if_input will be serialized by the IF
78  *   and protocol layers.
79  *
80  * - The device driver must be sure to serialize access from timeout code
81  *   installed by the device driver.
82  *
83  * - The device driver typically holds the serializer at the time it wishes
84  *   to call if_input.
85  *
86  * - We must call lwkt_serialize_handler_enable() prior to enabling the
87  *   hardware interrupt and lwkt_serialize_handler_disable() after disabling
88  *   the hardware interrupt in order to avoid handler execution races from
89  *   scheduled interrupt threads.
90  *
91  *   NOTE!  Since callers into the device driver hold the ifnet serializer,
92  *   the device driver may be holding a serializer at the time it calls
93  *   if_input even if it is not serializer-aware.
94  */
95
96 #include "opt_polling.h"
97
98 #include <sys/param.h>
99 #include <sys/bus.h>
100 #include <sys/endian.h>
101 #include <sys/interrupt.h>
102 #include <sys/kernel.h>
103 #include <sys/ktr.h>
104 #include <sys/malloc.h>
105 #include <sys/mbuf.h>
106 #include <sys/proc.h>
107 #include <sys/rman.h>
108 #include <sys/serialize.h>
109 #include <sys/socket.h>
110 #include <sys/sockio.h>
111 #include <sys/sysctl.h>
112 #include <sys/systm.h>
113
114 #include <net/bpf.h>
115 #include <net/ethernet.h>
116 #include <net/if.h>
117 #include <net/if_arp.h>
118 #include <net/if_dl.h>
119 #include <net/if_media.h>
120 #include <net/ifq_var.h>
121 #include <net/vlan/if_vlan_var.h>
122 #include <net/vlan/if_vlan_ether.h>
123
124 #include <netinet/in_systm.h>
125 #include <netinet/in.h>
126 #include <netinet/ip.h>
127 #include <netinet/tcp.h>
128 #include <netinet/udp.h>
129
130 #include <bus/pci/pcivar.h>
131 #include <bus/pci/pcireg.h>
132
133 #include <dev/netif/ig_hal/e1000_api.h>
134 #include <dev/netif/ig_hal/e1000_82571.h>
135 #include <dev/netif/em/if_em.h>
136
137 #define EM_NAME "Intel(R) PRO/1000 Network Connection "
138 #define EM_VER  " 7.2.4"
139
140 #define _EM_DEVICE(id, ret)     \
141         { EM_VENDOR_ID, E1000_DEV_ID_##id, ret, EM_NAME #id EM_VER }
142 #define EM_EMX_DEVICE(id)       _EM_DEVICE(id, -100)
143 #define EM_DEVICE(id)           _EM_DEVICE(id, 0)
144 #define EM_DEVICE_NULL  { 0, 0, 0, NULL }
145
146 static const struct em_vendor_info em_vendor_info_array[] = {
147         EM_DEVICE(82540EM),
148         EM_DEVICE(82540EM_LOM),
149         EM_DEVICE(82540EP),
150         EM_DEVICE(82540EP_LOM),
151         EM_DEVICE(82540EP_LP),
152
153         EM_DEVICE(82541EI),
154         EM_DEVICE(82541ER),
155         EM_DEVICE(82541ER_LOM),
156         EM_DEVICE(82541EI_MOBILE),
157         EM_DEVICE(82541GI),
158         EM_DEVICE(82541GI_LF),
159         EM_DEVICE(82541GI_MOBILE),
160
161         EM_DEVICE(82542),
162
163         EM_DEVICE(82543GC_FIBER),
164         EM_DEVICE(82543GC_COPPER),
165
166         EM_DEVICE(82544EI_COPPER),
167         EM_DEVICE(82544EI_FIBER),
168         EM_DEVICE(82544GC_COPPER),
169         EM_DEVICE(82544GC_LOM),
170
171         EM_DEVICE(82545EM_COPPER),
172         EM_DEVICE(82545EM_FIBER),
173         EM_DEVICE(82545GM_COPPER),
174         EM_DEVICE(82545GM_FIBER),
175         EM_DEVICE(82545GM_SERDES),
176
177         EM_DEVICE(82546EB_COPPER),
178         EM_DEVICE(82546EB_FIBER),
179         EM_DEVICE(82546EB_QUAD_COPPER),
180         EM_DEVICE(82546GB_COPPER),
181         EM_DEVICE(82546GB_FIBER),
182         EM_DEVICE(82546GB_SERDES),
183         EM_DEVICE(82546GB_PCIE),
184         EM_DEVICE(82546GB_QUAD_COPPER),
185         EM_DEVICE(82546GB_QUAD_COPPER_KSP3),
186
187         EM_DEVICE(82547EI),
188         EM_DEVICE(82547EI_MOBILE),
189         EM_DEVICE(82547GI),
190
191         EM_EMX_DEVICE(82571EB_COPPER),
192         EM_EMX_DEVICE(82571EB_FIBER),
193         EM_EMX_DEVICE(82571EB_SERDES),
194         EM_EMX_DEVICE(82571EB_SERDES_DUAL),
195         EM_EMX_DEVICE(82571EB_SERDES_QUAD),
196         EM_EMX_DEVICE(82571EB_QUAD_COPPER),
197         EM_EMX_DEVICE(82571EB_QUAD_COPPER_BP),
198         EM_EMX_DEVICE(82571EB_QUAD_COPPER_LP),
199         EM_EMX_DEVICE(82571EB_QUAD_FIBER),
200         EM_EMX_DEVICE(82571PT_QUAD_COPPER),
201
202         EM_EMX_DEVICE(82572EI_COPPER),
203         EM_EMX_DEVICE(82572EI_FIBER),
204         EM_EMX_DEVICE(82572EI_SERDES),
205         EM_EMX_DEVICE(82572EI),
206
207         EM_EMX_DEVICE(82573E),
208         EM_EMX_DEVICE(82573E_IAMT),
209         EM_EMX_DEVICE(82573L),
210
211         EM_DEVICE(82583V),
212
213         EM_EMX_DEVICE(80003ES2LAN_COPPER_SPT),
214         EM_EMX_DEVICE(80003ES2LAN_SERDES_SPT),
215         EM_EMX_DEVICE(80003ES2LAN_COPPER_DPT),
216         EM_EMX_DEVICE(80003ES2LAN_SERDES_DPT),
217
218         EM_DEVICE(ICH8_IGP_M_AMT),
219         EM_DEVICE(ICH8_IGP_AMT),
220         EM_DEVICE(ICH8_IGP_C),
221         EM_DEVICE(ICH8_IFE),
222         EM_DEVICE(ICH8_IFE_GT),
223         EM_DEVICE(ICH8_IFE_G),
224         EM_DEVICE(ICH8_IGP_M),
225         EM_DEVICE(ICH8_82567V_3),
226
227         EM_DEVICE(ICH9_IGP_M_AMT),
228         EM_DEVICE(ICH9_IGP_AMT),
229         EM_DEVICE(ICH9_IGP_C),
230         EM_DEVICE(ICH9_IGP_M),
231         EM_DEVICE(ICH9_IGP_M_V),
232         EM_DEVICE(ICH9_IFE),
233         EM_DEVICE(ICH9_IFE_GT),
234         EM_DEVICE(ICH9_IFE_G),
235         EM_DEVICE(ICH9_BM),
236
237         EM_EMX_DEVICE(82574L),
238         EM_EMX_DEVICE(82574LA),
239
240         EM_DEVICE(ICH10_R_BM_LM),
241         EM_DEVICE(ICH10_R_BM_LF),
242         EM_DEVICE(ICH10_R_BM_V),
243         EM_DEVICE(ICH10_D_BM_LM),
244         EM_DEVICE(ICH10_D_BM_LF),
245         EM_DEVICE(ICH10_D_BM_V),
246
247         EM_DEVICE(PCH_M_HV_LM),
248         EM_DEVICE(PCH_M_HV_LC),
249         EM_DEVICE(PCH_D_HV_DM),
250         EM_DEVICE(PCH_D_HV_DC),
251
252         EM_DEVICE(PCH2_LV_LM),
253         EM_DEVICE(PCH2_LV_V),
254
255         /* required last entry */
256         EM_DEVICE_NULL
257 };
258
259 static int      em_probe(device_t);
260 static int      em_attach(device_t);
261 static int      em_detach(device_t);
262 static int      em_shutdown(device_t);
263 static int      em_suspend(device_t);
264 static int      em_resume(device_t);
265
266 static void     em_init(void *);
267 static void     em_stop(struct adapter *);
268 static int      em_ioctl(struct ifnet *, u_long, caddr_t, struct ucred *);
269 static void     em_start(struct ifnet *);
270 #ifdef DEVICE_POLLING
271 static void     em_poll(struct ifnet *, enum poll_cmd, int);
272 #endif
273 static void     em_watchdog(struct ifnet *);
274 static void     em_media_status(struct ifnet *, struct ifmediareq *);
275 static int      em_media_change(struct ifnet *);
276 static void     em_timer(void *);
277
278 static void     em_intr(void *);
279 static void     em_intr_mask(void *);
280 static void     em_intr_body(struct adapter *, boolean_t);
281 static void     em_rxeof(struct adapter *, int);
282 static void     em_txeof(struct adapter *);
283 static void     em_tx_collect(struct adapter *);
284 static void     em_tx_purge(struct adapter *);
285 static void     em_enable_intr(struct adapter *);
286 static void     em_disable_intr(struct adapter *);
287
288 static int      em_dma_malloc(struct adapter *, bus_size_t,
289                     struct em_dma_alloc *);
290 static void     em_dma_free(struct adapter *, struct em_dma_alloc *);
291 static void     em_init_tx_ring(struct adapter *);
292 static int      em_init_rx_ring(struct adapter *);
293 static int      em_create_tx_ring(struct adapter *);
294 static int      em_create_rx_ring(struct adapter *);
295 static void     em_destroy_tx_ring(struct adapter *, int);
296 static void     em_destroy_rx_ring(struct adapter *, int);
297 static int      em_newbuf(struct adapter *, int, int);
298 static int      em_encap(struct adapter *, struct mbuf **);
299 static void     em_rxcsum(struct adapter *, struct e1000_rx_desc *,
300                     struct mbuf *);
301 static int      em_txcsum(struct adapter *, struct mbuf *,
302                     uint32_t *, uint32_t *);
303
304 static int      em_get_hw_info(struct adapter *);
305 static int      em_is_valid_eaddr(const uint8_t *);
306 static int      em_alloc_pci_res(struct adapter *);
307 static void     em_free_pci_res(struct adapter *);
308 static int      em_reset(struct adapter *);
309 static void     em_setup_ifp(struct adapter *);
310 static void     em_init_tx_unit(struct adapter *);
311 static void     em_init_rx_unit(struct adapter *);
312 static void     em_update_stats(struct adapter *);
313 static void     em_set_promisc(struct adapter *);
314 static void     em_disable_promisc(struct adapter *);
315 static void     em_set_multi(struct adapter *);
316 static void     em_update_link_status(struct adapter *);
317 static void     em_smartspeed(struct adapter *);
318 static void     em_set_itr(struct adapter *, uint32_t);
319 static void     em_disable_aspm(struct adapter *);
320
321 /* Hardware workarounds */
322 static int      em_82547_fifo_workaround(struct adapter *, int);
323 static void     em_82547_update_fifo_head(struct adapter *, int);
324 static int      em_82547_tx_fifo_reset(struct adapter *);
325 static void     em_82547_move_tail(void *);
326 static void     em_82547_move_tail_serialized(struct adapter *);
327 static uint32_t em_82544_fill_desc(bus_addr_t, uint32_t, PDESC_ARRAY);
328
329 static void     em_print_debug_info(struct adapter *);
330 static void     em_print_nvm_info(struct adapter *);
331 static void     em_print_hw_stats(struct adapter *);
332
333 static int      em_sysctl_stats(SYSCTL_HANDLER_ARGS);
334 static int      em_sysctl_debug_info(SYSCTL_HANDLER_ARGS);
335 static int      em_sysctl_int_throttle(SYSCTL_HANDLER_ARGS);
336 static int      em_sysctl_int_tx_nsegs(SYSCTL_HANDLER_ARGS);
337 static void     em_add_sysctl(struct adapter *adapter);
338
339 /* Management and WOL Support */
340 static void     em_get_mgmt(struct adapter *);
341 static void     em_rel_mgmt(struct adapter *);
342 static void     em_get_hw_control(struct adapter *);
343 static void     em_rel_hw_control(struct adapter *);
344 static void     em_enable_wol(device_t);
345
346 static device_method_t em_methods[] = {
347         /* Device interface */
348         DEVMETHOD(device_probe,         em_probe),
349         DEVMETHOD(device_attach,        em_attach),
350         DEVMETHOD(device_detach,        em_detach),
351         DEVMETHOD(device_shutdown,      em_shutdown),
352         DEVMETHOD(device_suspend,       em_suspend),
353         DEVMETHOD(device_resume,        em_resume),
354         { 0, 0 }
355 };
356
357 static driver_t em_driver = {
358         "em",
359         em_methods,
360         sizeof(struct adapter),
361 };
362
363 static devclass_t em_devclass;
364
365 DECLARE_DUMMY_MODULE(if_em);
366 MODULE_DEPEND(em, ig_hal, 1, 1, 1);
367 DRIVER_MODULE(if_em, pci, em_driver, em_devclass, NULL, NULL);
368
369 /*
370  * Tunables
371  */
372 static int      em_int_throttle_ceil = EM_DEFAULT_ITR;
373 static int      em_rxd = EM_DEFAULT_RXD;
374 static int      em_txd = EM_DEFAULT_TXD;
375 static int      em_smart_pwr_down = 0;
376
377 /* Controls whether promiscuous also shows bad packets */
378 static int      em_debug_sbp = FALSE;
379
380 static int      em_82573_workaround = 1;
381 static int      em_msi_enable = 1;
382
383 TUNABLE_INT("hw.em.int_throttle_ceil", &em_int_throttle_ceil);
384 TUNABLE_INT("hw.em.rxd", &em_rxd);
385 TUNABLE_INT("hw.em.txd", &em_txd);
386 TUNABLE_INT("hw.em.smart_pwr_down", &em_smart_pwr_down);
387 TUNABLE_INT("hw.em.sbp", &em_debug_sbp);
388 TUNABLE_INT("hw.em.82573_workaround", &em_82573_workaround);
389 TUNABLE_INT("hw.em.msi.enable", &em_msi_enable);
390
391 /* Global used in WOL setup with multiport cards */
392 static int      em_global_quad_port_a = 0;
393
394 /* Set this to one to display debug statistics */
395 static int      em_display_debug_stats = 0;
396
397 #if !defined(KTR_IF_EM)
398 #define KTR_IF_EM       KTR_ALL
399 #endif
400 KTR_INFO_MASTER(if_em);
401 KTR_INFO(KTR_IF_EM, if_em, intr_beg, 0, "intr begin");
402 KTR_INFO(KTR_IF_EM, if_em, intr_end, 1, "intr end");
403 KTR_INFO(KTR_IF_EM, if_em, pkt_receive, 4, "rx packet");
404 KTR_INFO(KTR_IF_EM, if_em, pkt_txqueue, 5, "tx packet");
405 KTR_INFO(KTR_IF_EM, if_em, pkt_txclean, 6, "tx clean");
406 #define logif(name)     KTR_LOG(if_em_ ## name)
407
408 static int
409 em_probe(device_t dev)
410 {
411         const struct em_vendor_info *ent;
412         uint16_t vid, did;
413
414         vid = pci_get_vendor(dev);
415         did = pci_get_device(dev);
416
417         for (ent = em_vendor_info_array; ent->desc != NULL; ++ent) {
418                 if (vid == ent->vendor_id && did == ent->device_id) {
419                         device_set_desc(dev, ent->desc);
420                         device_set_async_attach(dev, TRUE);
421                         return (ent->ret);
422                 }
423         }
424         return (ENXIO);
425 }
426
427 static int
428 em_attach(device_t dev)
429 {
430         struct adapter *adapter = device_get_softc(dev);
431         struct ifnet *ifp = &adapter->arpcom.ac_if;
432         int tsize, rsize;
433         int error = 0;
434         uint16_t eeprom_data, device_id, apme_mask;
435         driver_intr_t *intr_func;
436
437         adapter->dev = adapter->osdep.dev = dev;
438
439         callout_init_mp(&adapter->timer);
440         callout_init_mp(&adapter->tx_fifo_timer);
441
442         /* Determine hardware and mac info */
443         error = em_get_hw_info(adapter);
444         if (error) {
445                 device_printf(dev, "Identify hardware failed\n");
446                 goto fail;
447         }
448
449         /* Setup PCI resources */
450         error = em_alloc_pci_res(adapter);
451         if (error) {
452                 device_printf(dev, "Allocation of PCI resources failed\n");
453                 goto fail;
454         }
455
456         /*
457          * For ICH8 and family we need to map the flash memory,
458          * and this must happen after the MAC is identified.
459          */
460         if (adapter->hw.mac.type == e1000_ich8lan ||
461             adapter->hw.mac.type == e1000_ich9lan ||
462             adapter->hw.mac.type == e1000_ich10lan ||
463             adapter->hw.mac.type == e1000_pchlan ||
464             adapter->hw.mac.type == e1000_pch2lan) {
465                 adapter->flash_rid = EM_BAR_FLASH;
466
467                 adapter->flash = bus_alloc_resource_any(dev, SYS_RES_MEMORY,
468                                         &adapter->flash_rid, RF_ACTIVE);
469                 if (adapter->flash == NULL) {
470                         device_printf(dev, "Mapping of Flash failed\n");
471                         error = ENXIO;
472                         goto fail;
473                 }
474                 adapter->osdep.flash_bus_space_tag =
475                     rman_get_bustag(adapter->flash);
476                 adapter->osdep.flash_bus_space_handle =
477                     rman_get_bushandle(adapter->flash);
478
479                 /*
480                  * This is used in the shared code
481                  * XXX this goof is actually not used.
482                  */
483                 adapter->hw.flash_address = (uint8_t *)adapter->flash;
484         }
485
486         /* Do Shared Code initialization */
487         if (e1000_setup_init_funcs(&adapter->hw, TRUE)) {
488                 device_printf(dev, "Setup of Shared code failed\n");
489                 error = ENXIO;
490                 goto fail;
491         }
492
493         e1000_get_bus_info(&adapter->hw);
494
495         /*
496          * Validate number of transmit and receive descriptors.  It
497          * must not exceed hardware maximum, and must be multiple
498          * of E1000_DBA_ALIGN.
499          */
500         if ((em_txd * sizeof(struct e1000_tx_desc)) % EM_DBA_ALIGN != 0 ||
501             (adapter->hw.mac.type >= e1000_82544 && em_txd > EM_MAX_TXD) ||
502             (adapter->hw.mac.type < e1000_82544 && em_txd > EM_MAX_TXD_82543) ||
503             em_txd < EM_MIN_TXD) {
504                 device_printf(dev, "Using %d TX descriptors instead of %d!\n",
505                     EM_DEFAULT_TXD, em_txd);
506                 adapter->num_tx_desc = EM_DEFAULT_TXD;
507         } else {
508                 adapter->num_tx_desc = em_txd;
509         }
510         if ((em_rxd * sizeof(struct e1000_rx_desc)) % EM_DBA_ALIGN != 0 ||
511             (adapter->hw.mac.type >= e1000_82544 && em_rxd > EM_MAX_RXD) ||
512             (adapter->hw.mac.type < e1000_82544 && em_rxd > EM_MAX_RXD_82543) ||
513             em_rxd < EM_MIN_RXD) {
514                 device_printf(dev, "Using %d RX descriptors instead of %d!\n",
515                     EM_DEFAULT_RXD, em_rxd);
516                 adapter->num_rx_desc = EM_DEFAULT_RXD;
517         } else {
518                 adapter->num_rx_desc = em_rxd;
519         }
520
521         adapter->hw.mac.autoneg = DO_AUTO_NEG;
522         adapter->hw.phy.autoneg_wait_to_complete = FALSE;
523         adapter->hw.phy.autoneg_advertised = AUTONEG_ADV_DEFAULT;
524         adapter->rx_buffer_len = MCLBYTES;
525
526         /*
527          * Interrupt throttle rate
528          */
529         if (em_int_throttle_ceil == 0) {
530                 adapter->int_throttle_ceil = 0;
531         } else {
532                 int throttle = em_int_throttle_ceil;
533
534                 if (throttle < 0)
535                         throttle = EM_DEFAULT_ITR;
536
537                 /* Recalculate the tunable value to get the exact frequency. */
538                 throttle = 1000000000 / 256 / throttle;
539
540                 /* Upper 16bits of ITR is reserved and should be zero */
541                 if (throttle & 0xffff0000)
542                         throttle = 1000000000 / 256 / EM_DEFAULT_ITR;
543
544                 adapter->int_throttle_ceil = 1000000000 / 256 / throttle;
545         }
546
547         e1000_init_script_state_82541(&adapter->hw, TRUE);
548         e1000_set_tbi_compatibility_82543(&adapter->hw, TRUE);
549
550         /* Copper options */
551         if (adapter->hw.phy.media_type == e1000_media_type_copper) {
552                 adapter->hw.phy.mdix = AUTO_ALL_MODES;
553                 adapter->hw.phy.disable_polarity_correction = FALSE;
554                 adapter->hw.phy.ms_type = EM_MASTER_SLAVE;
555         }
556
557         /* Set the frame limits assuming standard ethernet sized frames. */
558         adapter->max_frame_size = ETHERMTU + ETHER_HDR_LEN + ETHER_CRC_LEN;
559         adapter->min_frame_size = ETH_ZLEN + ETHER_CRC_LEN;
560
561         /* This controls when hardware reports transmit completion status. */
562         adapter->hw.mac.report_tx_early = 1;
563
564         /*
565          * Create top level busdma tag
566          */
567         error = bus_dma_tag_create(NULL, 1, 0,
568                         BUS_SPACE_MAXADDR, BUS_SPACE_MAXADDR,
569                         NULL, NULL,
570                         BUS_SPACE_MAXSIZE_32BIT, 0, BUS_SPACE_MAXSIZE_32BIT,
571                         0, &adapter->parent_dtag);
572         if (error) {
573                 device_printf(dev, "could not create top level DMA tag\n");
574                 goto fail;
575         }
576
577         /*
578          * Allocate Transmit Descriptor ring
579          */
580         tsize = roundup2(adapter->num_tx_desc * sizeof(struct e1000_tx_desc),
581                          EM_DBA_ALIGN);
582         error = em_dma_malloc(adapter, tsize, &adapter->txdma);
583         if (error) {
584                 device_printf(dev, "Unable to allocate tx_desc memory\n");
585                 goto fail;
586         }
587         adapter->tx_desc_base = adapter->txdma.dma_vaddr;
588
589         /*
590          * Allocate Receive Descriptor ring
591          */
592         rsize = roundup2(adapter->num_rx_desc * sizeof(struct e1000_rx_desc),
593                          EM_DBA_ALIGN);
594         error = em_dma_malloc(adapter, rsize, &adapter->rxdma);
595         if (error) {
596                 device_printf(dev, "Unable to allocate rx_desc memory\n");
597                 goto fail;
598         }
599         adapter->rx_desc_base = adapter->rxdma.dma_vaddr;
600
601         /* Allocate multicast array memory. */
602         adapter->mta = kmalloc(ETH_ADDR_LEN * MAX_NUM_MULTICAST_ADDRESSES,
603             M_DEVBUF, M_WAITOK);
604
605         /* Indicate SOL/IDER usage */
606         if (e1000_check_reset_block(&adapter->hw)) {
607                 device_printf(dev,
608                     "PHY reset is blocked due to SOL/IDER session.\n");
609         }
610
611         /*
612          * Start from a known state, this is important in reading the
613          * nvm and mac from that.
614          */
615         e1000_reset_hw(&adapter->hw);
616
617         /* Make sure we have a good EEPROM before we read from it */
618         if (e1000_validate_nvm_checksum(&adapter->hw) < 0) {
619                 /*
620                  * Some PCI-E parts fail the first check due to
621                  * the link being in sleep state, call it again,
622                  * if it fails a second time its a real issue.
623                  */
624                 if (e1000_validate_nvm_checksum(&adapter->hw) < 0) {
625                         device_printf(dev,
626                             "The EEPROM Checksum Is Not Valid\n");
627                         error = EIO;
628                         goto fail;
629                 }
630         }
631
632         /* Copy the permanent MAC address out of the EEPROM */
633         if (e1000_read_mac_addr(&adapter->hw) < 0) {
634                 device_printf(dev, "EEPROM read error while reading MAC"
635                     " address\n");
636                 error = EIO;
637                 goto fail;
638         }
639         if (!em_is_valid_eaddr(adapter->hw.mac.addr)) {
640                 device_printf(dev, "Invalid MAC address\n");
641                 error = EIO;
642                 goto fail;
643         }
644
645         /* Allocate transmit descriptors and buffers */
646         error = em_create_tx_ring(adapter);
647         if (error) {
648                 device_printf(dev, "Could not setup transmit structures\n");
649                 goto fail;
650         }
651
652         /* Allocate receive descriptors and buffers */
653         error = em_create_rx_ring(adapter);
654         if (error) {
655                 device_printf(dev, "Could not setup receive structures\n");
656                 goto fail;
657         }
658
659         /* Manually turn off all interrupts */
660         E1000_WRITE_REG(&adapter->hw, E1000_IMC, 0xffffffff);
661
662         /* Determine if we have to control management hardware */
663         if (e1000_enable_mng_pass_thru(&adapter->hw))
664                 adapter->flags |= EM_FLAG_HAS_MGMT;
665
666         /*
667          * Setup Wake-on-Lan
668          */
669         apme_mask = EM_EEPROM_APME;
670         eeprom_data = 0;
671         switch (adapter->hw.mac.type) {
672         case e1000_82542:
673         case e1000_82543:
674                 break;
675
676         case e1000_82573:
677         case e1000_82583:
678                 adapter->flags |= EM_FLAG_HAS_AMT;
679                 /* FALL THROUGH */
680
681         case e1000_82546:
682         case e1000_82546_rev_3:
683         case e1000_82571:
684         case e1000_82572:
685         case e1000_80003es2lan:
686                 if (adapter->hw.bus.func == 1) {
687                         e1000_read_nvm(&adapter->hw,
688                             NVM_INIT_CONTROL3_PORT_B, 1, &eeprom_data);
689                 } else {
690                         e1000_read_nvm(&adapter->hw,
691                             NVM_INIT_CONTROL3_PORT_A, 1, &eeprom_data);
692                 }
693                 break;
694
695         case e1000_ich8lan:
696         case e1000_ich9lan:
697         case e1000_ich10lan:
698         case e1000_pchlan:
699         case e1000_pch2lan:
700                 apme_mask = E1000_WUC_APME;
701                 adapter->flags |= EM_FLAG_HAS_AMT;
702                 eeprom_data = E1000_READ_REG(&adapter->hw, E1000_WUC);
703                 break;
704
705         default:
706                 e1000_read_nvm(&adapter->hw,
707                     NVM_INIT_CONTROL3_PORT_A, 1, &eeprom_data);
708                 break;
709         }
710         if (eeprom_data & apme_mask)
711                 adapter->wol = E1000_WUFC_MAG | E1000_WUFC_MC;
712
713         /*
714          * We have the eeprom settings, now apply the special cases
715          * where the eeprom may be wrong or the board won't support
716          * wake on lan on a particular port
717          */
718         device_id = pci_get_device(dev);
719         switch (device_id) {
720         case E1000_DEV_ID_82546GB_PCIE:
721                 adapter->wol = 0;
722                 break;
723
724         case E1000_DEV_ID_82546EB_FIBER:
725         case E1000_DEV_ID_82546GB_FIBER:
726         case E1000_DEV_ID_82571EB_FIBER:
727                 /*
728                  * Wake events only supported on port A for dual fiber
729                  * regardless of eeprom setting
730                  */
731                 if (E1000_READ_REG(&adapter->hw, E1000_STATUS) &
732                     E1000_STATUS_FUNC_1)
733                         adapter->wol = 0;
734                 break;
735
736         case E1000_DEV_ID_82546GB_QUAD_COPPER_KSP3:
737         case E1000_DEV_ID_82571EB_QUAD_COPPER:
738         case E1000_DEV_ID_82571EB_QUAD_FIBER:
739         case E1000_DEV_ID_82571EB_QUAD_COPPER_LP:
740                 /* if quad port adapter, disable WoL on all but port A */
741                 if (em_global_quad_port_a != 0)
742                         adapter->wol = 0;
743                 /* Reset for multiple quad port adapters */
744                 if (++em_global_quad_port_a == 4)
745                         em_global_quad_port_a = 0;
746                 break;
747         }
748
749         /* XXX disable wol */
750         adapter->wol = 0;
751
752         /* Setup OS specific network interface */
753         em_setup_ifp(adapter);
754
755         /* Add sysctl tree, must after em_setup_ifp() */
756         em_add_sysctl(adapter);
757
758         /* Reset the hardware */
759         error = em_reset(adapter);
760         if (error) {
761                 device_printf(dev, "Unable to reset the hardware\n");
762                 goto fail;
763         }
764
765         /* Initialize statistics */
766         em_update_stats(adapter);
767
768         adapter->hw.mac.get_link_status = 1;
769         em_update_link_status(adapter);
770
771         /* Do we need workaround for 82544 PCI-X adapter? */
772         if (adapter->hw.bus.type == e1000_bus_type_pcix &&
773             adapter->hw.mac.type == e1000_82544)
774                 adapter->pcix_82544 = TRUE;
775         else
776                 adapter->pcix_82544 = FALSE;
777
778         if (adapter->pcix_82544) {
779                 /*
780                  * 82544 on PCI-X may split one TX segment
781                  * into two TX descs, so we double its number
782                  * of spare TX desc here.
783                  */
784                 adapter->spare_tx_desc = 2 * EM_TX_SPARE;
785         } else {
786                 adapter->spare_tx_desc = EM_TX_SPARE;
787         }
788
789         /*
790          * Keep following relationship between spare_tx_desc, oact_tx_desc
791          * and tx_int_nsegs:
792          * (spare_tx_desc + EM_TX_RESERVED) <=
793          * oact_tx_desc <= EM_TX_OACTIVE_MAX <= tx_int_nsegs
794          */
795         adapter->oact_tx_desc = adapter->num_tx_desc / 8;
796         if (adapter->oact_tx_desc > EM_TX_OACTIVE_MAX)
797                 adapter->oact_tx_desc = EM_TX_OACTIVE_MAX;
798         if (adapter->oact_tx_desc < adapter->spare_tx_desc + EM_TX_RESERVED)
799                 adapter->oact_tx_desc = adapter->spare_tx_desc + EM_TX_RESERVED;
800
801         adapter->tx_int_nsegs = adapter->num_tx_desc / 16;
802         if (adapter->tx_int_nsegs < adapter->oact_tx_desc)
803                 adapter->tx_int_nsegs = adapter->oact_tx_desc;
804
805         /* Non-AMT based hardware can now take control from firmware */
806         if ((adapter->flags & (EM_FLAG_HAS_MGMT | EM_FLAG_HAS_AMT)) ==
807             EM_FLAG_HAS_MGMT && adapter->hw.mac.type >= e1000_82571)
808                 em_get_hw_control(adapter);
809
810         /*
811          * Missing Interrupt Following ICR read:
812          *
813          * 82571/82572 specification update errata #76
814          * 82573 specification update errata #31
815          * 82574 specification update errata #12
816          * 82583 specification update errata #4
817          */
818         intr_func = em_intr;
819         if ((adapter->flags & EM_FLAG_SHARED_INTR) &&
820             (adapter->hw.mac.type == e1000_82571 ||
821              adapter->hw.mac.type == e1000_82572 ||
822              adapter->hw.mac.type == e1000_82573 ||
823              adapter->hw.mac.type == e1000_82574 ||
824              adapter->hw.mac.type == e1000_82583))
825                 intr_func = em_intr_mask;
826
827         error = bus_setup_intr(dev, adapter->intr_res, INTR_MPSAFE,
828                                intr_func, adapter, &adapter->intr_tag,
829                                ifp->if_serializer);
830         if (error) {
831                 device_printf(dev, "Failed to register interrupt handler");
832                 ether_ifdetach(&adapter->arpcom.ac_if);
833                 goto fail;
834         }
835
836         ifp->if_cpuid = rman_get_cpuid(adapter->intr_res);
837         KKASSERT(ifp->if_cpuid >= 0 && ifp->if_cpuid < ncpus);
838         return (0);
839 fail:
840         em_detach(dev);
841         return (error);
842 }
843
844 static int
845 em_detach(device_t dev)
846 {
847         struct adapter *adapter = device_get_softc(dev);
848
849         if (device_is_attached(dev)) {
850                 struct ifnet *ifp = &adapter->arpcom.ac_if;
851
852                 lwkt_serialize_enter(ifp->if_serializer);
853
854                 em_stop(adapter);
855
856                 e1000_phy_hw_reset(&adapter->hw);
857
858                 em_rel_mgmt(adapter);
859                 em_rel_hw_control(adapter);
860
861                 if (adapter->wol) {
862                         E1000_WRITE_REG(&adapter->hw, E1000_WUC,
863                                         E1000_WUC_PME_EN);
864                         E1000_WRITE_REG(&adapter->hw, E1000_WUFC, adapter->wol);
865                         em_enable_wol(dev);
866                 }
867
868                 bus_teardown_intr(dev, adapter->intr_res, adapter->intr_tag);
869
870                 lwkt_serialize_exit(ifp->if_serializer);
871
872                 ether_ifdetach(ifp);
873         } else if (adapter->memory != NULL) {
874                 em_rel_hw_control(adapter);
875         }
876         bus_generic_detach(dev);
877
878         em_free_pci_res(adapter);
879
880         em_destroy_tx_ring(adapter, adapter->num_tx_desc);
881         em_destroy_rx_ring(adapter, adapter->num_rx_desc);
882
883         /* Free Transmit Descriptor ring */
884         if (adapter->tx_desc_base)
885                 em_dma_free(adapter, &adapter->txdma);
886
887         /* Free Receive Descriptor ring */
888         if (adapter->rx_desc_base)
889                 em_dma_free(adapter, &adapter->rxdma);
890
891         /* Free top level busdma tag */
892         if (adapter->parent_dtag != NULL)
893                 bus_dma_tag_destroy(adapter->parent_dtag);
894
895         /* Free sysctl tree */
896         if (adapter->sysctl_tree != NULL)
897                 sysctl_ctx_free(&adapter->sysctl_ctx);
898
899         if (adapter->mta != NULL)
900                 kfree(adapter->mta, M_DEVBUF);
901
902         return (0);
903 }
904
905 static int
906 em_shutdown(device_t dev)
907 {
908         return em_suspend(dev);
909 }
910
911 static int
912 em_suspend(device_t dev)
913 {
914         struct adapter *adapter = device_get_softc(dev);
915         struct ifnet *ifp = &adapter->arpcom.ac_if;
916
917         lwkt_serialize_enter(ifp->if_serializer);
918
919         em_stop(adapter);
920
921         em_rel_mgmt(adapter);
922         em_rel_hw_control(adapter);
923
924         if (adapter->wol) {
925                 E1000_WRITE_REG(&adapter->hw, E1000_WUC, E1000_WUC_PME_EN);
926                 E1000_WRITE_REG(&adapter->hw, E1000_WUFC, adapter->wol);
927                 em_enable_wol(dev);
928         }
929
930         lwkt_serialize_exit(ifp->if_serializer);
931
932         return bus_generic_suspend(dev);
933 }
934
935 static int
936 em_resume(device_t dev)
937 {
938         struct adapter *adapter = device_get_softc(dev);
939         struct ifnet *ifp = &adapter->arpcom.ac_if;
940
941         lwkt_serialize_enter(ifp->if_serializer);
942
943         em_init(adapter);
944         em_get_mgmt(adapter);
945         if_devstart(ifp);
946
947         lwkt_serialize_exit(ifp->if_serializer);
948
949         return bus_generic_resume(dev);
950 }
951
952 static void
953 em_start(struct ifnet *ifp)
954 {
955         struct adapter *adapter = ifp->if_softc;
956         struct mbuf *m_head;
957
958         ASSERT_SERIALIZED(ifp->if_serializer);
959
960         if ((ifp->if_flags & (IFF_RUNNING | IFF_OACTIVE)) != IFF_RUNNING)
961                 return;
962
963         if (!adapter->link_active) {
964                 ifq_purge(&ifp->if_snd);
965                 return;
966         }
967
968         while (!ifq_is_empty(&ifp->if_snd)) {
969                 /* Now do we at least have a minimal? */
970                 if (EM_IS_OACTIVE(adapter)) {
971                         em_tx_collect(adapter);
972                         if (EM_IS_OACTIVE(adapter)) {
973                                 ifp->if_flags |= IFF_OACTIVE;
974                                 adapter->no_tx_desc_avail1++;
975                                 break;
976                         }
977                 }
978
979                 logif(pkt_txqueue);
980                 m_head = ifq_dequeue(&ifp->if_snd, NULL);
981                 if (m_head == NULL)
982                         break;
983
984                 if (em_encap(adapter, &m_head)) {
985                         ifp->if_oerrors++;
986                         em_tx_collect(adapter);
987                         continue;
988                 }
989
990                 /* Send a copy of the frame to the BPF listener */
991                 ETHER_BPF_MTAP(ifp, m_head);
992
993                 /* Set timeout in case hardware has problems transmitting. */
994                 ifp->if_timer = EM_TX_TIMEOUT;
995         }
996 }
997
998 static int
999 em_ioctl(struct ifnet *ifp, u_long command, caddr_t data, struct ucred *cr)
1000 {
1001         struct adapter *adapter = ifp->if_softc;
1002         struct ifreq *ifr = (struct ifreq *)data;
1003         uint16_t eeprom_data = 0;
1004         int max_frame_size, mask, reinit;
1005         int error = 0;
1006
1007         ASSERT_SERIALIZED(ifp->if_serializer);
1008
1009         switch (command) {
1010         case SIOCSIFMTU:
1011                 switch (adapter->hw.mac.type) {
1012                 case e1000_82573:
1013                         /*
1014                          * 82573 only supports jumbo frames
1015                          * if ASPM is disabled.
1016                          */
1017                         e1000_read_nvm(&adapter->hw,
1018                             NVM_INIT_3GIO_3, 1, &eeprom_data);
1019                         if (eeprom_data & NVM_WORD1A_ASPM_MASK) {
1020                                 max_frame_size = ETHER_MAX_LEN;
1021                                 break;
1022                         }
1023                         /* FALL THROUGH */
1024
1025                 /* Limit Jumbo Frame size */
1026                 case e1000_82571:
1027                 case e1000_82572:
1028                 case e1000_ich9lan:
1029                 case e1000_ich10lan:
1030                 case e1000_pch2lan:
1031                 case e1000_82574:
1032                 case e1000_82583:
1033                 case e1000_80003es2lan:
1034                         max_frame_size = 9234;
1035                         break;
1036
1037                 case e1000_pchlan:
1038                         max_frame_size = 4096;
1039                         break;
1040
1041                 /* Adapters that do not support jumbo frames */
1042                 case e1000_82542:
1043                 case e1000_ich8lan:
1044                         max_frame_size = ETHER_MAX_LEN;
1045                         break;
1046
1047                 default:
1048                         max_frame_size = MAX_JUMBO_FRAME_SIZE;
1049                         break;
1050                 }
1051                 if (ifr->ifr_mtu > max_frame_size - ETHER_HDR_LEN -
1052                     ETHER_CRC_LEN) {
1053                         error = EINVAL;
1054                         break;
1055                 }
1056
1057                 ifp->if_mtu = ifr->ifr_mtu;
1058                 adapter->max_frame_size =
1059                     ifp->if_mtu + ETHER_HDR_LEN + ETHER_CRC_LEN;
1060
1061                 if (ifp->if_flags & IFF_RUNNING)
1062                         em_init(adapter);
1063                 break;
1064
1065         case SIOCSIFFLAGS:
1066                 if (ifp->if_flags & IFF_UP) {
1067                         if ((ifp->if_flags & IFF_RUNNING)) {
1068                                 if ((ifp->if_flags ^ adapter->if_flags) &
1069                                     (IFF_PROMISC | IFF_ALLMULTI)) {
1070                                         em_disable_promisc(adapter);
1071                                         em_set_promisc(adapter);
1072                                 }
1073                         } else {
1074                                 em_init(adapter);
1075                         }
1076                 } else if (ifp->if_flags & IFF_RUNNING) {
1077                         em_stop(adapter);
1078                 }
1079                 adapter->if_flags = ifp->if_flags;
1080                 break;
1081
1082         case SIOCADDMULTI:
1083         case SIOCDELMULTI:
1084                 if (ifp->if_flags & IFF_RUNNING) {
1085                         em_disable_intr(adapter);
1086                         em_set_multi(adapter);
1087                         if (adapter->hw.mac.type == e1000_82542 &&
1088                             adapter->hw.revision_id == E1000_REVISION_2)
1089                                 em_init_rx_unit(adapter);
1090 #ifdef DEVICE_POLLING
1091                         if (!(ifp->if_flags & IFF_POLLING))
1092 #endif
1093                                 em_enable_intr(adapter);
1094                 }
1095                 break;
1096
1097         case SIOCSIFMEDIA:
1098                 /* Check SOL/IDER usage */
1099                 if (e1000_check_reset_block(&adapter->hw)) {
1100                         device_printf(adapter->dev, "Media change is"
1101                             " blocked due to SOL/IDER session.\n");
1102                         break;
1103                 }
1104                 /* FALL THROUGH */
1105
1106         case SIOCGIFMEDIA:
1107                 error = ifmedia_ioctl(ifp, ifr, &adapter->media, command);
1108                 break;
1109
1110         case SIOCSIFCAP:
1111                 reinit = 0;
1112                 mask = ifr->ifr_reqcap ^ ifp->if_capenable;
1113                 if (mask & IFCAP_RXCSUM) {
1114                         ifp->if_capenable ^= IFCAP_RXCSUM;
1115                         reinit = 1;
1116                 }
1117                 if (mask & IFCAP_TXCSUM) {
1118                         ifp->if_capenable ^= IFCAP_TXCSUM;
1119                         if (ifp->if_capenable & IFCAP_TXCSUM)
1120                                 ifp->if_hwassist |= EM_CSUM_FEATURES;
1121                         else
1122                                 ifp->if_hwassist &= ~EM_CSUM_FEATURES;
1123                 }
1124                 if (mask & IFCAP_VLAN_HWTAGGING) {
1125                         ifp->if_capenable ^= IFCAP_VLAN_HWTAGGING;
1126                         reinit = 1;
1127                 }
1128                 if (reinit && (ifp->if_flags & IFF_RUNNING))
1129                         em_init(adapter);
1130                 break;
1131
1132         default:
1133                 error = ether_ioctl(ifp, command, data);
1134                 break;
1135         }
1136         return (error);
1137 }
1138
1139 static void
1140 em_watchdog(struct ifnet *ifp)
1141 {
1142         struct adapter *adapter = ifp->if_softc;
1143
1144         ASSERT_SERIALIZED(ifp->if_serializer);
1145
1146         /*
1147          * The timer is set to 5 every time start queues a packet.
1148          * Then txeof keeps resetting it as long as it cleans at
1149          * least one descriptor.
1150          * Finally, anytime all descriptors are clean the timer is
1151          * set to 0.
1152          */
1153
1154         if (E1000_READ_REG(&adapter->hw, E1000_TDT(0)) ==
1155             E1000_READ_REG(&adapter->hw, E1000_TDH(0))) {
1156                 /*
1157                  * If we reach here, all TX jobs are completed and
1158                  * the TX engine should have been idled for some time.
1159                  * We don't need to call if_devstart() here.
1160                  */
1161                 ifp->if_flags &= ~IFF_OACTIVE;
1162                 ifp->if_timer = 0;
1163                 return;
1164         }
1165
1166         /*
1167          * If we are in this routine because of pause frames, then
1168          * don't reset the hardware.
1169          */
1170         if (E1000_READ_REG(&adapter->hw, E1000_STATUS) &
1171             E1000_STATUS_TXOFF) {
1172                 ifp->if_timer = EM_TX_TIMEOUT;
1173                 return;
1174         }
1175
1176         if (e1000_check_for_link(&adapter->hw) == 0)
1177                 if_printf(ifp, "watchdog timeout -- resetting\n");
1178
1179         ifp->if_oerrors++;
1180         adapter->watchdog_events++;
1181
1182         em_init(adapter);
1183
1184         if (!ifq_is_empty(&ifp->if_snd))
1185                 if_devstart(ifp);
1186 }
1187
1188 static void
1189 em_init(void *xsc)
1190 {
1191         struct adapter *adapter = xsc;
1192         struct ifnet *ifp = &adapter->arpcom.ac_if;
1193         device_t dev = adapter->dev;
1194         uint32_t pba;
1195
1196         ASSERT_SERIALIZED(ifp->if_serializer);
1197
1198         em_stop(adapter);
1199
1200         /*
1201          * Packet Buffer Allocation (PBA)
1202          * Writing PBA sets the receive portion of the buffer
1203          * the remainder is used for the transmit buffer.
1204          *
1205          * Devices before the 82547 had a Packet Buffer of 64K.
1206          *   Default allocation: PBA=48K for Rx, leaving 16K for Tx.
1207          * After the 82547 the buffer was reduced to 40K.
1208          *   Default allocation: PBA=30K for Rx, leaving 10K for Tx.
1209          *   Note: default does not leave enough room for Jumbo Frame >10k.
1210          */
1211         switch (adapter->hw.mac.type) {
1212         case e1000_82547:
1213         case e1000_82547_rev_2: /* 82547: Total Packet Buffer is 40K */
1214                 if (adapter->max_frame_size > 8192)
1215                         pba = E1000_PBA_22K; /* 22K for Rx, 18K for Tx */
1216                 else
1217                         pba = E1000_PBA_30K; /* 30K for Rx, 10K for Tx */
1218                 adapter->tx_fifo_head = 0;
1219                 adapter->tx_head_addr = pba << EM_TX_HEAD_ADDR_SHIFT;
1220                 adapter->tx_fifo_size =
1221                     (E1000_PBA_40K - pba) << EM_PBA_BYTES_SHIFT;
1222                 break;
1223
1224         /* Total Packet Buffer on these is 48K */
1225         case e1000_82571:
1226         case e1000_82572:
1227         case e1000_80003es2lan:
1228                 pba = E1000_PBA_32K; /* 32K for Rx, 16K for Tx */
1229                 break;
1230
1231         case e1000_82573: /* 82573: Total Packet Buffer is 32K */
1232                 pba = E1000_PBA_12K; /* 12K for Rx, 20K for Tx */
1233                 break;
1234
1235         case e1000_82574:
1236         case e1000_82583:
1237                 pba = E1000_PBA_20K; /* 20K for Rx, 20K for Tx */
1238                 break;
1239
1240         case e1000_ich8lan:
1241                 pba = E1000_PBA_8K;
1242                 break;
1243
1244         case e1000_ich9lan:
1245         case e1000_ich10lan:
1246 #define E1000_PBA_10K   0x000A
1247                 pba = E1000_PBA_10K;
1248                 break;
1249
1250         case e1000_pchlan:
1251         case e1000_pch2lan:
1252                 pba = E1000_PBA_26K;
1253                 break;
1254
1255         default:
1256                 /* Devices before 82547 had a Packet Buffer of 64K.   */
1257                 if (adapter->max_frame_size > 8192)
1258                         pba = E1000_PBA_40K; /* 40K for Rx, 24K for Tx */
1259                 else
1260                         pba = E1000_PBA_48K; /* 48K for Rx, 16K for Tx */
1261         }
1262         E1000_WRITE_REG(&adapter->hw, E1000_PBA, pba);
1263
1264         /* Get the latest mac address, User can use a LAA */
1265         bcopy(IF_LLADDR(ifp), adapter->hw.mac.addr, ETHER_ADDR_LEN);
1266
1267         /* Put the address into the Receive Address Array */
1268         e1000_rar_set(&adapter->hw, adapter->hw.mac.addr, 0);
1269
1270         /*
1271          * With the 82571 adapter, RAR[0] may be overwritten
1272          * when the other port is reset, we make a duplicate
1273          * in RAR[14] for that eventuality, this assures
1274          * the interface continues to function.
1275          */
1276         if (adapter->hw.mac.type == e1000_82571) {
1277                 e1000_set_laa_state_82571(&adapter->hw, TRUE);
1278                 e1000_rar_set(&adapter->hw, adapter->hw.mac.addr,
1279                     E1000_RAR_ENTRIES - 1);
1280         }
1281
1282         /* Reset the hardware */
1283         if (em_reset(adapter)) {
1284                 device_printf(dev, "Unable to reset the hardware\n");
1285                 /* XXX em_stop()? */
1286                 return;
1287         }
1288         em_update_link_status(adapter);
1289
1290         /* Setup VLAN support, basic and offload if available */
1291         E1000_WRITE_REG(&adapter->hw, E1000_VET, ETHERTYPE_VLAN);
1292
1293         if (ifp->if_capenable & IFCAP_VLAN_HWTAGGING) {
1294                 uint32_t ctrl;
1295
1296                 ctrl = E1000_READ_REG(&adapter->hw, E1000_CTRL);
1297                 ctrl |= E1000_CTRL_VME;
1298                 E1000_WRITE_REG(&adapter->hw, E1000_CTRL, ctrl);
1299         }
1300
1301         /* Configure for OS presence */
1302         em_get_mgmt(adapter);
1303
1304         /* Prepare transmit descriptors and buffers */
1305         em_init_tx_ring(adapter);
1306         em_init_tx_unit(adapter);
1307
1308         /* Setup Multicast table */
1309         em_set_multi(adapter);
1310
1311         /* Prepare receive descriptors and buffers */
1312         if (em_init_rx_ring(adapter)) {
1313                 device_printf(dev, "Could not setup receive structures\n");
1314                 em_stop(adapter);
1315                 return;
1316         }
1317         em_init_rx_unit(adapter);
1318
1319         /* Don't lose promiscuous settings */
1320         em_set_promisc(adapter);
1321
1322         ifp->if_flags |= IFF_RUNNING;
1323         ifp->if_flags &= ~IFF_OACTIVE;
1324
1325         callout_reset(&adapter->timer, hz, em_timer, adapter);
1326         e1000_clear_hw_cntrs_base_generic(&adapter->hw);
1327
1328         /* MSI/X configuration for 82574 */
1329         if (adapter->hw.mac.type == e1000_82574) {
1330                 int tmp;
1331
1332                 tmp = E1000_READ_REG(&adapter->hw, E1000_CTRL_EXT);
1333                 tmp |= E1000_CTRL_EXT_PBA_CLR;
1334                 E1000_WRITE_REG(&adapter->hw, E1000_CTRL_EXT, tmp);
1335                 /*
1336                  * XXX MSIX
1337                  * Set the IVAR - interrupt vector routing.
1338                  * Each nibble represents a vector, high bit
1339                  * is enable, other 3 bits are the MSIX table
1340                  * entry, we map RXQ0 to 0, TXQ0 to 1, and
1341                  * Link (other) to 2, hence the magic number.
1342                  */
1343                 E1000_WRITE_REG(&adapter->hw, E1000_IVAR, 0x800A0908);
1344         }
1345
1346 #ifdef DEVICE_POLLING
1347         /*
1348          * Only enable interrupts if we are not polling, make sure
1349          * they are off otherwise.
1350          */
1351         if (ifp->if_flags & IFF_POLLING)
1352                 em_disable_intr(adapter);
1353         else
1354 #endif /* DEVICE_POLLING */
1355                 em_enable_intr(adapter);
1356
1357         /* AMT based hardware can now take control from firmware */
1358         if ((adapter->flags & (EM_FLAG_HAS_MGMT | EM_FLAG_HAS_AMT)) ==
1359             (EM_FLAG_HAS_MGMT | EM_FLAG_HAS_AMT) &&
1360             adapter->hw.mac.type >= e1000_82571)
1361                 em_get_hw_control(adapter);
1362
1363         /* Don't reset the phy next time init gets called */
1364         adapter->hw.phy.reset_disable = TRUE;
1365 }
1366
1367 #ifdef DEVICE_POLLING
1368
1369 static void
1370 em_poll(struct ifnet *ifp, enum poll_cmd cmd, int count)
1371 {
1372         struct adapter *adapter = ifp->if_softc;
1373         uint32_t reg_icr;
1374
1375         ASSERT_SERIALIZED(ifp->if_serializer);
1376
1377         switch (cmd) {
1378         case POLL_REGISTER:
1379                 em_disable_intr(adapter);
1380                 break;
1381
1382         case POLL_DEREGISTER:
1383                 em_enable_intr(adapter);
1384                 break;
1385
1386         case POLL_AND_CHECK_STATUS:
1387                 reg_icr = E1000_READ_REG(&adapter->hw, E1000_ICR);
1388                 if (reg_icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC)) {
1389                         callout_stop(&adapter->timer);
1390                         adapter->hw.mac.get_link_status = 1;
1391                         em_update_link_status(adapter);
1392                         callout_reset(&adapter->timer, hz, em_timer, adapter);
1393                 }
1394                 /* FALL THROUGH */
1395         case POLL_ONLY:
1396                 if (ifp->if_flags & IFF_RUNNING) {
1397                         em_rxeof(adapter, count);
1398                         em_txeof(adapter);
1399
1400                         if (!ifq_is_empty(&ifp->if_snd))
1401                                 if_devstart(ifp);
1402                 }
1403                 break;
1404         }
1405 }
1406
1407 #endif /* DEVICE_POLLING */
1408
1409 static void
1410 em_intr(void *xsc)
1411 {
1412         em_intr_body(xsc, TRUE);
1413 }
1414
1415 static void
1416 em_intr_body(struct adapter *adapter, boolean_t chk_asserted)
1417 {
1418         struct ifnet *ifp = &adapter->arpcom.ac_if;
1419         uint32_t reg_icr;
1420
1421         logif(intr_beg);
1422         ASSERT_SERIALIZED(ifp->if_serializer);
1423
1424         reg_icr = E1000_READ_REG(&adapter->hw, E1000_ICR);
1425
1426         if (chk_asserted &&
1427             ((adapter->hw.mac.type >= e1000_82571 &&
1428               (reg_icr & E1000_ICR_INT_ASSERTED) == 0) ||
1429              reg_icr == 0)) {
1430                 logif(intr_end);
1431                 return;
1432         }
1433
1434         /*
1435          * XXX: some laptops trigger several spurious interrupts
1436          * on em(4) when in the resume cycle. The ICR register
1437          * reports all-ones value in this case. Processing such
1438          * interrupts would lead to a freeze. I don't know why.
1439          */
1440         if (reg_icr == 0xffffffff) {
1441                 logif(intr_end);
1442                 return;
1443         }
1444
1445         if (ifp->if_flags & IFF_RUNNING) {
1446                 if (reg_icr &
1447                     (E1000_ICR_RXT0 | E1000_ICR_RXDMT0 | E1000_ICR_RXO))
1448                         em_rxeof(adapter, -1);
1449                 if (reg_icr & E1000_ICR_TXDW) {
1450                         em_txeof(adapter);
1451                         if (!ifq_is_empty(&ifp->if_snd))
1452                                 if_devstart(ifp);
1453                 }
1454         }
1455
1456         /* Link status change */
1457         if (reg_icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC)) {
1458                 callout_stop(&adapter->timer);
1459                 adapter->hw.mac.get_link_status = 1;
1460                 em_update_link_status(adapter);
1461
1462                 /* Deal with TX cruft when link lost */
1463                 em_tx_purge(adapter);
1464
1465                 callout_reset(&adapter->timer, hz, em_timer, adapter);
1466         }
1467
1468         if (reg_icr & E1000_ICR_RXO)
1469                 adapter->rx_overruns++;
1470
1471         logif(intr_end);
1472 }
1473
1474 static void
1475 em_intr_mask(void *xsc)
1476 {
1477         struct adapter *adapter = xsc;
1478
1479         E1000_WRITE_REG(&adapter->hw, E1000_IMC, 0xffffffff);
1480         /*
1481          * NOTE:
1482          * ICR.INT_ASSERTED bit will never be set if IMS is 0,
1483          * so don't check it.
1484          */
1485         em_intr_body(adapter, FALSE);
1486         E1000_WRITE_REG(&adapter->hw, E1000_IMS, IMS_ENABLE_MASK);
1487 }
1488
1489 static void
1490 em_media_status(struct ifnet *ifp, struct ifmediareq *ifmr)
1491 {
1492         struct adapter *adapter = ifp->if_softc;
1493         u_char fiber_type = IFM_1000_SX;
1494
1495         ASSERT_SERIALIZED(ifp->if_serializer);
1496
1497         em_update_link_status(adapter);
1498
1499         ifmr->ifm_status = IFM_AVALID;
1500         ifmr->ifm_active = IFM_ETHER;
1501
1502         if (!adapter->link_active)
1503                 return;
1504
1505         ifmr->ifm_status |= IFM_ACTIVE;
1506
1507         if (adapter->hw.phy.media_type == e1000_media_type_fiber ||
1508             adapter->hw.phy.media_type == e1000_media_type_internal_serdes) {
1509                 if (adapter->hw.mac.type == e1000_82545)
1510                         fiber_type = IFM_1000_LX;
1511                 ifmr->ifm_active |= fiber_type | IFM_FDX;
1512         } else {
1513                 switch (adapter->link_speed) {
1514                 case 10:
1515                         ifmr->ifm_active |= IFM_10_T;
1516                         break;
1517                 case 100:
1518                         ifmr->ifm_active |= IFM_100_TX;
1519                         break;
1520
1521                 case 1000:
1522                         ifmr->ifm_active |= IFM_1000_T;
1523                         break;
1524                 }
1525                 if (adapter->link_duplex == FULL_DUPLEX)
1526                         ifmr->ifm_active |= IFM_FDX;
1527                 else
1528                         ifmr->ifm_active |= IFM_HDX;
1529         }
1530 }
1531
1532 static int
1533 em_media_change(struct ifnet *ifp)
1534 {
1535         struct adapter *adapter = ifp->if_softc;
1536         struct ifmedia *ifm = &adapter->media;
1537
1538         ASSERT_SERIALIZED(ifp->if_serializer);
1539
1540         if (IFM_TYPE(ifm->ifm_media) != IFM_ETHER)
1541                 return (EINVAL);
1542
1543         switch (IFM_SUBTYPE(ifm->ifm_media)) {
1544         case IFM_AUTO:
1545                 adapter->hw.mac.autoneg = DO_AUTO_NEG;
1546                 adapter->hw.phy.autoneg_advertised = AUTONEG_ADV_DEFAULT;
1547                 break;
1548
1549         case IFM_1000_LX:
1550         case IFM_1000_SX:
1551         case IFM_1000_T:
1552                 adapter->hw.mac.autoneg = DO_AUTO_NEG;
1553                 adapter->hw.phy.autoneg_advertised = ADVERTISE_1000_FULL;
1554                 break;
1555
1556         case IFM_100_TX:
1557                 adapter->hw.mac.autoneg = FALSE;
1558                 adapter->hw.phy.autoneg_advertised = 0;
1559                 if ((ifm->ifm_media & IFM_GMASK) == IFM_FDX)
1560                         adapter->hw.mac.forced_speed_duplex = ADVERTISE_100_FULL;
1561                 else
1562                         adapter->hw.mac.forced_speed_duplex = ADVERTISE_100_HALF;
1563                 break;
1564
1565         case IFM_10_T:
1566                 adapter->hw.mac.autoneg = FALSE;
1567                 adapter->hw.phy.autoneg_advertised = 0;
1568                 if ((ifm->ifm_media & IFM_GMASK) == IFM_FDX)
1569                         adapter->hw.mac.forced_speed_duplex = ADVERTISE_10_FULL;
1570                 else
1571                         adapter->hw.mac.forced_speed_duplex = ADVERTISE_10_HALF;
1572                 break;
1573
1574         default:
1575                 if_printf(ifp, "Unsupported media type\n");
1576                 break;
1577         }
1578
1579         /*
1580          * As the speed/duplex settings my have changed we need to
1581          * reset the PHY.
1582          */
1583         adapter->hw.phy.reset_disable = FALSE;
1584
1585         em_init(adapter);
1586
1587         return (0);
1588 }
1589
1590 static int
1591 em_encap(struct adapter *adapter, struct mbuf **m_headp)
1592 {
1593         bus_dma_segment_t segs[EM_MAX_SCATTER];
1594         bus_dmamap_t map;
1595         struct em_buffer *tx_buffer, *tx_buffer_mapped;
1596         struct e1000_tx_desc *ctxd = NULL;
1597         struct mbuf *m_head = *m_headp;
1598         uint32_t txd_upper, txd_lower, txd_used, cmd = 0;
1599         int maxsegs, nsegs, i, j, first, last = 0, error;
1600
1601         txd_upper = txd_lower = 0;
1602         txd_used = 0;
1603
1604         /*
1605          * Capture the first descriptor index, this descriptor
1606          * will have the index of the EOP which is the only one
1607          * that now gets a DONE bit writeback.
1608          */
1609         first = adapter->next_avail_tx_desc;
1610         tx_buffer = &adapter->tx_buffer_area[first];
1611         tx_buffer_mapped = tx_buffer;
1612         map = tx_buffer->map;
1613
1614         maxsegs = adapter->num_tx_desc_avail - EM_TX_RESERVED;
1615         KASSERT(maxsegs >= adapter->spare_tx_desc,
1616                 ("not enough spare TX desc"));
1617         if (adapter->pcix_82544) {
1618                 /* Half it; see the comment in em_attach() */
1619                 maxsegs >>= 1;
1620         }
1621         if (maxsegs > EM_MAX_SCATTER)
1622                 maxsegs = EM_MAX_SCATTER;
1623
1624         error = bus_dmamap_load_mbuf_defrag(adapter->txtag, map, m_headp,
1625                         segs, maxsegs, &nsegs, BUS_DMA_NOWAIT);
1626         if (error) {
1627                 if (error == ENOBUFS)
1628                         adapter->mbuf_alloc_failed++;
1629                 else
1630                         adapter->no_tx_dma_setup++;
1631
1632                 m_freem(*m_headp);
1633                 *m_headp = NULL;
1634                 return error;
1635         }
1636         bus_dmamap_sync(adapter->txtag, map, BUS_DMASYNC_PREWRITE);
1637
1638         m_head = *m_headp;
1639         adapter->tx_nsegs += nsegs;
1640
1641         if (m_head->m_pkthdr.csum_flags & EM_CSUM_FEATURES) {
1642                 /* TX csum offloading will consume one TX desc */
1643                 adapter->tx_nsegs += em_txcsum(adapter, m_head,
1644                                                &txd_upper, &txd_lower);
1645         }
1646         i = adapter->next_avail_tx_desc;
1647
1648         /* Set up our transmit descriptors */
1649         for (j = 0; j < nsegs; j++) {
1650                 /* If adapter is 82544 and on PCIX bus */
1651                 if(adapter->pcix_82544) {
1652                         DESC_ARRAY desc_array;
1653                         uint32_t array_elements, counter;
1654
1655                         /*
1656                          * Check the Address and Length combination and
1657                          * split the data accordingly
1658                          */
1659                         array_elements = em_82544_fill_desc(segs[j].ds_addr,
1660                                                 segs[j].ds_len, &desc_array);
1661                         for (counter = 0; counter < array_elements; counter++) {
1662                                 KKASSERT(txd_used < adapter->num_tx_desc_avail);
1663
1664                                 tx_buffer = &adapter->tx_buffer_area[i];
1665                                 ctxd = &adapter->tx_desc_base[i];
1666
1667                                 ctxd->buffer_addr = htole64(
1668                                     desc_array.descriptor[counter].address);
1669                                 ctxd->lower.data = htole32(
1670                                     E1000_TXD_CMD_IFCS | txd_lower |
1671                                     desc_array.descriptor[counter].length);
1672                                 ctxd->upper.data = htole32(txd_upper);
1673
1674                                 last = i;
1675                                 if (++i == adapter->num_tx_desc)
1676                                         i = 0;
1677
1678                                 txd_used++;
1679                         }
1680                 } else {
1681                         tx_buffer = &adapter->tx_buffer_area[i];
1682                         ctxd = &adapter->tx_desc_base[i];
1683
1684                         ctxd->buffer_addr = htole64(segs[j].ds_addr);
1685                         ctxd->lower.data = htole32(E1000_TXD_CMD_IFCS |
1686                                                    txd_lower | segs[j].ds_len);
1687                         ctxd->upper.data = htole32(txd_upper);
1688
1689                         last = i;
1690                         if (++i == adapter->num_tx_desc)
1691                                 i = 0;
1692                 }
1693         }
1694
1695         adapter->next_avail_tx_desc = i;
1696         if (adapter->pcix_82544) {
1697                 KKASSERT(adapter->num_tx_desc_avail > txd_used);
1698                 adapter->num_tx_desc_avail -= txd_used;
1699         } else {
1700                 KKASSERT(adapter->num_tx_desc_avail > nsegs);
1701                 adapter->num_tx_desc_avail -= nsegs;
1702         }
1703
1704         /* Handle VLAN tag */
1705         if (m_head->m_flags & M_VLANTAG) {
1706                 /* Set the vlan id. */
1707                 ctxd->upper.fields.special =
1708                     htole16(m_head->m_pkthdr.ether_vlantag);
1709
1710                 /* Tell hardware to add tag */
1711                 ctxd->lower.data |= htole32(E1000_TXD_CMD_VLE);
1712         }
1713
1714         tx_buffer->m_head = m_head;
1715         tx_buffer_mapped->map = tx_buffer->map;
1716         tx_buffer->map = map;
1717
1718         if (adapter->tx_nsegs >= adapter->tx_int_nsegs) {
1719                 adapter->tx_nsegs = 0;
1720
1721                 /*
1722                  * Report Status (RS) is turned on
1723                  * every tx_int_nsegs descriptors.
1724                  */
1725                 cmd = E1000_TXD_CMD_RS;
1726
1727                 /*
1728                  * Keep track of the descriptor, which will
1729                  * be written back by hardware.
1730                  */
1731                 adapter->tx_dd[adapter->tx_dd_tail] = last;
1732                 EM_INC_TXDD_IDX(adapter->tx_dd_tail);
1733                 KKASSERT(adapter->tx_dd_tail != adapter->tx_dd_head);
1734         }
1735
1736         /*
1737          * Last Descriptor of Packet needs End Of Packet (EOP)
1738          */
1739         ctxd->lower.data |= htole32(E1000_TXD_CMD_EOP | cmd);
1740
1741         /*
1742          * Advance the Transmit Descriptor Tail (TDT), this tells the E1000
1743          * that this frame is available to transmit.
1744          */
1745         if (adapter->hw.mac.type == e1000_82547 &&
1746             adapter->link_duplex == HALF_DUPLEX) {
1747                 em_82547_move_tail_serialized(adapter);
1748         } else {
1749                 E1000_WRITE_REG(&adapter->hw, E1000_TDT(0), i);
1750                 if (adapter->hw.mac.type == e1000_82547) {
1751                         em_82547_update_fifo_head(adapter,
1752                             m_head->m_pkthdr.len);
1753                 }
1754         }
1755         return (0);
1756 }
1757
1758 /*
1759  * 82547 workaround to avoid controller hang in half-duplex environment.
1760  * The workaround is to avoid queuing a large packet that would span
1761  * the internal Tx FIFO ring boundary.  We need to reset the FIFO pointers
1762  * in this case.  We do that only when FIFO is quiescent.
1763  */
1764 static void
1765 em_82547_move_tail_serialized(struct adapter *adapter)
1766 {
1767         struct e1000_tx_desc *tx_desc;
1768         uint16_t hw_tdt, sw_tdt, length = 0;
1769         bool eop = 0;
1770
1771         ASSERT_SERIALIZED(adapter->arpcom.ac_if.if_serializer);
1772
1773         hw_tdt = E1000_READ_REG(&adapter->hw, E1000_TDT(0));
1774         sw_tdt = adapter->next_avail_tx_desc;
1775
1776         while (hw_tdt != sw_tdt) {
1777                 tx_desc = &adapter->tx_desc_base[hw_tdt];
1778                 length += tx_desc->lower.flags.length;
1779                 eop = tx_desc->lower.data & E1000_TXD_CMD_EOP;
1780                 if (++hw_tdt == adapter->num_tx_desc)
1781                         hw_tdt = 0;
1782
1783                 if (eop) {
1784                         if (em_82547_fifo_workaround(adapter, length)) {
1785                                 adapter->tx_fifo_wrk_cnt++;
1786                                 callout_reset(&adapter->tx_fifo_timer, 1,
1787                                         em_82547_move_tail, adapter);
1788                                 break;
1789                         }
1790                         E1000_WRITE_REG(&adapter->hw, E1000_TDT(0), hw_tdt);
1791                         em_82547_update_fifo_head(adapter, length);
1792                         length = 0;
1793                 }
1794         }
1795 }
1796
1797 static void
1798 em_82547_move_tail(void *xsc)
1799 {
1800         struct adapter *adapter = xsc;
1801         struct ifnet *ifp = &adapter->arpcom.ac_if;
1802
1803         lwkt_serialize_enter(ifp->if_serializer);
1804         em_82547_move_tail_serialized(adapter);
1805         lwkt_serialize_exit(ifp->if_serializer);
1806 }
1807
1808 static int
1809 em_82547_fifo_workaround(struct adapter *adapter, int len)
1810 {       
1811         int fifo_space, fifo_pkt_len;
1812
1813         fifo_pkt_len = roundup2(len + EM_FIFO_HDR, EM_FIFO_HDR);
1814
1815         if (adapter->link_duplex == HALF_DUPLEX) {
1816                 fifo_space = adapter->tx_fifo_size - adapter->tx_fifo_head;
1817
1818                 if (fifo_pkt_len >= (EM_82547_PKT_THRESH + fifo_space)) {
1819                         if (em_82547_tx_fifo_reset(adapter))
1820                                 return (0);
1821                         else
1822                                 return (1);
1823                 }
1824         }
1825         return (0);
1826 }
1827
1828 static void
1829 em_82547_update_fifo_head(struct adapter *adapter, int len)
1830 {
1831         int fifo_pkt_len = roundup2(len + EM_FIFO_HDR, EM_FIFO_HDR);
1832
1833         /* tx_fifo_head is always 16 byte aligned */
1834         adapter->tx_fifo_head += fifo_pkt_len;
1835         if (adapter->tx_fifo_head >= adapter->tx_fifo_size)
1836                 adapter->tx_fifo_head -= adapter->tx_fifo_size;
1837 }
1838
1839 static int
1840 em_82547_tx_fifo_reset(struct adapter *adapter)
1841 {
1842         uint32_t tctl;
1843
1844         if ((E1000_READ_REG(&adapter->hw, E1000_TDT(0)) ==
1845              E1000_READ_REG(&adapter->hw, E1000_TDH(0))) &&
1846             (E1000_READ_REG(&adapter->hw, E1000_TDFT) == 
1847              E1000_READ_REG(&adapter->hw, E1000_TDFH)) &&
1848             (E1000_READ_REG(&adapter->hw, E1000_TDFTS) ==
1849              E1000_READ_REG(&adapter->hw, E1000_TDFHS)) &&
1850             (E1000_READ_REG(&adapter->hw, E1000_TDFPC) == 0)) {
1851                 /* Disable TX unit */
1852                 tctl = E1000_READ_REG(&adapter->hw, E1000_TCTL);
1853                 E1000_WRITE_REG(&adapter->hw, E1000_TCTL,
1854                     tctl & ~E1000_TCTL_EN);
1855
1856                 /* Reset FIFO pointers */
1857                 E1000_WRITE_REG(&adapter->hw, E1000_TDFT,
1858                     adapter->tx_head_addr);
1859                 E1000_WRITE_REG(&adapter->hw, E1000_TDFH,
1860                     adapter->tx_head_addr);
1861                 E1000_WRITE_REG(&adapter->hw, E1000_TDFTS,
1862                     adapter->tx_head_addr);
1863                 E1000_WRITE_REG(&adapter->hw, E1000_TDFHS,
1864                     adapter->tx_head_addr);
1865
1866                 /* Re-enable TX unit */
1867                 E1000_WRITE_REG(&adapter->hw, E1000_TCTL, tctl);
1868                 E1000_WRITE_FLUSH(&adapter->hw);
1869
1870                 adapter->tx_fifo_head = 0;
1871                 adapter->tx_fifo_reset_cnt++;
1872
1873                 return (TRUE);
1874         } else {
1875                 return (FALSE);
1876         }
1877 }
1878
1879 static void
1880 em_set_promisc(struct adapter *adapter)
1881 {
1882         struct ifnet *ifp = &adapter->arpcom.ac_if;
1883         uint32_t reg_rctl;
1884
1885         reg_rctl = E1000_READ_REG(&adapter->hw, E1000_RCTL);
1886
1887         if (ifp->if_flags & IFF_PROMISC) {
1888                 reg_rctl |= (E1000_RCTL_UPE | E1000_RCTL_MPE);
1889                 /* Turn this on if you want to see bad packets */
1890                 if (em_debug_sbp)
1891                         reg_rctl |= E1000_RCTL_SBP;
1892                 E1000_WRITE_REG(&adapter->hw, E1000_RCTL, reg_rctl);
1893         } else if (ifp->if_flags & IFF_ALLMULTI) {
1894                 reg_rctl |= E1000_RCTL_MPE;
1895                 reg_rctl &= ~E1000_RCTL_UPE;
1896                 E1000_WRITE_REG(&adapter->hw, E1000_RCTL, reg_rctl);
1897         }
1898 }
1899
1900 static void
1901 em_disable_promisc(struct adapter *adapter)
1902 {
1903         uint32_t reg_rctl;
1904
1905         reg_rctl = E1000_READ_REG(&adapter->hw, E1000_RCTL);
1906
1907         reg_rctl &= ~E1000_RCTL_UPE;
1908         reg_rctl &= ~E1000_RCTL_MPE;
1909         reg_rctl &= ~E1000_RCTL_SBP;
1910         E1000_WRITE_REG(&adapter->hw, E1000_RCTL, reg_rctl);
1911 }
1912
1913 static void
1914 em_set_multi(struct adapter *adapter)
1915 {
1916         struct ifnet *ifp = &adapter->arpcom.ac_if;
1917         struct ifmultiaddr *ifma;
1918         uint32_t reg_rctl = 0;
1919         uint8_t *mta;
1920         int mcnt = 0;
1921
1922         mta = adapter->mta;
1923         bzero(mta, ETH_ADDR_LEN * MAX_NUM_MULTICAST_ADDRESSES);
1924
1925         if (adapter->hw.mac.type == e1000_82542 && 
1926             adapter->hw.revision_id == E1000_REVISION_2) {
1927                 reg_rctl = E1000_READ_REG(&adapter->hw, E1000_RCTL);
1928                 if (adapter->hw.bus.pci_cmd_word & CMD_MEM_WRT_INVALIDATE)
1929                         e1000_pci_clear_mwi(&adapter->hw);
1930                 reg_rctl |= E1000_RCTL_RST;
1931                 E1000_WRITE_REG(&adapter->hw, E1000_RCTL, reg_rctl);
1932                 msec_delay(5);
1933         }
1934
1935         TAILQ_FOREACH(ifma, &ifp->if_multiaddrs, ifma_link) {
1936                 if (ifma->ifma_addr->sa_family != AF_LINK)
1937                         continue;
1938
1939                 if (mcnt == MAX_NUM_MULTICAST_ADDRESSES)
1940                         break;
1941
1942                 bcopy(LLADDR((struct sockaddr_dl *)ifma->ifma_addr),
1943                     &mta[mcnt * ETHER_ADDR_LEN], ETHER_ADDR_LEN);
1944                 mcnt++;
1945         }
1946
1947         if (mcnt >= MAX_NUM_MULTICAST_ADDRESSES) {
1948                 reg_rctl = E1000_READ_REG(&adapter->hw, E1000_RCTL);
1949                 reg_rctl |= E1000_RCTL_MPE;
1950                 E1000_WRITE_REG(&adapter->hw, E1000_RCTL, reg_rctl);
1951         } else {
1952                 e1000_update_mc_addr_list(&adapter->hw, mta, mcnt);
1953         }
1954
1955         if (adapter->hw.mac.type == e1000_82542 && 
1956             adapter->hw.revision_id == E1000_REVISION_2) {
1957                 reg_rctl = E1000_READ_REG(&adapter->hw, E1000_RCTL);
1958                 reg_rctl &= ~E1000_RCTL_RST;
1959                 E1000_WRITE_REG(&adapter->hw, E1000_RCTL, reg_rctl);
1960                 msec_delay(5);
1961                 if (adapter->hw.bus.pci_cmd_word & CMD_MEM_WRT_INVALIDATE)
1962                         e1000_pci_set_mwi(&adapter->hw);
1963         }
1964 }
1965
1966 /*
1967  * This routine checks for link status and updates statistics.
1968  */
1969 static void
1970 em_timer(void *xsc)
1971 {
1972         struct adapter *adapter = xsc;
1973         struct ifnet *ifp = &adapter->arpcom.ac_if;
1974
1975         lwkt_serialize_enter(ifp->if_serializer);
1976
1977         em_update_link_status(adapter);
1978         em_update_stats(adapter);
1979
1980         /* Reset LAA into RAR[0] on 82571 */
1981         if (e1000_get_laa_state_82571(&adapter->hw) == TRUE)
1982                 e1000_rar_set(&adapter->hw, adapter->hw.mac.addr, 0);
1983
1984         if (em_display_debug_stats && (ifp->if_flags & IFF_RUNNING))
1985                 em_print_hw_stats(adapter);
1986
1987         em_smartspeed(adapter);
1988
1989         callout_reset(&adapter->timer, hz, em_timer, adapter);
1990
1991         lwkt_serialize_exit(ifp->if_serializer);
1992 }
1993
1994 static void
1995 em_update_link_status(struct adapter *adapter)
1996 {
1997         struct e1000_hw *hw = &adapter->hw;
1998         struct ifnet *ifp = &adapter->arpcom.ac_if;
1999         device_t dev = adapter->dev;
2000         uint32_t link_check = 0;
2001
2002         /* Get the cached link value or read phy for real */
2003         switch (hw->phy.media_type) {
2004         case e1000_media_type_copper:
2005                 if (hw->mac.get_link_status) {
2006                         /* Do the work to read phy */
2007                         e1000_check_for_link(hw);
2008                         link_check = !hw->mac.get_link_status;
2009                         if (link_check) /* ESB2 fix */
2010                                 e1000_cfg_on_link_up(hw);
2011                 } else {
2012                         link_check = TRUE;
2013                 }
2014                 break;
2015
2016         case e1000_media_type_fiber:
2017                 e1000_check_for_link(hw);
2018                 link_check =
2019                         E1000_READ_REG(hw, E1000_STATUS) & E1000_STATUS_LU;
2020                 break;
2021
2022         case e1000_media_type_internal_serdes:
2023                 e1000_check_for_link(hw);
2024                 link_check = adapter->hw.mac.serdes_has_link;
2025                 break;
2026
2027         case e1000_media_type_unknown:
2028         default:
2029                 break;
2030         }
2031
2032         /* Now check for a transition */
2033         if (link_check && adapter->link_active == 0) {
2034                 e1000_get_speed_and_duplex(hw, &adapter->link_speed,
2035                     &adapter->link_duplex);
2036
2037                 /*
2038                  * Check if we should enable/disable SPEED_MODE bit on
2039                  * 82571/82572
2040                  */
2041                 if (adapter->link_speed != SPEED_1000 &&
2042                     (hw->mac.type == e1000_82571 ||
2043                      hw->mac.type == e1000_82572)) {
2044                         int tarc0;
2045
2046                         tarc0 = E1000_READ_REG(hw, E1000_TARC(0));
2047                         tarc0 &= ~SPEED_MODE_BIT;
2048                         E1000_WRITE_REG(hw, E1000_TARC(0), tarc0);
2049                 }
2050                 if (bootverbose) {
2051                         device_printf(dev, "Link is up %d Mbps %s\n",
2052                             adapter->link_speed,
2053                             ((adapter->link_duplex == FULL_DUPLEX) ?
2054                             "Full Duplex" : "Half Duplex"));
2055                 }
2056                 adapter->link_active = 1;
2057                 adapter->smartspeed = 0;
2058                 ifp->if_baudrate = adapter->link_speed * 1000000;
2059                 ifp->if_link_state = LINK_STATE_UP;
2060                 if_link_state_change(ifp);
2061         } else if (!link_check && adapter->link_active == 1) {
2062                 ifp->if_baudrate = adapter->link_speed = 0;
2063                 adapter->link_duplex = 0;
2064                 if (bootverbose)
2065                         device_printf(dev, "Link is Down\n");
2066                 adapter->link_active = 0;
2067 #if 0
2068                 /* Link down, disable watchdog */
2069                 if->if_timer = 0;
2070 #endif
2071                 ifp->if_link_state = LINK_STATE_DOWN;
2072                 if_link_state_change(ifp);
2073         }
2074 }
2075
2076 static void
2077 em_stop(struct adapter *adapter)
2078 {
2079         struct ifnet *ifp = &adapter->arpcom.ac_if;
2080         int i;
2081
2082         ASSERT_SERIALIZED(ifp->if_serializer);
2083
2084         em_disable_intr(adapter);
2085
2086         callout_stop(&adapter->timer);
2087         callout_stop(&adapter->tx_fifo_timer);
2088
2089         ifp->if_flags &= ~(IFF_RUNNING | IFF_OACTIVE);
2090         ifp->if_timer = 0;
2091
2092         e1000_reset_hw(&adapter->hw);
2093         if (adapter->hw.mac.type >= e1000_82544)
2094                 E1000_WRITE_REG(&adapter->hw, E1000_WUC, 0);
2095
2096         for (i = 0; i < adapter->num_tx_desc; i++) {
2097                 struct em_buffer *tx_buffer = &adapter->tx_buffer_area[i];
2098
2099                 if (tx_buffer->m_head != NULL) {
2100                         bus_dmamap_unload(adapter->txtag, tx_buffer->map);
2101                         m_freem(tx_buffer->m_head);
2102                         tx_buffer->m_head = NULL;
2103                 }
2104         }
2105
2106         for (i = 0; i < adapter->num_rx_desc; i++) {
2107                 struct em_buffer *rx_buffer = &adapter->rx_buffer_area[i];
2108
2109                 if (rx_buffer->m_head != NULL) {
2110                         bus_dmamap_unload(adapter->rxtag, rx_buffer->map);
2111                         m_freem(rx_buffer->m_head);
2112                         rx_buffer->m_head = NULL;
2113                 }
2114         }
2115
2116         if (adapter->fmp != NULL)
2117                 m_freem(adapter->fmp);
2118         adapter->fmp = NULL;
2119         adapter->lmp = NULL;
2120
2121         adapter->csum_flags = 0;
2122         adapter->csum_lhlen = 0;
2123         adapter->csum_iphlen = 0;
2124
2125         adapter->tx_dd_head = 0;
2126         adapter->tx_dd_tail = 0;
2127         adapter->tx_nsegs = 0;
2128 }
2129
2130 static int
2131 em_get_hw_info(struct adapter *adapter)
2132 {
2133         device_t dev = adapter->dev;
2134
2135         /* Save off the information about this board */
2136         adapter->hw.vendor_id = pci_get_vendor(dev);
2137         adapter->hw.device_id = pci_get_device(dev);
2138         adapter->hw.revision_id = pci_get_revid(dev);
2139         adapter->hw.subsystem_vendor_id = pci_get_subvendor(dev);
2140         adapter->hw.subsystem_device_id = pci_get_subdevice(dev);
2141
2142         /* Do Shared Code Init and Setup */
2143         if (e1000_set_mac_type(&adapter->hw))
2144                 return ENXIO;
2145         return 0;
2146 }
2147
2148 static int
2149 em_alloc_pci_res(struct adapter *adapter)
2150 {
2151         device_t dev = adapter->dev;
2152         u_int intr_flags;
2153         int val, rid, msi_enable;
2154
2155         /* Enable bus mastering */
2156         pci_enable_busmaster(dev);
2157
2158         adapter->memory_rid = EM_BAR_MEM;
2159         adapter->memory = bus_alloc_resource_any(dev, SYS_RES_MEMORY,
2160                                 &adapter->memory_rid, RF_ACTIVE);
2161         if (adapter->memory == NULL) {
2162                 device_printf(dev, "Unable to allocate bus resource: memory\n");
2163                 return (ENXIO);
2164         }
2165         adapter->osdep.mem_bus_space_tag =
2166             rman_get_bustag(adapter->memory);
2167         adapter->osdep.mem_bus_space_handle =
2168             rman_get_bushandle(adapter->memory);
2169
2170         /* XXX This is quite goofy, it is not actually used */
2171         adapter->hw.hw_addr = (uint8_t *)&adapter->osdep.mem_bus_space_handle;
2172
2173         /* Only older adapters use IO mapping */
2174         if (adapter->hw.mac.type > e1000_82543 &&
2175             adapter->hw.mac.type < e1000_82571) {
2176                 /* Figure our where our IO BAR is ? */
2177                 for (rid = PCIR_BAR(0); rid < PCIR_CARDBUSCIS;) {
2178                         val = pci_read_config(dev, rid, 4);
2179                         if (EM_BAR_TYPE(val) == EM_BAR_TYPE_IO) {
2180                                 adapter->io_rid = rid;
2181                                 break;
2182                         }
2183                         rid += 4;
2184                         /* check for 64bit BAR */
2185                         if (EM_BAR_MEM_TYPE(val) == EM_BAR_MEM_TYPE_64BIT)
2186                                 rid += 4;
2187                 }
2188                 if (rid >= PCIR_CARDBUSCIS) {
2189                         device_printf(dev, "Unable to locate IO BAR\n");
2190                         return (ENXIO);
2191                 }
2192                 adapter->ioport = bus_alloc_resource_any(dev, SYS_RES_IOPORT,
2193                                         &adapter->io_rid, RF_ACTIVE);
2194                 if (adapter->ioport == NULL) {
2195                         device_printf(dev, "Unable to allocate bus resource: "
2196                             "ioport\n");
2197                         return (ENXIO);
2198                 }
2199                 adapter->hw.io_base = 0;
2200                 adapter->osdep.io_bus_space_tag =
2201                     rman_get_bustag(adapter->ioport);
2202                 adapter->osdep.io_bus_space_handle =
2203                     rman_get_bushandle(adapter->ioport);
2204         }
2205
2206         /*
2207          * Don't enable MSI-X on 82574, see:
2208          * 82574 specification update errata #15
2209          *
2210          * Don't enable MSI on PCI/PCI-X chips, see:
2211          * 82540 specification update errata #6
2212          * 82545 specification update errata #4
2213          *
2214          * Don't enable MSI on 82571/82572, see:
2215          * 82571/82572 specification update errata #63
2216          */
2217         msi_enable = em_msi_enable;
2218         if (msi_enable &&
2219             (!pci_is_pcie(dev) ||
2220              adapter->hw.mac.type == e1000_82571 ||
2221              adapter->hw.mac.type == e1000_82572))
2222                 msi_enable = 0;
2223
2224         adapter->intr_type = pci_alloc_1intr(dev, msi_enable,
2225             &adapter->intr_rid, &intr_flags);
2226
2227         if (adapter->intr_type == PCI_INTR_TYPE_LEGACY) {
2228                 int unshared;
2229
2230                 unshared = device_getenv_int(dev, "irq.unshared", 0);
2231                 if (!unshared) {
2232                         adapter->flags |= EM_FLAG_SHARED_INTR;
2233                         if (bootverbose)
2234                                 device_printf(dev, "IRQ shared\n");
2235                 } else {
2236                         intr_flags &= ~RF_SHAREABLE;
2237                         if (bootverbose)
2238                                 device_printf(dev, "IRQ unshared\n");
2239                 }
2240         }
2241
2242         adapter->intr_res = bus_alloc_resource_any(dev, SYS_RES_IRQ,
2243             &adapter->intr_rid, intr_flags);
2244         if (adapter->intr_res == NULL) {
2245                 device_printf(dev, "Unable to allocate bus resource: "
2246                     "interrupt\n");
2247                 return (ENXIO);
2248         }
2249
2250         adapter->hw.bus.pci_cmd_word = pci_read_config(dev, PCIR_COMMAND, 2);
2251         adapter->hw.back = &adapter->osdep;
2252         return (0);
2253 }
2254
2255 static void
2256 em_free_pci_res(struct adapter *adapter)
2257 {
2258         device_t dev = adapter->dev;
2259
2260         if (adapter->intr_res != NULL) {
2261                 bus_release_resource(dev, SYS_RES_IRQ,
2262                     adapter->intr_rid, adapter->intr_res);
2263         }
2264
2265         if (adapter->intr_type == PCI_INTR_TYPE_MSI)
2266                 pci_release_msi(dev);
2267
2268         if (adapter->memory != NULL) {
2269                 bus_release_resource(dev, SYS_RES_MEMORY,
2270                     adapter->memory_rid, adapter->memory);
2271         }
2272
2273         if (adapter->flash != NULL) {
2274                 bus_release_resource(dev, SYS_RES_MEMORY,
2275                     adapter->flash_rid, adapter->flash);
2276         }
2277
2278         if (adapter->ioport != NULL) {
2279                 bus_release_resource(dev, SYS_RES_IOPORT,
2280                     adapter->io_rid, adapter->ioport);
2281         }
2282 }
2283
2284 static int
2285 em_reset(struct adapter *adapter)
2286 {
2287         device_t dev = adapter->dev;
2288         uint16_t rx_buffer_size;
2289
2290         /* When hardware is reset, fifo_head is also reset */
2291         adapter->tx_fifo_head = 0;
2292
2293         /* Set up smart power down as default off on newer adapters. */
2294         if (!em_smart_pwr_down &&
2295             (adapter->hw.mac.type == e1000_82571 ||
2296              adapter->hw.mac.type == e1000_82572)) {
2297                 uint16_t phy_tmp = 0;
2298
2299                 /* Speed up time to link by disabling smart power down. */
2300                 e1000_read_phy_reg(&adapter->hw,
2301                     IGP02E1000_PHY_POWER_MGMT, &phy_tmp);
2302                 phy_tmp &= ~IGP02E1000_PM_SPD;
2303                 e1000_write_phy_reg(&adapter->hw,
2304                     IGP02E1000_PHY_POWER_MGMT, phy_tmp);
2305         }
2306
2307         /*
2308          * These parameters control the automatic generation (Tx) and
2309          * response (Rx) to Ethernet PAUSE frames.
2310          * - High water mark should allow for at least two frames to be
2311          *   received after sending an XOFF.
2312          * - Low water mark works best when it is very near the high water mark.
2313          *   This allows the receiver to restart by sending XON when it has
2314          *   drained a bit. Here we use an arbitary value of 1500 which will
2315          *   restart after one full frame is pulled from the buffer. There
2316          *   could be several smaller frames in the buffer and if so they will
2317          *   not trigger the XON until their total number reduces the buffer
2318          *   by 1500.
2319          * - The pause time is fairly large at 1000 x 512ns = 512 usec.
2320          */
2321         rx_buffer_size =
2322                 (E1000_READ_REG(&adapter->hw, E1000_PBA) & 0xffff) << 10;
2323
2324         adapter->hw.fc.high_water = rx_buffer_size -
2325                                     roundup2(adapter->max_frame_size, 1024);
2326         adapter->hw.fc.low_water = adapter->hw.fc.high_water - 1500;
2327
2328         if (adapter->hw.mac.type == e1000_80003es2lan)
2329                 adapter->hw.fc.pause_time = 0xFFFF;
2330         else
2331                 adapter->hw.fc.pause_time = EM_FC_PAUSE_TIME;
2332
2333         adapter->hw.fc.send_xon = TRUE;
2334
2335         adapter->hw.fc.requested_mode = e1000_fc_full;
2336
2337         /* Workaround: no TX flow ctrl for PCH */
2338         if (adapter->hw.mac.type == e1000_pchlan)
2339                 adapter->hw.fc.requested_mode = e1000_fc_rx_pause;
2340
2341         /* Override - settings for PCH2LAN, ya its magic :) */
2342         if (adapter->hw.mac.type == e1000_pch2lan) {
2343                 adapter->hw.fc.high_water = 0x5C20;
2344                 adapter->hw.fc.low_water = 0x5048;
2345                 adapter->hw.fc.pause_time = 0x0650;
2346                 adapter->hw.fc.refresh_time = 0x0400;
2347
2348                 /* Jumbos need adjusted PBA */
2349                 if (adapter->arpcom.ac_if.if_mtu > ETHERMTU)
2350                         E1000_WRITE_REG(&adapter->hw, E1000_PBA, 12);
2351                 else
2352                         E1000_WRITE_REG(&adapter->hw, E1000_PBA, 26);
2353         }
2354
2355         /* Issue a global reset */
2356         e1000_reset_hw(&adapter->hw);
2357         if (adapter->hw.mac.type >= e1000_82544)
2358                 E1000_WRITE_REG(&adapter->hw, E1000_WUC, 0);
2359         em_disable_aspm(adapter);
2360
2361         if (e1000_init_hw(&adapter->hw) < 0) {
2362                 device_printf(dev, "Hardware Initialization Failed\n");
2363                 return (EIO);
2364         }
2365
2366         E1000_WRITE_REG(&adapter->hw, E1000_VET, ETHERTYPE_VLAN);
2367         e1000_get_phy_info(&adapter->hw);
2368         e1000_check_for_link(&adapter->hw);
2369
2370         return (0);
2371 }
2372
2373 static void
2374 em_setup_ifp(struct adapter *adapter)
2375 {
2376         struct ifnet *ifp = &adapter->arpcom.ac_if;
2377
2378         if_initname(ifp, device_get_name(adapter->dev),
2379                     device_get_unit(adapter->dev));
2380         ifp->if_softc = adapter;
2381         ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST;
2382         ifp->if_init =  em_init;
2383         ifp->if_ioctl = em_ioctl;
2384         ifp->if_start = em_start;
2385 #ifdef DEVICE_POLLING
2386         ifp->if_poll = em_poll;
2387 #endif
2388         ifp->if_watchdog = em_watchdog;
2389         ifq_set_maxlen(&ifp->if_snd, adapter->num_tx_desc - 1);
2390         ifq_set_ready(&ifp->if_snd);
2391
2392         ether_ifattach(ifp, adapter->hw.mac.addr, NULL);
2393
2394         if (adapter->hw.mac.type >= e1000_82543)
2395                 ifp->if_capabilities = IFCAP_HWCSUM;
2396
2397         ifp->if_capabilities |= IFCAP_VLAN_HWTAGGING | IFCAP_VLAN_MTU;
2398         ifp->if_capenable = ifp->if_capabilities;
2399
2400         if (ifp->if_capenable & IFCAP_TXCSUM)
2401                 ifp->if_hwassist = EM_CSUM_FEATURES;
2402
2403         /*
2404          * Tell the upper layer(s) we support long frames.
2405          */
2406         ifp->if_data.ifi_hdrlen = sizeof(struct ether_vlan_header);
2407
2408         /*
2409          * Specify the media types supported by this adapter and register
2410          * callbacks to update media and link information
2411          */
2412         ifmedia_init(&adapter->media, IFM_IMASK,
2413                      em_media_change, em_media_status);
2414         if (adapter->hw.phy.media_type == e1000_media_type_fiber ||
2415             adapter->hw.phy.media_type == e1000_media_type_internal_serdes) {
2416                 u_char fiber_type = IFM_1000_SX; /* default type */
2417
2418                 if (adapter->hw.mac.type == e1000_82545)
2419                         fiber_type = IFM_1000_LX;
2420                 ifmedia_add(&adapter->media, IFM_ETHER | fiber_type | IFM_FDX, 
2421                             0, NULL);
2422                 ifmedia_add(&adapter->media, IFM_ETHER | fiber_type, 0, NULL);
2423         } else {
2424                 ifmedia_add(&adapter->media, IFM_ETHER | IFM_10_T, 0, NULL);
2425                 ifmedia_add(&adapter->media, IFM_ETHER | IFM_10_T | IFM_FDX,
2426                             0, NULL);
2427                 ifmedia_add(&adapter->media, IFM_ETHER | IFM_100_TX,
2428                             0, NULL);
2429                 ifmedia_add(&adapter->media, IFM_ETHER | IFM_100_TX | IFM_FDX,
2430                             0, NULL);
2431                 if (adapter->hw.phy.type != e1000_phy_ife) {
2432                         ifmedia_add(&adapter->media,
2433                                 IFM_ETHER | IFM_1000_T | IFM_FDX, 0, NULL);
2434                         ifmedia_add(&adapter->media,
2435                                 IFM_ETHER | IFM_1000_T, 0, NULL);
2436                 }
2437         }
2438         ifmedia_add(&adapter->media, IFM_ETHER | IFM_AUTO, 0, NULL);
2439         ifmedia_set(&adapter->media, IFM_ETHER | IFM_AUTO);
2440 }
2441
2442
2443 /*
2444  * Workaround for SmartSpeed on 82541 and 82547 controllers
2445  */
2446 static void
2447 em_smartspeed(struct adapter *adapter)
2448 {
2449         uint16_t phy_tmp;
2450
2451         if (adapter->link_active || adapter->hw.phy.type != e1000_phy_igp ||
2452             adapter->hw.mac.autoneg == 0 ||
2453             (adapter->hw.phy.autoneg_advertised & ADVERTISE_1000_FULL) == 0)
2454                 return;
2455
2456         if (adapter->smartspeed == 0) {
2457                 /*
2458                  * If Master/Slave config fault is asserted twice,
2459                  * we assume back-to-back
2460                  */
2461                 e1000_read_phy_reg(&adapter->hw, PHY_1000T_STATUS, &phy_tmp);
2462                 if (!(phy_tmp & SR_1000T_MS_CONFIG_FAULT))
2463                         return;
2464                 e1000_read_phy_reg(&adapter->hw, PHY_1000T_STATUS, &phy_tmp);
2465                 if (phy_tmp & SR_1000T_MS_CONFIG_FAULT) {
2466                         e1000_read_phy_reg(&adapter->hw,
2467                             PHY_1000T_CTRL, &phy_tmp);
2468                         if (phy_tmp & CR_1000T_MS_ENABLE) {
2469                                 phy_tmp &= ~CR_1000T_MS_ENABLE;
2470                                 e1000_write_phy_reg(&adapter->hw,
2471                                     PHY_1000T_CTRL, phy_tmp);
2472                                 adapter->smartspeed++;
2473                                 if (adapter->hw.mac.autoneg &&
2474                                     !e1000_phy_setup_autoneg(&adapter->hw) &&
2475                                     !e1000_read_phy_reg(&adapter->hw,
2476                                      PHY_CONTROL, &phy_tmp)) {
2477                                         phy_tmp |= MII_CR_AUTO_NEG_EN |
2478                                                    MII_CR_RESTART_AUTO_NEG;
2479                                         e1000_write_phy_reg(&adapter->hw,
2480                                             PHY_CONTROL, phy_tmp);
2481                                 }
2482                         }
2483                 }
2484                 return;
2485         } else if (adapter->smartspeed == EM_SMARTSPEED_DOWNSHIFT) {
2486                 /* If still no link, perhaps using 2/3 pair cable */
2487                 e1000_read_phy_reg(&adapter->hw, PHY_1000T_CTRL, &phy_tmp);
2488                 phy_tmp |= CR_1000T_MS_ENABLE;
2489                 e1000_write_phy_reg(&adapter->hw, PHY_1000T_CTRL, phy_tmp);
2490                 if (adapter->hw.mac.autoneg &&
2491                     !e1000_phy_setup_autoneg(&adapter->hw) &&
2492                     !e1000_read_phy_reg(&adapter->hw, PHY_CONTROL, &phy_tmp)) {
2493                         phy_tmp |= MII_CR_AUTO_NEG_EN | MII_CR_RESTART_AUTO_NEG;
2494                         e1000_write_phy_reg(&adapter->hw, PHY_CONTROL, phy_tmp);
2495                 }
2496         }
2497
2498         /* Restart process after EM_SMARTSPEED_MAX iterations */
2499         if (adapter->smartspeed++ == EM_SMARTSPEED_MAX)
2500                 adapter->smartspeed = 0;
2501 }
2502
2503 static int
2504 em_dma_malloc(struct adapter *adapter, bus_size_t size,
2505               struct em_dma_alloc *dma)
2506 {
2507         dma->dma_vaddr = bus_dmamem_coherent_any(adapter->parent_dtag,
2508                                 EM_DBA_ALIGN, size, BUS_DMA_WAITOK,
2509                                 &dma->dma_tag, &dma->dma_map,
2510                                 &dma->dma_paddr);
2511         if (dma->dma_vaddr == NULL)
2512                 return ENOMEM;
2513         else
2514                 return 0;
2515 }
2516
2517 static void
2518 em_dma_free(struct adapter *adapter, struct em_dma_alloc *dma)
2519 {
2520         if (dma->dma_tag == NULL)
2521                 return;
2522         bus_dmamap_unload(dma->dma_tag, dma->dma_map);
2523         bus_dmamem_free(dma->dma_tag, dma->dma_vaddr, dma->dma_map);
2524         bus_dma_tag_destroy(dma->dma_tag);
2525 }
2526
2527 static int
2528 em_create_tx_ring(struct adapter *adapter)
2529 {
2530         device_t dev = adapter->dev;
2531         struct em_buffer *tx_buffer;
2532         int error, i;
2533
2534         adapter->tx_buffer_area =
2535                 kmalloc(sizeof(struct em_buffer) * adapter->num_tx_desc,
2536                         M_DEVBUF, M_WAITOK | M_ZERO);
2537
2538         /*
2539          * Create DMA tags for tx buffers
2540          */
2541         error = bus_dma_tag_create(adapter->parent_dtag, /* parent */
2542                         1, 0,                   /* alignment, bounds */
2543                         BUS_SPACE_MAXADDR,      /* lowaddr */
2544                         BUS_SPACE_MAXADDR,      /* highaddr */
2545                         NULL, NULL,             /* filter, filterarg */
2546                         EM_TSO_SIZE,            /* maxsize */
2547                         EM_MAX_SCATTER,         /* nsegments */
2548                         EM_MAX_SEGSIZE,         /* maxsegsize */
2549                         BUS_DMA_WAITOK | BUS_DMA_ALLOCNOW |
2550                         BUS_DMA_ONEBPAGE,       /* flags */
2551                         &adapter->txtag);
2552         if (error) {
2553                 device_printf(dev, "Unable to allocate TX DMA tag\n");
2554                 kfree(adapter->tx_buffer_area, M_DEVBUF);
2555                 adapter->tx_buffer_area = NULL;
2556                 return error;
2557         }
2558
2559         /*
2560          * Create DMA maps for tx buffers
2561          */
2562         for (i = 0; i < adapter->num_tx_desc; i++) {
2563                 tx_buffer = &adapter->tx_buffer_area[i];
2564
2565                 error = bus_dmamap_create(adapter->txtag,
2566                                           BUS_DMA_WAITOK | BUS_DMA_ONEBPAGE,
2567                                           &tx_buffer->map);
2568                 if (error) {
2569                         device_printf(dev, "Unable to create TX DMA map\n");
2570                         em_destroy_tx_ring(adapter, i);
2571                         return error;
2572                 }
2573         }
2574         return (0);
2575 }
2576
2577 static void
2578 em_init_tx_ring(struct adapter *adapter)
2579 {
2580         /* Clear the old ring contents */
2581         bzero(adapter->tx_desc_base,
2582             (sizeof(struct e1000_tx_desc)) * adapter->num_tx_desc);
2583
2584         /* Reset state */
2585         adapter->next_avail_tx_desc = 0;
2586         adapter->next_tx_to_clean = 0;
2587         adapter->num_tx_desc_avail = adapter->num_tx_desc;
2588 }
2589
2590 static void
2591 em_init_tx_unit(struct adapter *adapter)
2592 {
2593         uint32_t tctl, tarc, tipg = 0;
2594         uint64_t bus_addr;
2595
2596         /* Setup the Base and Length of the Tx Descriptor Ring */
2597         bus_addr = adapter->txdma.dma_paddr;
2598         E1000_WRITE_REG(&adapter->hw, E1000_TDLEN(0),
2599             adapter->num_tx_desc * sizeof(struct e1000_tx_desc));
2600         E1000_WRITE_REG(&adapter->hw, E1000_TDBAH(0),
2601             (uint32_t)(bus_addr >> 32));
2602         E1000_WRITE_REG(&adapter->hw, E1000_TDBAL(0),
2603             (uint32_t)bus_addr);
2604         /* Setup the HW Tx Head and Tail descriptor pointers */
2605         E1000_WRITE_REG(&adapter->hw, E1000_TDT(0), 0);
2606         E1000_WRITE_REG(&adapter->hw, E1000_TDH(0), 0);
2607
2608         /* Set the default values for the Tx Inter Packet Gap timer */
2609         switch (adapter->hw.mac.type) {
2610         case e1000_82542:
2611                 tipg = DEFAULT_82542_TIPG_IPGT;
2612                 tipg |= DEFAULT_82542_TIPG_IPGR1 << E1000_TIPG_IPGR1_SHIFT;
2613                 tipg |= DEFAULT_82542_TIPG_IPGR2 << E1000_TIPG_IPGR2_SHIFT;
2614                 break;
2615
2616         case e1000_80003es2lan:
2617                 tipg = DEFAULT_82543_TIPG_IPGR1;
2618                 tipg |= DEFAULT_80003ES2LAN_TIPG_IPGR2 <<
2619                     E1000_TIPG_IPGR2_SHIFT;
2620                 break;
2621
2622         default:
2623                 if (adapter->hw.phy.media_type == e1000_media_type_fiber ||
2624                     adapter->hw.phy.media_type ==
2625                     e1000_media_type_internal_serdes)
2626                         tipg = DEFAULT_82543_TIPG_IPGT_FIBER;
2627                 else
2628                         tipg = DEFAULT_82543_TIPG_IPGT_COPPER;
2629                 tipg |= DEFAULT_82543_TIPG_IPGR1 << E1000_TIPG_IPGR1_SHIFT;
2630                 tipg |= DEFAULT_82543_TIPG_IPGR2 << E1000_TIPG_IPGR2_SHIFT;
2631                 break;
2632         }
2633
2634         E1000_WRITE_REG(&adapter->hw, E1000_TIPG, tipg);
2635
2636         /* NOTE: 0 is not allowed for TIDV */
2637         E1000_WRITE_REG(&adapter->hw, E1000_TIDV, 1);
2638         if(adapter->hw.mac.type >= e1000_82540)
2639                 E1000_WRITE_REG(&adapter->hw, E1000_TADV, 0);
2640
2641         if (adapter->hw.mac.type == e1000_82571 ||
2642             adapter->hw.mac.type == e1000_82572) {
2643                 tarc = E1000_READ_REG(&adapter->hw, E1000_TARC(0));
2644                 tarc |= SPEED_MODE_BIT;
2645                 E1000_WRITE_REG(&adapter->hw, E1000_TARC(0), tarc);
2646         } else if (adapter->hw.mac.type == e1000_80003es2lan) {
2647                 tarc = E1000_READ_REG(&adapter->hw, E1000_TARC(0));
2648                 tarc |= 1;
2649                 E1000_WRITE_REG(&adapter->hw, E1000_TARC(0), tarc);
2650                 tarc = E1000_READ_REG(&adapter->hw, E1000_TARC(1));
2651                 tarc |= 1;
2652                 E1000_WRITE_REG(&adapter->hw, E1000_TARC(1), tarc);
2653         }
2654
2655         /* Program the Transmit Control Register */
2656         tctl = E1000_READ_REG(&adapter->hw, E1000_TCTL);
2657         tctl &= ~E1000_TCTL_CT;
2658         tctl |= E1000_TCTL_PSP | E1000_TCTL_RTLC | E1000_TCTL_EN |
2659                 (E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT);
2660
2661         if (adapter->hw.mac.type >= e1000_82571)
2662                 tctl |= E1000_TCTL_MULR;
2663
2664         /* This write will effectively turn on the transmit unit. */
2665         E1000_WRITE_REG(&adapter->hw, E1000_TCTL, tctl);
2666 }
2667
2668 static void
2669 em_destroy_tx_ring(struct adapter *adapter, int ndesc)
2670 {
2671         struct em_buffer *tx_buffer;
2672         int i;
2673
2674         if (adapter->tx_buffer_area == NULL)
2675                 return;
2676
2677         for (i = 0; i < ndesc; i++) {
2678                 tx_buffer = &adapter->tx_buffer_area[i];
2679
2680                 KKASSERT(tx_buffer->m_head == NULL);
2681                 bus_dmamap_destroy(adapter->txtag, tx_buffer->map);
2682         }
2683         bus_dma_tag_destroy(adapter->txtag);
2684
2685         kfree(adapter->tx_buffer_area, M_DEVBUF);
2686         adapter->tx_buffer_area = NULL;
2687 }
2688
2689 /*
2690  * The offload context needs to be set when we transfer the first
2691  * packet of a particular protocol (TCP/UDP).  This routine has been
2692  * enhanced to deal with inserted VLAN headers.
2693  *
2694  * If the new packet's ether header length, ip header length and
2695  * csum offloading type are same as the previous packet, we should
2696  * avoid allocating a new csum context descriptor; mainly to take
2697  * advantage of the pipeline effect of the TX data read request.
2698  *
2699  * This function returns number of TX descrptors allocated for
2700  * csum context.
2701  */
2702 static int
2703 em_txcsum(struct adapter *adapter, struct mbuf *mp,
2704           uint32_t *txd_upper, uint32_t *txd_lower)
2705 {
2706         struct e1000_context_desc *TXD;
2707         int curr_txd, ehdrlen, csum_flags;
2708         uint32_t cmd, hdr_len, ip_hlen;
2709
2710         csum_flags = mp->m_pkthdr.csum_flags & EM_CSUM_FEATURES;
2711         ip_hlen = mp->m_pkthdr.csum_iphlen;
2712         ehdrlen = mp->m_pkthdr.csum_lhlen;
2713
2714         if (adapter->csum_lhlen == ehdrlen &&
2715             adapter->csum_iphlen == ip_hlen &&
2716             adapter->csum_flags == csum_flags) {
2717                 /*
2718                  * Same csum offload context as the previous packets;
2719                  * just return.
2720                  */
2721                 *txd_upper = adapter->csum_txd_upper;
2722                 *txd_lower = adapter->csum_txd_lower;
2723                 return 0;
2724         }
2725
2726         /*
2727          * Setup a new csum offload context.
2728          */
2729
2730         curr_txd = adapter->next_avail_tx_desc;
2731         TXD = (struct e1000_context_desc *)&adapter->tx_desc_base[curr_txd];
2732
2733         cmd = 0;
2734
2735         /* Setup of IP header checksum. */
2736         if (csum_flags & CSUM_IP) {
2737                 /*
2738                  * Start offset for header checksum calculation.
2739                  * End offset for header checksum calculation.
2740                  * Offset of place to put the checksum.
2741                  */
2742                 TXD->lower_setup.ip_fields.ipcss = ehdrlen;
2743                 TXD->lower_setup.ip_fields.ipcse =
2744                     htole16(ehdrlen + ip_hlen - 1);
2745                 TXD->lower_setup.ip_fields.ipcso =
2746                     ehdrlen + offsetof(struct ip, ip_sum);
2747                 cmd |= E1000_TXD_CMD_IP;
2748                 *txd_upper |= E1000_TXD_POPTS_IXSM << 8;
2749         }
2750         hdr_len = ehdrlen + ip_hlen;
2751
2752         if (csum_flags & CSUM_TCP) {
2753                 /*
2754                  * Start offset for payload checksum calculation.
2755                  * End offset for payload checksum calculation.
2756                  * Offset of place to put the checksum.
2757                  */
2758                 TXD->upper_setup.tcp_fields.tucss = hdr_len;
2759                 TXD->upper_setup.tcp_fields.tucse = htole16(0);
2760                 TXD->upper_setup.tcp_fields.tucso =
2761                     hdr_len + offsetof(struct tcphdr, th_sum);
2762                 cmd |= E1000_TXD_CMD_TCP;
2763                 *txd_upper |= E1000_TXD_POPTS_TXSM << 8;
2764         } else if (csum_flags & CSUM_UDP) {
2765                 /*
2766                  * Start offset for header checksum calculation.
2767                  * End offset for header checksum calculation.
2768                  * Offset of place to put the checksum.
2769                  */
2770                 TXD->upper_setup.tcp_fields.tucss = hdr_len;
2771                 TXD->upper_setup.tcp_fields.tucse = htole16(0);
2772                 TXD->upper_setup.tcp_fields.tucso =
2773                     hdr_len + offsetof(struct udphdr, uh_sum);
2774                 *txd_upper |= E1000_TXD_POPTS_TXSM << 8;
2775         }
2776
2777         *txd_lower = E1000_TXD_CMD_DEXT |       /* Extended descr type */
2778                      E1000_TXD_DTYP_D;          /* Data descr */
2779
2780         /* Save the information for this csum offloading context */
2781         adapter->csum_lhlen = ehdrlen;
2782         adapter->csum_iphlen = ip_hlen;
2783         adapter->csum_flags = csum_flags;
2784         adapter->csum_txd_upper = *txd_upper;
2785         adapter->csum_txd_lower = *txd_lower;
2786
2787         TXD->tcp_seg_setup.data = htole32(0);
2788         TXD->cmd_and_length =
2789             htole32(E1000_TXD_CMD_IFCS | E1000_TXD_CMD_DEXT | cmd);
2790
2791         if (++curr_txd == adapter->num_tx_desc)
2792                 curr_txd = 0;
2793
2794         KKASSERT(adapter->num_tx_desc_avail > 0);
2795         adapter->num_tx_desc_avail--;
2796
2797         adapter->next_avail_tx_desc = curr_txd;
2798         return 1;
2799 }
2800
2801 static void
2802 em_txeof(struct adapter *adapter)
2803 {
2804         struct ifnet *ifp = &adapter->arpcom.ac_if;
2805         struct em_buffer *tx_buffer;
2806         int first, num_avail;
2807
2808         if (adapter->tx_dd_head == adapter->tx_dd_tail)
2809                 return;
2810
2811         if (adapter->num_tx_desc_avail == adapter->num_tx_desc)
2812                 return;
2813
2814         num_avail = adapter->num_tx_desc_avail;
2815         first = adapter->next_tx_to_clean;
2816
2817         while (adapter->tx_dd_head != adapter->tx_dd_tail) {
2818                 struct e1000_tx_desc *tx_desc;
2819                 int dd_idx = adapter->tx_dd[adapter->tx_dd_head];
2820
2821                 tx_desc = &adapter->tx_desc_base[dd_idx];
2822                 if (tx_desc->upper.fields.status & E1000_TXD_STAT_DD) {
2823                         EM_INC_TXDD_IDX(adapter->tx_dd_head);
2824
2825                         if (++dd_idx == adapter->num_tx_desc)
2826                                 dd_idx = 0;
2827
2828                         while (first != dd_idx) {
2829                                 logif(pkt_txclean);
2830
2831                                 num_avail++;
2832
2833                                 tx_buffer = &adapter->tx_buffer_area[first];
2834                                 if (tx_buffer->m_head) {
2835                                         ifp->if_opackets++;
2836                                         bus_dmamap_unload(adapter->txtag,
2837                                                           tx_buffer->map);
2838                                         m_freem(tx_buffer->m_head);
2839                                         tx_buffer->m_head = NULL;
2840                                 }
2841
2842                                 if (++first == adapter->num_tx_desc)
2843                                         first = 0;
2844                         }
2845                 } else {
2846                         break;
2847                 }
2848         }
2849         adapter->next_tx_to_clean = first;
2850         adapter->num_tx_desc_avail = num_avail;
2851
2852         if (adapter->tx_dd_head == adapter->tx_dd_tail) {
2853                 adapter->tx_dd_head = 0;
2854                 adapter->tx_dd_tail = 0;
2855         }
2856
2857         if (!EM_IS_OACTIVE(adapter)) {
2858                 ifp->if_flags &= ~IFF_OACTIVE;
2859
2860                 /* All clean, turn off the timer */
2861                 if (adapter->num_tx_desc_avail == adapter->num_tx_desc)
2862                         ifp->if_timer = 0;
2863         }
2864 }
2865
2866 static void
2867 em_tx_collect(struct adapter *adapter)
2868 {
2869         struct ifnet *ifp = &adapter->arpcom.ac_if;
2870         struct em_buffer *tx_buffer;
2871         int tdh, first, num_avail, dd_idx = -1;
2872
2873         if (adapter->num_tx_desc_avail == adapter->num_tx_desc)
2874                 return;
2875
2876         tdh = E1000_READ_REG(&adapter->hw, E1000_TDH(0));
2877         if (tdh == adapter->next_tx_to_clean)
2878                 return;
2879
2880         if (adapter->tx_dd_head != adapter->tx_dd_tail)
2881                 dd_idx = adapter->tx_dd[adapter->tx_dd_head];
2882
2883         num_avail = adapter->num_tx_desc_avail;
2884         first = adapter->next_tx_to_clean;
2885
2886         while (first != tdh) {
2887                 logif(pkt_txclean);
2888
2889                 num_avail++;
2890
2891                 tx_buffer = &adapter->tx_buffer_area[first];
2892                 if (tx_buffer->m_head) {
2893                         ifp->if_opackets++;
2894                         bus_dmamap_unload(adapter->txtag,
2895                                           tx_buffer->map);
2896                         m_freem(tx_buffer->m_head);
2897                         tx_buffer->m_head = NULL;
2898                 }
2899
2900                 if (first == dd_idx) {
2901                         EM_INC_TXDD_IDX(adapter->tx_dd_head);
2902                         if (adapter->tx_dd_head == adapter->tx_dd_tail) {
2903                                 adapter->tx_dd_head = 0;
2904                                 adapter->tx_dd_tail = 0;
2905                                 dd_idx = -1;
2906                         } else {
2907                                 dd_idx = adapter->tx_dd[adapter->tx_dd_head];
2908                         }
2909                 }
2910
2911                 if (++first == adapter->num_tx_desc)
2912                         first = 0;
2913         }
2914         adapter->next_tx_to_clean = first;
2915         adapter->num_tx_desc_avail = num_avail;
2916
2917         if (!EM_IS_OACTIVE(adapter)) {
2918                 ifp->if_flags &= ~IFF_OACTIVE;
2919
2920                 /* All clean, turn off the timer */
2921                 if (adapter->num_tx_desc_avail == adapter->num_tx_desc)
2922                         ifp->if_timer = 0;
2923         }
2924 }
2925
2926 /*
2927  * When Link is lost sometimes there is work still in the TX ring
2928  * which will result in a watchdog, rather than allow that do an
2929  * attempted cleanup and then reinit here.  Note that this has been
2930  * seens mostly with fiber adapters.
2931  */
2932 static void
2933 em_tx_purge(struct adapter *adapter)
2934 {
2935         struct ifnet *ifp = &adapter->arpcom.ac_if;
2936
2937         if (!adapter->link_active && ifp->if_timer) {
2938                 em_tx_collect(adapter);
2939                 if (ifp->if_timer) {
2940                         if_printf(ifp, "Link lost, TX pending, reinit\n");
2941                         ifp->if_timer = 0;
2942                         em_init(adapter);
2943                 }
2944         }
2945 }
2946
2947 static int
2948 em_newbuf(struct adapter *adapter, int i, int init)
2949 {
2950         struct mbuf *m;
2951         bus_dma_segment_t seg;
2952         bus_dmamap_t map;
2953         struct em_buffer *rx_buffer;
2954         int error, nseg;
2955
2956         m = m_getcl(init ? MB_WAIT : MB_DONTWAIT, MT_DATA, M_PKTHDR);
2957         if (m == NULL) {
2958                 adapter->mbuf_cluster_failed++;
2959                 if (init) {
2960                         if_printf(&adapter->arpcom.ac_if,
2961                                   "Unable to allocate RX mbuf\n");
2962                 }
2963                 return (ENOBUFS);
2964         }
2965         m->m_len = m->m_pkthdr.len = MCLBYTES;
2966
2967         if (adapter->max_frame_size <= MCLBYTES - ETHER_ALIGN)
2968                 m_adj(m, ETHER_ALIGN);
2969
2970         error = bus_dmamap_load_mbuf_segment(adapter->rxtag,
2971                         adapter->rx_sparemap, m,
2972                         &seg, 1, &nseg, BUS_DMA_NOWAIT);
2973         if (error) {
2974                 m_freem(m);
2975                 if (init) {
2976                         if_printf(&adapter->arpcom.ac_if,
2977                                   "Unable to load RX mbuf\n");
2978                 }
2979                 return (error);
2980         }
2981
2982         rx_buffer = &adapter->rx_buffer_area[i];
2983         if (rx_buffer->m_head != NULL)
2984                 bus_dmamap_unload(adapter->rxtag, rx_buffer->map);
2985
2986         map = rx_buffer->map;
2987         rx_buffer->map = adapter->rx_sparemap;
2988         adapter->rx_sparemap = map;
2989
2990         rx_buffer->m_head = m;
2991
2992         adapter->rx_desc_base[i].buffer_addr = htole64(seg.ds_addr);
2993         return (0);
2994 }
2995
2996 static int
2997 em_create_rx_ring(struct adapter *adapter)
2998 {
2999         device_t dev = adapter->dev;
3000         struct em_buffer *rx_buffer;
3001         int i, error;
3002
3003         adapter->rx_buffer_area =
3004                 kmalloc(sizeof(struct em_buffer) * adapter->num_rx_desc,
3005                         M_DEVBUF, M_WAITOK | M_ZERO);
3006
3007         /*
3008          * Create DMA tag for rx buffers
3009          */
3010         error = bus_dma_tag_create(adapter->parent_dtag, /* parent */
3011                         1, 0,                   /* alignment, bounds */
3012                         BUS_SPACE_MAXADDR,      /* lowaddr */
3013                         BUS_SPACE_MAXADDR,      /* highaddr */
3014                         NULL, NULL,             /* filter, filterarg */
3015                         MCLBYTES,               /* maxsize */
3016                         1,                      /* nsegments */
3017                         MCLBYTES,               /* maxsegsize */
3018                         BUS_DMA_WAITOK | BUS_DMA_ALLOCNOW, /* flags */
3019                         &adapter->rxtag);
3020         if (error) {
3021                 device_printf(dev, "Unable to allocate RX DMA tag\n");
3022                 kfree(adapter->rx_buffer_area, M_DEVBUF);
3023                 adapter->rx_buffer_area = NULL;
3024                 return error;
3025         }
3026
3027         /*
3028          * Create spare DMA map for rx buffers
3029          */
3030         error = bus_dmamap_create(adapter->rxtag, BUS_DMA_WAITOK,
3031                                   &adapter->rx_sparemap);
3032         if (error) {
3033                 device_printf(dev, "Unable to create spare RX DMA map\n");
3034                 bus_dma_tag_destroy(adapter->rxtag);
3035                 kfree(adapter->rx_buffer_area, M_DEVBUF);
3036                 adapter->rx_buffer_area = NULL;
3037                 return error;
3038         }
3039
3040         /*
3041          * Create DMA maps for rx buffers
3042          */
3043         for (i = 0; i < adapter->num_rx_desc; i++) {
3044                 rx_buffer = &adapter->rx_buffer_area[i];
3045
3046                 error = bus_dmamap_create(adapter->rxtag, BUS_DMA_WAITOK,
3047                                           &rx_buffer->map);
3048                 if (error) {
3049                         device_printf(dev, "Unable to create RX DMA map\n");
3050                         em_destroy_rx_ring(adapter, i);
3051                         return error;
3052                 }
3053         }
3054         return (0);
3055 }
3056
3057 static int
3058 em_init_rx_ring(struct adapter *adapter)
3059 {
3060         int i, error;
3061
3062         /* Reset descriptor ring */
3063         bzero(adapter->rx_desc_base,
3064             (sizeof(struct e1000_rx_desc)) * adapter->num_rx_desc);
3065
3066         /* Allocate new ones. */
3067         for (i = 0; i < adapter->num_rx_desc; i++) {
3068                 error = em_newbuf(adapter, i, 1);
3069                 if (error)
3070                         return (error);
3071         }
3072
3073         /* Setup our descriptor pointers */
3074         adapter->next_rx_desc_to_check = 0;
3075
3076         return (0);
3077 }
3078
3079 static void
3080 em_init_rx_unit(struct adapter *adapter)
3081 {
3082         struct ifnet *ifp = &adapter->arpcom.ac_if;
3083         uint64_t bus_addr;
3084         uint32_t rctl;
3085
3086         /*
3087          * Make sure receives are disabled while setting
3088          * up the descriptor ring
3089          */
3090         rctl = E1000_READ_REG(&adapter->hw, E1000_RCTL);
3091         E1000_WRITE_REG(&adapter->hw, E1000_RCTL, rctl & ~E1000_RCTL_EN);
3092
3093         if (adapter->hw.mac.type >= e1000_82540) {
3094                 uint32_t itr;
3095
3096                 /*
3097                  * Set the interrupt throttling rate. Value is calculated
3098                  * as ITR = 1 / (INT_THROTTLE_CEIL * 256ns)
3099                  */
3100                 if (adapter->int_throttle_ceil)
3101                         itr = 1000000000 / 256 / adapter->int_throttle_ceil;
3102                 else
3103                         itr = 0;
3104                 em_set_itr(adapter, itr);
3105         }
3106
3107         /* Disable accelerated ackknowledge */
3108         if (adapter->hw.mac.type == e1000_82574) {
3109                 E1000_WRITE_REG(&adapter->hw,
3110                     E1000_RFCTL, E1000_RFCTL_ACK_DIS);
3111         }
3112
3113         /* Receive Checksum Offload for TCP and UDP */
3114         if (ifp->if_capenable & IFCAP_RXCSUM) {
3115                 uint32_t rxcsum;
3116
3117                 rxcsum = E1000_READ_REG(&adapter->hw, E1000_RXCSUM);
3118                 rxcsum |= (E1000_RXCSUM_IPOFL | E1000_RXCSUM_TUOFL);
3119                 E1000_WRITE_REG(&adapter->hw, E1000_RXCSUM, rxcsum);
3120         }
3121
3122         /*
3123          * XXX TEMPORARY WORKAROUND: on some systems with 82573
3124          * long latencies are observed, like Lenovo X60. This
3125          * change eliminates the problem, but since having positive
3126          * values in RDTR is a known source of problems on other
3127          * platforms another solution is being sought.
3128          */
3129         if (em_82573_workaround && adapter->hw.mac.type == e1000_82573) {
3130                 E1000_WRITE_REG(&adapter->hw, E1000_RADV, EM_RADV_82573);
3131                 E1000_WRITE_REG(&adapter->hw, E1000_RDTR, EM_RDTR_82573);
3132         }
3133
3134         /*
3135          * Setup the Base and Length of the Rx Descriptor Ring
3136          */
3137         bus_addr = adapter->rxdma.dma_paddr;
3138         E1000_WRITE_REG(&adapter->hw, E1000_RDLEN(0),
3139             adapter->num_rx_desc * sizeof(struct e1000_rx_desc));
3140         E1000_WRITE_REG(&adapter->hw, E1000_RDBAH(0),
3141             (uint32_t)(bus_addr >> 32));
3142         E1000_WRITE_REG(&adapter->hw, E1000_RDBAL(0),
3143             (uint32_t)bus_addr);
3144
3145         /*
3146          * Setup the HW Rx Head and Tail Descriptor Pointers
3147          */
3148         E1000_WRITE_REG(&adapter->hw, E1000_RDH(0), 0);
3149         E1000_WRITE_REG(&adapter->hw, E1000_RDT(0), adapter->num_rx_desc - 1);
3150
3151         /* Set early receive threshold on appropriate hw */
3152         if (((adapter->hw.mac.type == e1000_ich9lan) ||
3153             (adapter->hw.mac.type == e1000_pch2lan) ||
3154             (adapter->hw.mac.type == e1000_ich10lan)) &&
3155             (ifp->if_mtu > ETHERMTU)) {
3156                 uint32_t rxdctl;
3157
3158                 rxdctl = E1000_READ_REG(&adapter->hw, E1000_RXDCTL(0));
3159                 E1000_WRITE_REG(&adapter->hw, E1000_RXDCTL(0), rxdctl | 3);
3160                 E1000_WRITE_REG(&adapter->hw, E1000_ERT, 0x100 | (1 << 13));
3161         }
3162
3163         if (adapter->hw.mac.type == e1000_pch2lan) {
3164                 if (ifp->if_mtu > ETHERMTU)
3165                         e1000_lv_jumbo_workaround_ich8lan(&adapter->hw, TRUE);
3166                 else
3167                         e1000_lv_jumbo_workaround_ich8lan(&adapter->hw, FALSE);
3168         }
3169
3170         /* Setup the Receive Control Register */
3171         rctl &= ~(3 << E1000_RCTL_MO_SHIFT);
3172         rctl |= E1000_RCTL_EN | E1000_RCTL_BAM | E1000_RCTL_LBM_NO |
3173                 E1000_RCTL_RDMTS_HALF |
3174                 (adapter->hw.mac.mc_filter_type << E1000_RCTL_MO_SHIFT);
3175
3176         /* Make sure VLAN Filters are off */
3177         rctl &= ~E1000_RCTL_VFE;
3178
3179         if (e1000_tbi_sbp_enabled_82543(&adapter->hw))
3180                 rctl |= E1000_RCTL_SBP;
3181         else
3182                 rctl &= ~E1000_RCTL_SBP;
3183
3184         switch (adapter->rx_buffer_len) {
3185         default:
3186         case 2048:
3187                 rctl |= E1000_RCTL_SZ_2048;
3188                 break;
3189
3190         case 4096:
3191                 rctl |= E1000_RCTL_SZ_4096 |
3192                     E1000_RCTL_BSEX | E1000_RCTL_LPE;
3193                 break;
3194
3195         case 8192:
3196                 rctl |= E1000_RCTL_SZ_8192 |
3197                     E1000_RCTL_BSEX | E1000_RCTL_LPE;
3198                 break;
3199
3200         case 16384:
3201                 rctl |= E1000_RCTL_SZ_16384 |
3202                     E1000_RCTL_BSEX | E1000_RCTL_LPE;
3203                 break;
3204         }
3205
3206         if (ifp->if_mtu > ETHERMTU)
3207                 rctl |= E1000_RCTL_LPE;
3208         else
3209                 rctl &= ~E1000_RCTL_LPE;
3210
3211         /* Enable Receives */
3212         E1000_WRITE_REG(&adapter->hw, E1000_RCTL, rctl);
3213 }
3214
3215 static void
3216 em_destroy_rx_ring(struct adapter *adapter, int ndesc)
3217 {
3218         struct em_buffer *rx_buffer;
3219         int i;
3220
3221         if (adapter->rx_buffer_area == NULL)
3222                 return;
3223
3224         for (i = 0; i < ndesc; i++) {
3225                 rx_buffer = &adapter->rx_buffer_area[i];
3226
3227                 KKASSERT(rx_buffer->m_head == NULL);
3228                 bus_dmamap_destroy(adapter->rxtag, rx_buffer->map);
3229         }
3230         bus_dmamap_destroy(adapter->rxtag, adapter->rx_sparemap);
3231         bus_dma_tag_destroy(adapter->rxtag);
3232
3233         kfree(adapter->rx_buffer_area, M_DEVBUF);
3234         adapter->rx_buffer_area = NULL;
3235 }
3236
3237 static void
3238 em_rxeof(struct adapter *adapter, int count)
3239 {
3240         struct ifnet *ifp = &adapter->arpcom.ac_if;
3241         uint8_t status, accept_frame = 0, eop = 0;
3242         uint16_t len, desc_len, prev_len_adj;
3243         struct e1000_rx_desc *current_desc;
3244         struct mbuf *mp;
3245         int i;
3246
3247         i = adapter->next_rx_desc_to_check;
3248         current_desc = &adapter->rx_desc_base[i];
3249
3250         if (!(current_desc->status & E1000_RXD_STAT_DD))
3251                 return;
3252
3253         while ((current_desc->status & E1000_RXD_STAT_DD) && count != 0) {
3254                 struct mbuf *m = NULL;
3255
3256                 logif(pkt_receive);
3257
3258                 mp = adapter->rx_buffer_area[i].m_head;
3259
3260                 /*
3261                  * Can't defer bus_dmamap_sync(9) because TBI_ACCEPT
3262                  * needs to access the last received byte in the mbuf.
3263                  */
3264                 bus_dmamap_sync(adapter->rxtag, adapter->rx_buffer_area[i].map,
3265                                 BUS_DMASYNC_POSTREAD);
3266
3267                 accept_frame = 1;
3268                 prev_len_adj = 0;
3269                 desc_len = le16toh(current_desc->length);
3270                 status = current_desc->status;
3271                 if (status & E1000_RXD_STAT_EOP) {
3272                         count--;
3273                         eop = 1;
3274                         if (desc_len < ETHER_CRC_LEN) {
3275                                 len = 0;
3276                                 prev_len_adj = ETHER_CRC_LEN - desc_len;
3277                         } else {
3278                                 len = desc_len - ETHER_CRC_LEN;
3279                         }
3280                 } else {
3281                         eop = 0;
3282                         len = desc_len;
3283                 }
3284
3285                 if (current_desc->errors & E1000_RXD_ERR_FRAME_ERR_MASK) {
3286                         uint8_t last_byte;
3287                         uint32_t pkt_len = desc_len;
3288
3289                         if (adapter->fmp != NULL)
3290                                 pkt_len += adapter->fmp->m_pkthdr.len;
3291
3292                         last_byte = *(mtod(mp, caddr_t) + desc_len - 1);
3293                         if (TBI_ACCEPT(&adapter->hw, status,
3294                             current_desc->errors, pkt_len, last_byte,
3295                             adapter->min_frame_size, adapter->max_frame_size)) {
3296                                 e1000_tbi_adjust_stats_82543(&adapter->hw,
3297                                     &adapter->stats, pkt_len,
3298                                     adapter->hw.mac.addr,
3299                                     adapter->max_frame_size);
3300                                 if (len > 0)
3301                                         len--;
3302                         } else {
3303                                 accept_frame = 0;
3304                         }
3305                 }
3306
3307                 if (accept_frame) {
3308                         if (em_newbuf(adapter, i, 0) != 0) {
3309                                 ifp->if_iqdrops++;
3310                                 goto discard;
3311                         }
3312
3313                         /* Assign correct length to the current fragment */
3314                         mp->m_len = len;
3315
3316                         if (adapter->fmp == NULL) {
3317                                 mp->m_pkthdr.len = len;
3318                                 adapter->fmp = mp; /* Store the first mbuf */
3319                                 adapter->lmp = mp;
3320                         } else {
3321                                 /*
3322                                  * Chain mbuf's together
3323                                  */
3324
3325                                 /*
3326                                  * Adjust length of previous mbuf in chain if
3327                                  * we received less than 4 bytes in the last
3328                                  * descriptor.
3329                                  */
3330                                 if (prev_len_adj > 0) {
3331                                         adapter->lmp->m_len -= prev_len_adj;
3332                                         adapter->fmp->m_pkthdr.len -=
3333                                             prev_len_adj;
3334                                 }
3335                                 adapter->lmp->m_next = mp;
3336                                 adapter->lmp = adapter->lmp->m_next;
3337                                 adapter->fmp->m_pkthdr.len += len;
3338                         }
3339
3340                         if (eop) {
3341                                 adapter->fmp->m_pkthdr.rcvif = ifp;
3342                                 ifp->if_ipackets++;
3343
3344                                 if (ifp->if_capenable & IFCAP_RXCSUM) {
3345                                         em_rxcsum(adapter, current_desc,
3346                                                   adapter->fmp);
3347                                 }
3348
3349                                 if (status & E1000_RXD_STAT_VP) {
3350                                         adapter->fmp->m_pkthdr.ether_vlantag =
3351                                             (le16toh(current_desc->special) &
3352                                             E1000_RXD_SPC_VLAN_MASK);
3353                                         adapter->fmp->m_flags |= M_VLANTAG;
3354                                 }
3355                                 m = adapter->fmp;
3356                                 adapter->fmp = NULL;
3357                                 adapter->lmp = NULL;
3358                         }
3359                 } else {
3360                         ifp->if_ierrors++;
3361 discard:
3362 #ifdef foo
3363                         /* Reuse loaded DMA map and just update mbuf chain */
3364                         mp = adapter->rx_buffer_area[i].m_head;
3365                         mp->m_len = mp->m_pkthdr.len = MCLBYTES;
3366                         mp->m_data = mp->m_ext.ext_buf;
3367                         mp->m_next = NULL;
3368                         if (adapter->max_frame_size <= (MCLBYTES - ETHER_ALIGN))
3369                                 m_adj(mp, ETHER_ALIGN);
3370 #endif
3371                         if (adapter->fmp != NULL) {
3372                                 m_freem(adapter->fmp);
3373                                 adapter->fmp = NULL;
3374                                 adapter->lmp = NULL;
3375                         }
3376                         m = NULL;
3377                 }
3378
3379                 /* Zero out the receive descriptors status. */
3380                 current_desc->status = 0;
3381
3382                 if (m != NULL)
3383                         ifp->if_input(ifp, m);
3384
3385                 /* Advance our pointers to the next descriptor. */
3386                 if (++i == adapter->num_rx_desc)
3387                         i = 0;
3388                 current_desc = &adapter->rx_desc_base[i];
3389         }
3390         adapter->next_rx_desc_to_check = i;
3391
3392         /* Advance the E1000's Receive Queue #0  "Tail Pointer". */
3393         if (--i < 0)
3394                 i = adapter->num_rx_desc - 1;
3395         E1000_WRITE_REG(&adapter->hw, E1000_RDT(0), i);
3396 }
3397
3398 static void
3399 em_rxcsum(struct adapter *adapter, struct e1000_rx_desc *rx_desc,
3400           struct mbuf *mp)
3401 {
3402         /* 82543 or newer only */
3403         if (adapter->hw.mac.type < e1000_82543 ||
3404             /* Ignore Checksum bit is set */
3405             (rx_desc->status & E1000_RXD_STAT_IXSM))
3406                 return;
3407
3408         if ((rx_desc->status & E1000_RXD_STAT_IPCS) &&
3409             !(rx_desc->errors & E1000_RXD_ERR_IPE)) {
3410                 /* IP Checksum Good */
3411                 mp->m_pkthdr.csum_flags |= CSUM_IP_CHECKED | CSUM_IP_VALID;
3412         }
3413
3414         if ((rx_desc->status & E1000_RXD_STAT_TCPCS) &&
3415             !(rx_desc->errors & E1000_RXD_ERR_TCPE)) {
3416                 mp->m_pkthdr.csum_flags |= CSUM_DATA_VALID |
3417                                            CSUM_PSEUDO_HDR |
3418                                            CSUM_FRAG_NOT_CHECKED;
3419                 mp->m_pkthdr.csum_data = htons(0xffff);
3420         }
3421 }
3422
3423 static void
3424 em_enable_intr(struct adapter *adapter)
3425 {
3426         uint32_t ims_mask = IMS_ENABLE_MASK;
3427
3428         lwkt_serialize_handler_enable(adapter->arpcom.ac_if.if_serializer);
3429
3430 #if 0
3431         /* XXX MSIX */
3432         if (adapter->hw.mac.type == e1000_82574) {
3433                 E1000_WRITE_REG(&adapter->hw, EM_EIAC, EM_MSIX_MASK);
3434                 ims_mask |= EM_MSIX_MASK;
3435         }
3436 #endif
3437         E1000_WRITE_REG(&adapter->hw, E1000_IMS, ims_mask);
3438 }
3439
3440 static void
3441 em_disable_intr(struct adapter *adapter)
3442 {
3443         uint32_t clear = 0xffffffff;
3444
3445         /*
3446          * The first version of 82542 had an errata where when link was forced
3447          * it would stay up even up even if the cable was disconnected.
3448          * Sequence errors were used to detect the disconnect and then the
3449          * driver would unforce the link.  This code in the in the ISR.  For
3450          * this to work correctly the Sequence error interrupt had to be
3451          * enabled all the time.
3452          */
3453         if (adapter->hw.mac.type == e1000_82542 &&
3454             adapter->hw.revision_id == E1000_REVISION_2)
3455                 clear &= ~E1000_ICR_RXSEQ;
3456         else if (adapter->hw.mac.type == e1000_82574)
3457                 E1000_WRITE_REG(&adapter->hw, EM_EIAC, 0);
3458
3459         E1000_WRITE_REG(&adapter->hw, E1000_IMC, clear);
3460
3461         lwkt_serialize_handler_disable(adapter->arpcom.ac_if.if_serializer);
3462 }
3463
3464 /*
3465  * Bit of a misnomer, what this really means is
3466  * to enable OS management of the system... aka
3467  * to disable special hardware management features 
3468  */
3469 static void
3470 em_get_mgmt(struct adapter *adapter)
3471 {
3472         /* A shared code workaround */
3473 #define E1000_82542_MANC2H E1000_MANC2H
3474         if (adapter->flags & EM_FLAG_HAS_MGMT) {
3475                 int manc2h = E1000_READ_REG(&adapter->hw, E1000_MANC2H);
3476                 int manc = E1000_READ_REG(&adapter->hw, E1000_MANC);
3477
3478                 /* disable hardware interception of ARP */
3479                 manc &= ~(E1000_MANC_ARP_EN);
3480
3481                 /* enable receiving management packets to the host */
3482                 if (adapter->hw.mac.type >= e1000_82571) {
3483                         manc |= E1000_MANC_EN_MNG2HOST;
3484 #define E1000_MNG2HOST_PORT_623 (1 << 5)
3485 #define E1000_MNG2HOST_PORT_664 (1 << 6)
3486                         manc2h |= E1000_MNG2HOST_PORT_623;
3487                         manc2h |= E1000_MNG2HOST_PORT_664;
3488                         E1000_WRITE_REG(&adapter->hw, E1000_MANC2H, manc2h);
3489                 }
3490
3491                 E1000_WRITE_REG(&adapter->hw, E1000_MANC, manc);
3492         }
3493 }
3494
3495 /*
3496  * Give control back to hardware management
3497  * controller if there is one.
3498  */
3499 static void
3500 em_rel_mgmt(struct adapter *adapter)
3501 {
3502         if (adapter->flags & EM_FLAG_HAS_MGMT) {
3503                 int manc = E1000_READ_REG(&adapter->hw, E1000_MANC);
3504
3505                 /* re-enable hardware interception of ARP */
3506                 manc |= E1000_MANC_ARP_EN;
3507
3508                 if (adapter->hw.mac.type >= e1000_82571)
3509                         manc &= ~E1000_MANC_EN_MNG2HOST;
3510
3511                 E1000_WRITE_REG(&adapter->hw, E1000_MANC, manc);
3512         }
3513 }
3514
3515 /*
3516  * em_get_hw_control() sets {CTRL_EXT|FWSM}:DRV_LOAD bit.
3517  * For ASF and Pass Through versions of f/w this means that
3518  * the driver is loaded.  For AMT version (only with 82573)
3519  * of the f/w this means that the network i/f is open.
3520  */
3521 static void
3522 em_get_hw_control(struct adapter *adapter)
3523 {
3524         /* Let firmware know the driver has taken over */
3525         if (adapter->hw.mac.type == e1000_82573) {
3526                 uint32_t swsm;
3527
3528                 swsm = E1000_READ_REG(&adapter->hw, E1000_SWSM);
3529                 E1000_WRITE_REG(&adapter->hw, E1000_SWSM,
3530                     swsm | E1000_SWSM_DRV_LOAD);
3531         } else {
3532                 uint32_t ctrl_ext;
3533
3534                 ctrl_ext = E1000_READ_REG(&adapter->hw, E1000_CTRL_EXT);
3535                 E1000_WRITE_REG(&adapter->hw, E1000_CTRL_EXT,
3536                     ctrl_ext | E1000_CTRL_EXT_DRV_LOAD);
3537         }
3538         adapter->flags |= EM_FLAG_HW_CTRL;
3539 }
3540
3541 /*
3542  * em_rel_hw_control() resets {CTRL_EXT|FWSM}:DRV_LOAD bit.
3543  * For ASF and Pass Through versions of f/w this means that the
3544  * driver is no longer loaded.  For AMT version (only with 82573)
3545  * of the f/w this means that the network i/f is closed.
3546  */
3547 static void
3548 em_rel_hw_control(struct adapter *adapter)
3549 {
3550         if ((adapter->flags & EM_FLAG_HW_CTRL) == 0)
3551                 return;
3552         adapter->flags &= ~EM_FLAG_HW_CTRL;
3553
3554         /* Let firmware taken over control of h/w */
3555         if (adapter->hw.mac.type == e1000_82573) {
3556                 uint32_t swsm;
3557
3558                 swsm = E1000_READ_REG(&adapter->hw, E1000_SWSM);
3559                 E1000_WRITE_REG(&adapter->hw, E1000_SWSM,
3560                     swsm & ~E1000_SWSM_DRV_LOAD);
3561         } else {
3562                 uint32_t ctrl_ext;
3563
3564                 ctrl_ext = E1000_READ_REG(&adapter->hw, E1000_CTRL_EXT);
3565                 E1000_WRITE_REG(&adapter->hw, E1000_CTRL_EXT,
3566                     ctrl_ext & ~E1000_CTRL_EXT_DRV_LOAD);
3567         }
3568 }
3569
3570 static int
3571 em_is_valid_eaddr(const uint8_t *addr)
3572 {
3573         char zero_addr[ETHER_ADDR_LEN] = { 0, 0, 0, 0, 0, 0 };
3574
3575         if ((addr[0] & 1) || !bcmp(addr, zero_addr, ETHER_ADDR_LEN))
3576                 return (FALSE);
3577
3578         return (TRUE);
3579 }
3580
3581 /*
3582  * Enable PCI Wake On Lan capability
3583  */
3584 void
3585 em_enable_wol(device_t dev)
3586 {
3587         uint16_t cap, status;
3588         uint8_t id;
3589
3590         /* First find the capabilities pointer*/
3591         cap = pci_read_config(dev, PCIR_CAP_PTR, 2);
3592
3593         /* Read the PM Capabilities */
3594         id = pci_read_config(dev, cap, 1);
3595         if (id != PCIY_PMG)     /* Something wrong */
3596                 return;
3597
3598         /*
3599          * OK, we have the power capabilities,
3600          * so now get the status register
3601          */
3602         cap += PCIR_POWER_STATUS;
3603         status = pci_read_config(dev, cap, 2);
3604         status |= PCIM_PSTAT_PME | PCIM_PSTAT_PMEENABLE;
3605         pci_write_config(dev, cap, status, 2);
3606 }
3607
3608
3609 /*
3610  * 82544 Coexistence issue workaround.
3611  *    There are 2 issues.
3612  *       1. Transmit Hang issue.
3613  *    To detect this issue, following equation can be used...
3614  *        SIZE[3:0] + ADDR[2:0] = SUM[3:0].
3615  *        If SUM[3:0] is in between 1 to 4, we will have this issue.
3616  *
3617  *       2. DAC issue.
3618  *    To detect this issue, following equation can be used...
3619  *        SIZE[3:0] + ADDR[2:0] = SUM[3:0].
3620  *        If SUM[3:0] is in between 9 to c, we will have this issue.
3621  *
3622  *    WORKAROUND:
3623  *        Make sure we do not have ending address
3624  *        as 1,2,3,4(Hang) or 9,a,b,c (DAC)
3625  */
3626 static uint32_t
3627 em_82544_fill_desc(bus_addr_t address, uint32_t length, PDESC_ARRAY desc_array)
3628 {
3629         uint32_t safe_terminator;
3630
3631         /*
3632          * Since issue is sensitive to length and address.
3633          * Let us first check the address...
3634          */
3635         if (length <= 4) {
3636                 desc_array->descriptor[0].address = address;
3637                 desc_array->descriptor[0].length = length;
3638                 desc_array->elements = 1;
3639                 return (desc_array->elements);
3640         }
3641
3642         safe_terminator =
3643         (uint32_t)((((uint32_t)address & 0x7) + (length & 0xF)) & 0xF);
3644
3645         /* If it does not fall between 0x1 to 0x4 and 0x9 to 0xC then return */
3646         if (safe_terminator == 0 ||
3647             (safe_terminator > 4 && safe_terminator < 9) ||
3648             (safe_terminator > 0xC && safe_terminator <= 0xF)) {
3649                 desc_array->descriptor[0].address = address;
3650                 desc_array->descriptor[0].length = length;
3651                 desc_array->elements = 1;
3652                 return (desc_array->elements);
3653         }
3654
3655         desc_array->descriptor[0].address = address;
3656         desc_array->descriptor[0].length = length - 4;
3657         desc_array->descriptor[1].address = address + (length - 4);
3658         desc_array->descriptor[1].length = 4;
3659         desc_array->elements = 2;
3660         return (desc_array->elements);
3661 }
3662
3663 static void
3664 em_update_stats(struct adapter *adapter)
3665 {
3666         struct ifnet *ifp = &adapter->arpcom.ac_if;
3667
3668         if (adapter->hw.phy.media_type == e1000_media_type_copper ||
3669             (E1000_READ_REG(&adapter->hw, E1000_STATUS) & E1000_STATUS_LU)) {
3670                 adapter->stats.symerrs +=
3671                         E1000_READ_REG(&adapter->hw, E1000_SYMERRS);
3672                 adapter->stats.sec += E1000_READ_REG(&adapter->hw, E1000_SEC);
3673         }
3674         adapter->stats.crcerrs += E1000_READ_REG(&adapter->hw, E1000_CRCERRS);
3675         adapter->stats.mpc += E1000_READ_REG(&adapter->hw, E1000_MPC);
3676         adapter->stats.scc += E1000_READ_REG(&adapter->hw, E1000_SCC);
3677         adapter->stats.ecol += E1000_READ_REG(&adapter->hw, E1000_ECOL);
3678
3679         adapter->stats.mcc += E1000_READ_REG(&adapter->hw, E1000_MCC);
3680         adapter->stats.latecol += E1000_READ_REG(&adapter->hw, E1000_LATECOL);
3681         adapter->stats.colc += E1000_READ_REG(&adapter->hw, E1000_COLC);
3682         adapter->stats.dc += E1000_READ_REG(&adapter->hw, E1000_DC);
3683         adapter->stats.rlec += E1000_READ_REG(&adapter->hw, E1000_RLEC);
3684         adapter->stats.xonrxc += E1000_READ_REG(&adapter->hw, E1000_XONRXC);
3685         adapter->stats.xontxc += E1000_READ_REG(&adapter->hw, E1000_XONTXC);
3686         adapter->stats.xoffrxc += E1000_READ_REG(&adapter->hw, E1000_XOFFRXC);
3687         adapter->stats.xofftxc += E1000_READ_REG(&adapter->hw, E1000_XOFFTXC);
3688         adapter->stats.fcruc += E1000_READ_REG(&adapter->hw, E1000_FCRUC);
3689         adapter->stats.prc64 += E1000_READ_REG(&adapter->hw, E1000_PRC64);
3690         adapter->stats.prc127 += E1000_READ_REG(&adapter->hw, E1000_PRC127);
3691         adapter->stats.prc255 += E1000_READ_REG(&adapter->hw, E1000_PRC255);
3692         adapter->stats.prc511 += E1000_READ_REG(&adapter->hw, E1000_PRC511);
3693         adapter->stats.prc1023 += E1000_READ_REG(&adapter->hw, E1000_PRC1023);
3694         adapter->stats.prc1522 += E1000_READ_REG(&adapter->hw, E1000_PRC1522);
3695         adapter->stats.gprc += E1000_READ_REG(&adapter->hw, E1000_GPRC);
3696         adapter->stats.bprc += E1000_READ_REG(&adapter->hw, E1000_BPRC);
3697         adapter->stats.mprc += E1000_READ_REG(&adapter->hw, E1000_MPRC);
3698         adapter->stats.gptc += E1000_READ_REG(&adapter->hw, E1000_GPTC);
3699
3700         /* For the 64-bit byte counters the low dword must be read first. */
3701         /* Both registers clear on the read of the high dword */
3702
3703         adapter->stats.gorc += E1000_READ_REG(&adapter->hw, E1000_GORCH);
3704         adapter->stats.gotc += E1000_READ_REG(&adapter->hw, E1000_GOTCH);
3705
3706         adapter->stats.rnbc += E1000_READ_REG(&adapter->hw, E1000_RNBC);
3707         adapter->stats.ruc += E1000_READ_REG(&adapter->hw, E1000_RUC);
3708         adapter->stats.rfc += E1000_READ_REG(&adapter->hw, E1000_RFC);
3709         adapter->stats.roc += E1000_READ_REG(&adapter->hw, E1000_ROC);
3710         adapter->stats.rjc += E1000_READ_REG(&adapter->hw, E1000_RJC);
3711
3712         adapter->stats.tor += E1000_READ_REG(&adapter->hw, E1000_TORH);
3713         adapter->stats.tot += E1000_READ_REG(&adapter->hw, E1000_TOTH);
3714
3715         adapter->stats.tpr += E1000_READ_REG(&adapter->hw, E1000_TPR);
3716         adapter->stats.tpt += E1000_READ_REG(&adapter->hw, E1000_TPT);
3717         adapter->stats.ptc64 += E1000_READ_REG(&adapter->hw, E1000_PTC64);
3718         adapter->stats.ptc127 += E1000_READ_REG(&adapter->hw, E1000_PTC127);
3719         adapter->stats.ptc255 += E1000_READ_REG(&adapter->hw, E1000_PTC255);
3720         adapter->stats.ptc511 += E1000_READ_REG(&adapter->hw, E1000_PTC511);
3721         adapter->stats.ptc1023 += E1000_READ_REG(&adapter->hw, E1000_PTC1023);
3722         adapter->stats.ptc1522 += E1000_READ_REG(&adapter->hw, E1000_PTC1522);
3723         adapter->stats.mptc += E1000_READ_REG(&adapter->hw, E1000_MPTC);
3724         adapter->stats.bptc += E1000_READ_REG(&adapter->hw, E1000_BPTC);
3725
3726         if (adapter->hw.mac.type >= e1000_82543) {
3727                 adapter->stats.algnerrc += 
3728                 E1000_READ_REG(&adapter->hw, E1000_ALGNERRC);
3729                 adapter->stats.rxerrc += 
3730                 E1000_READ_REG(&adapter->hw, E1000_RXERRC);
3731                 adapter->stats.tncrs += 
3732                 E1000_READ_REG(&adapter->hw, E1000_TNCRS);
3733                 adapter->stats.cexterr += 
3734                 E1000_READ_REG(&adapter->hw, E1000_CEXTERR);
3735                 adapter->stats.tsctc += 
3736                 E1000_READ_REG(&adapter->hw, E1000_TSCTC);
3737                 adapter->stats.tsctfc += 
3738                 E1000_READ_REG(&adapter->hw, E1000_TSCTFC);
3739         }
3740
3741         ifp->if_collisions = adapter->stats.colc;
3742
3743         /* Rx Errors */
3744         ifp->if_ierrors =
3745             adapter->dropped_pkts + adapter->stats.rxerrc +
3746             adapter->stats.crcerrs + adapter->stats.algnerrc +
3747             adapter->stats.ruc + adapter->stats.roc +
3748             adapter->stats.mpc + adapter->stats.cexterr;
3749
3750         /* Tx Errors */
3751         ifp->if_oerrors =
3752             adapter->stats.ecol + adapter->stats.latecol +
3753             adapter->watchdog_events;
3754 }
3755
3756 static void
3757 em_print_debug_info(struct adapter *adapter)
3758 {
3759         device_t dev = adapter->dev;
3760         uint8_t *hw_addr = adapter->hw.hw_addr;
3761
3762         device_printf(dev, "Adapter hardware address = %p \n", hw_addr);
3763         device_printf(dev, "CTRL = 0x%x RCTL = 0x%x \n",
3764             E1000_READ_REG(&adapter->hw, E1000_CTRL),
3765             E1000_READ_REG(&adapter->hw, E1000_RCTL));
3766         device_printf(dev, "Packet buffer = Tx=%dk Rx=%dk \n",
3767             ((E1000_READ_REG(&adapter->hw, E1000_PBA) & 0xffff0000) >> 16),\
3768             (E1000_READ_REG(&adapter->hw, E1000_PBA) & 0xffff) );
3769         device_printf(dev, "Flow control watermarks high = %d low = %d\n",
3770             adapter->hw.fc.high_water,
3771             adapter->hw.fc.low_water);
3772         device_printf(dev, "tx_int_delay = %d, tx_abs_int_delay = %d\n",
3773             E1000_READ_REG(&adapter->hw, E1000_TIDV),
3774             E1000_READ_REG(&adapter->hw, E1000_TADV));
3775         device_printf(dev, "rx_int_delay = %d, rx_abs_int_delay = %d\n",
3776             E1000_READ_REG(&adapter->hw, E1000_RDTR),
3777             E1000_READ_REG(&adapter->hw, E1000_RADV));
3778         device_printf(dev, "fifo workaround = %lld, fifo_reset_count = %lld\n",
3779             (long long)adapter->tx_fifo_wrk_cnt,
3780             (long long)adapter->tx_fifo_reset_cnt);
3781         device_printf(dev, "hw tdh = %d, hw tdt = %d\n",
3782             E1000_READ_REG(&adapter->hw, E1000_TDH(0)),
3783             E1000_READ_REG(&adapter->hw, E1000_TDT(0)));
3784         device_printf(dev, "hw rdh = %d, hw rdt = %d\n",
3785             E1000_READ_REG(&adapter->hw, E1000_RDH(0)),
3786             E1000_READ_REG(&adapter->hw, E1000_RDT(0)));
3787         device_printf(dev, "Num Tx descriptors avail = %d\n",
3788             adapter->num_tx_desc_avail);
3789         device_printf(dev, "Tx Descriptors not avail1 = %ld\n",
3790             adapter->no_tx_desc_avail1);
3791         device_printf(dev, "Tx Descriptors not avail2 = %ld\n",
3792             adapter->no_tx_desc_avail2);
3793         device_printf(dev, "Std mbuf failed = %ld\n",
3794             adapter->mbuf_alloc_failed);
3795         device_printf(dev, "Std mbuf cluster failed = %ld\n",
3796             adapter->mbuf_cluster_failed);
3797         device_printf(dev, "Driver dropped packets = %ld\n",
3798             adapter->dropped_pkts);
3799         device_printf(dev, "Driver tx dma failure in encap = %ld\n",
3800             adapter->no_tx_dma_setup);
3801 }
3802
3803 static void
3804 em_print_hw_stats(struct adapter *adapter)
3805 {
3806         device_t dev = adapter->dev;
3807
3808         device_printf(dev, "Excessive collisions = %lld\n",
3809             (long long)adapter->stats.ecol);
3810 #if (DEBUG_HW > 0)  /* Dont output these errors normally */
3811         device_printf(dev, "Symbol errors = %lld\n",
3812             (long long)adapter->stats.symerrs);
3813 #endif
3814         device_printf(dev, "Sequence errors = %lld\n",
3815             (long long)adapter->stats.sec);
3816         device_printf(dev, "Defer count = %lld\n",
3817             (long long)adapter->stats.dc);
3818         device_printf(dev, "Missed Packets = %lld\n",
3819             (long long)adapter->stats.mpc);
3820         device_printf(dev, "Receive No Buffers = %lld\n",
3821             (long long)adapter->stats.rnbc);
3822         /* RLEC is inaccurate on some hardware, calculate our own. */
3823         device_printf(dev, "Receive Length Errors = %lld\n",
3824             ((long long)adapter->stats.roc + (long long)adapter->stats.ruc));
3825         device_printf(dev, "Receive errors = %lld\n",
3826             (long long)adapter->stats.rxerrc);
3827         device_printf(dev, "Crc errors = %lld\n",
3828             (long long)adapter->stats.crcerrs);
3829         device_printf(dev, "Alignment errors = %lld\n",
3830             (long long)adapter->stats.algnerrc);
3831         device_printf(dev, "Collision/Carrier extension errors = %lld\n",
3832             (long long)adapter->stats.cexterr);
3833         device_printf(dev, "RX overruns = %ld\n", adapter->rx_overruns);
3834         device_printf(dev, "watchdog timeouts = %ld\n",
3835             adapter->watchdog_events);
3836         device_printf(dev, "XON Rcvd = %lld\n",
3837             (long long)adapter->stats.xonrxc);
3838         device_printf(dev, "XON Xmtd = %lld\n",
3839             (long long)adapter->stats.xontxc);
3840         device_printf(dev, "XOFF Rcvd = %lld\n",
3841             (long long)adapter->stats.xoffrxc);
3842         device_printf(dev, "XOFF Xmtd = %lld\n",
3843             (long long)adapter->stats.xofftxc);
3844         device_printf(dev, "Good Packets Rcvd = %lld\n",
3845             (long long)adapter->stats.gprc);
3846         device_printf(dev, "Good Packets Xmtd = %lld\n",
3847             (long long)adapter->stats.gptc);
3848 }
3849
3850 static void
3851 em_print_nvm_info(struct adapter *adapter)
3852 {
3853         uint16_t eeprom_data;
3854         int i, j, row = 0;
3855
3856         /* Its a bit crude, but it gets the job done */
3857         kprintf("\nInterface EEPROM Dump:\n");
3858         kprintf("Offset\n0x0000  ");
3859         for (i = 0, j = 0; i < 32; i++, j++) {
3860                 if (j == 8) { /* Make the offset block */
3861                         j = 0; ++row;
3862                         kprintf("\n0x00%x0  ",row);
3863                 }
3864                 e1000_read_nvm(&adapter->hw, i, 1, &eeprom_data);
3865                 kprintf("%04x ", eeprom_data);
3866         }
3867         kprintf("\n");
3868 }
3869
3870 static int
3871 em_sysctl_debug_info(SYSCTL_HANDLER_ARGS)
3872 {
3873         struct adapter *adapter;
3874         struct ifnet *ifp;
3875         int error, result;
3876
3877         result = -1;
3878         error = sysctl_handle_int(oidp, &result, 0, req);
3879         if (error || !req->newptr)
3880                 return (error);
3881
3882         adapter = (struct adapter *)arg1;
3883         ifp = &adapter->arpcom.ac_if;
3884
3885         lwkt_serialize_enter(ifp->if_serializer);
3886
3887         if (result == 1)
3888                 em_print_debug_info(adapter);
3889
3890         /*
3891          * This value will cause a hex dump of the
3892          * first 32 16-bit words of the EEPROM to
3893          * the screen.
3894          */
3895         if (result == 2)
3896                 em_print_nvm_info(adapter);
3897
3898         lwkt_serialize_exit(ifp->if_serializer);
3899
3900         return (error);
3901 }
3902
3903 static int
3904 em_sysctl_stats(SYSCTL_HANDLER_ARGS)
3905 {
3906         int error, result;
3907
3908         result = -1;
3909         error = sysctl_handle_int(oidp, &result, 0, req);
3910         if (error || !req->newptr)
3911                 return (error);
3912
3913         if (result == 1) {
3914                 struct adapter *adapter = (struct adapter *)arg1;
3915                 struct ifnet *ifp = &adapter->arpcom.ac_if;
3916
3917                 lwkt_serialize_enter(ifp->if_serializer);
3918                 em_print_hw_stats(adapter);
3919                 lwkt_serialize_exit(ifp->if_serializer);
3920         }
3921         return (error);
3922 }
3923
3924 static void
3925 em_add_sysctl(struct adapter *adapter)
3926 {
3927         sysctl_ctx_init(&adapter->sysctl_ctx);
3928         adapter->sysctl_tree = SYSCTL_ADD_NODE(&adapter->sysctl_ctx,
3929                                         SYSCTL_STATIC_CHILDREN(_hw), OID_AUTO,
3930                                         device_get_nameunit(adapter->dev),
3931                                         CTLFLAG_RD, 0, "");
3932         if (adapter->sysctl_tree == NULL) {
3933                 device_printf(adapter->dev, "can't add sysctl node\n");
3934         } else {
3935                 SYSCTL_ADD_PROC(&adapter->sysctl_ctx,
3936                     SYSCTL_CHILDREN(adapter->sysctl_tree),
3937                     OID_AUTO, "debug", CTLTYPE_INT|CTLFLAG_RW, adapter, 0,
3938                     em_sysctl_debug_info, "I", "Debug Information");
3939
3940                 SYSCTL_ADD_PROC(&adapter->sysctl_ctx,
3941                     SYSCTL_CHILDREN(adapter->sysctl_tree),
3942                     OID_AUTO, "stats", CTLTYPE_INT|CTLFLAG_RW, adapter, 0,
3943                     em_sysctl_stats, "I", "Statistics");
3944
3945                 SYSCTL_ADD_INT(&adapter->sysctl_ctx,
3946                     SYSCTL_CHILDREN(adapter->sysctl_tree),
3947                     OID_AUTO, "rxd", CTLFLAG_RD,
3948                     &adapter->num_rx_desc, 0, NULL);
3949                 SYSCTL_ADD_INT(&adapter->sysctl_ctx,
3950                     SYSCTL_CHILDREN(adapter->sysctl_tree),
3951                     OID_AUTO, "txd", CTLFLAG_RD,
3952                     &adapter->num_tx_desc, 0, NULL);
3953
3954                 if (adapter->hw.mac.type >= e1000_82540) {
3955                         SYSCTL_ADD_PROC(&adapter->sysctl_ctx,
3956                             SYSCTL_CHILDREN(adapter->sysctl_tree),
3957                             OID_AUTO, "int_throttle_ceil",
3958                             CTLTYPE_INT|CTLFLAG_RW, adapter, 0,
3959                             em_sysctl_int_throttle, "I",
3960                             "interrupt throttling rate");
3961                 }
3962                 SYSCTL_ADD_PROC(&adapter->sysctl_ctx,
3963                     SYSCTL_CHILDREN(adapter->sysctl_tree),
3964                     OID_AUTO, "int_tx_nsegs",
3965                     CTLTYPE_INT|CTLFLAG_RW, adapter, 0,
3966                     em_sysctl_int_tx_nsegs, "I",
3967                     "# segments per TX interrupt");
3968         }
3969 }
3970
3971 static int
3972 em_sysctl_int_throttle(SYSCTL_HANDLER_ARGS)
3973 {
3974         struct adapter *adapter = (void *)arg1;
3975         struct ifnet *ifp = &adapter->arpcom.ac_if;
3976         int error, throttle;
3977
3978         throttle = adapter->int_throttle_ceil;
3979         error = sysctl_handle_int(oidp, &throttle, 0, req);
3980         if (error || req->newptr == NULL)
3981                 return error;
3982         if (throttle < 0 || throttle > 1000000000 / 256)
3983                 return EINVAL;
3984
3985         if (throttle) {
3986                 /*
3987                  * Set the interrupt throttling rate in 256ns increments,
3988                  * recalculate sysctl value assignment to get exact frequency.
3989                  */
3990                 throttle = 1000000000 / 256 / throttle;
3991
3992                 /* Upper 16bits of ITR is reserved and should be zero */
3993                 if (throttle & 0xffff0000)
3994                         return EINVAL;
3995         }
3996
3997         lwkt_serialize_enter(ifp->if_serializer);
3998
3999         if (throttle)
4000                 adapter->int_throttle_ceil = 1000000000 / 256 / throttle;
4001         else
4002                 adapter->int_throttle_ceil = 0;
4003
4004         if (ifp->if_flags & IFF_RUNNING)
4005                 em_set_itr(adapter, throttle);
4006
4007         lwkt_serialize_exit(ifp->if_serializer);
4008
4009         if (bootverbose) {
4010                 if_printf(ifp, "Interrupt moderation set to %d/sec\n",
4011                           adapter->int_throttle_ceil);
4012         }
4013         return 0;
4014 }
4015
4016 static int
4017 em_sysctl_int_tx_nsegs(SYSCTL_HANDLER_ARGS)
4018 {
4019         struct adapter *adapter = (void *)arg1;
4020         struct ifnet *ifp = &adapter->arpcom.ac_if;
4021         int error, segs;
4022
4023         segs = adapter->tx_int_nsegs;
4024         error = sysctl_handle_int(oidp, &segs, 0, req);
4025         if (error || req->newptr == NULL)