2 * Copyright (c) 2003,2004,2008 The DragonFly Project. All rights reserved.
3 * Copyright (c) 2008 Jordan Gordeev.
5 * This code is derived from software contributed to The DragonFly Project
6 * by Matthew Dillon <dillon@backplane.com>
8 * Redistribution and use in source and binary forms, with or without
9 * modification, are permitted provided that the following conditions
12 * 1. Redistributions of source code must retain the above copyright
13 * notice, this list of conditions and the following disclaimer.
14 * 2. Redistributions in binary form must reproduce the above copyright
15 * notice, this list of conditions and the following disclaimer in
16 * the documentation and/or other materials provided with the
18 * 3. Neither the name of The DragonFly Project nor the names of its
19 * contributors may be used to endorse or promote products derived
20 * from this software without specific, prior written permission.
22 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
23 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
24 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
25 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
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27 * INCIDENTAL, SPECIAL, EXEMPLARY OR CONSEQUENTIAL DAMAGES (INCLUDING,
28 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
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30 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
31 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
32 * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
35 * Copyright (c) 1990 The Regents of the University of California.
36 * All rights reserved.
38 * This code is derived from software contributed to Berkeley by
41 * Redistribution and use in source and binary forms, with or without
42 * modification, are permitted provided that the following conditions
44 * 1. Redistributions of source code must retain the above copyright
45 * notice, this list of conditions and the following disclaimer.
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50 * may be used to endorse or promote products derived from this software
51 * without specific prior written permission.
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61 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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65 * $FreeBSD: src/sys/i386/i386/swtch.s,v 1.89.2.10 2003/01/23 03:36:24 ps Exp $
68 //#include "use_npx.h"
70 #include <sys/rtprio.h>
72 #include <machine/asmacros.h>
73 #include <machine/segments.h>
75 #include <machine/pmap.h>
77 #include <machine_base/apic/apicreg.h>
79 #include <machine/lock.h>
83 #define MPLOCKED lock ;
88 .globl lwkt_switch_return
90 #if defined(SWTCH_OPTIM_STATS)
91 .globl swtch_optim_stats, tlb_flush_count
92 swtch_optim_stats: .long 0 /* number of _swtch_optims */
93 tlb_flush_count: .long 0
100 * cpu_heavy_switch(struct thread *next_thread)
102 * Switch from the current thread to a new thread. This entry
103 * is normally called via the thread->td_switch function, and will
104 * only be called when the current thread is a heavy weight process.
106 * Some instructions have been reordered to reduce pipeline stalls.
108 * YYY disable interrupts once giant is removed.
110 ENTRY(cpu_heavy_switch)
112 * Save RIP, RSP and callee-saved registers (RBX, RBP, R12-R15).
114 movq PCPU(curthread),%rcx
115 /* On top of the stack is the return adress. */
116 movq (%rsp),%rax /* (reorder optimization) */
117 movq TD_PCB(%rcx),%rdx /* RDX = PCB */
118 movq %rax,PCB_RIP(%rdx) /* return PC may be modified */
119 movq %rbx,PCB_RBX(%rdx)
120 movq %rsp,PCB_RSP(%rdx)
121 movq %rbp,PCB_RBP(%rdx)
122 movq %r12,PCB_R12(%rdx)
123 movq %r13,PCB_R13(%rdx)
124 movq %r14,PCB_R14(%rdx)
125 movq %r15,PCB_R15(%rdx)
128 * Clear the cpu bit in the pmap active mask. The restore
129 * function will set the bit in the pmap active mask.
131 * Special case: when switching between threads sharing the
132 * same vmspace if we avoid clearing the bit we do not have
133 * to reload %cr3 (if we clear the bit we could race page
134 * table ops done by other threads and would have to reload
135 * %cr3, because those ops will not know to IPI us).
137 movq %rcx,%rbx /* RBX = oldthread */
138 movq TD_LWP(%rcx),%rcx /* RCX = oldlwp */
139 movq TD_LWP(%rdi),%r13 /* R13 = newlwp */
140 movq LWP_VMSPACE(%rcx), %rcx /* RCX = oldvmspace */
141 testq %r13,%r13 /* might not be a heavy */
143 cmpq LWP_VMSPACE(%r13),%rcx /* same vmspace? */
145 #if CPUMASK_ELEMENTS != 4
146 #error "assembly incompatible with cpumask_t"
149 movq PCPU(cpumask_simple),%rsi
150 movq PCPU(cpumask_offset),%r12
152 MPLOCKED andq %rsi, VM_PMAP+PM_ACTIVE(%rcx, %r12, 1)
156 * Push the LWKT switch restore function, which resumes a heavy
157 * weight process. Note that the LWKT switcher is based on
158 * TD_SP, while the heavy weight process switcher is based on
159 * PCB_RSP. TD_SP is usually two ints pushed relative to
160 * PCB_RSP. We push the flags for later restore by cpu_heavy_restore.
164 movq $cpu_heavy_restore, %rax
166 movq %rsp,TD_SP(%rbx)
169 * Save debug regs if necessary
171 movq PCB_FLAGS(%rdx),%rax
172 andq $PCB_DBREGS,%rax
173 jz 1f /* no, skip over */
174 movq %dr7,%rax /* yes, do the save */
175 movq %rax,PCB_DR7(%rdx)
176 /* JG correct value? */
177 andq $0x0000fc00, %rax /* disable all watchpoints */
180 movq %rax,PCB_DR6(%rdx)
182 movq %rax,PCB_DR3(%rdx)
184 movq %rax,PCB_DR2(%rdx)
186 movq %rax,PCB_DR1(%rdx)
188 movq %rax,PCB_DR0(%rdx)
193 * Save the FP state if we have used the FP. Note that calling
194 * npxsave will NULL out PCPU(npxthread).
196 cmpq %rbx,PCPU(npxthread)
198 movq %rdi,%r12 /* save %rdi. %r12 is callee-saved */
199 movq TD_SAVEFPU(%rbx),%rdi
200 call npxsave /* do it in a big C function */
201 movq %r12,%rdi /* restore %rdi */
206 * Switch to the next thread, which was passed as an argument
207 * to cpu_heavy_switch(). The argument is in %rdi.
208 * Set the current thread, load the stack pointer,
209 * and 'ret' into the switch-restore function.
211 * The switch restore function expects the new thread to be in %rax
212 * and the old one to be in %rbx.
214 * There is a one-instruction window where curthread is the new
215 * thread but %rsp still points to the old thread's stack, but
216 * we are protected by a critical section so it is ok.
218 movq %rdi,%rax /* RAX = newtd, RBX = oldtd */
219 movq %rax,PCPU(curthread)
220 movq TD_SP(%rax),%rsp
224 * cpu_exit_switch(struct thread *next)
226 * The switch function is changed to this when a thread is going away
227 * for good. We have to ensure that the MMU state is not cached, and
228 * we don't bother saving the existing thread state before switching.
230 * At this point we are in a critical section and this cpu owns the
231 * thread's token, which serves as an interlock until the switchout is
234 ENTRY(cpu_exit_switch)
236 * Get us out of the vmspace
244 /* JG no increment of statistics counters? see cpu_heavy_restore */
247 movq PCPU(curthread),%rbx
250 * If this is a process/lwp, deactivate the pmap after we've
253 movq TD_LWP(%rbx),%rcx
256 movq LWP_VMSPACE(%rcx), %rcx /* RCX = vmspace */
258 movq PCPU(cpumask_simple),%rax
259 movq PCPU(cpumask_offset),%r12
261 MPLOCKED andq %rax, VM_PMAP+PM_ACTIVE(%rcx, %r12, 1)
264 * Switch to the next thread. RET into the restore function, which
265 * expects the new thread in RAX and the old in RBX.
267 * There is a one-instruction window where curthread is the new
268 * thread but %rsp still points to the old thread's stack, but
269 * we are protected by a critical section so it is ok.
273 movq %rax,PCPU(curthread)
274 movq TD_SP(%rax),%rsp
278 * cpu_heavy_restore() (current thread in %rax on entry, old thread in %rbx)
280 * Restore the thread after an LWKT switch. This entry is normally
281 * called via the LWKT switch restore function, which was pulled
282 * off the thread stack and jumped to.
284 * This entry is only called if the thread was previously saved
285 * using cpu_heavy_switch() (the heavy weight process thread switcher),
286 * or when a new process is initially scheduled.
288 * NOTE: The lwp may be in any state, not necessarily LSRUN, because
289 * a preemption switch may interrupt the process and then return via
292 * YYY theoretically we do not have to restore everything here, a lot
293 * of this junk can wait until we return to usermode. But for now
294 * we restore everything.
296 * YYY the PCB crap is really crap, it makes startup a bitch because
297 * we can't switch away.
299 * YYY note: spl check is done in mi_switch when it splx()'s.
302 ENTRY(cpu_heavy_restore)
303 movq TD_PCB(%rax),%rdx /* RDX = PCB */
304 movq %rdx, PCPU(common_tss) + TSS_RSP0
307 #if defined(SWTCH_OPTIM_STATS)
308 incl _swtch_optim_stats
311 * Tell the pmap that our cpu is using the VMSPACE now. We cannot
312 * safely test/reload %cr3 until after we have set the bit in the
315 * We must do an interlocked test of the CPULOCK_EXCL at the same
316 * time. If found to be set we will have to wait for it to clear
317 * and then do a forced reload of %cr3 (even if the value matches).
319 * XXX When switching between two LWPs sharing the same vmspace
320 * the cpu_heavy_switch() code currently avoids clearing the
321 * cpu bit in PM_ACTIVE. So if the bit is already set we can
322 * avoid checking for the interlock via CPULOCK_EXCL. We currently
323 * do not perform this optimization.
325 movq TD_LWP(%rax),%rcx
326 movq LWP_VMSPACE(%rcx),%rcx /* RCX = vmspace */
328 #if CPUMASK_ELEMENTS != 4
329 #error "assembly incompatible with cpumask_t"
331 movq PCPU(cpumask_simple),%rsi
332 movq PCPU(cpumask_offset),%r12
333 MPLOCKED orq %rsi, VM_PMAP+PM_ACTIVE(%rcx, %r12, 1)
335 movl VM_PMAP+PM_ACTIVE_LOCK(%rcx),%esi
336 testl $CPULOCK_EXCL,%esi
339 movq %rax,%r12 /* save newthread ptr */
340 movq %rcx,%rdi /* (found to be set) */
341 call pmap_interlock_wait /* pmap_interlock_wait(%rdi:vm) */
345 * Need unconditional load cr3
347 movq TD_PCB(%rax),%rdx /* RDX = PCB */
348 movq PCB_CR3(%rdx),%rcx /* RCX = desired CR3 */
349 jmp 2f /* unconditional reload */
352 * Restore the MMU address space. If it is the same as the last
353 * thread we don't have to invalidate the tlb (i.e. reload cr3).
354 * YYY which naturally also means that the PM_ACTIVE bit had better
355 * already have been set before we set it above, check? YYY
357 movq TD_PCB(%rax),%rdx /* RDX = PCB */
358 movq %cr3,%rsi /* RSI = current CR3 */
359 movq PCB_CR3(%rdx),%rcx /* RCX = desired CR3 */
363 #if defined(SWTCH_OPTIM_STATS)
364 decl _swtch_optim_stats
365 incl _tlb_flush_count
371 * NOTE: %rbx is the previous thread and %rax is the new thread.
372 * %rbx is retained throughout so we can return it.
374 * lwkt_switch[_return] is responsible for handling TDF_RUNNING.
378 * Deal with the PCB extension, restore the private tss
380 movq PCB_EXT(%rdx),%rdi /* check for a PCB extension */
381 movq $1,%rcx /* maybe mark use of a private tss */
388 * Going back to the common_tss. We may need to update TSS_RSP0
389 * which sets the top of the supervisor stack when entering from
390 * usermode. The PCB is at the top of the stack but we need another
391 * 16 bytes to take vm86 into account.
394 /*leaq -TF_SIZE(%rdx),%rcx*/
395 movq %rcx, PCPU(common_tss) + TSS_RSP0
398 cmpl $0,PCPU(private_tss) /* don't have to reload if */
399 je 3f /* already using the common TSS */
402 subq %rcx,%rcx /* unmark use of private tss */
405 * Get the address of the common TSS descriptor for the ltr.
406 * There is no way to get the address of a segment-accessed variable
407 * so we store a self-referential pointer at the base of the per-cpu
408 * data area and add the appropriate offset.
411 movq $gd_common_tssd, %rdi
412 /* JG name for "%gs:0"? */
416 * Move the correct TSS descriptor into the GDT slot, then reload
421 movl %rcx,PCPU(private_tss) /* mark/unmark private tss */
422 movq PCPU(tss_gdt), %rbx /* entry in GDT */
425 movl $GPROC0_SEL*8, %esi /* GSEL(entry, SEL_KPL) */
431 * Restore the user %gs and %fs
433 movq PCB_FSBASE(%rdx),%r9
434 cmpq PCPU(user_fs),%r9
437 movq %r9,PCPU(user_fs)
438 movl $MSR_FSBASE,%ecx
439 movl PCB_FSBASE(%r10),%eax
440 movl PCB_FSBASE+4(%r10),%edx
444 movq PCB_GSBASE(%rdx),%r9
445 cmpq PCPU(user_gs),%r9
448 movq %r9,PCPU(user_gs)
449 movl $MSR_KGSBASE,%ecx /* later swapgs moves it to GSBASE */
450 movl PCB_GSBASE(%r10),%eax
451 movl PCB_GSBASE+4(%r10),%edx
457 * Restore general registers. %rbx is restored later.
459 movq PCB_RSP(%rdx), %rsp
460 movq PCB_RBP(%rdx), %rbp
461 movq PCB_R12(%rdx), %r12
462 movq PCB_R13(%rdx), %r13
463 movq PCB_R14(%rdx), %r14
464 movq PCB_R15(%rdx), %r15
465 movq PCB_RIP(%rdx), %rax
472 * Restore the user LDT if we have one
474 cmpl $0, PCB_USERLDT(%edx)
476 movl _default_ldt,%eax
477 cmpl PCPU(currentldt),%eax
480 movl %eax,PCPU(currentldt)
489 * Restore the user TLS if we have one
497 * Restore the DEBUG register state if necessary.
499 movq PCB_FLAGS(%rdx),%rax
500 andq $PCB_DBREGS,%rax
501 jz 1f /* no, skip over */
502 movq PCB_DR6(%rdx),%rax /* yes, do the restore */
504 movq PCB_DR3(%rdx),%rax
506 movq PCB_DR2(%rdx),%rax
508 movq PCB_DR1(%rdx),%rax
510 movq PCB_DR0(%rdx),%rax
512 movq %dr7,%rax /* load dr7 so as not to disturb */
513 /* JG correct value? */
514 andq $0x0000fc00,%rax /* reserved bits */
515 /* JG we've got more registers on x86_64 */
516 movq PCB_DR7(%rdx),%rcx
517 /* JG correct value? */
518 andq $~0x0000fc00,%rcx
523 * Clear the QUICKRET flag when restoring a user process context
524 * so we don't try to do a quick syscall return.
527 andl $~RQF_QUICKRET,PCPU(reqflags)
529 movq PCB_RBX(%rdx),%rbx
533 * savectx(struct pcb *pcb)
535 * Update pcb, saving current processor state.
539 /* JG use %rdi instead of %rcx everywhere? */
542 /* caller's return address - child won't execute this routine */
544 movq %rax,PCB_RIP(%rcx)
547 movq %rax,PCB_CR3(%rcx)
549 movq %rbx,PCB_RBX(%rcx)
550 movq %rsp,PCB_RSP(%rcx)
551 movq %rbp,PCB_RBP(%rcx)
552 movq %r12,PCB_R12(%rcx)
553 movq %r13,PCB_R13(%rcx)
554 movq %r14,PCB_R14(%rcx)
555 movq %r15,PCB_R15(%rcx)
559 * If npxthread == NULL, then the npx h/w state is irrelevant and the
560 * state had better already be in the pcb. This is true for forks
561 * but not for dumps (the old book-keeping with FP flags in the pcb
562 * always lost for dumps because the dump pcb has 0 flags).
564 * If npxthread != NULL, then we have to save the npx h/w state to
565 * npxthread's pcb and copy it to the requested pcb, or save to the
566 * requested pcb and reload. Copying is easier because we would
567 * have to handle h/w bugs for reloading. We used to lose the
568 * parent's npx state for forks by forgetting to reload.
570 movq PCPU(npxthread),%rax
574 pushq %rcx /* target pcb */
575 movq TD_SAVEFPU(%rax),%rax /* originating savefpu area */
584 movq $PCB_SAVEFPU_SIZE,%rdx
585 leaq PCB_SAVEFPU(%rcx),%rcx
595 * cpu_idle_restore() (current thread in %rax on entry) (one-time execution)
597 * Don't bother setting up any regs other than %rbp so backtraces
598 * don't die. This restore function is used to bootstrap into the
599 * cpu_idle() LWKT only, after that cpu_lwkt_*() will be used for
602 * Clear TDF_RUNNING in old thread only after we've cleaned up %cr3.
603 * This only occurs during system boot so no special handling is
604 * required for migration.
606 * If we are an AP we have to call ap_init() before jumping to
607 * cpu_idle(). ap_init() will synchronize with the BP and finish
608 * setting up various ncpu-dependant globaldata fields. This may
609 * happen on UP as well as SMP if we happen to be simulating multiple
612 ENTRY(cpu_idle_restore)
622 andl $~TDF_RUNNING,TD_FLAGS(%rbx)
623 orl $TDF_RUNNING,TD_FLAGS(%rax) /* manual, no switch_return */
626 * ap_init can decide to enable interrupts early, but otherwise, or if
627 * we are UP, do it here.
633 * cpu 0's idle thread entry for the first time must use normal
634 * lwkt_switch_return() semantics or a pending cpu migration on
635 * thread0 will deadlock.
641 call lwkt_switch_return
646 * cpu_kthread_restore() (current thread is %rax on entry, previous is %rbx)
647 * (one-time execution)
649 * Don't bother setting up any regs other then %rbp so backtraces
650 * don't die. This restore function is used to bootstrap into an
651 * LWKT based kernel thread only. cpu_lwkt_switch() will be used
654 * Because this switch target does not 'return' to lwkt_switch()
655 * we have to call lwkt_switch_return(otd) to clean up otd.
658 * Since all of our context is on the stack we are reentrant and
659 * we can release our critical section and enable interrupts early.
661 ENTRY(cpu_kthread_restore)
664 movq TD_PCB(%rax),%r13
669 * rax and rbx come from the switchout code. Call
670 * lwkt_switch_return(otd).
672 * NOTE: unlike i386, %rsi and %rdi are not call-saved regs.
676 call lwkt_switch_return
678 decl TD_CRITCOUNT(%rax)
679 movq PCB_R12(%r13),%rdi /* argument to RBX function */
680 movq PCB_RBX(%r13),%rax /* thread function */
681 /* note: top of stack return address inherited by function */
685 * cpu_lwkt_switch(struct thread *)
687 * Standard LWKT switching function. Only non-scratch registers are
688 * saved and we don't bother with the MMU state or anything else.
690 * This function is always called while in a critical section.
692 * There is a one-instruction window where curthread is the new
693 * thread but %rsp still points to the old thread's stack, but
694 * we are protected by a critical section so it is ok.
696 ENTRY(cpu_lwkt_switch)
697 pushq %rbp /* JG note: GDB hacked to locate ebp rel to td_sp */
699 movq PCPU(curthread),%rbx /* becomes old thread in restore */
709 * Save the FP state if we have used the FP. Note that calling
710 * npxsave will NULL out PCPU(npxthread).
712 * We have to deal with the FP state for LWKT threads in case they
713 * happen to get preempted or block while doing an optimized
714 * bzero/bcopy/memcpy.
716 cmpq %rbx,PCPU(npxthread)
718 movq %rdi,%r12 /* save %rdi. %r12 is callee-saved */
719 movq TD_SAVEFPU(%rbx),%rdi
720 call npxsave /* do it in a big C function */
721 movq %r12,%rdi /* restore %rdi */
725 movq %rdi,%rax /* switch to this thread */
726 pushq $cpu_lwkt_restore
727 movq %rsp,TD_SP(%rbx)
729 * %rax contains new thread, %rbx contains old thread.
731 movq %rax,PCPU(curthread)
732 movq TD_SP(%rax),%rsp
736 * cpu_lwkt_restore() (current thread in %rax on entry)
738 * Standard LWKT restore function. This function is always called
739 * while in a critical section.
741 * Warning: due to preemption the restore function can be used to
742 * 'return' to the original thread. Interrupt disablement must be
743 * protected through the switch so we cannot run splz here.
745 * YYY we theoretically do not need to load KPML4phys into cr3, but if
746 * so we need a way to detect when the PTD we are using is being
747 * deleted due to a process exiting.
749 ENTRY(cpu_lwkt_restore)
750 movq KPML4phys,%rcx /* YYY borrow but beware desched/cpuchg/exit */
759 * Safety, clear RSP0 in the tss so it isn't pointing at the
760 * previous thread's kstack (if a heavy weight user thread).
761 * RSP0 should only be used in ring 3 transitions and kernel
762 * threads run in ring 0 so there should be none.
765 movq %rdx, PCPU(common_tss) + TSS_RSP0
768 * NOTE: %rbx is the previous thread and %rax is the new thread.
769 * %rbx is retained throughout so we can return it.
771 * lwkt_switch[_return] is responsible for handling TDF_RUNNING.