2 * $NetBSD: ohci.c,v 1.138 2003/02/08 03:32:50 ichiro Exp $
3 * $FreeBSD: src/sys/dev/usb/ohci.c,v 1.141 2003/12/22 15:40:10 shiba Exp $
4 * $DragonFly: src/sys/bus/usb/ohci.c,v 1.15 2006/09/05 00:55:36 dillon Exp $
6 /* Also, already ported:
7 * $NetBSD: ohci.c,v 1.140 2003/05/13 04:42:00 gson Exp $
8 * $NetBSD: ohci.c,v 1.141 2003/09/10 20:08:29 mycroft Exp $
9 * $NetBSD: ohci.c,v 1.142 2003/10/11 03:04:26 toshii Exp $
10 * $NetBSD: ohci.c,v 1.143 2003/10/18 04:50:35 simonb Exp $
11 * $NetBSD: 1.144 - 1.150 ported
15 * Copyright (c) 1998 The NetBSD Foundation, Inc.
16 * All rights reserved.
18 * This code is derived from software contributed to The NetBSD Foundation
19 * by Lennart Augustsson (lennart@augustsson.net) at
20 * Carlstedt Research & Technology.
22 * Redistribution and use in source and binary forms, with or without
23 * modification, are permitted provided that the following conditions
25 * 1. Redistributions of source code must retain the above copyright
26 * notice, this list of conditions and the following disclaimer.
27 * 2. Redistributions in binary form must reproduce the above copyright
28 * notice, this list of conditions and the following disclaimer in the
29 * documentation and/or other materials provided with the distribution.
30 * 3. All advertising materials mentioning features or use of this software
31 * must display the following acknowledgement:
32 * This product includes software developed by the NetBSD
33 * Foundation, Inc. and its contributors.
34 * 4. Neither the name of The NetBSD Foundation nor the names of its
35 * contributors may be used to endorse or promote products derived
36 * from this software without specific prior written permission.
38 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
39 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
40 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
41 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
42 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
43 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
44 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
45 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
46 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
47 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
48 * POSSIBILITY OF SUCH DAMAGE.
52 * USB Open Host Controller driver.
54 * OHCI spec: http://www.compaq.com/productinfo/development/openhci.html
55 * USB spec: http://www.usb.org/developers/docs/usbspec.zip
58 #include <sys/param.h>
59 #include <sys/systm.h>
60 #include <sys/malloc.h>
61 #include <sys/kernel.h>
62 #if defined(__NetBSD__) || defined(__OpenBSD__)
63 #include <sys/device.h>
64 #include <sys/select.h>
65 #elif defined(__FreeBSD__) || defined(__DragonFly__)
66 #include <sys/endian.h>
67 #include <sys/module.h>
69 #include <machine/bus_pio.h>
70 #include <machine/bus_memio.h>
71 #if defined(DIAGNOSTIC) && defined(__i386__)
72 #include <machine/cpu.h>
76 #include <sys/queue.h>
77 #include <sys/sysctl.h>
79 #include <sys/thread2.h>
81 #include <machine/bus.h>
82 #include <machine/endian.h>
88 #include "usb_quirks.h"
93 #if defined(__FreeBSD__) || defined(__DragonFly__)
94 #include <machine/clock.h>
96 #define delay(d) DELAY(d)
99 #if defined(__OpenBSD__)
100 struct cfdriver ohci_cd = {
101 NULL, "ohci", DV_DULL
106 #define DPRINTF(x) if (ohcidebug) logprintf x
107 #define DPRINTFN(n,x) if (ohcidebug>(n)) logprintf x
109 SYSCTL_NODE(_hw_usb, OID_AUTO, ohci, CTLFLAG_RW, 0, "USB ohci");
110 SYSCTL_INT(_hw_usb_ohci, OID_AUTO, debug, CTLFLAG_RW,
111 &ohcidebug, 0, "ohci debug level");
113 #define bitmask_snprintf(q,f,b,l) snprintf((b), (l), "%b", (q), (f))
117 #define DPRINTFN(n,x)
121 * The OHCI controller is little endian, so on big endian machines
122 * the data strored in memory needs to be swapped.
124 #if defined(__OpenBSD__)
125 #if BYTE_ORDER == BIG_ENDIAN
126 #define htole32(x) (bswap32(x))
127 #define le32toh(x) (bswap32(x))
129 #define htole32(x) (x)
130 #define le32toh(x) (x)
136 Static ohci_soft_ed_t *ohci_alloc_sed(ohci_softc_t *);
137 Static void ohci_free_sed(ohci_softc_t *, ohci_soft_ed_t *);
139 Static ohci_soft_td_t *ohci_alloc_std(ohci_softc_t *);
140 Static void ohci_free_std(ohci_softc_t *, ohci_soft_td_t *);
142 Static ohci_soft_itd_t *ohci_alloc_sitd(ohci_softc_t *);
143 Static void ohci_free_sitd(ohci_softc_t *,ohci_soft_itd_t *);
146 Static void ohci_free_std_chain(ohci_softc_t *, ohci_soft_td_t *,
149 Static usbd_status ohci_alloc_std_chain(struct ohci_pipe *,
150 ohci_softc_t *, int, int, usbd_xfer_handle,
151 ohci_soft_td_t *, ohci_soft_td_t **);
153 #if defined(__NetBSD__) || defined(__OpenBSD__)
154 Static void ohci_shutdown(void *v);
155 Static void ohci_power(int, void *);
157 Static usbd_status ohci_open(usbd_pipe_handle);
158 Static void ohci_poll(struct usbd_bus *);
159 Static void ohci_softintr(void *);
160 Static void ohci_waitintr(ohci_softc_t *, usbd_xfer_handle);
161 Static void ohci_add_done(ohci_softc_t *, ohci_physaddr_t);
162 Static void ohci_rhsc(ohci_softc_t *, usbd_xfer_handle);
164 Static usbd_status ohci_device_request(usbd_xfer_handle xfer);
165 Static void ohci_add_ed(ohci_soft_ed_t *, ohci_soft_ed_t *);
166 Static void ohci_rem_ed(ohci_soft_ed_t *, ohci_soft_ed_t *);
167 Static void ohci_hash_add_td(ohci_softc_t *, ohci_soft_td_t *);
168 Static void ohci_hash_rem_td(ohci_softc_t *, ohci_soft_td_t *);
169 Static ohci_soft_td_t *ohci_hash_find_td(ohci_softc_t *, ohci_physaddr_t);
170 Static void ohci_hash_add_itd(ohci_softc_t *, ohci_soft_itd_t *);
171 Static void ohci_hash_rem_itd(ohci_softc_t *, ohci_soft_itd_t *);
172 Static ohci_soft_itd_t *ohci_hash_find_itd(ohci_softc_t *, ohci_physaddr_t);
174 Static usbd_status ohci_setup_isoc(usbd_pipe_handle pipe);
175 Static void ohci_device_isoc_enter(usbd_xfer_handle);
177 Static usbd_status ohci_allocm(struct usbd_bus *, usb_dma_t *, u_int32_t);
178 Static void ohci_freem(struct usbd_bus *, usb_dma_t *);
180 Static usbd_xfer_handle ohci_allocx(struct usbd_bus *);
181 Static void ohci_freex(struct usbd_bus *, usbd_xfer_handle);
183 Static usbd_status ohci_root_ctrl_transfer(usbd_xfer_handle);
184 Static usbd_status ohci_root_ctrl_start(usbd_xfer_handle);
185 Static void ohci_root_ctrl_abort(usbd_xfer_handle);
186 Static void ohci_root_ctrl_close(usbd_pipe_handle);
187 Static void ohci_root_ctrl_done(usbd_xfer_handle);
189 Static usbd_status ohci_root_intr_transfer(usbd_xfer_handle);
190 Static usbd_status ohci_root_intr_start(usbd_xfer_handle);
191 Static void ohci_root_intr_abort(usbd_xfer_handle);
192 Static void ohci_root_intr_close(usbd_pipe_handle);
193 Static void ohci_root_intr_done(usbd_xfer_handle);
195 Static usbd_status ohci_device_ctrl_transfer(usbd_xfer_handle);
196 Static usbd_status ohci_device_ctrl_start(usbd_xfer_handle);
197 Static void ohci_device_ctrl_abort(usbd_xfer_handle);
198 Static void ohci_device_ctrl_close(usbd_pipe_handle);
199 Static void ohci_device_ctrl_done(usbd_xfer_handle);
201 Static usbd_status ohci_device_bulk_transfer(usbd_xfer_handle);
202 Static usbd_status ohci_device_bulk_start(usbd_xfer_handle);
203 Static void ohci_device_bulk_abort(usbd_xfer_handle);
204 Static void ohci_device_bulk_close(usbd_pipe_handle);
205 Static void ohci_device_bulk_done(usbd_xfer_handle);
207 Static usbd_status ohci_device_intr_transfer(usbd_xfer_handle);
208 Static usbd_status ohci_device_intr_start(usbd_xfer_handle);
209 Static void ohci_device_intr_abort(usbd_xfer_handle);
210 Static void ohci_device_intr_close(usbd_pipe_handle);
211 Static void ohci_device_intr_done(usbd_xfer_handle);
213 Static usbd_status ohci_device_isoc_transfer(usbd_xfer_handle);
214 Static usbd_status ohci_device_isoc_start(usbd_xfer_handle);
215 Static void ohci_device_isoc_abort(usbd_xfer_handle);
216 Static void ohci_device_isoc_close(usbd_pipe_handle);
217 Static void ohci_device_isoc_done(usbd_xfer_handle);
219 Static usbd_status ohci_device_setintr(ohci_softc_t *sc,
220 struct ohci_pipe *pipe, int ival);
222 Static int ohci_str(usb_string_descriptor_t *, int, const char *);
224 Static void ohci_timeout(void *);
225 Static void ohci_timeout_task(void *);
226 Static void ohci_rhsc_able(ohci_softc_t *, int);
227 Static void ohci_rhsc_enable(void *);
229 Static void ohci_close_pipe(usbd_pipe_handle, ohci_soft_ed_t *);
230 Static void ohci_abort_xfer(usbd_xfer_handle, usbd_status);
232 Static void ohci_device_clear_toggle(usbd_pipe_handle pipe);
233 Static void ohci_noop(usbd_pipe_handle pipe);
235 Static usbd_status ohci_controller_init(ohci_softc_t *sc);
238 Static void ohci_dumpregs(ohci_softc_t *);
239 Static void ohci_dump_tds(ohci_soft_td_t *);
240 Static void ohci_dump_td(ohci_soft_td_t *);
241 Static void ohci_dump_ed(ohci_soft_ed_t *);
242 Static void ohci_dump_itd(ohci_soft_itd_t *);
243 Static void ohci_dump_itds(ohci_soft_itd_t *);
246 #define OBARR(sc) bus_space_barrier((sc)->iot, (sc)->ioh, 0, (sc)->sc_size, \
247 BUS_SPACE_BARRIER_READ|BUS_SPACE_BARRIER_WRITE)
248 #define OWRITE1(sc, r, x) \
249 do { OBARR(sc); bus_space_write_1((sc)->iot, (sc)->ioh, (r), (x)); } while (0)
250 #define OWRITE2(sc, r, x) \
251 do { OBARR(sc); bus_space_write_2((sc)->iot, (sc)->ioh, (r), (x)); } while (0)
252 #define OWRITE4(sc, r, x) \
253 do { OBARR(sc); bus_space_write_4((sc)->iot, (sc)->ioh, (r), (x)); } while (0)
254 #define OREAD1(sc, r) (OBARR(sc), bus_space_read_1((sc)->iot, (sc)->ioh, (r)))
255 #define OREAD2(sc, r) (OBARR(sc), bus_space_read_2((sc)->iot, (sc)->ioh, (r)))
256 #define OREAD4(sc, r) (OBARR(sc), bus_space_read_4((sc)->iot, (sc)->ioh, (r)))
258 /* Reverse the bits in a value 0 .. 31 */
259 Static u_int8_t revbits[OHCI_NO_INTRS] =
260 { 0x00, 0x10, 0x08, 0x18, 0x04, 0x14, 0x0c, 0x1c,
261 0x02, 0x12, 0x0a, 0x1a, 0x06, 0x16, 0x0e, 0x1e,
262 0x01, 0x11, 0x09, 0x19, 0x05, 0x15, 0x0d, 0x1d,
263 0x03, 0x13, 0x0b, 0x1b, 0x07, 0x17, 0x0f, 0x1f };
266 struct usbd_pipe pipe;
271 ohci_soft_itd_t *itd;
273 /* Info needed for different pipe kinds. */
279 ohci_soft_td_t *setup, *data, *stat;
298 #define OHCI_INTR_ENDPT 1
300 Static struct usbd_bus_methods ohci_bus_methods = {
310 Static struct usbd_pipe_methods ohci_root_ctrl_methods = {
311 ohci_root_ctrl_transfer,
312 ohci_root_ctrl_start,
313 ohci_root_ctrl_abort,
314 ohci_root_ctrl_close,
319 Static struct usbd_pipe_methods ohci_root_intr_methods = {
320 ohci_root_intr_transfer,
321 ohci_root_intr_start,
322 ohci_root_intr_abort,
323 ohci_root_intr_close,
328 Static struct usbd_pipe_methods ohci_device_ctrl_methods = {
329 ohci_device_ctrl_transfer,
330 ohci_device_ctrl_start,
331 ohci_device_ctrl_abort,
332 ohci_device_ctrl_close,
334 ohci_device_ctrl_done,
337 Static struct usbd_pipe_methods ohci_device_intr_methods = {
338 ohci_device_intr_transfer,
339 ohci_device_intr_start,
340 ohci_device_intr_abort,
341 ohci_device_intr_close,
342 ohci_device_clear_toggle,
343 ohci_device_intr_done,
346 Static struct usbd_pipe_methods ohci_device_bulk_methods = {
347 ohci_device_bulk_transfer,
348 ohci_device_bulk_start,
349 ohci_device_bulk_abort,
350 ohci_device_bulk_close,
351 ohci_device_clear_toggle,
352 ohci_device_bulk_done,
355 Static struct usbd_pipe_methods ohci_device_isoc_methods = {
356 ohci_device_isoc_transfer,
357 ohci_device_isoc_start,
358 ohci_device_isoc_abort,
359 ohci_device_isoc_close,
361 ohci_device_isoc_done,
364 #if defined(__NetBSD__) || defined(__OpenBSD__)
366 ohci_activate(device_ptr_t self, enum devact act)
368 struct ohci_softc *sc = (struct ohci_softc *)self;
375 case DVACT_DEACTIVATE:
376 if (sc->sc_child != NULL)
377 rv = config_deactivate(sc->sc_child);
385 ohci_detach(struct ohci_softc *sc, int flags)
389 if (sc->sc_child != NULL)
390 rv = config_detach(sc->sc_child, flags);
395 usb_uncallout(sc->sc_tmo_rhsc, ohci_rhsc_enable, sc);
397 #if defined(__NetBSD__) || defined(__OpenBSD__)
398 powerhook_disestablish(sc->sc_powerhook);
399 shutdownhook_disestablish(sc->sc_shutdownhook);
402 usb_delay_ms(&sc->sc_bus, 300); /* XXX let stray task complete */
404 /* free data structures XXX */
411 ohci_alloc_sed(ohci_softc_t *sc)
418 if (sc->sc_freeeds == NULL) {
419 DPRINTFN(2, ("ohci_alloc_sed: allocating chunk\n"));
420 err = usb_allocmem(&sc->sc_bus, OHCI_SED_SIZE * OHCI_SED_CHUNK,
421 OHCI_ED_ALIGN, &dma);
424 for(i = 0; i < OHCI_SED_CHUNK; i++) {
425 offs = i * OHCI_SED_SIZE;
426 sed = KERNADDR(&dma, offs);
427 sed->physaddr = DMAADDR(&dma, offs);
428 sed->next = sc->sc_freeeds;
429 sc->sc_freeeds = sed;
432 sed = sc->sc_freeeds;
433 sc->sc_freeeds = sed->next;
434 memset(&sed->ed, 0, sizeof(ohci_ed_t));
440 ohci_free_sed(ohci_softc_t *sc, ohci_soft_ed_t *sed)
442 sed->next = sc->sc_freeeds;
443 sc->sc_freeeds = sed;
447 ohci_alloc_std(ohci_softc_t *sc)
454 if (sc->sc_freetds == NULL) {
455 DPRINTFN(2, ("ohci_alloc_std: allocating chunk\n"));
456 err = usb_allocmem(&sc->sc_bus, OHCI_STD_SIZE * OHCI_STD_CHUNK,
457 OHCI_TD_ALIGN, &dma);
461 for(i = 0; i < OHCI_STD_CHUNK; i++) {
462 offs = i * OHCI_STD_SIZE;
463 std = KERNADDR(&dma, offs);
464 std->physaddr = DMAADDR(&dma, offs);
465 std->nexttd = sc->sc_freetds;
466 sc->sc_freetds = std;
472 std = sc->sc_freetds;
473 sc->sc_freetds = std->nexttd;
474 memset(&std->td, 0, sizeof(ohci_td_t));
477 ohci_hash_add_td(sc, std);
484 ohci_free_std(ohci_softc_t *sc, ohci_soft_td_t *std)
487 ohci_hash_rem_td(sc, std);
488 std->nexttd = sc->sc_freetds;
489 sc->sc_freetds = std;
494 ohci_alloc_std_chain(struct ohci_pipe *opipe, ohci_softc_t *sc,
495 int alen, int rd, usbd_xfer_handle xfer,
496 ohci_soft_td_t *sp, ohci_soft_td_t **ep)
498 ohci_soft_td_t *next, *cur;
499 ohci_physaddr_t dataphys;
503 usb_dma_t *dma = &xfer->dmabuf;
504 u_int16_t flags = xfer->flags;
506 DPRINTFN(alen < 4096,("ohci_alloc_std_chain: start len=%d\n", alen));
512 (rd ? OHCI_TD_IN : OHCI_TD_OUT) |
513 (flags & USBD_SHORT_XFER_OK ? OHCI_TD_R : 0) |
514 OHCI_TD_NOCC | OHCI_TD_TOGGLE_CARRY | OHCI_TD_NOINTR);
517 next = ohci_alloc_std(sc);
521 dataphys = DMAADDR(dma, offset);
524 * The OHCI hardware can handle at most one 4k crossing.
525 * XXX - currently we only allocate contigous buffers, but
526 * the OHCI spec says: If during the data transfer the buffer
527 * address contained in the HC's working copy of
528 * CurrentBufferPointer crosses a 4K boundary, the upper 20
529 * bits of Buffer End are copied to the working value of
530 * CurrentBufferPointer causing the next buffer address to
531 * be the 0th byte in the same 4K page that contains the
532 * last byte of the buffer (the 4K boundary crossing may
533 * occur within a data packet transfer.)
535 * If/when dma has multiple segments, this will need to
536 * properly handle fragmenting TD's.
538 * We can describe the above using maxsegsz = 4k and nsegs = 2
541 if (OHCI_PAGE(dataphys) == OHCI_PAGE(DMAADDR(dma, offset +
542 len - 1)) || len - (OHCI_PAGE_SIZE -
543 OHCI_PAGE_OFFSET(dataphys)) <= OHCI_PAGE_SIZE) {
544 /* we can handle it in this TD */
547 /* XXX The calculation below is wrong and could
548 * result in a packet that is not a multiple of the
549 * MaxPacketSize in the case where the buffer does not
550 * start on an appropriate address (like for example in
551 * the case of an mbuf cluster). You'll get an early
554 /* must use multiple TDs, fill as much as possible. */
555 curlen = 2 * OHCI_PAGE_SIZE -
556 OHCI_PAGE_OFFSET(dataphys);
557 /* the length must be a multiple of the max size */
559 UGETW(opipe->pipe.endpoint->edesc->wMaxPacketSize);
562 panic("ohci_alloc_std: curlen == 0");
565 DPRINTFN(4,("ohci_alloc_std_chain: dataphys=0x%08x "
566 "len=%d curlen=%d\n",
567 dataphys, len, curlen));
570 cur->td.td_flags = tdflags;
571 cur->td.td_cbp = htole32(dataphys);
573 cur->td.td_nexttd = htole32(next->physaddr);
574 cur->td.td_be = htole32(DMAADDR(dma, offset + curlen - 1));
576 cur->flags = OHCI_ADD_LEN;
578 DPRINTFN(10,("ohci_alloc_std_chain: cbp=0x%08x be=0x%08x\n",
579 dataphys, dataphys + curlen - 1));
583 panic("Length went negative: %d curlen %d dma %p offset %08x", len, curlen, dma, (int)0);
585 DPRINTFN(10,("ohci_alloc_std_chain: extend chain\n"));
589 if ((flags & USBD_FORCE_SHORT_XFER) &&
590 alen % UGETW(opipe->pipe.endpoint->edesc->wMaxPacketSize) == 0) {
591 /* Force a 0 length transfer at the end. */
595 next = ohci_alloc_std(sc);
599 cur->td.td_flags = tdflags;
600 cur->td.td_cbp = 0; /* indicate 0 length packet */
602 cur->td.td_nexttd = htole32(next->physaddr);
607 DPRINTFN(2,("ohci_alloc_std_chain: add 0 xfer\n"));
611 return (USBD_NORMAL_COMPLETION);
620 ohci_free_std_chain(ohci_softc_t *sc, ohci_soft_td_t *std,
621 ohci_soft_td_t *stdend)
625 for (; std != stdend; std = p) {
627 ohci_free_std(sc, std);
633 ohci_alloc_sitd(ohci_softc_t *sc)
635 ohci_soft_itd_t *sitd;
641 if (sc->sc_freeitds == NULL) {
642 DPRINTFN(2, ("ohci_alloc_sitd: allocating chunk\n"));
644 err = usb_allocmem(&sc->sc_bus,
645 OHCI_SITD_SIZE * OHCI_SITD_CHUNK,
646 OHCI_ITD_ALIGN, &dma);
650 for (i = 0; i < OHCI_SITD_CHUNK; i++) {
651 offs = i * OHCI_SITD_SIZE;
652 sitd = KERNADDR(&dma, offs);
653 sitd->physaddr = DMAADDR(&dma, offs);
654 sitd->nextitd = sc->sc_freeitds;
655 sc->sc_freeitds = sitd;
658 sitd = sc->sc_freeitds;
659 sc->sc_freeitds = sitd->nextitd;
660 memset(&sitd->itd, 0, sizeof(ohci_itd_t));
661 sitd->nextitd = NULL;
663 ohci_hash_add_itd(sc, sitd);
674 ohci_free_sitd(ohci_softc_t *sc, ohci_soft_itd_t *sitd)
676 DPRINTFN(10,("ohci_free_sitd: sitd=%p\n", sitd));
680 panic("ohci_free_sitd: sitd=%p not done", sitd);
683 /* Warn double free */
688 ohci_hash_rem_itd(sc, sitd);
689 sitd->nextitd = sc->sc_freeitds;
690 sc->sc_freeitds = sitd;
695 ohci_init(ohci_softc_t *sc)
697 ohci_soft_ed_t *sed, *psed;
702 DPRINTF(("ohci_init: start\n"));
703 #if defined(__OpenBSD__)
706 printf("%s:", USBDEVNAME(sc->sc_bus.bdev));
708 rev = OREAD4(sc, OHCI_REVISION);
709 printf(" OHCI version %d.%d%s\n", OHCI_REV_HI(rev), OHCI_REV_LO(rev),
710 OHCI_REV_LEGACY(rev) ? ", legacy support" : "");
712 if (OHCI_REV_HI(rev) != 1 || OHCI_REV_LO(rev) != 0) {
713 printf("%s: unsupported OHCI revision\n",
714 USBDEVNAME(sc->sc_bus.bdev));
715 sc->sc_bus.usbrev = USBREV_UNKNOWN;
718 sc->sc_bus.usbrev = USBREV_1_0;
720 for (i = 0; i < OHCI_HASH_SIZE; i++)
721 LIST_INIT(&sc->sc_hash_tds[i]);
722 for (i = 0; i < OHCI_HASH_SIZE; i++)
723 LIST_INIT(&sc->sc_hash_itds[i]);
725 SIMPLEQ_INIT(&sc->sc_free_xfers);
727 /* XXX determine alignment by R/W */
728 /* Allocate the HCCA area. */
729 err = usb_allocmem(&sc->sc_bus, OHCI_HCCA_SIZE,
730 OHCI_HCCA_ALIGN, &sc->sc_hccadma);
733 sc->sc_hcca = KERNADDR(&sc->sc_hccadma, 0);
734 memset(sc->sc_hcca, 0, OHCI_HCCA_SIZE);
736 sc->sc_eintrs = OHCI_NORMAL_INTRS;
738 /* Allocate dummy ED that starts the control list. */
739 sc->sc_ctrl_head = ohci_alloc_sed(sc);
740 if (sc->sc_ctrl_head == NULL) {
744 sc->sc_ctrl_head->ed.ed_flags |= htole32(OHCI_ED_SKIP);
746 /* Allocate dummy ED that starts the bulk list. */
747 sc->sc_bulk_head = ohci_alloc_sed(sc);
748 if (sc->sc_bulk_head == NULL) {
752 sc->sc_bulk_head->ed.ed_flags |= htole32(OHCI_ED_SKIP);
754 /* Allocate dummy ED that starts the isochronous list. */
755 sc->sc_isoc_head = ohci_alloc_sed(sc);
756 if (sc->sc_isoc_head == NULL) {
760 sc->sc_isoc_head->ed.ed_flags |= htole32(OHCI_ED_SKIP);
762 /* Allocate all the dummy EDs that make up the interrupt tree. */
763 for (i = 0; i < OHCI_NO_EDS; i++) {
764 sed = ohci_alloc_sed(sc);
767 ohci_free_sed(sc, sc->sc_eds[i]);
771 /* All ED fields are set to 0. */
773 sed->ed.ed_flags |= htole32(OHCI_ED_SKIP);
775 psed = sc->sc_eds[(i-1) / 2];
777 psed= sc->sc_isoc_head;
779 sed->ed.ed_nexted = htole32(psed->physaddr);
782 * Fill HCCA interrupt table. The bit reversal is to get
783 * the tree set up properly to spread the interrupts.
785 for (i = 0; i < OHCI_NO_INTRS; i++)
786 sc->sc_hcca->hcca_interrupt_table[revbits[i]] =
787 htole32(sc->sc_eds[OHCI_NO_EDS-OHCI_NO_INTRS+i]->physaddr);
790 if (ohcidebug > 15) {
791 for (i = 0; i < OHCI_NO_EDS; i++) {
793 ohci_dump_ed(sc->sc_eds[i]);
796 ohci_dump_ed(sc->sc_isoc_head);
800 err = ohci_controller_init(sc);
801 if (err != USBD_NORMAL_COMPLETION)
804 /* Set up the bus struct. */
805 sc->sc_bus.methods = &ohci_bus_methods;
806 sc->sc_bus.pipe_size = sizeof(struct ohci_pipe);
808 #if defined(__NetBSD__) || defined(__OpenBSD__)
809 sc->sc_control = sc->sc_intre = 0;
810 sc->sc_powerhook = powerhook_establish(ohci_power, sc);
811 sc->sc_shutdownhook = shutdownhook_establish(ohci_shutdown, sc);
814 usb_callout_init(sc->sc_tmo_rhsc);
816 return (USBD_NORMAL_COMPLETION);
819 for (i = 0; i < OHCI_NO_EDS; i++)
820 ohci_free_sed(sc, sc->sc_eds[i]);
822 ohci_free_sed(sc, sc->sc_isoc_head);
824 ohci_free_sed(sc, sc->sc_bulk_head);
826 ohci_free_sed(sc, sc->sc_ctrl_head);
828 usb_freemem(&sc->sc_bus, &sc->sc_hccadma);
833 ohci_init_intrs(ohci_softc_t *sc)
835 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, sc->sc_eintrs | OHCI_MIE);
839 ohci_controller_init(ohci_softc_t *sc)
842 u_int32_t s, ctl, ival, hcr, fm, per, desca;
844 /* Determine in what context we are running. */
845 ctl = OREAD4(sc, OHCI_CONTROL);
847 /* SMM active, request change */
848 DPRINTF(("ohci_init: SMM active, request owner change\n"));
849 s = OREAD4(sc, OHCI_COMMAND_STATUS);
850 OWRITE4(sc, OHCI_COMMAND_STATUS, s | OHCI_OCR);
851 for (i = 0; i < 100 && (ctl & OHCI_IR); i++) {
852 usb_delay_ms(&sc->sc_bus, 1);
853 ctl = OREAD4(sc, OHCI_CONTROL);
855 if ((ctl & OHCI_IR) == 0) {
856 printf("%s: SMM does not respond, resetting\n",
857 USBDEVNAME(sc->sc_bus.bdev));
858 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET);
862 /* Don't bother trying to reuse the BIOS init, we'll reset it anyway. */
863 } else if ((ctl & OHCI_HCFS_MASK) != OHCI_HCFS_RESET) {
864 /* BIOS started controller. */
865 DPRINTF(("ohci_init: BIOS active\n"));
866 if ((ctl & OHCI_HCFS_MASK) != OHCI_HCFS_OPERATIONAL) {
867 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_OPERATIONAL);
868 usb_delay_ms(&sc->sc_bus, USB_RESUME_DELAY);
872 DPRINTF(("ohci_init: cold started\n"));
874 /* Controller was cold started. */
875 usb_delay_ms(&sc->sc_bus, USB_BUS_RESET_DELAY);
879 * This reset should not be necessary according to the OHCI spec, but
880 * without it some controllers do not start.
882 DPRINTF(("%s: resetting\n", USBDEVNAME(sc->sc_bus.bdev)));
883 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET);
884 usb_delay_ms(&sc->sc_bus, USB_BUS_RESET_DELAY);
886 /* We now own the host controller and the bus has been reset. */
887 ival = OHCI_GET_IVAL(OREAD4(sc, OHCI_FM_INTERVAL));
889 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_HCR); /* Reset HC */
890 /* Nominal time for a reset is 10 us. */
891 for (i = 0; i < 10; i++) {
893 hcr = OREAD4(sc, OHCI_COMMAND_STATUS) & OHCI_HCR;
898 printf("%s: reset timeout\n", USBDEVNAME(sc->sc_bus.bdev));
899 return (USBD_IOERROR);
906 /* The controller is now in SUSPEND state, we have 2ms to finish. */
908 /* Set up HC registers. */
909 OWRITE4(sc, OHCI_HCCA, DMAADDR(&sc->sc_hccadma, 0));
910 OWRITE4(sc, OHCI_CONTROL_HEAD_ED, sc->sc_ctrl_head->physaddr);
911 OWRITE4(sc, OHCI_BULK_HEAD_ED, sc->sc_bulk_head->physaddr);
914 * disable all interrupts to avoid events while we are initializing
917 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, OHCI_ALL_INTRS);
918 /* switch on desired functional features */
919 ctl = OREAD4(sc, OHCI_CONTROL);
920 ctl &= ~(OHCI_CBSR_MASK | OHCI_LES | OHCI_HCFS_MASK | OHCI_IR);
921 ctl |= OHCI_PLE | OHCI_IE | OHCI_CLE | OHCI_BLE |
922 OHCI_RATIO_1_4 | OHCI_HCFS_OPERATIONAL;
923 /* And finally start it! */
924 OWRITE4(sc, OHCI_CONTROL, ctl);
927 * The controller is now OPERATIONAL. Set a some final
928 * registers that should be set earlier, but that the
929 * controller ignores when in the SUSPEND state.
931 fm = (OREAD4(sc, OHCI_FM_INTERVAL) & OHCI_FIT) ^ OHCI_FIT;
932 fm |= OHCI_FSMPS(ival) | ival;
933 OWRITE4(sc, OHCI_FM_INTERVAL, fm);
934 per = OHCI_PERIODIC(ival); /* 90% periodic */
935 OWRITE4(sc, OHCI_PERIODIC_START, per);
937 /* Fiddle the No OverCurrent Protection bit to avoid chip bug. */
938 desca = OREAD4(sc, OHCI_RH_DESCRIPTOR_A);
939 OWRITE4(sc, OHCI_RH_DESCRIPTOR_A, desca | OHCI_NOCP);
940 OWRITE4(sc, OHCI_RH_STATUS, OHCI_LPSC); /* Enable port power */
941 usb_delay_ms(&sc->sc_bus, OHCI_ENABLE_POWER_DELAY);
942 OWRITE4(sc, OHCI_RH_DESCRIPTOR_A, desca);
945 * The AMD756 requires a delay before re-reading the register,
946 * otherwise it will occasionally report 0 ports.
949 for (i = 0; i < 10 && sc->sc_noport == 0; i++) {
950 usb_delay_ms(&sc->sc_bus, OHCI_READ_DESC_DELAY);
951 sc->sc_noport = OHCI_GET_NDP(OREAD4(sc, OHCI_RH_DESCRIPTOR_A));
958 return (USBD_NORMAL_COMPLETION);
962 ohci_allocm(struct usbd_bus *bus, usb_dma_t *dma, u_int32_t size)
964 return (usb_allocmem(bus, size, 0, dma));
968 ohci_freem(struct usbd_bus *bus, usb_dma_t *dma)
970 usb_freemem(bus, dma);
974 ohci_allocx(struct usbd_bus *bus)
976 struct ohci_softc *sc = (struct ohci_softc *)bus;
977 usbd_xfer_handle xfer;
979 xfer = SIMPLEQ_FIRST(&sc->sc_free_xfers);
981 SIMPLEQ_REMOVE_HEAD(&sc->sc_free_xfers, next);
983 if (xfer->busy_free != XFER_FREE) {
984 printf("ohci_allocx: xfer=%p not free, 0x%08x\n", xfer,
989 xfer = kmalloc(sizeof(struct ohci_xfer), M_USB, M_INTWAIT);
992 memset(xfer, 0, sizeof (struct ohci_xfer));
994 xfer->busy_free = XFER_BUSY;
1001 ohci_freex(struct usbd_bus *bus, usbd_xfer_handle xfer)
1003 struct ohci_softc *sc = (struct ohci_softc *)bus;
1004 struct ohci_xfer *oxfer = (struct ohci_xfer *)xfer;
1005 ohci_soft_itd_t *sitd;
1006 ohci_soft_itd_t **scanp;
1007 struct ohci_pipe *opipe;
1008 ohci_soft_ed_t *sed;
1009 ohci_physaddr_t tdphys;
1012 if (oxfer->ohci_xfer_flags & OHCI_ISOC_DIRTY) {
1014 opipe = (struct ohci_pipe *)xfer->pipe;
1015 KKASSERT(opipe != NULL);
1018 scanp = (ohci_soft_itd_t **)&xfer->hcpriv;
1020 while ((sitd = *scanp) != NULL) {
1021 if (sitd->xfer != xfer)
1023 if (opipe->tail.itd == sitd)
1025 *scanp = sitd->nextitd;
1026 sitd->nextitd = NULL;
1027 ohci_free_sitd(sc, sitd);
1030 sitd = ohci_alloc_sitd(sc);
1032 panic("cant alloc isoc");
1033 opipe->tail.itd = sitd;
1034 tdphys = sitd->physaddr;
1035 sed->ed.ed_flags |= htole32(OHCI_ED_SKIP); /* Stop*/
1037 sed->ed.ed_tailp = htole32(tdphys);
1038 sed->ed.ed_flags &= htole32(~OHCI_ED_SKIP); /* Start.*/
1044 if (xfer->busy_free != XFER_BUSY) {
1045 printf("ohci_freex: xfer=%p not busy, 0x%08x\n", xfer,
1049 xfer->busy_free = XFER_FREE;
1051 SIMPLEQ_INSERT_HEAD(&sc->sc_free_xfers, xfer, next);
1055 * Shut down the controller when the system is going down.
1058 ohci_shutdown(void *v)
1060 ohci_softc_t *sc = v;
1062 DPRINTF(("ohci_shutdown: stopping the HC\n"));
1063 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET);
1067 * Handle suspend/resume.
1069 * We need to switch to polling mode here, because this routine is
1070 * called from an intterupt context. This is all right since we
1071 * are almost suspended anyway.
1074 ohci_power(int why, void *v)
1076 ohci_softc_t *sc = v;
1080 DPRINTF(("ohci_power: sc=%p, why=%d\n", sc, why));
1085 if (why != PWR_RESUME) {
1086 sc->sc_bus.use_polling++;
1087 ctl = OREAD4(sc, OHCI_CONTROL) & ~OHCI_HCFS_MASK;
1088 if (sc->sc_control == 0) {
1090 * Preserve register values, in case that APM BIOS
1091 * does not recover them.
1093 sc->sc_control = ctl;
1094 sc->sc_intre = OREAD4(sc, OHCI_INTERRUPT_ENABLE);
1096 ctl |= OHCI_HCFS_SUSPEND;
1097 OWRITE4(sc, OHCI_CONTROL, ctl);
1098 usb_delay_ms(&sc->sc_bus, USB_RESUME_WAIT);
1099 sc->sc_bus.use_polling--;
1101 sc->sc_bus.use_polling++;
1103 /* Some broken BIOSes never initialize Controller chip */
1104 ohci_controller_init(sc);
1107 OWRITE4(sc, OHCI_INTERRUPT_ENABLE,
1108 sc->sc_intre & (OHCI_ALL_INTRS | OHCI_MIE));
1110 ctl = sc->sc_control;
1112 ctl = OREAD4(sc, OHCI_CONTROL);
1113 ctl |= OHCI_HCFS_RESUME;
1114 OWRITE4(sc, OHCI_CONTROL, ctl);
1115 usb_delay_ms(&sc->sc_bus, USB_RESUME_DELAY);
1116 ctl = (ctl & ~OHCI_HCFS_MASK) | OHCI_HCFS_OPERATIONAL;
1117 OWRITE4(sc, OHCI_CONTROL, ctl);
1118 usb_delay_ms(&sc->sc_bus, USB_RESUME_RECOVERY);
1119 sc->sc_control = sc->sc_intre = 0;
1120 sc->sc_bus.use_polling--;
1121 ohci_init_intrs(sc);
1129 ohci_dumpregs(ohci_softc_t *sc)
1131 DPRINTF(("ohci_dumpregs: rev=0x%08x control=0x%08x command=0x%08x\n",
1132 OREAD4(sc, OHCI_REVISION),
1133 OREAD4(sc, OHCI_CONTROL),
1134 OREAD4(sc, OHCI_COMMAND_STATUS)));
1135 DPRINTF((" intrstat=0x%08x intre=0x%08x intrd=0x%08x\n",
1136 OREAD4(sc, OHCI_INTERRUPT_STATUS),
1137 OREAD4(sc, OHCI_INTERRUPT_ENABLE),
1138 OREAD4(sc, OHCI_INTERRUPT_DISABLE)));
1139 DPRINTF((" hcca=0x%08x percur=0x%08x ctrlhd=0x%08x\n",
1140 OREAD4(sc, OHCI_HCCA),
1141 OREAD4(sc, OHCI_PERIOD_CURRENT_ED),
1142 OREAD4(sc, OHCI_CONTROL_HEAD_ED)));
1143 DPRINTF((" ctrlcur=0x%08x bulkhd=0x%08x bulkcur=0x%08x\n",
1144 OREAD4(sc, OHCI_CONTROL_CURRENT_ED),
1145 OREAD4(sc, OHCI_BULK_HEAD_ED),
1146 OREAD4(sc, OHCI_BULK_CURRENT_ED)));
1147 DPRINTF((" done=0x%08x fmival=0x%08x fmrem=0x%08x\n",
1148 OREAD4(sc, OHCI_DONE_HEAD),
1149 OREAD4(sc, OHCI_FM_INTERVAL),
1150 OREAD4(sc, OHCI_FM_REMAINING)));
1151 DPRINTF((" fmnum=0x%08x perst=0x%08x lsthrs=0x%08x\n",
1152 OREAD4(sc, OHCI_FM_NUMBER),
1153 OREAD4(sc, OHCI_PERIODIC_START),
1154 OREAD4(sc, OHCI_LS_THRESHOLD)));
1155 DPRINTF((" desca=0x%08x descb=0x%08x stat=0x%08x\n",
1156 OREAD4(sc, OHCI_RH_DESCRIPTOR_A),
1157 OREAD4(sc, OHCI_RH_DESCRIPTOR_B),
1158 OREAD4(sc, OHCI_RH_STATUS)));
1159 DPRINTF((" port1=0x%08x port2=0x%08x\n",
1160 OREAD4(sc, OHCI_RH_PORT_STATUS(1)),
1161 OREAD4(sc, OHCI_RH_PORT_STATUS(2))));
1162 DPRINTF((" HCCA: frame_number=0x%04x done_head=0x%08x\n",
1163 le32toh(sc->sc_hcca->hcca_frame_number),
1164 le32toh(sc->sc_hcca->hcca_done_head)));
1168 Static int ohci_intr1(ohci_softc_t *);
1173 ohci_softc_t *sc = p;
1175 if (sc == NULL || sc->sc_dying)
1178 /* If we get an interrupt while polling, then just ignore it. */
1179 if (sc->sc_bus.use_polling) {
1181 DPRINTFN(16, ("ohci_intr: ignored interrupt while polling\n"));
1186 return (ohci_intr1(sc));
1190 ohci_intr1(ohci_softc_t *sc)
1192 u_int32_t intrs, eintrs;
1193 ohci_physaddr_t done;
1195 DPRINTFN(14,("ohci_intr1: enter\n"));
1197 /* In case the interrupt occurs before initialization has completed. */
1198 if (sc == NULL || sc->sc_hcca == NULL) {
1200 printf("ohci_intr: sc->sc_hcca == NULL\n");
1206 done = le32toh(sc->sc_hcca->hcca_done_head);
1208 /* The LSb of done is used to inform the HC Driver that an interrupt
1209 * condition exists for both the Done list and for another event
1210 * recorded in HcInterruptStatus. On an interrupt from the HC, the HC
1211 * Driver checks the HccaDoneHead Value. If this value is 0, then the
1212 * interrupt was caused by other than the HccaDoneHead update and the
1213 * HcInterruptStatus register needs to be accessed to determine that
1214 * exact interrupt cause. If HccaDoneHead is nonzero, then a Done list
1215 * update interrupt is indicated and if the LSb of done is nonzero,
1216 * then an additional interrupt event is indicated and
1217 * HcInterruptStatus should be checked to determine its cause.
1220 if (done & ~OHCI_DONE_INTRS)
1222 if (done & OHCI_DONE_INTRS) {
1223 intrs |= OREAD4(sc, OHCI_INTERRUPT_STATUS);
1224 done &= ~OHCI_DONE_INTRS;
1226 sc->sc_hcca->hcca_done_head = 0;
1228 intrs = OREAD4(sc, OHCI_INTERRUPT_STATUS) & ~OHCI_WDH;
1230 if (intrs == 0) /* nothing to be done (PCI shared interrupt) */
1234 OWRITE4(sc, OHCI_INTERRUPT_STATUS, intrs); /* Acknowledge */
1235 eintrs = intrs & sc->sc_eintrs;
1239 sc->sc_bus.intr_context++;
1240 sc->sc_bus.no_intrs++;
1241 DPRINTFN(7, ("ohci_intr: sc=%p intrs=0x%x(0x%x) eintrs=0x%x\n",
1242 sc, (u_int)intrs, OREAD4(sc, OHCI_INTERRUPT_STATUS),
1245 if (eintrs & OHCI_SO) {
1246 sc->sc_overrun_cnt++;
1247 if (usbd_ratecheck(&sc->sc_overrun_ntc)) {
1248 printf("%s: %u scheduling overruns\n",
1249 USBDEVNAME(sc->sc_bus.bdev), sc->sc_overrun_cnt);
1250 sc->sc_overrun_cnt = 0;
1255 if (eintrs & OHCI_WDH) {
1256 ohci_add_done(sc, done &~ OHCI_DONE_INTRS);
1257 usb_schedsoftintr(&sc->sc_bus);
1258 eintrs &= ~OHCI_WDH;
1260 if (eintrs & OHCI_RD) {
1261 printf("%s: resume detect\n", USBDEVNAME(sc->sc_bus.bdev));
1262 /* XXX process resume detect */
1264 if (eintrs & OHCI_UE) {
1265 printf("%s: unrecoverable error, controller halted\n",
1266 USBDEVNAME(sc->sc_bus.bdev));
1267 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET);
1270 if (eintrs & OHCI_RHSC) {
1271 ohci_rhsc(sc, sc->sc_intrxfer);
1273 * Disable RHSC interrupt for now, because it will be
1274 * on until the port has been reset.
1276 ohci_rhsc_able(sc, 0);
1277 /* Do not allow RHSC interrupts > 1 per second */
1278 usb_callout(sc->sc_tmo_rhsc, hz, ohci_rhsc_enable, sc);
1279 eintrs &= ~OHCI_RHSC;
1282 sc->sc_bus.intr_context--;
1285 /* Block unprocessed interrupts. XXX */
1286 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, eintrs);
1287 sc->sc_eintrs &= ~eintrs;
1288 printf("%s: blocking intrs 0x%x\n",
1289 USBDEVNAME(sc->sc_bus.bdev), eintrs);
1296 ohci_rhsc_able(ohci_softc_t *sc, int on)
1298 DPRINTFN(4, ("ohci_rhsc_able: on=%d\n", on));
1300 sc->sc_eintrs |= OHCI_RHSC;
1301 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, OHCI_RHSC);
1303 sc->sc_eintrs &= ~OHCI_RHSC;
1304 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, OHCI_RHSC);
1309 ohci_rhsc_enable(void *v_sc)
1311 ohci_softc_t *sc = v_sc;
1314 ohci_rhsc_able(sc, 1);
1319 char *ohci_cc_strs[] = {
1323 "DATA_TOGGLE_MISMATCH",
1325 "DEVICE_NOT_RESPONDING",
1326 "PID_CHECK_FAILURE",
1340 ohci_add_done(ohci_softc_t *sc, ohci_physaddr_t done)
1342 ohci_soft_itd_t *sitd, *sidone, **ip;
1343 ohci_soft_td_t *std, *sdone, **p;
1345 /* Reverse the done list. */
1346 for (sdone = NULL, sidone = NULL; done != 0; ) {
1347 std = ohci_hash_find_td(sc, done);
1350 done = le32toh(std->td.td_nexttd);
1352 DPRINTFN(10,("add TD %p\n", std));
1355 sitd = ohci_hash_find_itd(sc, done);
1357 sitd->dnext = sidone;
1358 done = le32toh(sitd->itd.itd_nextitd);
1360 DPRINTFN(5,("add ITD %p\n", sitd));
1363 panic("ohci_add_done: addr 0x%08lx not found", (u_long)done);
1366 /* sdone & sidone now hold the done lists. */
1367 /* Put them on the already processed lists. */
1368 for (p = &sc->sc_sdone; *p != NULL; p = &(*p)->dnext)
1371 for (ip = &sc->sc_sidone; *ip != NULL; ip = &(*ip)->dnext)
1377 ohci_softintr(void *v)
1379 ohci_softc_t *sc = v;
1380 ohci_soft_itd_t *sitd, *sidone, *sitdnext;
1381 ohci_soft_td_t *std, *sdone, *stdnext;
1382 usbd_xfer_handle xfer;
1383 struct ohci_pipe *opipe;
1386 DPRINTFN(10,("ohci_softintr: enter\n"));
1388 sc->sc_bus.intr_context++;
1391 sdone = sc->sc_sdone;
1392 sc->sc_sdone = NULL;
1393 sidone = sc->sc_sidone;
1394 sc->sc_sidone = NULL;
1397 DPRINTFN(10,("ohci_softintr: sdone=%p sidone=%p\n", sdone, sidone));
1400 if (ohcidebug > 10) {
1401 DPRINTF(("ohci_process_done: TD done:\n"));
1402 ohci_dump_tds(sdone);
1406 for (std = sdone; std; std = stdnext) {
1408 stdnext = std->dnext;
1409 DPRINTFN(10, ("ohci_process_done: std=%p xfer=%p hcpriv=%p\n",
1410 std, xfer, (xfer ? xfer->hcpriv : NULL)));
1411 if (xfer == NULL || (std->flags & OHCI_TD_HANDLED)) {
1413 * xfer == NULL: There seems to be no xfer associated
1414 * with this TD. It is tailp that happened to end up on
1416 * flags & OHCI_TD_HANDLED: The TD has already been
1417 * handled by process_done and should not be done again.
1418 * Shouldn't happen, but some chips are broken(?).
1422 if (xfer->status == USBD_CANCELLED ||
1423 xfer->status == USBD_TIMEOUT) {
1424 DPRINTF(("ohci_process_done: cancel/timeout %p\n",
1426 /* Handled by abort routine. */
1429 usb_uncallout(xfer->timeout_handle, ohci_timeout, xfer);
1432 if (std->td.td_cbp != 0)
1433 len -= le32toh(std->td.td_be) -
1434 le32toh(std->td.td_cbp) + 1;
1435 DPRINTFN(10, ("ohci_process_done: len=%d, flags=0x%x\n", len,
1437 if (std->flags & OHCI_ADD_LEN)
1438 xfer->actlen += len;
1440 cc = OHCI_TD_GET_CC(le32toh(std->td.td_flags));
1441 if (cc == OHCI_CC_NO_ERROR) {
1442 if (std->flags & OHCI_CALL_DONE) {
1443 xfer->status = USBD_NORMAL_COMPLETION;
1445 usb_transfer_complete(xfer);
1448 ohci_free_std(sc, std);
1451 * Endpoint is halted. First unlink all the TDs
1452 * belonging to the failed transfer, and then restart
1455 ohci_soft_td_t *p, *n;
1456 opipe = (struct ohci_pipe *)xfer->pipe;
1458 DPRINTFN(15,("ohci_process_done: error cc=%d (%s)\n",
1459 OHCI_TD_GET_CC(le32toh(std->td.td_flags)),
1460 ohci_cc_strs[OHCI_TD_GET_CC(le32toh(std->td.td_flags))]));
1463 /* Mark all the TDs in the done queue for the current
1466 for (p = stdnext; p; p = p->dnext) {
1467 if (p->xfer == xfer)
1468 p->flags |= OHCI_TD_HANDLED;
1472 for (p = std; p->xfer == xfer; p = n) {
1474 ohci_free_std(sc, p);
1478 opipe->sed->ed.ed_headp = htole32(p->physaddr);
1479 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_CLF);
1481 if (cc == OHCI_CC_STALL)
1482 xfer->status = USBD_STALLED;
1484 xfer->status = USBD_IOERROR;
1486 usb_transfer_complete(xfer);
1492 if (ohcidebug > 10) {
1493 DPRINTF(("ohci_softintr: ITD done:\n"));
1494 ohci_dump_itds(sidone);
1498 for (sitd = sidone; sitd != NULL; sitd = sitdnext) {
1500 sitdnext = sitd->dnext;
1501 sitd->flags |= OHCI_ITD_INTFIN;
1502 DPRINTFN(1, ("ohci_process_done: sitd=%p xfer=%p hcpriv=%p\n",
1503 sitd, xfer, xfer ? xfer->hcpriv : 0));
1506 if (xfer->status == USBD_CANCELLED ||
1507 xfer->status == USBD_TIMEOUT) {
1508 DPRINTF(("ohci_process_done: cancel/timeout %p\n",
1510 /* Handled by abort routine. */
1514 if (xfer->pipe->aborting)
1515 continue; /*Ignore.*/
1518 printf("ohci_softintr: sitd=%p is done\n", sitd);
1521 opipe = (struct ohci_pipe *)xfer->pipe;
1522 if (opipe->aborting)
1525 cc = OHCI_ITD_GET_CC(le32toh(sitd->itd.itd_flags));
1526 if (cc == OHCI_CC_NO_ERROR) {
1527 /* XXX compute length for input */
1528 if (sitd->flags & OHCI_CALL_DONE) {
1529 opipe->u.iso.inuse -= xfer->nframes;
1530 /* XXX update frlengths with actual length */
1531 /* XXX xfer->actlen = actlen; */
1532 xfer->status = USBD_NORMAL_COMPLETION;
1534 usb_transfer_complete(xfer);
1539 xfer->status = USBD_IOERROR;
1541 usb_transfer_complete(xfer);
1546 #ifdef USB_USE_SOFTINTR
1547 if (sc->sc_softwake) {
1548 sc->sc_softwake = 0;
1549 wakeup(&sc->sc_softwake);
1551 #endif /* USB_USE_SOFTINTR */
1553 sc->sc_bus.intr_context--;
1554 DPRINTFN(10,("ohci_softintr: done:\n"));
1558 ohci_device_ctrl_done(usbd_xfer_handle xfer)
1560 DPRINTFN(10,("ohci_device_ctrl_done: xfer=%p\n", xfer));
1563 if (!(xfer->rqflags & URQ_REQUEST)) {
1564 panic("ohci_device_ctrl_done: not a request");
1567 xfer->hcpriv = NULL;
1571 ohci_device_intr_done(usbd_xfer_handle xfer)
1573 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe;
1574 ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus;
1575 ohci_soft_ed_t *sed = opipe->sed;
1576 ohci_soft_td_t *data, *tail;
1579 DPRINTFN(10,("ohci_device_intr_done: xfer=%p, actlen=%d\n",
1580 xfer, xfer->actlen));
1582 xfer->hcpriv = NULL;
1584 if (xfer->pipe->repeat) {
1585 data = opipe->tail.td;
1586 tail = ohci_alloc_std(sc); /* XXX should reuse TD */
1588 xfer->status = USBD_NOMEM;
1593 data->td.td_flags = htole32(
1594 OHCI_TD_IN | OHCI_TD_NOCC |
1595 OHCI_TD_SET_DI(1) | OHCI_TD_TOGGLE_CARRY);
1596 if (xfer->flags & USBD_SHORT_XFER_OK)
1597 data->td.td_flags |= htole32(OHCI_TD_R);
1598 data->td.td_cbp = htole32(DMAADDR(&xfer->dmabuf, 0));
1599 data->nexttd = tail;
1600 data->td.td_nexttd = htole32(tail->physaddr);
1601 data->td.td_be = htole32(le32toh(data->td.td_cbp) +
1603 data->len = xfer->length;
1605 data->flags = OHCI_CALL_DONE | OHCI_ADD_LEN;
1606 xfer->hcpriv = data;
1609 sed->ed.ed_tailp = htole32(tail->physaddr);
1610 opipe->tail.td = tail;
1615 ohci_device_bulk_done(usbd_xfer_handle xfer)
1617 DPRINTFN(10,("ohci_device_bulk_done: xfer=%p, actlen=%d\n",
1618 xfer, xfer->actlen));
1620 xfer->hcpriv = NULL;
1624 ohci_rhsc(ohci_softc_t *sc, usbd_xfer_handle xfer)
1626 usbd_pipe_handle pipe;
1631 hstatus = OREAD4(sc, OHCI_RH_STATUS);
1632 DPRINTF(("ohci_rhsc: sc=%p xfer=%p hstatus=0x%08x\n",
1633 sc, xfer, hstatus));
1636 /* Just ignore the change. */
1642 p = KERNADDR(&xfer->dmabuf, 0);
1643 m = min(sc->sc_noport, xfer->length * 8 - 1);
1644 memset(p, 0, xfer->length);
1645 for (i = 1; i <= m; i++) {
1646 /* Pick out CHANGE bits from the status reg. */
1647 if (OREAD4(sc, OHCI_RH_PORT_STATUS(i)) >> 16)
1648 p[i/8] |= 1 << (i%8);
1650 DPRINTF(("ohci_rhsc: change=0x%02x\n", *p));
1651 xfer->actlen = xfer->length;
1652 xfer->status = USBD_NORMAL_COMPLETION;
1654 usb_transfer_complete(xfer);
1658 ohci_root_intr_done(usbd_xfer_handle xfer)
1660 xfer->hcpriv = NULL;
1664 ohci_root_ctrl_done(usbd_xfer_handle xfer)
1666 xfer->hcpriv = NULL;
1670 * Wait here until controller claims to have an interrupt.
1671 * Then call ohci_intr and return. Use timeout to avoid waiting
1675 ohci_waitintr(ohci_softc_t *sc, usbd_xfer_handle xfer)
1677 int timo = xfer->timeout;
1681 xfer->status = USBD_IN_PROGRESS;
1682 for (usecs = timo * 1000000 / hz; usecs > 0; usecs -= 1000) {
1683 usb_delay_ms(&sc->sc_bus, 1);
1686 intrs = OREAD4(sc, OHCI_INTERRUPT_STATUS) & sc->sc_eintrs;
1687 DPRINTFN(15,("ohci_waitintr: 0x%04x\n", intrs));
1694 if (xfer->status != USBD_IN_PROGRESS)
1700 DPRINTF(("ohci_waitintr: timeout\n"));
1701 xfer->status = USBD_TIMEOUT;
1702 usb_transfer_complete(xfer);
1703 /* XXX should free TD */
1707 ohci_poll(struct usbd_bus *bus)
1709 ohci_softc_t *sc = (ohci_softc_t *)bus;
1713 new = OREAD4(sc, OHCI_INTERRUPT_STATUS);
1715 DPRINTFN(10,("ohci_poll: intrs=0x%04x\n", new));
1720 if (OREAD4(sc, OHCI_INTERRUPT_STATUS) & sc->sc_eintrs)
1725 ohci_device_request(usbd_xfer_handle xfer)
1727 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe;
1728 usb_device_request_t *req = &xfer->request;
1729 usbd_device_handle dev = opipe->pipe.device;
1730 ohci_softc_t *sc = (ohci_softc_t *)dev->bus;
1731 int addr = dev->address;
1732 ohci_soft_td_t *setup, *stat, *next, *tail;
1733 ohci_soft_ed_t *sed;
1738 isread = req->bmRequestType & UT_READ;
1739 len = UGETW(req->wLength);
1741 DPRINTFN(3,("ohci_device_control type=0x%02x, request=0x%02x, "
1742 "wValue=0x%04x, wIndex=0x%04x len=%d, addr=%d, endpt=%d\n",
1743 req->bmRequestType, req->bRequest, UGETW(req->wValue),
1744 UGETW(req->wIndex), len, addr,
1745 opipe->pipe.endpoint->edesc->bEndpointAddress));
1747 setup = opipe->tail.td;
1748 stat = ohci_alloc_std(sc);
1753 tail = ohci_alloc_std(sc);
1761 opipe->u.ctl.length = len;
1763 /* Update device address and length since they may have changed
1764 during the setup of the control pipe in usbd_new_device(). */
1765 /* XXX This only needs to be done once, but it's too early in open. */
1766 /* XXXX Should not touch ED here! */
1767 sed->ed.ed_flags = htole32(
1768 (le32toh(sed->ed.ed_flags) & ~(OHCI_ED_ADDRMASK | OHCI_ED_MAXPMASK)) |
1769 OHCI_ED_SET_FA(addr) |
1770 OHCI_ED_SET_MAXP(UGETW(opipe->pipe.endpoint->edesc->wMaxPacketSize)));
1774 /* Set up data transaction */
1776 ohci_soft_td_t *std = stat;
1778 err = ohci_alloc_std_chain(opipe, sc, len, isread, xfer,
1780 stat = stat->nexttd; /* point at free TD */
1783 /* Start toggle at 1 and then use the carried toggle. */
1784 std->td.td_flags &= htole32(~OHCI_TD_TOGGLE_MASK);
1785 std->td.td_flags |= htole32(OHCI_TD_TOGGLE_1);
1788 memcpy(KERNADDR(&opipe->u.ctl.reqdma, 0), req, sizeof *req);
1790 setup->td.td_flags = htole32(OHCI_TD_SETUP | OHCI_TD_NOCC |
1791 OHCI_TD_TOGGLE_0 | OHCI_TD_NOINTR);
1792 setup->td.td_cbp = htole32(DMAADDR(&opipe->u.ctl.reqdma, 0));
1793 setup->nexttd = next;
1794 setup->td.td_nexttd = htole32(next->physaddr);
1795 setup->td.td_be = htole32(le32toh(setup->td.td_cbp) + sizeof *req - 1);
1799 xfer->hcpriv = setup;
1801 stat->td.td_flags = htole32(
1802 (isread ? OHCI_TD_OUT : OHCI_TD_IN) |
1803 OHCI_TD_NOCC | OHCI_TD_TOGGLE_1 | OHCI_TD_SET_DI(1));
1804 stat->td.td_cbp = 0;
1805 stat->nexttd = tail;
1806 stat->td.td_nexttd = htole32(tail->physaddr);
1808 stat->flags = OHCI_CALL_DONE;
1813 if (ohcidebug > 5) {
1814 DPRINTF(("ohci_device_request:\n"));
1816 ohci_dump_tds(setup);
1820 /* Insert ED in schedule */
1822 sed->ed.ed_tailp = htole32(tail->physaddr);
1823 opipe->tail.td = tail;
1824 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_CLF);
1825 if (xfer->timeout && !sc->sc_bus.use_polling) {
1826 usb_callout(xfer->timeout_handle, MS_TO_TICKS(xfer->timeout),
1827 ohci_timeout, xfer);
1832 if (ohcidebug > 20) {
1834 DPRINTF(("ohci_device_request: status=%x\n",
1835 OREAD4(sc, OHCI_COMMAND_STATUS)));
1837 printf("ctrl head:\n");
1838 ohci_dump_ed(sc->sc_ctrl_head);
1841 ohci_dump_tds(setup);
1845 return (USBD_NORMAL_COMPLETION);
1848 ohci_free_std(sc, tail);
1850 ohci_free_std(sc, stat);
1856 * Add an ED to the schedule. Called from a critical section.
1859 ohci_add_ed(ohci_soft_ed_t *sed, ohci_soft_ed_t *head)
1861 DPRINTFN(8,("ohci_add_ed: sed=%p head=%p\n", sed, head));
1863 sed->next = head->next;
1864 sed->ed.ed_nexted = head->ed.ed_nexted;
1866 head->ed.ed_nexted = htole32(sed->physaddr);
1870 * Remove an ED from the schedule. Called from a critical section.
1873 ohci_rem_ed(ohci_soft_ed_t *sed, ohci_soft_ed_t *head)
1879 for (p = head; p != NULL && p->next != sed; p = p->next)
1882 panic("ohci_rem_ed: ED not found");
1883 p->next = sed->next;
1884 p->ed.ed_nexted = sed->ed.ed_nexted;
1888 * When a transfer is completed the TD is added to the done queue by
1889 * the host controller. This queue is the processed by software.
1890 * Unfortunately the queue contains the physical address of the TD
1891 * and we have no simple way to translate this back to a kernel address.
1892 * To make the translation possible (and fast) we use a hash table of
1893 * TDs currently in the schedule. The physical address is used as the
1897 #define HASH(a) (((a) >> 4) % OHCI_HASH_SIZE)
1899 * Called from a critical section
1902 ohci_hash_add_td(ohci_softc_t *sc, ohci_soft_td_t *std)
1904 int h = HASH(std->physaddr);
1906 LIST_INSERT_HEAD(&sc->sc_hash_tds[h], std, hnext);
1910 * Called from a critical section
1913 ohci_hash_rem_td(ohci_softc_t *sc, ohci_soft_td_t *std)
1915 LIST_REMOVE(std, hnext);
1919 ohci_hash_find_td(ohci_softc_t *sc, ohci_physaddr_t a)
1922 ohci_soft_td_t *std;
1924 /* if these are present they should be masked out at an earlier
1927 KASSERT((a&~OHCI_HEADMASK) == 0, ("%s: 0x%b has lower bits set\n",
1928 USBDEVNAME(sc->sc_bus.bdev),
1929 (int) a, "\20\1HALT\2TOGGLE"));
1931 for (std = LIST_FIRST(&sc->sc_hash_tds[h]);
1933 std = LIST_NEXT(std, hnext))
1934 if (std->physaddr == a)
1937 DPRINTF(("%s: ohci_hash_find_td: addr 0x%08lx not found\n",
1938 USBDEVNAME(sc->sc_bus.bdev), (u_long) a));
1943 * Called from a critical section
1946 ohci_hash_add_itd(ohci_softc_t *sc, ohci_soft_itd_t *sitd)
1948 int h = HASH(sitd->physaddr);
1950 DPRINTFN(10,("ohci_hash_add_itd: sitd=%p physaddr=0x%08lx\n",
1951 sitd, (u_long)sitd->physaddr));
1953 LIST_INSERT_HEAD(&sc->sc_hash_itds[h], sitd, hnext);
1957 * Called from a critical section
1960 ohci_hash_rem_itd(ohci_softc_t *sc, ohci_soft_itd_t *sitd)
1962 DPRINTFN(10,("ohci_hash_rem_itd: sitd=%p physaddr=0x%08lx\n",
1963 sitd, (u_long)sitd->physaddr));
1965 LIST_REMOVE(sitd, hnext);
1969 ohci_hash_find_itd(ohci_softc_t *sc, ohci_physaddr_t a)
1972 ohci_soft_itd_t *sitd;
1974 for (sitd = LIST_FIRST(&sc->sc_hash_itds[h]);
1976 sitd = LIST_NEXT(sitd, hnext))
1977 if (sitd->physaddr == a)
1983 ohci_timeout(void *addr)
1985 struct ohci_xfer *oxfer = addr;
1986 struct ohci_pipe *opipe = (struct ohci_pipe *)oxfer->xfer.pipe;
1987 ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus;
1989 DPRINTF(("ohci_timeout: oxfer=%p\n", oxfer));
1992 ohci_abort_xfer(&oxfer->xfer, USBD_TIMEOUT);
1996 /* Execute the abort in a process context. */
1997 usb_init_task(&oxfer->abort_task, ohci_timeout_task, addr);
1998 usb_add_task(oxfer->xfer.pipe->device, &oxfer->abort_task);
2002 ohci_timeout_task(void *addr)
2004 usbd_xfer_handle xfer = addr;
2006 DPRINTF(("ohci_timeout_task: xfer=%p\n", xfer));
2009 ohci_abort_xfer(xfer, USBD_TIMEOUT);
2015 ohci_dump_tds(ohci_soft_td_t *std)
2017 for (; std; std = std->nexttd)
2022 ohci_dump_td(ohci_soft_td_t *std)
2026 bitmask_snprintf((u_int32_t)le32toh(std->td.td_flags),
2027 "\20\23R\24OUT\25IN\31TOG1\32SETTOGGLE",
2028 sbuf, sizeof(sbuf));
2030 printf("TD(%p) at %08lx: %s delay=%d ec=%d cc=%d\ncbp=0x%08lx "
2031 "nexttd=0x%08lx be=0x%08lx\n",
2032 std, (u_long)std->physaddr, sbuf,
2033 OHCI_TD_GET_DI(le32toh(std->td.td_flags)),
2034 OHCI_TD_GET_EC(le32toh(std->td.td_flags)),
2035 OHCI_TD_GET_CC(le32toh(std->td.td_flags)),
2036 (u_long)le32toh(std->td.td_cbp),
2037 (u_long)le32toh(std->td.td_nexttd),
2038 (u_long)le32toh(std->td.td_be));
2042 ohci_dump_itd(ohci_soft_itd_t *sitd)
2046 printf("ITD(%p) at %08lx: sf=%d di=%d fc=%d cc=%d\n"
2047 "bp0=0x%08lx next=0x%08lx be=0x%08lx\n",
2048 sitd, (u_long)sitd->physaddr,
2049 OHCI_ITD_GET_SF(le32toh(sitd->itd.itd_flags)),
2050 OHCI_ITD_GET_DI(le32toh(sitd->itd.itd_flags)),
2051 OHCI_ITD_GET_FC(le32toh(sitd->itd.itd_flags)),
2052 OHCI_ITD_GET_CC(le32toh(sitd->itd.itd_flags)),
2053 (u_long)le32toh(sitd->itd.itd_bp0),
2054 (u_long)le32toh(sitd->itd.itd_nextitd),
2055 (u_long)le32toh(sitd->itd.itd_be));
2056 for (i = 0; i < OHCI_ITD_NOFFSET; i++)
2057 printf("offs[%d]=0x%04x ", i,
2058 (u_int)le16toh(sitd->itd.itd_offset[i]));
2063 ohci_dump_itds(ohci_soft_itd_t *sitd)
2065 for (; sitd; sitd = sitd->nextitd)
2066 ohci_dump_itd(sitd);
2070 ohci_dump_ed(ohci_soft_ed_t *sed)
2072 char sbuf[128], sbuf2[128];
2074 bitmask_snprintf((u_int32_t)le32toh(sed->ed.ed_flags),
2075 "\20\14OUT\15IN\16LOWSPEED\17SKIP\20ISO",
2076 sbuf, sizeof(sbuf));
2077 bitmask_snprintf((u_int32_t)le32toh(sed->ed.ed_headp),
2078 "\20\1HALT\2CARRY", sbuf2, sizeof(sbuf2));
2080 printf("ED(%p) at 0x%08lx: addr=%d endpt=%d maxp=%d flags=%s\ntailp=0x%08lx "
2081 "headflags=%s headp=0x%08lx nexted=0x%08lx\n",
2082 sed, (u_long)sed->physaddr,
2083 OHCI_ED_GET_FA(le32toh(sed->ed.ed_flags)),
2084 OHCI_ED_GET_EN(le32toh(sed->ed.ed_flags)),
2085 OHCI_ED_GET_MAXP(le32toh(sed->ed.ed_flags)), sbuf,
2086 (u_long)le32toh(sed->ed.ed_tailp), sbuf2,
2087 (u_long)le32toh(sed->ed.ed_headp),
2088 (u_long)le32toh(sed->ed.ed_nexted));
2093 ohci_open(usbd_pipe_handle pipe)
2095 usbd_device_handle dev = pipe->device;
2096 ohci_softc_t *sc = (ohci_softc_t *)dev->bus;
2097 usb_endpoint_descriptor_t *ed = pipe->endpoint->edesc;
2098 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe;
2099 u_int8_t addr = dev->address;
2100 u_int8_t xfertype = ed->bmAttributes & UE_XFERTYPE;
2101 ohci_soft_ed_t *sed;
2102 ohci_soft_td_t *std;
2103 ohci_soft_itd_t *sitd;
2104 ohci_physaddr_t tdphys;
2109 DPRINTFN(1, ("ohci_open: pipe=%p, addr=%d, endpt=%d (%d)\n",
2110 pipe, addr, ed->bEndpointAddress, sc->sc_addr));
2113 return (USBD_IOERROR);
2118 if (addr == sc->sc_addr) {
2119 switch (ed->bEndpointAddress) {
2120 case USB_CONTROL_ENDPOINT:
2121 pipe->methods = &ohci_root_ctrl_methods;
2123 case UE_DIR_IN | OHCI_INTR_ENDPT:
2124 pipe->methods = &ohci_root_intr_methods;
2127 return (USBD_INVAL);
2130 sed = ohci_alloc_sed(sc);
2134 if (xfertype == UE_ISOCHRONOUS) {
2135 sitd = ohci_alloc_sitd(sc);
2138 opipe->tail.itd = sitd;
2139 opipe->aborting = 0;
2140 tdphys = sitd->physaddr;
2141 fmt = OHCI_ED_FORMAT_ISO;
2142 if (UE_GET_DIR(ed->bEndpointAddress) == UE_DIR_IN)
2143 fmt |= OHCI_ED_DIR_IN;
2145 fmt |= OHCI_ED_DIR_OUT;
2147 std = ohci_alloc_std(sc);
2150 opipe->tail.td = std;
2151 tdphys = std->physaddr;
2152 fmt = OHCI_ED_FORMAT_GEN | OHCI_ED_DIR_TD;
2154 sed->ed.ed_flags = htole32(
2155 OHCI_ED_SET_FA(addr) |
2156 OHCI_ED_SET_EN(UE_GET_ADDR(ed->bEndpointAddress)) |
2157 (dev->speed == USB_SPEED_LOW ? OHCI_ED_SPEED : 0) |
2159 OHCI_ED_SET_MAXP(UGETW(ed->wMaxPacketSize)));
2160 sed->ed.ed_headp = sed->ed.ed_tailp = htole32(tdphys);
2164 pipe->methods = &ohci_device_ctrl_methods;
2165 err = usb_allocmem(&sc->sc_bus,
2166 sizeof(usb_device_request_t),
2167 0, &opipe->u.ctl.reqdma);
2171 ohci_add_ed(sed, sc->sc_ctrl_head);
2175 pipe->methods = &ohci_device_intr_methods;
2176 ival = pipe->interval;
2177 if (ival == USBD_DEFAULT_INTERVAL)
2178 ival = ed->bInterval;
2179 return (ohci_device_setintr(sc, opipe, ival));
2180 case UE_ISOCHRONOUS:
2181 pipe->methods = &ohci_device_isoc_methods;
2182 return (ohci_setup_isoc(pipe));
2184 pipe->methods = &ohci_device_bulk_methods;
2186 ohci_add_ed(sed, sc->sc_bulk_head);
2191 return (USBD_NORMAL_COMPLETION);
2195 ohci_free_std(sc, std);
2198 ohci_free_sed(sc, sed);
2200 return (USBD_NOMEM);
2205 * Close a reqular pipe.
2206 * Assumes that there are no pending transactions.
2209 ohci_close_pipe(usbd_pipe_handle pipe, ohci_soft_ed_t *head)
2211 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe;
2212 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus;
2213 ohci_soft_ed_t *sed = opipe->sed;
2217 sed->ed.ed_flags |= htole32(OHCI_ED_SKIP);
2218 if ((le32toh(sed->ed.ed_tailp) & OHCI_HEADMASK) !=
2219 (le32toh(sed->ed.ed_headp) & OHCI_HEADMASK)) {
2220 ohci_soft_td_t *std;
2221 std = ohci_hash_find_td(sc, le32toh(sed->ed.ed_headp));
2222 printf("ohci_close_pipe: pipe not empty sed=%p hd=0x%x "
2223 "tl=0x%x pipe=%p, std=%p\n", sed,
2224 (int)le32toh(sed->ed.ed_headp),
2225 (int)le32toh(sed->ed.ed_tailp),
2228 usbd_dump_pipe(&opipe->pipe);
2235 usb_delay_ms(&sc->sc_bus, 2);
2236 if ((le32toh(sed->ed.ed_tailp) & OHCI_HEADMASK) !=
2237 (le32toh(sed->ed.ed_headp) & OHCI_HEADMASK))
2238 printf("ohci_close_pipe: pipe still not empty\n");
2241 ohci_rem_ed(sed, head);
2242 /* Make sure the host controller is not touching this ED */
2243 usb_delay_ms(&sc->sc_bus, 1);
2245 ohci_free_sed(sc, opipe->sed);
2249 * Abort a device request.
2250 * If this routine is called from a critical section it guarantees that
2251 * the request will be removed from the hardware scheduling and that
2252 * the callback for it will be called with USBD_CANCELLED status.
2253 * It's impossible to guarantee that the requested transfer will not
2254 * have happened since the hardware runs concurrently.
2255 * If the transaction has already happened we rely on the ordinary
2256 * interrupt processing to process it.
2259 ohci_abort_xfer(usbd_xfer_handle xfer, usbd_status status)
2261 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe;
2262 ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus;
2263 ohci_soft_ed_t *sed = opipe->sed;
2264 ohci_soft_td_t *p, *n;
2265 ohci_physaddr_t headp;
2268 DPRINTF(("ohci_abort_xfer: xfer=%p pipe=%p sed=%p\n", xfer, opipe,sed));
2271 /* If we're dying, just do the software part. */
2273 xfer->status = status; /* make software ignore it */
2274 usb_uncallout(xfer->timeout_handle, ohci_timeout, xfer);
2275 usb_transfer_complete(xfer);
2280 if (xfer->device->bus->intr_context /* || !curproc REMOVED DFly */)
2281 panic("ohci_abort_xfer: not in process context");
2284 * Step 1: Make interrupt routine and hardware ignore xfer.
2287 xfer->status = status; /* make software ignore it */
2288 usb_uncallout(xfer->timeout_handle, ohci_timeout, xfer);
2290 DPRINTFN(1,("ohci_abort_xfer: stop ed=%p\n", sed));
2291 sed->ed.ed_flags |= htole32(OHCI_ED_SKIP); /* force hardware skip */
2294 * Step 2: Wait until we know hardware has finished any possible
2295 * use of the xfer. Also make sure the soft interrupt routine
2298 usb_delay_ms(opipe->pipe.device->bus, 20); /* Hardware finishes in 1ms */
2300 #ifdef USB_USE_SOFTINTR
2301 sc->sc_softwake = 1;
2302 #endif /* USB_USE_SOFTINTR */
2303 usb_schedsoftintr(&sc->sc_bus);
2304 #ifdef USB_USE_SOFTINTR
2305 tsleep(&sc->sc_softwake, 0, "ohciab", 0);
2306 #endif /* USB_USE_SOFTINTR */
2310 * Step 3: Remove any vestiges of the xfer from the hardware.
2311 * The complication here is that the hardware may have executed
2312 * beyond the xfer we're trying to abort. So as we're scanning
2313 * the TDs of this xfer we check if the hardware points to
2321 printf("ohci_abort_xfer: hcpriv is NULL\n");
2326 if (ohcidebug > 1) {
2327 DPRINTF(("ohci_abort_xfer: sed=\n"));
2332 headp = le32toh(sed->ed.ed_headp) & OHCI_HEADMASK;
2334 for (; p->xfer == xfer; p = n) {
2335 hit |= headp == p->physaddr;
2337 ohci_free_std(sc, p);
2339 /* Zap headp register if hardware pointed inside the xfer. */
2341 DPRINTFN(1,("ohci_abort_xfer: set hd=0x%08x, tl=0x%08x\n",
2342 (int)p->physaddr, (int)le32toh(sed->ed.ed_tailp)));
2343 sed->ed.ed_headp = htole32(p->physaddr); /* unlink TDs */
2345 DPRINTFN(1,("ohci_abort_xfer: no hit\n"));
2349 * Step 4: Turn on hardware again.
2351 sed->ed.ed_flags &= htole32(~OHCI_ED_SKIP); /* remove hardware skip */
2354 * Step 5: Execute callback.
2356 usb_transfer_complete(xfer);
2362 * Data structures and routines to emulate the root hub.
2364 Static usb_device_descriptor_t ohci_devd = {
2365 USB_DEVICE_DESCRIPTOR_SIZE,
2366 UDESC_DEVICE, /* type */
2367 {0x00, 0x01}, /* USB version */
2368 UDCLASS_HUB, /* class */
2369 UDSUBCLASS_HUB, /* subclass */
2370 UDPROTO_FSHUB, /* protocol */
2371 64, /* max packet */
2372 {0},{0},{0x00,0x01}, /* device id */
2373 1,2,0, /* string indicies */
2374 1 /* # of configurations */
2377 Static usb_config_descriptor_t ohci_confd = {
2378 USB_CONFIG_DESCRIPTOR_SIZE,
2380 {USB_CONFIG_DESCRIPTOR_SIZE +
2381 USB_INTERFACE_DESCRIPTOR_SIZE +
2382 USB_ENDPOINT_DESCRIPTOR_SIZE},
2390 Static usb_interface_descriptor_t ohci_ifcd = {
2391 USB_INTERFACE_DESCRIPTOR_SIZE,
2402 Static usb_endpoint_descriptor_t ohci_endpd = {
2403 USB_ENDPOINT_DESCRIPTOR_SIZE,
2405 UE_DIR_IN | OHCI_INTR_ENDPT,
2407 {8, 0}, /* max packet */
2411 Static usb_hub_descriptor_t ohci_hubd = {
2412 USB_HUB_DESCRIPTOR_SIZE,
2422 ohci_str(usb_string_descriptor_t *p, int l, const char *s)
2428 p->bLength = 2 * strlen(s) + 2;
2431 p->bDescriptorType = UDESC_STRING;
2433 for (i = 0; s[i] && l > 1; i++, l -= 2)
2434 USETW2(p->bString[i], 0, s[i]);
2439 * Simulate a hardware hub by handling all the necessary requests.
2442 ohci_root_ctrl_transfer(usbd_xfer_handle xfer)
2446 /* Insert last in queue. */
2447 err = usb_insert_transfer(xfer);
2451 /* Pipe isn't running, start first */
2452 return (ohci_root_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue)));
2456 ohci_root_ctrl_start(usbd_xfer_handle xfer)
2458 ohci_softc_t *sc = (ohci_softc_t *)xfer->pipe->device->bus;
2459 usb_device_request_t *req;
2462 int len, value, index, l, totlen = 0;
2463 usb_port_status_t ps;
2464 usb_hub_descriptor_t hubd;
2469 return (USBD_IOERROR);
2472 if (!(xfer->rqflags & URQ_REQUEST))
2474 return (USBD_INVAL);
2476 req = &xfer->request;
2478 DPRINTFN(4,("ohci_root_ctrl_control type=0x%02x request=%02x\n",
2479 req->bmRequestType, req->bRequest));
2481 len = UGETW(req->wLength);
2482 value = UGETW(req->wValue);
2483 index = UGETW(req->wIndex);
2486 buf = KERNADDR(&xfer->dmabuf, 0);
2488 #define C(x,y) ((x) | ((y) << 8))
2489 switch(C(req->bRequest, req->bmRequestType)) {
2490 case C(UR_CLEAR_FEATURE, UT_WRITE_DEVICE):
2491 case C(UR_CLEAR_FEATURE, UT_WRITE_INTERFACE):
2492 case C(UR_CLEAR_FEATURE, UT_WRITE_ENDPOINT):
2494 * DEVICE_REMOTE_WAKEUP and ENDPOINT_HALT are no-ops
2495 * for the integrated root hub.
2498 case C(UR_GET_CONFIG, UT_READ_DEVICE):
2500 *(u_int8_t *)buf = sc->sc_conf;
2504 case C(UR_GET_DESCRIPTOR, UT_READ_DEVICE):
2505 DPRINTFN(8,("ohci_root_ctrl_control wValue=0x%04x\n", value));
2506 switch(value >> 8) {
2508 if ((value & 0xff) != 0) {
2512 totlen = l = min(len, USB_DEVICE_DESCRIPTOR_SIZE);
2513 USETW(ohci_devd.idVendor, sc->sc_id_vendor);
2514 memcpy(buf, &ohci_devd, l);
2517 if ((value & 0xff) != 0) {
2521 totlen = l = min(len, USB_CONFIG_DESCRIPTOR_SIZE);
2522 memcpy(buf, &ohci_confd, l);
2523 buf = (char *)buf + l;
2525 l = min(len, USB_INTERFACE_DESCRIPTOR_SIZE);
2527 memcpy(buf, &ohci_ifcd, l);
2528 buf = (char *)buf + l;
2530 l = min(len, USB_ENDPOINT_DESCRIPTOR_SIZE);
2532 memcpy(buf, &ohci_endpd, l);
2537 *(u_int8_t *)buf = 0;
2539 switch (value & 0xff) {
2540 case 1: /* Vendor */
2541 totlen = ohci_str(buf, len, sc->sc_vendor);
2543 case 2: /* Product */
2544 totlen = ohci_str(buf, len, "OHCI root hub");
2553 case C(UR_GET_INTERFACE, UT_READ_INTERFACE):
2555 *(u_int8_t *)buf = 0;
2559 case C(UR_GET_STATUS, UT_READ_DEVICE):
2561 USETW(((usb_status_t *)buf)->wStatus,UDS_SELF_POWERED);
2565 case C(UR_GET_STATUS, UT_READ_INTERFACE):
2566 case C(UR_GET_STATUS, UT_READ_ENDPOINT):
2568 USETW(((usb_status_t *)buf)->wStatus, 0);
2572 case C(UR_SET_ADDRESS, UT_WRITE_DEVICE):
2573 if (value >= USB_MAX_DEVICES) {
2577 sc->sc_addr = value;
2579 case C(UR_SET_CONFIG, UT_WRITE_DEVICE):
2580 if (value != 0 && value != 1) {
2584 sc->sc_conf = value;
2586 case C(UR_SET_DESCRIPTOR, UT_WRITE_DEVICE):
2588 case C(UR_SET_FEATURE, UT_WRITE_DEVICE):
2589 case C(UR_SET_FEATURE, UT_WRITE_INTERFACE):
2590 case C(UR_SET_FEATURE, UT_WRITE_ENDPOINT):
2593 case C(UR_SET_INTERFACE, UT_WRITE_INTERFACE):
2595 case C(UR_SYNCH_FRAME, UT_WRITE_ENDPOINT):
2598 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_DEVICE):
2600 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_OTHER):
2601 DPRINTFN(8, ("ohci_root_ctrl_control: UR_CLEAR_PORT_FEATURE "
2602 "port=%d feature=%d\n",
2604 if (index < 1 || index > sc->sc_noport) {
2608 port = OHCI_RH_PORT_STATUS(index);
2610 case UHF_PORT_ENABLE:
2611 OWRITE4(sc, port, UPS_CURRENT_CONNECT_STATUS);
2613 case UHF_PORT_SUSPEND:
2614 OWRITE4(sc, port, UPS_OVERCURRENT_INDICATOR);
2616 case UHF_PORT_POWER:
2617 /* Yes, writing to the LOW_SPEED bit clears power. */
2618 OWRITE4(sc, port, UPS_LOW_SPEED);
2620 case UHF_C_PORT_CONNECTION:
2621 OWRITE4(sc, port, UPS_C_CONNECT_STATUS << 16);
2623 case UHF_C_PORT_ENABLE:
2624 OWRITE4(sc, port, UPS_C_PORT_ENABLED << 16);
2626 case UHF_C_PORT_SUSPEND:
2627 OWRITE4(sc, port, UPS_C_SUSPEND << 16);
2629 case UHF_C_PORT_OVER_CURRENT:
2630 OWRITE4(sc, port, UPS_C_OVERCURRENT_INDICATOR << 16);
2632 case UHF_C_PORT_RESET:
2633 OWRITE4(sc, port, UPS_C_PORT_RESET << 16);
2640 case UHF_C_PORT_CONNECTION:
2641 case UHF_C_PORT_ENABLE:
2642 case UHF_C_PORT_SUSPEND:
2643 case UHF_C_PORT_OVER_CURRENT:
2644 case UHF_C_PORT_RESET:
2645 /* Enable RHSC interrupt if condition is cleared. */
2646 if ((OREAD4(sc, port) >> 16) == 0)
2647 ohci_rhsc_able(sc, 1);
2653 case C(UR_GET_DESCRIPTOR, UT_READ_CLASS_DEVICE):
2654 if ((value & 0xff) != 0) {
2658 v = OREAD4(sc, OHCI_RH_DESCRIPTOR_A);
2660 hubd.bNbrPorts = sc->sc_noport;
2661 USETW(hubd.wHubCharacteristics,
2662 (v & OHCI_NPS ? UHD_PWR_NO_SWITCH :
2663 v & OHCI_PSM ? UHD_PWR_GANGED : UHD_PWR_INDIVIDUAL)
2664 /* XXX overcurrent */
2666 hubd.bPwrOn2PwrGood = OHCI_GET_POTPGT(v);
2667 v = OREAD4(sc, OHCI_RH_DESCRIPTOR_B);
2668 for (i = 0, l = sc->sc_noport; l > 0; i++, l -= 8, v >>= 8)
2669 hubd.DeviceRemovable[i++] = (u_int8_t)v;
2670 hubd.bDescLength = USB_HUB_DESCRIPTOR_SIZE + i;
2671 l = min(len, hubd.bDescLength);
2673 memcpy(buf, &hubd, l);
2675 case C(UR_GET_STATUS, UT_READ_CLASS_DEVICE):
2680 memset(buf, 0, len); /* ? XXX */
2683 case C(UR_GET_STATUS, UT_READ_CLASS_OTHER):
2684 DPRINTFN(8,("ohci_root_ctrl_transfer: get port status i=%d\n",
2686 if (index < 1 || index > sc->sc_noport) {
2694 v = OREAD4(sc, OHCI_RH_PORT_STATUS(index));
2695 DPRINTFN(8,("ohci_root_ctrl_transfer: port status=0x%04x\n",
2697 USETW(ps.wPortStatus, v);
2698 USETW(ps.wPortChange, v >> 16);
2699 l = min(len, sizeof ps);
2700 memcpy(buf, &ps, l);
2703 case C(UR_SET_DESCRIPTOR, UT_WRITE_CLASS_DEVICE):
2706 case C(UR_SET_FEATURE, UT_WRITE_CLASS_DEVICE):
2708 case C(UR_SET_FEATURE, UT_WRITE_CLASS_OTHER):
2709 if (index < 1 || index > sc->sc_noport) {
2713 port = OHCI_RH_PORT_STATUS(index);
2715 case UHF_PORT_ENABLE:
2716 OWRITE4(sc, port, UPS_PORT_ENABLED);
2718 case UHF_PORT_SUSPEND:
2719 OWRITE4(sc, port, UPS_SUSPEND);
2721 case UHF_PORT_RESET:
2722 DPRINTFN(5,("ohci_root_ctrl_transfer: reset port %d\n",
2724 OWRITE4(sc, port, UPS_RESET);
2725 for (i = 0; i < 5; i++) {
2726 usb_delay_ms(&sc->sc_bus,
2727 USB_PORT_ROOT_RESET_DELAY);
2732 if ((OREAD4(sc, port) & UPS_RESET) == 0)
2735 DPRINTFN(8,("ohci port %d reset, status = 0x%04x\n",
2736 index, OREAD4(sc, port)));
2738 case UHF_PORT_POWER:
2739 DPRINTFN(2,("ohci_root_ctrl_transfer: set port power "
2741 OWRITE4(sc, port, UPS_PORT_POWER);
2752 xfer->actlen = totlen;
2753 err = USBD_NORMAL_COMPLETION;
2757 usb_transfer_complete(xfer);
2759 return (USBD_IN_PROGRESS);
2762 /* Abort a root control request. */
2764 ohci_root_ctrl_abort(usbd_xfer_handle xfer)
2766 /* Nothing to do, all transfers are synchronous. */
2769 /* Close the root pipe. */
2771 ohci_root_ctrl_close(usbd_pipe_handle pipe)
2773 DPRINTF(("ohci_root_ctrl_close\n"));
2774 /* Nothing to do. */
2778 ohci_root_intr_transfer(usbd_xfer_handle xfer)
2782 /* Insert last in queue. */
2783 err = usb_insert_transfer(xfer);
2787 /* Pipe isn't running, start first */
2788 return (ohci_root_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue)));
2792 ohci_root_intr_start(usbd_xfer_handle xfer)
2794 usbd_pipe_handle pipe = xfer->pipe;
2795 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus;
2798 return (USBD_IOERROR);
2800 sc->sc_intrxfer = xfer;
2802 return (USBD_IN_PROGRESS);
2805 /* Abort a root interrupt request. */
2807 ohci_root_intr_abort(usbd_xfer_handle xfer)
2809 if (xfer->pipe->intrxfer == xfer) {
2810 DPRINTF(("ohci_root_intr_abort: remove\n"));
2811 xfer->pipe->intrxfer = NULL;
2813 xfer->status = USBD_CANCELLED;
2815 usb_transfer_complete(xfer);
2819 /* Close the root pipe. */
2821 ohci_root_intr_close(usbd_pipe_handle pipe)
2823 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus;
2825 DPRINTF(("ohci_root_intr_close\n"));
2827 sc->sc_intrxfer = NULL;
2830 /************************/
2833 ohci_device_ctrl_transfer(usbd_xfer_handle xfer)
2837 /* Insert last in queue. */
2838 err = usb_insert_transfer(xfer);
2842 /* Pipe isn't running, start first */
2843 return (ohci_device_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue)));
2847 ohci_device_ctrl_start(usbd_xfer_handle xfer)
2849 ohci_softc_t *sc = (ohci_softc_t *)xfer->pipe->device->bus;
2853 return (USBD_IOERROR);
2856 if (!(xfer->rqflags & URQ_REQUEST)) {
2858 printf("ohci_device_ctrl_transfer: not a request\n");
2859 return (USBD_INVAL);
2863 err = ohci_device_request(xfer);
2867 if (sc->sc_bus.use_polling)
2868 ohci_waitintr(sc, xfer);
2869 return (USBD_IN_PROGRESS);
2872 /* Abort a device control request. */
2874 ohci_device_ctrl_abort(usbd_xfer_handle xfer)
2876 DPRINTF(("ohci_device_ctrl_abort: xfer=%p\n", xfer));
2877 ohci_abort_xfer(xfer, USBD_CANCELLED);
2880 /* Close a device control pipe. */
2882 ohci_device_ctrl_close(usbd_pipe_handle pipe)
2884 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe;
2885 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus;
2887 DPRINTF(("ohci_device_ctrl_close: pipe=%p\n", pipe));
2888 ohci_close_pipe(pipe, sc->sc_ctrl_head);
2889 ohci_free_std(sc, opipe->tail.td);
2892 /************************/
2895 ohci_device_clear_toggle(usbd_pipe_handle pipe)
2897 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe;
2899 opipe->sed->ed.ed_headp &= htole32(~OHCI_TOGGLECARRY);
2903 ohci_noop(usbd_pipe_handle pipe)
2908 ohci_device_bulk_transfer(usbd_xfer_handle xfer)
2912 /* Insert last in queue. */
2913 err = usb_insert_transfer(xfer);
2917 /* Pipe isn't running, start first */
2918 return (ohci_device_bulk_start(SIMPLEQ_FIRST(&xfer->pipe->queue)));
2922 ohci_device_bulk_start(usbd_xfer_handle xfer)
2924 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe;
2925 usbd_device_handle dev = opipe->pipe.device;
2926 ohci_softc_t *sc = (ohci_softc_t *)dev->bus;
2927 int addr = dev->address;
2928 ohci_soft_td_t *data, *tail, *tdp;
2929 ohci_soft_ed_t *sed;
2930 int len, isread, endpt;
2934 return (USBD_IOERROR);
2937 if (xfer->rqflags & URQ_REQUEST) {
2939 printf("ohci_device_bulk_start: a request\n");
2940 return (USBD_INVAL);
2945 endpt = xfer->pipe->endpoint->edesc->bEndpointAddress;
2946 isread = UE_GET_DIR(endpt) == UE_DIR_IN;
2949 DPRINTFN(4,("ohci_device_bulk_start: xfer=%p len=%d isread=%d "
2950 "flags=%d endpt=%d\n", xfer, len, isread, xfer->flags,
2953 opipe->u.bulk.isread = isread;
2954 opipe->u.bulk.length = len;
2956 /* Update device address */
2957 sed->ed.ed_flags = htole32(
2958 (le32toh(sed->ed.ed_flags) & ~OHCI_ED_ADDRMASK) |
2959 OHCI_ED_SET_FA(addr));
2961 /* Allocate a chain of new TDs (including a new tail). */
2962 data = opipe->tail.td;
2963 err = ohci_alloc_std_chain(opipe, sc, len, isread, xfer,
2965 /* We want interrupt at the end of the transfer. */
2966 tail->td.td_flags &= htole32(~OHCI_TD_INTR_MASK);
2967 tail->td.td_flags |= htole32(OHCI_TD_SET_DI(1));
2968 tail->flags |= OHCI_CALL_DONE;
2969 tail = tail->nexttd; /* point at sentinel */
2974 xfer->hcpriv = data;
2976 DPRINTFN(4,("ohci_device_bulk_start: ed_flags=0x%08x td_flags=0x%08x "
2977 "td_cbp=0x%08x td_be=0x%08x\n",
2978 (int)le32toh(sed->ed.ed_flags),
2979 (int)le32toh(data->td.td_flags),
2980 (int)le32toh(data->td.td_cbp),
2981 (int)le32toh(data->td.td_be)));
2984 if (ohcidebug > 5) {
2986 ohci_dump_tds(data);
2990 /* Insert ED in schedule */
2992 for (tdp = data; tdp != tail; tdp = tdp->nexttd) {
2995 sed->ed.ed_tailp = htole32(tail->physaddr);
2996 opipe->tail.td = tail;
2997 sed->ed.ed_flags &= htole32(~OHCI_ED_SKIP);
2998 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_BLF);
2999 if (xfer->timeout && !sc->sc_bus.use_polling) {
3000 usb_callout(xfer->timeout_handle, MS_TO_TICKS(xfer->timeout),
3001 ohci_timeout, xfer);
3005 /* This goes wrong if we are too slow. */
3006 if (ohcidebug > 10) {
3008 DPRINTF(("ohci_device_intr_transfer: status=%x\n",
3009 OREAD4(sc, OHCI_COMMAND_STATUS)));
3011 ohci_dump_tds(data);
3017 if (sc->sc_bus.use_polling)
3018 ohci_waitintr(sc, xfer);
3020 return (USBD_IN_PROGRESS);
3024 ohci_device_bulk_abort(usbd_xfer_handle xfer)
3026 DPRINTF(("ohci_device_bulk_abort: xfer=%p\n", xfer));
3027 ohci_abort_xfer(xfer, USBD_CANCELLED);
3031 * Close a device bulk pipe.
3034 ohci_device_bulk_close(usbd_pipe_handle pipe)
3036 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe;
3037 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus;
3039 DPRINTF(("ohci_device_bulk_close: pipe=%p\n", pipe));
3040 ohci_close_pipe(pipe, sc->sc_bulk_head);
3041 ohci_free_std(sc, opipe->tail.td);
3044 /************************/
3047 ohci_device_intr_transfer(usbd_xfer_handle xfer)
3051 /* Insert last in queue. */
3052 err = usb_insert_transfer(xfer);
3056 /* Pipe isn't running, start first */
3057 return (ohci_device_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue)));
3061 ohci_device_intr_start(usbd_xfer_handle xfer)
3063 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe;
3064 usbd_device_handle dev = opipe->pipe.device;
3065 ohci_softc_t *sc = (ohci_softc_t *)dev->bus;
3066 ohci_soft_ed_t *sed = opipe->sed;
3067 ohci_soft_td_t *data, *tail;
3071 return (USBD_IOERROR);
3073 DPRINTFN(3, ("ohci_device_intr_transfer: xfer=%p len=%d "
3074 "flags=%d priv=%p\n",
3075 xfer, xfer->length, xfer->flags, xfer->priv));
3078 if (xfer->rqflags & URQ_REQUEST)
3079 panic("ohci_device_intr_transfer: a request");
3084 data = opipe->tail.td;
3085 tail = ohci_alloc_std(sc);
3087 return (USBD_NOMEM);
3090 data->td.td_flags = htole32(
3091 OHCI_TD_IN | OHCI_TD_NOCC |
3092 OHCI_TD_SET_DI(1) | OHCI_TD_TOGGLE_CARRY);
3093 if (xfer->flags & USBD_SHORT_XFER_OK)
3094 data->td.td_flags |= htole32(OHCI_TD_R);
3095 data->td.td_cbp = htole32(DMAADDR(&xfer->dmabuf, 0));
3096 data->nexttd = tail;
3097 data->td.td_nexttd = htole32(tail->physaddr);
3098 data->td.td_be = htole32(le32toh(data->td.td_cbp) + len - 1);
3101 data->flags = OHCI_CALL_DONE | OHCI_ADD_LEN;
3102 xfer->hcpriv = data;
3105 if (ohcidebug > 5) {
3106 DPRINTF(("ohci_device_intr_transfer:\n"));
3108 ohci_dump_tds(data);
3112 /* Insert ED in schedule */
3114 sed->ed.ed_tailp = htole32(tail->physaddr);
3115 opipe->tail.td = tail;
3116 sed->ed.ed_flags &= htole32(~OHCI_ED_SKIP);
3120 * This goes horribly wrong, printing thousands of descriptors,
3121 * because false references are followed due to the fact that the
3124 if (ohcidebug > 5) {
3125 usb_delay_ms(&sc->sc_bus, 5);
3126 DPRINTF(("ohci_device_intr_transfer: status=%x\n",
3127 OREAD4(sc, OHCI_COMMAND_STATUS)));
3129 ohci_dump_tds(data);
3134 return (USBD_IN_PROGRESS);
3137 /* Abort a device control request. */
3139 ohci_device_intr_abort(usbd_xfer_handle xfer)
3141 if (xfer->pipe->intrxfer == xfer) {
3142 DPRINTF(("ohci_device_intr_abort: remove\n"));
3143 xfer->pipe->intrxfer = NULL;
3145 ohci_abort_xfer(xfer, USBD_CANCELLED);
3148 /* Close a device interrupt pipe. */
3150 ohci_device_intr_close(usbd_pipe_handle pipe)
3152 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe;
3153 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus;
3154 int nslots = opipe->u.intr.nslots;
3155 int pos = opipe->u.intr.pos;
3157 ohci_soft_ed_t *p, *sed = opipe->sed;
3159 DPRINTFN(1,("ohci_device_intr_close: pipe=%p nslots=%d pos=%d\n",
3160 pipe, nslots, pos));
3162 sed->ed.ed_flags |= htole32(OHCI_ED_SKIP);
3163 if ((le32toh(sed->ed.ed_tailp) & OHCI_HEADMASK) !=
3164 (le32toh(sed->ed.ed_headp) & OHCI_HEADMASK))
3165 usb_delay_ms(&sc->sc_bus, 2);
3167 if ((le32toh(sed->ed.ed_tailp) & OHCI_HEADMASK) !=
3168 (le32toh(sed->ed.ed_headp) & OHCI_HEADMASK))
3169 panic("%s: Intr pipe %p still has TDs queued",
3170 USBDEVNAME(sc->sc_bus.bdev), pipe);
3173 for (p = sc->sc_eds[pos]; p && p->next != sed; p = p->next)
3177 panic("ohci_device_intr_close: ED not found");
3179 p->next = sed->next;
3180 p->ed.ed_nexted = sed->ed.ed_nexted;
3183 for (j = 0; j < nslots; j++)
3184 --sc->sc_bws[(pos * nslots + j) % OHCI_NO_INTRS];
3186 ohci_free_std(sc, opipe->tail.td);
3187 ohci_free_sed(sc, opipe->sed);
3191 ohci_device_setintr(ohci_softc_t *sc, struct ohci_pipe *opipe, int ival)
3194 u_int npoll, slow, shigh, nslots;
3196 ohci_soft_ed_t *hsed, *sed = opipe->sed;
3198 DPRINTFN(2, ("ohci_setintr: pipe=%p\n", opipe));
3200 printf("ohci_setintr: 0 interval\n");
3201 return (USBD_INVAL);
3204 npoll = OHCI_NO_INTRS;
3205 while (npoll > ival)
3207 DPRINTFN(2, ("ohci_setintr: ival=%d npoll=%d\n", ival, npoll));
3210 * We now know which level in the tree the ED must go into.
3211 * Figure out which slot has most bandwidth left over.
3217 * 8 7 8 9 10 11 12 13 14
3218 * N (N-1) .. (N-1+N-1)
3221 shigh = slow + npoll;
3222 nslots = OHCI_NO_INTRS / npoll;
3223 for (best = i = slow, bestbw = ~0; i < shigh; i++) {
3225 for (j = 0; j < nslots; j++)
3226 bw += sc->sc_bws[(i * nslots + j) % OHCI_NO_INTRS];
3232 DPRINTFN(2, ("ohci_setintr: best=%d(%d..%d) bestbw=%d\n",
3233 best, slow, shigh, bestbw));
3236 hsed = sc->sc_eds[best];
3237 sed->next = hsed->next;
3238 sed->ed.ed_nexted = hsed->ed.ed_nexted;
3240 hsed->ed.ed_nexted = htole32(sed->physaddr);
3243 for (j = 0; j < nslots; j++)
3244 ++sc->sc_bws[(best * nslots + j) % OHCI_NO_INTRS];
3245 opipe->u.intr.nslots = nslots;
3246 opipe->u.intr.pos = best;
3248 DPRINTFN(5, ("ohci_setintr: returns %p\n", opipe));
3249 return (USBD_NORMAL_COMPLETION);
3252 /***********************/
3255 ohci_device_isoc_transfer(usbd_xfer_handle xfer)
3259 DPRINTFN(5,("ohci_device_isoc_transfer: xfer=%p\n", xfer));
3261 /* Put it on our queue, */
3262 err = usb_insert_transfer(xfer);
3264 /* bail out on error, */
3265 if (err && err != USBD_IN_PROGRESS)
3268 /* XXX should check inuse here */
3270 /* insert into schedule, */
3271 ohci_device_isoc_enter(xfer);
3273 /* and start if the pipe wasn't running */
3275 ohci_device_isoc_start(SIMPLEQ_FIRST(&xfer->pipe->queue));
3281 ohci_device_isoc_enter(usbd_xfer_handle xfer)
3283 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe;
3284 usbd_device_handle dev = opipe->pipe.device;
3285 ohci_softc_t *sc = (ohci_softc_t *)dev->bus;
3286 ohci_soft_ed_t *sed = opipe->sed;
3287 struct iso *iso = &opipe->u.iso;
3288 struct ohci_xfer *oxfer = (struct ohci_xfer *)xfer;
3289 ohci_soft_itd_t *sitd, *nsitd;
3290 ohci_soft_itd_t **scanp;
3291 ohci_physaddr_t buf, offs, noffs, bp0, tdphys;
3292 int i, ncur, nframes;
3294 DPRINTFN(1,("ohci_device_isoc_enter: used=%d next=%d xfer=%p "
3296 iso->inuse, iso->next, xfer, xfer->nframes));
3301 if (iso->next == -1) {
3302 /* Not in use yet, schedule it a few frames ahead. */
3303 iso->next = le32toh(sc->sc_hcca->hcca_frame_number) + 5;
3304 DPRINTFN(2,("ohci_device_isoc_enter: start next=%d\n",
3309 * Not sure what is going on here. This appears to be trying to
3310 * free the previous xfer related to xfer, but why wouldn't
3311 * sitd->xfer always equal xfer during the scan ?
3314 int neednewtail = 0;
3317 scanp = (ohci_soft_itd_t **)&xfer->hcpriv;
3318 while ((sitd = *scanp) != NULL) {
3319 if (sitd->xfer != xfer)
3321 if (opipe->tail.itd == sitd)
3323 *scanp = sitd->nextitd;
3324 sitd->nextitd = NULL;
3325 ohci_free_sitd(sc, sitd);
3329 sitd = ohci_alloc_sitd(sc);
3331 panic("cant alloc isoc");
3332 opipe->tail.itd = sitd;
3333 tdphys = sitd->physaddr;
3334 sed->ed.ed_flags |= htole32(OHCI_ED_SKIP); /* Stop*/
3336 sed->ed.ed_tailp = htole32(tdphys);
3337 sed->ed.ed_flags &= htole32(~OHCI_ED_SKIP); /* Start.*/
3341 sitd = opipe->tail.itd;
3342 buf = DMAADDR(&xfer->dmabuf, 0);
3343 bp0 = OHCI_PAGE(buf);
3344 offs = OHCI_PAGE_OFFSET(buf);
3345 nframes = xfer->nframes;
3346 xfer->hcpriv = sitd;
3347 for (i = ncur = 0; i < nframes; i++, ncur++) {
3348 noffs = offs + xfer->frlengths[i];
3349 if (ncur == OHCI_ITD_NOFFSET || /* all offsets used */
3350 OHCI_PAGE(buf + noffs) > bp0 + OHCI_PAGE_SIZE) { /* too many page crossings */
3352 /* Allocate next ITD */
3353 nsitd = ohci_alloc_sitd(sc);
3354 if (nsitd == NULL) {
3356 printf("%s: isoc TD alloc failed\n",
3357 USBDEVNAME(sc->sc_bus.bdev));
3361 /* Fill current ITD */
3362 sitd->itd.itd_flags = htole32(
3364 OHCI_ITD_SET_SF(iso->next) |
3365 OHCI_ITD_SET_DI(6) | /* delay intr a little */
3366 OHCI_ITD_SET_FC(ncur));
3367 sitd->itd.itd_bp0 = htole32(bp0);
3368 sitd->nextitd = nsitd;
3369 sitd->itd.itd_nextitd = htole32(nsitd->physaddr);
3370 sitd->itd.itd_be = htole32(bp0 + offs - 1);
3372 sitd->flags = OHCI_ITD_ACTIVE;
3375 iso->next = iso->next + ncur;
3376 bp0 = OHCI_PAGE(buf + offs);
3379 sitd->itd.itd_offset[ncur] = htole16(OHCI_ITD_MK_OFFS(offs));
3382 nsitd = ohci_alloc_sitd(sc);
3383 if (nsitd == NULL) {
3385 printf("%s: isoc TD alloc failed\n",
3386 USBDEVNAME(sc->sc_bus.bdev));
3389 /* Fixup last used ITD */
3390 sitd->itd.itd_flags = htole32(
3392 OHCI_ITD_SET_SF(iso->next) |
3393 OHCI_ITD_SET_DI(0) |
3394 OHCI_ITD_SET_FC(ncur));
3395 sitd->itd.itd_bp0 = htole32(bp0);
3396 sitd->nextitd = nsitd;
3397 sitd->itd.itd_nextitd = htole32(nsitd->physaddr);
3398 sitd->itd.itd_be = htole32(bp0 + offs - 1);
3400 sitd->flags = OHCI_CALL_DONE | OHCI_ITD_ACTIVE;
3402 iso->next = iso->next + ncur;
3403 iso->inuse += nframes;
3405 xfer->actlen = offs; /* XXX pretend we did it all */
3407 xfer->status = USBD_IN_PROGRESS;
3409 oxfer->ohci_xfer_flags |= OHCI_ISOC_DIRTY;
3412 if (ohcidebug > 5) {
3413 DPRINTF(("ohci_device_isoc_enter: frame=%d\n",
3414 le32toh(sc->sc_hcca->hcca_frame_number)));
3415 ohci_dump_itds(xfer->hcpriv);
3421 sed->ed.ed_tailp = htole32(nsitd->physaddr);
3422 opipe->tail.itd = nsitd;
3423 sed->ed.ed_flags &= htole32(~OHCI_ED_SKIP);
3427 if (ohcidebug > 5) {
3429 DPRINTF(("ohci_device_isoc_enter: after frame=%d\n",
3430 le32toh(sc->sc_hcca->hcca_frame_number)));
3431 ohci_dump_itds(xfer->hcpriv);
3438 ohci_device_isoc_start(usbd_xfer_handle xfer)
3440 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe;
3441 ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus;
3442 ohci_soft_ed_t *sed;
3444 DPRINTFN(5,("ohci_device_isoc_start: xfer=%p\n", xfer));
3447 return (USBD_IOERROR);
3450 if (xfer->status != USBD_IN_PROGRESS)
3451 printf("ohci_device_isoc_start: not in progress %p\n", xfer);
3454 /* XXX anything to do? */
3457 sed = opipe->sed; /* Turn off ED skip-bit to start processing */
3458 sed->ed.ed_flags &= htole32(~OHCI_ED_SKIP); /* ED's ITD list.*/
3461 return (USBD_IN_PROGRESS);
3465 ohci_device_isoc_abort(usbd_xfer_handle xfer)
3467 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe;
3468 ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus;
3469 ohci_soft_ed_t *sed;
3470 ohci_soft_itd_t *sitd, *tmp_sitd;
3471 int undone,num_sitds;
3474 opipe->aborting = 1;
3476 DPRINTFN(1,("ohci_device_isoc_abort: xfer=%p\n", xfer));
3478 /* Transfer is already done. */
3479 if (xfer->status != USBD_NOT_STARTED &&
3480 xfer->status != USBD_IN_PROGRESS) {
3482 printf("ohci_device_isoc_abort: early return\n");
3486 /* Give xfer the requested abort code. */
3487 xfer->status = USBD_CANCELLED;
3490 sed->ed.ed_flags |= htole32(OHCI_ED_SKIP); /* force hardware skip */
3493 sitd = xfer->hcpriv;
3497 printf("ohci_device_isoc_abort: hcpriv==0\n");
3501 for (; sitd != NULL && sitd->xfer == xfer; sitd = sitd->nextitd) {
3504 DPRINTFN(1,("abort sets done sitd=%p\n", sitd));
3512 * Each sitd has up to OHCI_ITD_NOFFSET transfers, each can
3513 * take a usb 1ms cycle. Conservatively wait for it to drain.
3514 * Even with DMA done, it can take awhile for the "batch"
3515 * delivery of completion interrupts to occur thru the controller.
3519 usb_delay_ms(&sc->sc_bus, 2*(num_sitds*OHCI_ITD_NOFFSET));
3522 tmp_sitd = xfer->hcpriv;
3523 for (; tmp_sitd != NULL && tmp_sitd->xfer == xfer;
3524 tmp_sitd = tmp_sitd->nextitd) {
3525 if (OHCI_CC_NO_ERROR ==
3526 OHCI_ITD_GET_CC(le32toh(tmp_sitd->itd.itd_flags)) &&
3527 tmp_sitd->flags & OHCI_ITD_ACTIVE &&
3528 (tmp_sitd->flags & OHCI_ITD_INTFIN) == 0)
3531 } while( undone != 0 );
3536 usb_transfer_complete(xfer);
3540 * Only if there is a `next' sitd in next xfer...
3541 * unlink this xfer's sitds.
3543 sed->ed.ed_headp = htole32(sitd->physaddr);
3545 sed->ed.ed_headp = 0;
3547 sed->ed.ed_flags &= htole32(~OHCI_ED_SKIP); /* remove hardware skip */
3553 ohci_device_isoc_done(usbd_xfer_handle xfer)
3555 /* This null routine corresponds to non-isoc "done()" routines
3556 * that free the stds associated with an xfer after a completed
3557 * xfer interrupt. However, in the case of isoc transfers, the
3558 * sitds associated with the transfer have already been processed
3559 * and reallocated for the next iteration by
3560 * "ohci_device_isoc_transfer()".
3562 * Routine "usb_transfer_complete()" is called at the end of every
3563 * relevant usb interrupt. "usb_transfer_complete()" indirectly
3564 * calls 1) "ohci_device_isoc_transfer()" (which keeps pumping the
3565 * pipeline by setting up the next transfer iteration) and 2) then
3566 * calls "ohci_device_isoc_done()". Isoc transfers have not been
3567 * working for the ohci usb because this routine was trashing the
3568 * xfer set up for the next iteration (thus, only the first
3569 * UGEN_NISOREQS xfers outstanding on an open would work). Perhaps
3570 * this could all be re-factored, but that's another pass...
3575 ohci_setup_isoc(usbd_pipe_handle pipe)
3577 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe;
3578 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus;
3579 struct iso *iso = &opipe->u.iso;
3585 ohci_add_ed(opipe->sed, sc->sc_isoc_head);
3588 return (USBD_NORMAL_COMPLETION);
3592 ohci_device_isoc_close(usbd_pipe_handle pipe)
3594 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe;
3595 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus;
3596 ohci_soft_ed_t *sed;
3598 DPRINTF(("ohci_device_isoc_close: pipe=%p\n", pipe));
3601 sed->ed.ed_flags |= htole32(OHCI_ED_SKIP); /* Stop device. */
3603 ohci_close_pipe(pipe, sc->sc_isoc_head); /* Stop isoc list, free ED.*/
3605 /* up to NISOREQs xfers still outstanding. */
3608 opipe->tail.itd->isdone = 1;
3610 ohci_free_sitd(sc, opipe->tail.itd); /* Next `avail free' sitd.*/
3611 opipe->tail.itd = NULL;