2 * Copyright (c) 1996 Gardner Buchanan <gbuchanan@shl.com>
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
8 * 1. Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * 3. All advertising materials mentioning features or use of this software
14 * must display the following acknowledgement:
15 * This product includes software developed by Gardner Buchanan.
16 * 4. The name of Gardner Buchanan may not be used to endorse or promote
17 * products derived from this software without specific prior written
20 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
21 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
22 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
23 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
24 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
25 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
26 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
27 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
28 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
29 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
31 * $FreeBSD: src/sys/dev/sn/if_sn.c,v 1.7.2.3 2001/02/04 04:38:38 toshi Exp $
35 * This is a driver for SMC's 9000 series of Ethernet adapters.
37 * This FreeBSD driver is derived from the smc9194 Linux driver by
38 * Erik Stahlman and is Copyright (C) 1996 by Erik Stahlman.
39 * This driver also shamelessly borrows from the FreeBSD ep driver
40 * which is Copyright (C) 1994 Herb Peyerl <hpeyerl@novatel.ca>
41 * All rights reserved.
43 * It is set up for my SMC91C92 equipped Ampro LittleBoard embedded
44 * PC. It is adapted from Erik Stahlman's Linux driver which worked
45 * with his EFA Info*Express SVC VLB adaptor. According to SMC's databook,
46 * it will work for the entire SMC 9xxx series. (Ha Ha)
48 * "Features" of the SMC chip:
49 * 4608 byte packet memory. (for the 91C92. Others have more)
50 * EEPROM for configuration
54 * Erik Stahlman erik@vt.edu
55 * Herb Peyerl hpeyerl@novatel.ca
56 * Andres Vega Garcia avega@sophia.inria.fr
57 * Serge Babkin babkin@hq.icb.chel.su
58 * Gardner Buchanan gbuchanan@shl.com
62 * o "smc9194.c:v0.10(FIXED) 02/15/96 by Erik Stahlman (erik@vt.edu)"
63 * o "if_ep.c,v 1.19 1995/01/24 20:53:45 davidg Exp"
66 * o The hardware multicast filter isn't used yet.
67 * o Setting of the hardware address isn't supported.
68 * o Hardware padding isn't used.
72 * Modifications for Megahertz X-Jack Ethernet Card (XJ-10BT)
74 * Copyright (c) 1996 by Tatsumi Hosokawa <hosokawa@jp.FreeBSD.org>
75 * BSD-nomads, Tokyo, Japan.
78 * Multicast support by Kei TANAKA <kei@pal.xerox.com>
79 * Special thanks to itojun@itojun.org
82 #undef SN_DEBUG /* (by hosokawa) */
84 #include <sys/param.h>
85 #include <sys/systm.h>
86 #include <sys/kernel.h>
87 #include <sys/interrupt.h>
88 #include <sys/errno.h>
89 #include <sys/sockio.h>
90 #include <sys/malloc.h>
92 #include <sys/socket.h>
93 #include <sys/syslog.h>
94 #include <sys/serialize.h>
95 #include <sys/module.h>
98 #include <sys/thread2.h>
100 #include <net/ethernet.h>
102 #include <net/ifq_var.h>
103 #include <net/if_arp.h>
104 #include <net/if_dl.h>
105 #include <net/if_types.h>
106 #include <net/if_mib.h>
109 #include <netinet/in.h>
110 #include <netinet/in_systm.h>
111 #include <netinet/in_var.h>
112 #include <netinet/ip.h>
116 #include <net/bpfdesc.h>
118 #include <machine/clock.h>
120 #include "if_snreg.h"
121 #include "if_snvar.h"
123 /* Exported variables */
124 devclass_t sn_devclass;
126 static int snioctl(struct ifnet * ifp, u_long, caddr_t, struct ucred *);
128 static void snresume(struct ifnet *);
131 void snread(struct ifnet *);
132 void snreset(struct sn_softc *);
133 void snstart(struct ifnet *);
134 void snstop(struct sn_softc *);
135 void snwatchdog(struct ifnet *);
137 static void sn_setmcast(struct sn_softc *);
138 static int sn_getmcf(struct arpcom *ac, u_char *mcf);
139 static u_int smc_crc(u_char *);
141 DECLARE_DUMMY_MODULE(if_sn);
143 /* I (GB) have been unlucky getting the hardware padding
148 static const char *chip_ids[15] = {
150 /* 3 */ "SMC91C90/91C92",
155 /* 8 */ "SMC91C100FD",
161 sn_attach(device_t dev)
163 struct sn_softc *sc = device_get_softc(dev);
164 struct ifnet *ifp = &sc->arpcom.ac_if;
177 sc->pages_wanted = -1;
179 device_printf(dev, " ");
182 rev = inw(BASE + REVISION_REG_W);
183 if (chip_ids[(rev >> 4) & 0xF])
184 kprintf("%s ", chip_ids[(rev >> 4) & 0xF]);
187 i = inw(BASE + CONFIG_REG_W);
188 kprintf("%s\n", i & CR_AUI_SELECT ? "AUI" : "UTP");
190 if (sc->pccard_enaddr)
191 for (j = 0; j < 3; j++) {
194 w = (u_short)sc->arpcom.ac_enaddr[j * 2] |
195 (((u_short)sc->arpcom.ac_enaddr[j * 2 + 1]) << 8);
196 outw(BASE + IAR_ADDR0_REG_W + j * 2, w);
200 * Read the station address from the chip. The MAC address is bank 1,
204 p = (u_char *) & sc->arpcom.ac_enaddr;
205 for (i = 0; i < 6; i += 2) {
206 address = inw(BASE + IAR_ADDR0_REG_W + i);
207 p[i + 1] = address >> 8;
208 p[i] = address & 0xFF;
211 if_initname(ifp, "sn", device_get_unit(dev));
212 ifp->if_mtu = ETHERMTU;
213 ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST;
214 ifp->if_start = snstart;
215 ifp->if_ioctl = snioctl;
216 ifp->if_watchdog = snwatchdog;
217 ifp->if_init = sninit;
218 ifq_set_maxlen(&ifp->if_snd, IFQ_MAXLEN);
219 ifq_set_ready(&ifp->if_snd);
222 ether_ifattach(ifp, sc->arpcom.ac_enaddr, NULL);
224 error = bus_setup_intr(dev, sc->irq_res, INTR_MPSAFE,
225 sn_intr, sc, &sc->intrhand,
233 ifq_set_cpuid(&ifp->if_snd, rman_get_cpuid(sc->irq_res));
240 * Reset and initialize the chip
245 struct sn_softc *sc = xsc;
246 struct ifnet *ifp = &sc->arpcom.ac_if;
251 * This resets the registers mostly to defaults, but doesn't affect
252 * EEPROM. After the reset cycle, we pause briefly for the chip to
256 outw(BASE + RECV_CONTROL_REG_W, RCR_SOFTRESET);
258 outw(BASE + RECV_CONTROL_REG_W, 0x0000);
262 outw(BASE + TXMIT_CONTROL_REG_W, 0x0000);
265 * Set the control register to automatically release succesfully
266 * transmitted packets (making the best use out of our limited
267 * memory) and to enable the EPH interrupt on certain TX errors.
270 outw(BASE + CONTROL_REG_W, (CTR_AUTO_RELEASE | CTR_TE_ENABLE |
271 CTR_CR_ENABLE | CTR_LE_ENABLE));
273 /* Set squelch level to 240mV (default 480mV) */
274 flags = inw(BASE + CONFIG_REG_W);
275 flags |= CR_SET_SQLCH;
276 outw(BASE + CONFIG_REG_W, flags);
279 * Reset the MMU and wait for it to be un-busy.
282 outw(BASE + MMU_CMD_REG_W, MMUCR_RESET);
283 while (inw(BASE + MMU_CMD_REG_W) & MMUCR_BUSY) /* NOTHING */
287 * Disable all interrupts
289 outb(BASE + INTR_MASK_REG_B, 0x00);
294 * Set the transmitter control. We want it enabled.
300 * I (GB) have been unlucky getting this to work.
302 flags |= TCR_PAD_ENABLE;
305 outw(BASE + TXMIT_CONTROL_REG_W, flags);
309 * Now, enable interrupts
318 outb(BASE + INTR_MASK_REG_B, mask);
319 sc->intr_mask = mask;
320 sc->pages_wanted = -1;
324 * Mark the interface running but not active.
326 ifp->if_flags |= IFF_RUNNING;
327 ifq_clr_oactive(&ifp->if_snd);
330 * Attempt to push out any waiting packets.
337 snstart(struct ifnet *ifp)
339 struct sn_softc *sc = ifp->if_softc;
350 if ((ifp->if_flags & IFF_RUNNING) == 0 || ifq_is_oactive(&ifp->if_snd))
353 if (sc->pages_wanted != -1) {
354 /* XXX should never happen */
355 kprintf("%s: snstart() while memory allocation pending\n",
357 ifq_set_oactive(&ifp->if_snd);
363 * Sneak a peek at the next packet
365 m = ifq_dequeue(&ifp->if_snd, NULL);
370 * Compute the frame length and set pad to give an overall even
371 * number of bytes. Below we assume that the packet length is even.
373 for (len = 0, top = m; m; m = m->m_next)
379 * We drop packets that are too large. Perhaps we should truncate
382 if (len + pad > ETHER_MAX_LEN - ETHER_CRC_LEN) {
383 kprintf("%s: large packet discarded (A)\n", ifp->if_xname);
384 ++sc->arpcom.ac_if.if_oerrors;
391 * If HW padding is not turned on, then pad to ETHER_MIN_LEN.
393 if (len < ETHER_MIN_LEN - ETHER_CRC_LEN)
394 pad = ETHER_MIN_LEN - ETHER_CRC_LEN - len;
401 * The MMU wants the number of pages to be the number of 256 byte
402 * 'pages', minus 1 (A packet can't ever have 0 pages. We also
403 * include space for the status word, byte count and control bytes in
404 * the allocation request.
406 numPages = (length + 6) >> 8;
410 * Now, try to allocate the memory
413 outw(BASE + MMU_CMD_REG_W, MMUCR_ALLOC | numPages);
416 * Wait a short amount of time to see if the allocation request
417 * completes. Otherwise, I enable the interrupt and wait for
418 * completion asyncronously.
421 time_out = MEMORY_WAIT_TIME;
423 if (inb(BASE + INTR_STAT_REG_B) & IM_ALLOC_INT)
425 } while (--time_out);
430 * No memory now. Oh well, wait until the chip finds memory
431 * later. Remember how many pages we were asking for and
432 * enable the allocation completion interrupt. Also set a
433 * watchdog in case we miss the interrupt. We mark the
434 * interface active since there is no point in attempting an
435 * snstart() until after the memory is available.
437 mask = inb(BASE + INTR_MASK_REG_B) | IM_ALLOC_INT;
438 outb(BASE + INTR_MASK_REG_B, mask);
439 sc->intr_mask = mask;
442 ifq_set_oactive(&ifp->if_snd);
443 sc->pages_wanted = numPages;
444 ifq_prepend(&ifp->if_snd, top);
449 * The memory allocation completed. Check the results.
451 packet_no = inb(BASE + ALLOC_RESULT_REG_B);
452 if (packet_no & ARR_FAILED) {
453 kprintf("%s: Memory allocation failed\n", ifp->if_xname);
454 ifq_prepend(&ifp->if_snd, top);
458 * We have a packet number, so tell the card to use it.
460 outb(BASE + PACKET_NUM_REG_B, packet_no);
463 * Point to the beginning of the packet
465 outw(BASE + POINTER_REG_W, PTR_AUTOINC | 0x0000);
468 * Send the packet length (+6 for status, length and control byte)
469 * and the status word (set to zeros)
471 outw(BASE + DATA_REG_W, 0);
472 outb(BASE + DATA_REG_B, (length + 6) & 0xFF);
473 outb(BASE + DATA_REG_B, (length + 6) >> 8);
476 * Push out the data to the card.
478 for (m = top; m != NULL; m = m->m_next) {
483 outsw(BASE + DATA_REG_W, mtod(m, caddr_t), m->m_len / 2);
486 * Push out remaining byte.
489 outb(BASE + DATA_REG_B, *(mtod(m, caddr_t) + m->m_len - 1));
496 outw(BASE + DATA_REG_W, 0);
500 outb(BASE + DATA_REG_B, 0);
503 * Push out control byte and unused packet byte The control byte is 0
504 * meaning the packet is even lengthed and no special CRC handling is
507 outw(BASE + DATA_REG_W, 0);
510 * Enable the interrupts and let the chipset deal with it Also set a
511 * watchdog in case we miss the interrupt.
513 mask = inb(BASE + INTR_MASK_REG_B) | (IM_TX_INT | IM_TX_EMPTY_INT);
514 outb(BASE + INTR_MASK_REG_B, mask);
515 sc->intr_mask = mask;
517 outw(BASE + MMU_CMD_REG_W, MMUCR_ENQUEUE);
519 ifq_set_oactive(&ifp->if_snd);
530 * Is another packet coming in? We don't want to overflow the tiny
531 * RX FIFO. If nothing has arrived then attempt to queue another
534 if (inw(BASE + FIFO_PORTS_REG_W) & FIFO_REMPTY)
540 /* Resume a packet transmit operation after a memory allocation
543 * This is basically a hacked up copy of snstart() which handles
544 * a completed memory allocation the same way snstart() does.
545 * It then passes control to snstart to handle any other queued
549 snresume(struct ifnet *ifp)
551 struct sn_softc *sc = ifp->if_softc;
559 u_short pages_wanted;
562 if (sc->pages_wanted < 0)
565 pages_wanted = sc->pages_wanted;
566 sc->pages_wanted = -1;
569 * Sneak a peek at the next packet
571 m = ifq_dequeue(&ifp->if_snd, NULL);
573 kprintf("%s: snresume() with nothing to send\n",
579 * Compute the frame length and set pad to give an overall even
580 * number of bytes. Below we assume that the packet length is even.
582 for (len = 0, top = m; m; m = m->m_next)
588 * We drop packets that are too large. Perhaps we should truncate
591 if (len + pad > ETHER_MAX_LEN - ETHER_CRC_LEN) {
592 kprintf("%s: large packet discarded (B)\n", ifp->if_xname);
600 * If HW padding is not turned on, then pad to ETHER_MIN_LEN.
602 if (len < ETHER_MIN_LEN - ETHER_CRC_LEN)
603 pad = ETHER_MIN_LEN - ETHER_CRC_LEN - len;
611 * The MMU wants the number of pages to be the number of 256 byte
612 * 'pages', minus 1 (A packet can't ever have 0 pages. We also
613 * include space for the status word, byte count and control bytes in
614 * the allocation request.
616 numPages = (length + 6) >> 8;
622 * The memory allocation completed. Check the results. If it failed,
623 * we simply set a watchdog timer and hope for the best.
625 packet_no = inb(BASE + ALLOC_RESULT_REG_B);
626 if (packet_no & ARR_FAILED) {
627 kprintf("%s: Memory allocation failed. Weird.\n", ifp->if_xname);
629 ifq_prepend(&ifp->if_snd, top);
633 * We have a packet number, so tell the card to use it.
635 outb(BASE + PACKET_NUM_REG_B, packet_no);
638 * Now, numPages should match the pages_wanted recorded when the
639 * memory allocation was initiated.
641 if (pages_wanted != numPages) {
642 kprintf("%s: memory allocation wrong size. Weird.\n", ifp->if_xname);
644 * If the allocation was the wrong size we simply release the
645 * memory once it is granted. Wait for the MMU to be un-busy.
647 while (inw(BASE + MMU_CMD_REG_W) & MMUCR_BUSY) /* NOTHING */
649 outw(BASE + MMU_CMD_REG_W, MMUCR_FREEPKT);
651 ifq_prepend(&ifp->if_snd, top);
655 * Point to the beginning of the packet
657 outw(BASE + POINTER_REG_W, PTR_AUTOINC | 0x0000);
660 * Send the packet length (+6 for status, length and control byte)
661 * and the status word (set to zeros)
663 outw(BASE + DATA_REG_W, 0);
664 outb(BASE + DATA_REG_B, (length + 6) & 0xFF);
665 outb(BASE + DATA_REG_B, (length + 6) >> 8);
668 * Push out the data to the card.
670 for (m = top; m != NULL; m = m->m_next) {
675 outsw(BASE + DATA_REG_W, mtod(m, caddr_t), m->m_len / 2);
678 * Push out remaining byte.
681 outb(BASE + DATA_REG_B, *(mtod(m, caddr_t) + m->m_len - 1));
688 outw(BASE + DATA_REG_W, 0);
692 outb(BASE + DATA_REG_B, 0);
695 * Push out control byte and unused packet byte The control byte is 0
696 * meaning the packet is even lengthed and no special CRC handling is
699 outw(BASE + DATA_REG_W, 0);
702 * Enable the interrupts and let the chipset deal with it Also set a
703 * watchdog in case we miss the interrupt.
705 mask = inb(BASE + INTR_MASK_REG_B) | (IM_TX_INT | IM_TX_EMPTY_INT);
706 outb(BASE + INTR_MASK_REG_B, mask);
707 sc->intr_mask = mask;
708 outw(BASE + MMU_CMD_REG_W, MMUCR_ENQUEUE);
718 * Now pass control to snstart() to queue any additional packets
720 ifq_clr_oactive(&ifp->if_snd);
724 * We've sent something, so we're active. Set a watchdog in case the
725 * TX_EMPTY interrupt is lost.
727 ifq_set_oactive(&ifp->if_snd);
735 int status, interrupts;
736 struct sn_softc *sc = (struct sn_softc *) arg;
737 struct ifnet *ifp = &sc->arpcom.ac_if;
740 * Chip state registers
748 * Clear the watchdog.
755 * Obtain the current interrupt mask and clear the hardware mask
756 * while servicing interrupts.
758 mask = inb(BASE + INTR_MASK_REG_B);
759 outb(BASE + INTR_MASK_REG_B, 0x00);
762 * Get the set of interrupts which occurred and eliminate any which
765 interrupts = inb(BASE + INTR_STAT_REG_B);
766 status = interrupts & mask;
769 * Now, process each of the interrupt types.
775 if (status & IM_RX_OVRN_INT) {
778 * Acknowlege Interrupt
781 outb(BASE + INTR_ACK_REG_B, IM_RX_OVRN_INT);
783 ++sc->arpcom.ac_if.if_ierrors;
788 if (status & IM_RCV_INT) {
793 packet_number = inw(BASE + FIFO_PORTS_REG_W);
795 if (packet_number & FIFO_REMPTY) {
798 * we got called , but nothing was on the FIFO
800 kprintf("sn: Receive interrupt with nothing on FIFO\n");
808 * An on-card memory allocation came through.
810 if (status & IM_ALLOC_INT) {
813 * Disable this interrupt.
815 mask &= ~IM_ALLOC_INT;
816 ifq_clr_oactive(&sc->arpcom.ac_if.if_snd);
817 snresume(&sc->arpcom.ac_if);
820 * TX Completion. Handle a transmit error message. This will only be
821 * called when there is an error, because of the AUTO_RELEASE mode.
823 if (status & IM_TX_INT) {
826 * Acknowlege Interrupt
829 outb(BASE + INTR_ACK_REG_B, IM_TX_INT);
831 packet_no = inw(BASE + FIFO_PORTS_REG_W);
832 packet_no &= FIFO_TX_MASK;
835 * select this as the packet to read from
837 outb(BASE + PACKET_NUM_REG_B, packet_no);
840 * Position the pointer to the first word from this packet
842 outw(BASE + POINTER_REG_W, PTR_AUTOINC | PTR_READ | 0x0000);
845 * Fetch the TX status word. The value found here will be a
846 * copy of the EPH_STATUS_REG_W at the time the transmit
849 tx_status = inw(BASE + DATA_REG_W);
851 if (tx_status & EPHSR_TX_SUC) {
852 device_printf(sc->dev,
853 "Successful packet caused interrupt\n");
855 ++sc->arpcom.ac_if.if_oerrors;
858 if (tx_status & EPHSR_LATCOL)
859 ++sc->arpcom.ac_if.if_collisions;
862 * Some of these errors will have disabled transmit.
863 * Re-enable transmit now.
868 outw(BASE + TXMIT_CONTROL_REG_W, TCR_ENABLE);
870 outw(BASE + TXMIT_CONTROL_REG_W, TCR_ENABLE | TCR_PAD_ENABLE);
874 * kill the failed packet. Wait for the MMU to be un-busy.
877 while (inw(BASE + MMU_CMD_REG_W) & MMUCR_BUSY) /* NOTHING */
879 outw(BASE + MMU_CMD_REG_W, MMUCR_FREEPKT);
882 * Attempt to queue more transmits.
884 ifq_clr_oactive(&sc->arpcom.ac_if.if_snd);
885 if_devstart(&sc->arpcom.ac_if);
888 * Transmit underrun. We use this opportunity to update transmit
889 * statistics from the card.
891 if (status & IM_TX_EMPTY_INT) {
894 * Acknowlege Interrupt
897 outb(BASE + INTR_ACK_REG_B, IM_TX_EMPTY_INT);
900 * Disable this interrupt.
902 mask &= ~IM_TX_EMPTY_INT;
905 card_stats = inw(BASE + COUNTER_REG_W);
910 sc->arpcom.ac_if.if_collisions += card_stats & ECR_COLN_MASK;
913 * Multiple collisions
915 sc->arpcom.ac_if.if_collisions += (card_stats & ECR_MCOLN_MASK) >> 4;
920 * Attempt to enqueue some more stuff.
922 ifq_clr_oactive(&sc->arpcom.ac_if.if_snd);
923 if_devstart(&sc->arpcom.ac_if);
926 * Some other error. Try to fix it by resetting the adapter.
928 if (status & IM_EPH_INT) {
935 * Handled all interrupt sources.
941 * Reestablish interrupts from mask which have not been deselected
942 * during this interrupt. Note that the hardware mask, which was set
943 * to 0x00 at the start of this service routine, may have been
944 * updated by one or more of the interrupt handers and we must let
945 * those new interrupts stay enabled here.
947 mask |= inb(BASE + INTR_MASK_REG_B);
948 outb(BASE + INTR_MASK_REG_B, mask);
949 sc->intr_mask = mask;
953 snread(struct ifnet *ifp)
955 struct sn_softc *sc = ifp->if_softc;
959 u_short packet_length;
964 packet_number = inw(BASE + FIFO_PORTS_REG_W);
966 if (packet_number & FIFO_REMPTY) {
969 * we got called , but nothing was on the FIFO
971 kprintf("sn: Receive interrupt with nothing on FIFO\n");
978 * Start reading from the start of the packet. Since PTR_RCV is set,
979 * packet number is found in FIFO_PORTS_REG_W, FIFO_RX_MASK.
981 outw(BASE + POINTER_REG_W, PTR_READ | PTR_RCV | PTR_AUTOINC | 0x0000);
984 * First two words are status and packet_length
986 status = inw(BASE + DATA_REG_W);
987 packet_length = inw(BASE + DATA_REG_W) & RLEN_MASK;
990 * The packet length contains 3 extra words: status, length, and a
991 * extra word with the control byte.
996 * Account for receive errors and discard.
998 if (status & RS_ERRORS) {
1003 * A packet is received.
1007 * Adjust for odd-length packet.
1009 if (status & RS_ODDFRAME)
1013 * Allocate a header mbuf from the kernel.
1015 MGETHDR(m, MB_DONTWAIT, MT_DATA);
1019 m->m_pkthdr.rcvif = ifp;
1020 m->m_pkthdr.len = m->m_len = packet_length;
1023 * Attach an mbuf cluster
1025 MCLGET(m, MB_DONTWAIT);
1028 * Insist on getting a cluster
1030 if ((m->m_flags & M_EXT) == 0) {
1033 kprintf("sn: snread() kernel memory allocation problem\n");
1038 * Get packet, including link layer address, from interface.
1041 data = mtod(m, u_char *);
1042 insw(BASE + DATA_REG_W, data, packet_length >> 1);
1043 if (packet_length & 1) {
1044 data += packet_length & ~1;
1045 *data = inb(BASE + DATA_REG_B);
1049 m->m_pkthdr.len = m->m_len = packet_length;
1051 ifp->if_input(ifp, m);
1056 * Error or good, tell the card to get rid of this packet Wait for
1057 * the MMU to be un-busy.
1060 while (inw(BASE + MMU_CMD_REG_W) & MMUCR_BUSY) /* NOTHING */
1062 outw(BASE + MMU_CMD_REG_W, MMUCR_RELEASE);
1065 * Check whether another packet is ready
1067 packet_number = inw(BASE + FIFO_PORTS_REG_W);
1068 if (packet_number & FIFO_REMPTY) {
1076 * Handle IOCTLS. This function is completely stolen from if_ep.c
1077 * As with its progenitor, it does not handle hardware address
1081 snioctl(struct ifnet *ifp, u_long cmd, caddr_t data, struct ucred *cr)
1083 struct sn_softc *sc = ifp->if_softc;
1088 if ((ifp->if_flags & IFF_UP) == 0 && ifp->if_flags & IFF_RUNNING) {
1089 ifp->if_flags &= ~IFF_RUNNING;
1093 /* reinitialize card on any parameter change */
1101 bcopy((caddr_t) sc->sc_addr, (caddr_t) & ifr->ifr_data,
1102 sizeof(sc->sc_addr));
1107 /* update multicast filter list. */
1112 /* update multicast filter list. */
1117 error = ether_ioctl(ifp, cmd, data);
1125 snreset(struct sn_softc *sc)
1132 snwatchdog(struct ifnet *ifp)
1134 sn_intr(ifp->if_softc);
1138 /* 1. zero the interrupt mask
1139 * 2. clear the enable receive flag
1140 * 3. clear the enable xmit flags
1143 snstop(struct sn_softc *sc)
1146 struct ifnet *ifp = &sc->arpcom.ac_if;
1149 * Clear interrupt mask; disable all interrupts.
1152 outb(BASE + INTR_MASK_REG_B, 0x00);
1155 * Disable transmitter and Receiver
1158 outw(BASE + RECV_CONTROL_REG_W, 0x0000);
1159 outw(BASE + TXMIT_CONTROL_REG_W, 0x0000);
1169 sn_activate(device_t dev)
1171 struct sn_softc *sc = device_get_softc(dev);
1174 sc->port_res = bus_alloc_resource(dev, SYS_RES_IOPORT, &sc->port_rid,
1175 0, ~0, SMC_IO_EXTENT, RF_ACTIVE);
1176 if (!sc->port_res) {
1178 device_printf(dev, "Cannot allocate ioport\n");
1184 sc->irq_res = bus_alloc_resource_any(dev, SYS_RES_IRQ, &sc->irq_rid,
1188 device_printf(dev, "Cannot allocate irq\n");
1194 sc->sn_io_addr = rman_get_start(sc->port_res);
1199 sn_deactivate(device_t dev)
1201 struct sn_softc *sc = device_get_softc(dev);
1204 bus_release_resource(dev, SYS_RES_IOPORT, sc->port_rid,
1208 bus_release_resource(dev, SYS_RES_IRQ, sc->irq_rid,
1215 * Function: sn_probe( device_t dev, int pccard )
1218 * Tests to see if a given ioaddr points to an SMC9xxx chip.
1219 * Tries to cause as little damage as possible if it's not a SMC chip.
1220 * Returns a 0 on success
1223 * (1) see if the high byte of BANK_SELECT is 0x33
1224 * (2) compare the ioaddr with the base register's address
1225 * (3) see if I recognize the chip ID in the appropriate register
1230 sn_probe(device_t dev, int pccard)
1232 struct sn_softc *sc = device_get_softc(dev);
1234 u_short revision_register;
1235 u_short base_address_register;
1239 if ((err = sn_activate(dev)) != 0)
1242 ioaddr = sc->sn_io_addr;
1245 * First, see if the high byte is 0x33
1247 bank = inw(ioaddr + BANK_SELECT_REG_W);
1248 if ((bank & BSR_DETECT_MASK) != BSR_DETECT_VALUE) {
1250 device_printf(dev, "test1 failed\n");
1255 * The above MIGHT indicate a device, but I need to write to further
1256 * test this. Go to bank 0, then test that the register still
1257 * reports the high byte is 0x33.
1259 outw(ioaddr + BANK_SELECT_REG_W, 0x0000);
1260 bank = inw(ioaddr + BANK_SELECT_REG_W);
1261 if ((bank & BSR_DETECT_MASK) != BSR_DETECT_VALUE) {
1263 device_printf(dev, "test2 failed\n");
1268 * well, we've already written once, so hopefully another time won't
1269 * hurt. This time, I need to switch the bank register to bank 1, so
1270 * I can access the base address register. The contents of the
1271 * BASE_ADDR_REG_W register, after some jiggery pokery, is expected
1272 * to match the I/O port address where the adapter is being probed.
1274 outw(ioaddr + BANK_SELECT_REG_W, 0x0001);
1275 base_address_register = inw(ioaddr + BASE_ADDR_REG_W);
1278 * This test is nonsence on PC-card architecture, so if
1279 * pccard == 1, skip this test. (hosokawa)
1281 if (!pccard && (ioaddr != (base_address_register >> 3 & 0x3E0))) {
1284 * Well, the base address register didn't match. Must not
1285 * have been a SMC chip after all.
1288 * kprintf("sn: ioaddr %x doesn't match card configuration
1289 * (%x)\n", ioaddr, base_address_register >> 3 & 0x3E0 );
1293 device_printf(dev, "test3 failed ioaddr = 0x%x, "
1294 "base_address_register = 0x%x\n", ioaddr,
1295 base_address_register >> 3 & 0x3E0);
1300 * Check if the revision register is something that I recognize.
1301 * These might need to be added to later, as future revisions could
1304 outw(ioaddr + BANK_SELECT_REG_W, 0x3);
1305 revision_register = inw(ioaddr + REVISION_REG_W);
1306 if (!chip_ids[(revision_register >> 4) & 0xF]) {
1309 * I don't regonize this chip, so...
1312 device_printf(dev, "test4 failed\n");
1317 * at this point I'll assume that the chip is an SMC9xxx. It might be
1318 * prudent to check a listing of MAC addresses against the hardware
1319 * address, or do some other tests.
1331 sn_setmcast(struct sn_softc *sc)
1333 struct ifnet *ifp = (struct ifnet *)sc;
1337 * Set the receiver filter. We want receive enabled and auto strip
1338 * of CRC from received packet. If we are promiscuous then set that
1341 flags = RCR_ENABLE | RCR_STRIP_CRC;
1343 if (ifp->if_flags & IFF_PROMISC) {
1344 flags |= RCR_PROMISC | RCR_ALMUL;
1345 } else if (ifp->if_flags & IFF_ALLMULTI) {
1349 if (sn_getmcf(&sc->arpcom, mcf)) {
1352 outw(BASE + MULTICAST1_REG_W,
1353 ((u_short)mcf[1] << 8) | mcf[0]);
1354 outw(BASE + MULTICAST2_REG_W,
1355 ((u_short)mcf[3] << 8) | mcf[2]);
1356 outw(BASE + MULTICAST3_REG_W,
1357 ((u_short)mcf[5] << 8) | mcf[4]);
1358 outw(BASE + MULTICAST4_REG_W,
1359 ((u_short)mcf[7] << 8) | mcf[6]);
1365 outw(BASE + RECV_CONTROL_REG_W, flags);
1369 sn_getmcf(struct arpcom *ac, u_char *mcf)
1372 u_int index, index2;
1374 struct ifmultiaddr *ifma;
1378 TAILQ_FOREACH(ifma, &ac->ac_if.if_multiaddrs, ifma_link) {
1379 if (ifma->ifma_addr->sa_family != AF_LINK)
1381 index = smc_crc(LLADDR((struct sockaddr_dl *)ifma->ifma_addr)) & 0x3f;
1383 for (i = 0; i < 6; i++) {
1385 index2 |= (index & 0x01);
1388 af[index2 >> 3] |= 1 << (index2 & 7);
1390 return 1; /* use multicast filter */
1398 const u_int poly = 0xedb88320;
1399 u_int v = 0xffffffff;
1402 for (perByte = 0; perByte < ETHER_ADDR_LEN; perByte++) {
1404 for (perBit = 0; perBit < 8; perBit++) {
1405 v = (v >> 1)^(((v ^ c) & 0x01) ? poly : 0);