sys/dev/agp/agp_i810.c

   1 /*
   2  * Copyright (c) 2000 Doug Rabson
   3  * Copyright (c) 2000 Ruslan Ermilov
   4  * All rights reserved.
   5  *
   6  * Redistribution and use in source and binary forms, with or without
   7  * modification, are permitted provided that the following conditions
   8  * are met:
   9  * 1. Redistributions of source code must retain the above copyright
  10  *    notice, this list of conditions and the following disclaimer.
  11  * 2. Redistributions in binary form must reproduce the above copyright
  12  *    notice, this list of conditions and the following disclaimer in the
  13  *    documentation and/or other materials provided with the distribution.
  14  *
  15  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
  16  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  17  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
  18  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
  19  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  20  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
  21  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
  22  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
  23  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
  24  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
  25  * SUCH DAMAGE.
  26  *
  27  *      $FreeBSD: src/sys/dev/agp/agp_i810.c,v 1.43 2007/11/12 21:51:36 jhb Exp $
  28  *      $DragonFly: src/sys/dev/agp/agp_i810.c,v 1.19 2008/10/03 08:56:58 hasso Exp $
  29  */
  30
  31 /*
  32  * Fixes for 830/845G support: David Dawes <dawes@xfree86.org>
  33  * 852GM/855GM/865G support added by David Dawes <dawes@xfree86.org>
  34  */
  35
  36 #include "opt_bus.h"
  37
  38 #include <sys/param.h>
  39 #include <sys/systm.h>
  40 #include <sys/malloc.h>
  41 #include <sys/kernel.h>
  42 #include <sys/bus.h>
  43 #include <sys/lock.h>
  44 #include <sys/rman.h>
  45
  46 #include <bus/pci/pcivar.h>
  47 #include <bus/pci/pcireg.h>
  48 #include "agppriv.h"
  49 #include "agpreg.h"
  50
  51 #include <vm/vm.h>
  52 #include <vm/vm_object.h>
  53 #include <vm/vm_page.h>
  54 #include <vm/vm_pageout.h>
  55 #include <vm/pmap.h>
  56
  57 #include <machine/md_var.h>
  58
  59 #define bus_read_1(r, o) \
  60                    bus_space_read_1((r)->r_bustag, (r)->r_bushandle, (o))
  61 #define bus_read_4(r, o) \
  62                    bus_space_read_4((r)->r_bustag, (r)->r_bushandle, (o))
  63 #define bus_write_4(r, o, v) \
  64                     bus_space_write_4((r)->r_bustag, (r)->r_bushandle, (o), (v))
  65
  66 MALLOC_DECLARE(M_AGP);
  67
  68 enum {
  69         CHIP_I810,      /* i810/i815 */
  70         CHIP_I830,      /* 830M/845G */
  71         CHIP_I855,      /* 852GM/855GM/865G */
  72         CHIP_I915,      /* 915G/915GM */
  73         CHIP_I965,      /* G965 */
  74         CHIP_G33,       /* G33/Q33/Q35 */
  75         CHIP_G4X,       /* G45/Q45 */
  76 };
  77
  78 /* The i810 through i855 have the registers at BAR 1, and the GATT gets
  79  * allocated by us.  The i915 has registers in BAR 0 and the GATT is at the
  80  * start of the stolen memory, and should only be accessed by the OS through
  81  * BAR 3.  The G965 has registers and GATT in the same BAR (0) -- first 512KB
  82  * is registers, second 512KB is GATT.
  83  */
  84 static struct resource_spec agp_i810_res_spec[] = {
  85         { SYS_RES_MEMORY, AGP_I810_MMADR, RF_ACTIVE | RF_SHAREABLE },
  86         { -1, 0 }
  87 };
  88
  89 static struct resource_spec agp_i915_res_spec[] = {
  90         { SYS_RES_MEMORY, AGP_I915_MMADR, RF_ACTIVE | RF_SHAREABLE },
  91         { SYS_RES_MEMORY, AGP_I915_GTTADR, RF_ACTIVE | RF_SHAREABLE },
  92         { -1, 0 }
  93 };
  94
  95 static struct resource_spec agp_i965_res_spec[] = {
  96         { SYS_RES_MEMORY, AGP_I965_GTTMMADR, RF_ACTIVE | RF_SHAREABLE },
  97         { -1, 0 }
  98 };
  99
 100 struct agp_i810_softc {
 101         struct agp_softc agp;
 102         u_int32_t initial_aperture;     /* aperture size at startup */
 103         struct agp_gatt *gatt;
 104         int chiptype;                   /* i810-like or i830 */
 105         u_int32_t dcache_size;          /* i810 only */
 106         u_int32_t stolen;               /* number of i830/845 gtt entries for stolen memory */
 107         device_t bdev;                  /* bridge device */
 108
 109         void *argb_cursor;              /* contigmalloc area for ARGB cursor */
 110
 111         struct resource_spec * sc_res_spec;
 112         struct resource *sc_res[2];
 113 };
 114
 115 /* For adding new devices, devid is the id of the graphics controller
 116  * (pci:0:2:0, for example).  The placeholder (usually at pci:0:2:1) for the
 117  * second head should never be added.  The bridge_offset is the offset to
 118  * subtract from devid to get the id of the hostb that the device is on.
 119  */
 120 static const struct agp_i810_match {
 121         int devid;
 122         int chiptype;
 123         int bridge_offset;
 124         char *name;
 125 } agp_i810_matches[] = {
 126         {0x71218086, CHIP_I810, 0x00010000,
 127             "Intel 82810 (i810 GMCH) SVGA controller"},
 128         {0x71238086, CHIP_I810, 0x00010000,
 129             "Intel 82810-DC100 (i810-DC100 GMCH) SVGA controller"},
 130         {0x71258086, CHIP_I810, 0x00010000,
 131             "Intel 82810E (i810E GMCH) SVGA controller"},
 132         {0x11328086, CHIP_I810, 0x00020000,
 133             "Intel 82815 (i815 GMCH) SVGA controller"},
 134         {0x35778086, CHIP_I830, 0x00020000,
 135             "Intel 82830M (830M GMCH) SVGA controller"},
 136         {0x25628086, CHIP_I830, 0x00020000,
 137             "Intel 82845M (845M GMCH) SVGA controller"},
 138         {0x35828086, CHIP_I855, 0x00020000,
 139             "Intel 82852/855GM SVGA controller"},
 140         {0x25728086, CHIP_I855, 0x00020000,
 141             "Intel 82865G (865G GMCH) SVGA controller"},
 142         {0x25828086, CHIP_I915, 0x00020000,
 143             "Intel 82915G (915G GMCH) SVGA controller"},
 144         {0x258A8086, CHIP_I915, 0x00020000,
 145             "Intel E7221 SVGA controller"},
 146         {0x25928086, CHIP_I915, 0x00020000,
 147             "Intel 82915GM (915GM GMCH) SVGA controller"},
 148         {0x27728086, CHIP_I915, 0x00020000,
 149             "Intel 82945G (945G GMCH) SVGA controller"},
 150         {0x27A28086, CHIP_I915, 0x00020000,
 151             "Intel 82945GM (945GM GMCH) SVGA controller"},
 152         {0x27AE8086, CHIP_I915, 0x00020000,
 153             "Intel 945GME SVGA controller"},
 154         {0x29728086, CHIP_I965, 0x00020000,
 155             "Intel 946GZ SVGA controller"},
 156         {0x29828086, CHIP_I965, 0x00020000,
 157             "Intel G965 SVGA controller"},
 158         {0x29928086, CHIP_I965, 0x00020000,
 159             "Intel Q965 SVGA controller"},
 160         {0x29A28086, CHIP_I965, 0x00020000,
 161             "Intel G965 SVGA controller"},
 162         {0x29B28086, CHIP_G33, 0x00020000,
 163             "Intel Q35 SVGA controller"},
 164         {0x29C28086, CHIP_G33, 0x00020000,
 165             "Intel G33 SVGA controller"},
 166         {0x29D28086, CHIP_G33, 0x00020000,
 167             "Intel Q33 SVGA controller"},
 168         {0x2A028086, CHIP_I965, 0x00020000,
 169             "Intel GM965 SVGA controller"},
 170         {0x2A128086, CHIP_I965, 0x00020000,
 171             "Intel GME965 SVGA controller"},
 172         {0x2A428086, CHIP_I965, 0x00020000,
 173             "Intel GM45 SVGA controller"},
 174         {0x2E028086, CHIP_G4X, 0x00020000,
 175             "Intel 4 Series SVGA controller"},
 176         {0x2E128086, CHIP_G4X, 0x00020000,
 177             "Intel Q45 SVGA controller"},
 178         {0x2E228086, CHIP_G4X, 0x00020000,
 179             "Intel G45 SVGA controller"},
 180         {0, 0, 0, NULL}
 181 };
 182
 183 static const struct agp_i810_match*
 184 agp_i810_match(device_t dev)
 185 {
 186         int i, devid;
 187
 188         if (pci_get_class(dev) != PCIC_DISPLAY
 189             || pci_get_subclass(dev) != PCIS_DISPLAY_VGA)
 190                 return NULL;
 191
 192         devid = pci_get_devid(dev);
 193         for (i = 0; agp_i810_matches[i].devid != 0; i++) {
 194                 if (agp_i810_matches[i].devid == devid)
 195                     break;
 196         }
 197         if (agp_i810_matches[i].devid == 0)
 198                 return NULL;
 199         else
 200                 return &agp_i810_matches[i];
 201 }
 202
 203 /*
 204  * Find bridge device.
 205  */
 206 static device_t
 207 agp_i810_find_bridge(device_t dev)
 208 {
 209         device_t *children, child;
 210         int nchildren, i;
 211         u_int32_t devid;
 212         const struct agp_i810_match *match;
 213
 214         match = agp_i810_match(dev);
 215         devid = match->devid - match->bridge_offset;
 216
 217         if (device_get_children(device_get_parent(dev), &children, &nchildren))
 218                 return 0;
 219
 220         for (i = 0; i < nchildren; i++) {
 221                 child = children[i];
 222
 223                 if (pci_get_devid(child) == devid) {
 224                         kfree(children, M_TEMP);
 225                         return child;
 226                 }
 227         }
 228         kfree(children, M_TEMP);
 229         return 0;
 230 }
 231
 232 static void
 233 agp_i810_identify(driver_t *driver, device_t parent)
 234 {
 235
 236         if (device_find_child(parent, "agp", -1) == NULL &&
 237             agp_i810_match(parent))
 238                 device_add_child(parent, "agp", -1);
 239 }
 240
 241 static int
 242 agp_i810_probe(device_t dev)
 243 {
 244         device_t bdev;
 245         const struct agp_i810_match *match;
 246         u_int8_t smram;
 247         int gcc1, deven;
 248
 249         if (resource_disabled("agp", device_get_unit(dev)))
 250                 return (ENXIO);
 251         match = agp_i810_match(dev);
 252         if (match == NULL)
 253                 return ENXIO;
 254
 255         bdev = agp_i810_find_bridge(dev);
 256         if (!bdev) {
 257                 if (bootverbose)
 258                         kprintf("I810: can't find bridge device\n");
 259                 return ENXIO;
 260         }
 261
 262         /*
 263          * checking whether internal graphics device has been activated.
 264          */
 265         switch (match->chiptype) {
 266         case CHIP_I810:
 267                 smram = pci_read_config(bdev, AGP_I810_SMRAM, 1);
 268                 if ((smram & AGP_I810_SMRAM_GMS) ==
 269                     AGP_I810_SMRAM_GMS_DISABLED) {
 270                         if (bootverbose)
 271                                 kprintf("I810: disabled, not probing\n");
 272                         return ENXIO;
 273                 }
 274                 break;
 275         case CHIP_I830:
 276         case CHIP_I855:
 277                 gcc1 = pci_read_config(bdev, AGP_I830_GCC1, 1);
 278                 if ((gcc1 & AGP_I830_GCC1_DEV2) ==
 279                     AGP_I830_GCC1_DEV2_DISABLED) {
 280                         if (bootverbose)
 281                                 kprintf("I830: disabled, not probing\n");
 282                         return ENXIO;
 283                 }
 284                 break;
 285         case CHIP_I915:
 286         case CHIP_I965:
 287         case CHIP_G33:
 288                 deven = pci_read_config(bdev, AGP_I915_DEVEN, 4);
 289                 if ((deven & AGP_I915_DEVEN_D2F0) ==
 290                     AGP_I915_DEVEN_D2F0_DISABLED) {
 291                         if (bootverbose)
 292                                 kprintf("I915: disabled, not probing\n");
 293                         return ENXIO;
 294                 }
 295                 break;
 296         }
 297
 298         device_verbose(dev);
 299         if (match->devid == 0x35828086) {
 300                 switch (pci_read_config(dev, AGP_I85X_CAPID, 1)) {
 301                 case AGP_I855_GME:
 302                         device_set_desc(dev,
 303                             "Intel 82855GME (855GME GMCH) SVGA controller");
 304                         break;
 305                 case AGP_I855_GM:
 306                         device_set_desc(dev,
 307                             "Intel 82855GM (855GM GMCH) SVGA controller");
 308                         break;
 309                 case AGP_I852_GME:
 310                         device_set_desc(dev,
 311                             "Intel 82852GME (852GME GMCH) SVGA controller");
 312                         break;
 313                 case AGP_I852_GM:
 314                         device_set_desc(dev,
 315                             "Intel 82852GM (852GM GMCH) SVGA controller");
 316                         break;
 317                 default:
 318                         device_set_desc(dev,
 319                             "Intel 8285xM (85xGM GMCH) SVGA controller");
 320                         break;
 321                 }
 322         } else {
 323                 device_set_desc(dev, match->name);
 324         }
 325
 326         return BUS_PROBE_DEFAULT;
 327 }
 328
 329 static void
 330 agp_i810_dump_regs(device_t dev)
 331 {
 332         struct agp_i810_softc *sc = device_get_softc(dev);
 333
 334         device_printf(dev, "AGP_I810_PGTBL_CTL: %08x\n",
 335             bus_read_4(sc->sc_res[0], AGP_I810_PGTBL_CTL));
 336
 337         switch (sc->chiptype) {
 338         case CHIP_I810:
 339                 device_printf(dev, "AGP_I810_MISCC: 0x%04x\n",
 340                     pci_read_config(sc->bdev, AGP_I810_MISCC, 2));
 341                 break;
 342         case CHIP_I830:
 343                 device_printf(dev, "AGP_I830_GCC1: 0x%02x\n",
 344                     pci_read_config(sc->bdev, AGP_I830_GCC1, 1));
 345                 break;
 346         case CHIP_I855:
 347                 device_printf(dev, "AGP_I855_GCC1: 0x%02x\n",
 348                     pci_read_config(sc->bdev, AGP_I855_GCC1, 1));
 349                 break;
 350         case CHIP_I915:
 351         case CHIP_I965:
 352         case CHIP_G33:
 353                 device_printf(dev, "AGP_I855_GCC1: 0x%02x\n",
 354                     pci_read_config(sc->bdev, AGP_I855_GCC1, 1));
 355                 device_printf(dev, "AGP_I915_MSAC: 0x%02x\n",
 356                     pci_read_config(sc->bdev, AGP_I915_MSAC, 1));
 357                 break;
 358         }
 359         device_printf(dev, "Aperture resource size: %d bytes\n",
 360             AGP_GET_APERTURE(dev));
 361 }
 362
 363 static int
 364 agp_i810_attach(device_t dev)
 365 {
 366         struct agp_i810_softc *sc = device_get_softc(dev);
 367         struct agp_gatt *gatt;
 368         const struct agp_i810_match *match;
 369         int error;
 370
 371         sc->bdev = agp_i810_find_bridge(dev);
 372         if (!sc->bdev)
 373                 return ENOENT;
 374
 375         match = agp_i810_match(dev);
 376         sc->chiptype = match->chiptype;
 377
 378         switch (sc->chiptype) {
 379         case CHIP_I810:
 380         case CHIP_I830:
 381         case CHIP_I855:
 382                 sc->sc_res_spec = agp_i810_res_spec;
 383                 agp_set_aperture_resource(dev, AGP_APBASE);
 384                 break;
 385         case CHIP_I915:
 386         case CHIP_G33:
 387                 sc->sc_res_spec = agp_i915_res_spec;
 388                 agp_set_aperture_resource(dev, AGP_I915_GMADR);
 389                 break;
 390         case CHIP_I965:
 391         case CHIP_G4X:
 392                 sc->sc_res_spec = agp_i965_res_spec;
 393                 agp_set_aperture_resource(dev, AGP_I915_GMADR);
 394                 break;
 395         }
 396
 397         error = agp_generic_attach(dev);
 398         if (error)
 399                 return error;
 400
 401         if (sc->chiptype != CHIP_I965 && sc->chiptype != CHIP_G33 &&
 402             ptoa((vm_paddr_t)Maxmem) > 0xfffffffful)
 403         {
 404                 device_printf(dev, "agp_i810.c does not support physical "
 405                     "memory above 4GB.\n");
 406                 return ENOENT;
 407         }
 408
 409         if (bus_alloc_resources(dev, sc->sc_res_spec, sc->sc_res)) {
 410                 agp_generic_detach(dev);
 411                 return ENODEV;
 412         }
 413
 414         sc->initial_aperture = AGP_GET_APERTURE(dev);
 415         if (sc->initial_aperture == 0) {
 416                 device_printf(dev, "bad initial aperture size, disabling\n");
 417                 return ENXIO;
 418         }
 419
 420         gatt = kmalloc( sizeof(struct agp_gatt), M_AGP, M_INTWAIT);
 421         sc->gatt = gatt;
 422
 423         gatt->ag_entries = AGP_GET_APERTURE(dev) >> AGP_PAGE_SHIFT;
 424
 425         if ( sc->chiptype == CHIP_I810 ) {
 426                 /* Some i810s have on-chip memory called dcache */
 427                 if (bus_read_1(sc->sc_res[0], AGP_I810_DRT) &
 428                     AGP_I810_DRT_POPULATED)
 429                         sc->dcache_size = 4 * 1024 * 1024;
 430                 else
 431                         sc->dcache_size = 0;
 432
 433                 /* According to the specs the gatt on the i810 must be 64k */
 434                 gatt->ag_virtual = contigmalloc( 64 * 1024, M_AGP, 0,
 435                                         0, ~0, PAGE_SIZE, 0);
 436                 if (!gatt->ag_virtual) {
 437                         if (bootverbose)
 438                                 device_printf(dev, "contiguous allocation failed\n");
 439                         bus_release_resources(dev, sc->sc_res_spec,
 440                             sc->sc_res);
 441                         kfree(gatt, M_AGP);
 442                         agp_generic_detach(dev);
 443                         return ENOMEM;
 444                 }
 445                 bzero(gatt->ag_virtual, gatt->ag_entries * sizeof(u_int32_t));
 446
 447                 gatt->ag_physical = vtophys((vm_offset_t) gatt->ag_virtual);
 448                 agp_flush_cache();
 449                 /* Install the GATT. */
 450                 bus_write_4(sc->sc_res[0], AGP_I810_PGTBL_CTL,
 451                     gatt->ag_physical | 1);
 452         } else if ( sc->chiptype == CHIP_I830 ) {
 453                 /* The i830 automatically initializes the 128k gatt on boot. */
 454                 unsigned int gcc1, pgtblctl;
 455
 456                 gcc1 = pci_read_config(sc->bdev, AGP_I830_GCC1, 1);
 457                 switch (gcc1 & AGP_I830_GCC1_GMS) {
 458                         case AGP_I830_GCC1_GMS_STOLEN_512:
 459                                 sc->stolen = (512 - 132) * 1024 / 4096;
 460                                 break;
 461                         case AGP_I830_GCC1_GMS_STOLEN_1024:
 462                                 sc->stolen = (1024 - 132) * 1024 / 4096;
 463                                 break;
 464                         case AGP_I830_GCC1_GMS_STOLEN_8192:
 465                                 sc->stolen = (8192 - 132) * 1024 / 4096;
 466                                 break;
 467                         default:
 468                                 sc->stolen = 0;
 469                                 device_printf(dev, "unknown memory configuration, disabling\n");
 470                                 bus_release_resources(dev, sc->sc_res_spec,
 471                                     sc->sc_res);
 472                                 kfree(gatt, M_AGP);
 473                                 agp_generic_detach(dev);
 474                                 return EINVAL;
 475                 }
 476                 if (sc->stolen > 0) {
 477                         device_printf(dev, "detected %dk stolen memory\n",
 478                             sc->stolen * 4);
 479                 }
 480                 device_printf(dev, "aperture size is %dM\n",
 481                     sc->initial_aperture / 1024 / 1024);
 482
 483                 /* GATT address is already in there, make sure it's enabled */
 484                 pgtblctl = bus_read_4(sc->sc_res[0], AGP_I810_PGTBL_CTL);
 485                 pgtblctl |= 1;
 486                 bus_write_4(sc->sc_res[0], AGP_I810_PGTBL_CTL, pgtblctl);
 487
 488                 gatt->ag_physical = pgtblctl & ~1;
 489         } else if (sc->chiptype == CHIP_I855 || sc->chiptype == CHIP_I915 ||
 490             sc->chiptype == CHIP_I965 || sc->chiptype == CHIP_G33 ||
 491             sc->chiptype == CHIP_G4X) {
 492                 unsigned int gcc1, pgtblctl, stolen, gtt_size;
 493
 494                 /* Stolen memory is set up at the beginning of the aperture by
 495                  * the BIOS, consisting of the GATT followed by 4kb for the
 496                  * BIOS display.
 497                  */
 498                 switch (sc->chiptype) {
 499                 case CHIP_I855:
 500                         gtt_size = 128;
 501                         break;
 502                 case CHIP_I915:
 503                         gtt_size = 256;
 504                         break;
 505                 case CHIP_I965:
 506                         switch (bus_read_4(sc->sc_res[0], AGP_I810_PGTBL_CTL) &
 507                             AGP_I810_PGTBL_SIZE_MASK) {
 508                         case AGP_I810_PGTBL_SIZE_128KB:
 509                                 gtt_size = 128;
 510                                 break;
 511                         case AGP_I810_PGTBL_SIZE_256KB:
 512                                 gtt_size = 256;
 513                                 break;
 514                         case AGP_I810_PGTBL_SIZE_512KB:
 515                                 gtt_size = 512;
 516                                 break;
 517                         case AGP_I965_PGTBL_SIZE_1MB:
 518                                 gtt_size = 1024;
 519                                 break;
 520                         case AGP_I965_PGTBL_SIZE_2MB:
 521                                 gtt_size = 2048;
 522                                 break;
 523                         case AGP_I965_PGTBL_SIZE_1_5MB:
 524                                 gtt_size = 1024 + 512;
 525                                 break;
 526                         default:
 527                                 device_printf(dev, "Bad PGTBL size\n");
 528                                 bus_release_resources(dev, sc->sc_res_spec,
 529                                     sc->sc_res);
 530                                 kfree(gatt, M_AGP);
 531                                 agp_generic_detach(dev);
 532                                 return EINVAL;
 533                         }
 534                         break;
 535                 case CHIP_G33:
 536                         gcc1 = pci_read_config(sc->bdev, AGP_I855_GCC1, 2);
 537                         switch (gcc1 & AGP_G33_MGGC_GGMS_MASK) {
 538                         case AGP_G33_MGGC_GGMS_SIZE_1M:
 539                                 gtt_size = 1024;
 540                                 break;
 541                         case AGP_G33_MGGC_GGMS_SIZE_2M:
 542                                 gtt_size = 2048;
 543                                 break;
 544                         default:
 545                                 device_printf(dev, "Bad PGTBL size\n");
 546                                 bus_release_resources(dev, sc->sc_res_spec,
 547                                     sc->sc_res);
 548                                 kfree(gatt, M_AGP);
 549                                 agp_generic_detach(dev);
 550                                 return EINVAL;
 551                         }
 552                         break;
 553                 case CHIP_G4X:
 554                         gtt_size = 0;
 555                         break;
 556                 default:
 557                         device_printf(dev, "Bad chiptype\n");
 558                         bus_release_resources(dev, sc->sc_res_spec,
 559                             sc->sc_res);
 560                         kfree(gatt, M_AGP);
 561                         agp_generic_detach(dev);
 562                         return EINVAL;
 563                 }
 564
 565                 /* GCC1 is called MGGC on i915+ */
 566                 gcc1 = pci_read_config(sc->bdev, AGP_I855_GCC1, 1);
 567                 switch (gcc1 & AGP_I855_GCC1_GMS) {
 568                 case AGP_I855_GCC1_GMS_STOLEN_1M:
 569                         stolen = 1024;
 570                         break;
 571                 case AGP_I855_GCC1_GMS_STOLEN_4M:
 572                         stolen = 4 * 1024;
 573                         break;
 574                 case AGP_I855_GCC1_GMS_STOLEN_8M:
 575                         stolen = 8 * 1024;
 576                         break;
 577                 case AGP_I855_GCC1_GMS_STOLEN_16M:
 578                         stolen = 16 * 1024;
 579                         break;
 580                 case AGP_I855_GCC1_GMS_STOLEN_32M:
 581                         stolen = 32 * 1024;
 582                         break;
 583                 case AGP_I915_GCC1_GMS_STOLEN_48M:
 584                         if (sc->chiptype == CHIP_I915 ||
 585                             sc->chiptype == CHIP_I965 ||
 586                             sc->chiptype == CHIP_G33 ||
 587                             sc->chiptype == CHIP_G4X) {
 588                                 stolen = 48 * 1024;
 589                         } else {
 590                                 stolen = 0;
 591                         }
 592                         break;
 593                 case AGP_I915_GCC1_GMS_STOLEN_64M:
 594                         if (sc->chiptype == CHIP_I915 ||
 595                             sc->chiptype == CHIP_I965 ||
 596                             sc->chiptype == CHIP_G33 ||
 597                             sc->chiptype == CHIP_G4X) {
 598                                 stolen = 64 * 1024;
 599                         } else {
 600                                 stolen = 0;
 601                         }
 602                         break;
 603                 case AGP_G33_GCC1_GMS_STOLEN_128M:
 604                         if (sc->chiptype == CHIP_I965 ||
 605                             sc->chiptype == CHIP_G33 ||
 606                             sc->chiptype == CHIP_G4X) {
 607                                 stolen = 128 * 1024;
 608                         } else {
 609                                 stolen = 0;
 610                         }
 611                         break;
 612                 case AGP_G33_GCC1_GMS_STOLEN_256M:
 613                         if (sc->chiptype == CHIP_I965 ||
 614                             sc->chiptype == CHIP_G33 ||
 615                             sc->chiptype == CHIP_G4X) {
 616                                 stolen = 256 * 1024;
 617                         } else {
 618                                 stolen = 0;
 619                         }
 620                         break;
 621                 case AGP_G4X_GCC1_GMS_STOLEN_96M:
 622                         if (sc->chiptype == CHIP_I965 ||
 623                             sc->chiptype == CHIP_G4X) {
 624                                 stolen = 96 * 1024;
 625                         } else {
 626                                 stolen = 0;
 627                         }
 628                         break;
 629                 case AGP_G4X_GCC1_GMS_STOLEN_160M:
 630                         if (sc->chiptype == CHIP_I965 ||
 631                             sc->chiptype == CHIP_G4X) {
 632                                 stolen = 160 * 1024;
 633                         } else {
 634                                 stolen = 0;
 635                         }
 636                         break;
 637                 case AGP_G4X_GCC1_GMS_STOLEN_224M:
 638                         if (sc->chiptype == CHIP_I965 ||
 639                             sc->chiptype == CHIP_G4X) {
 640                                 stolen = 224 * 1024;
 641                         } else {
 642                                 stolen = 0;
 643                         }
 644                         break;
 645                 case AGP_G4X_GCC1_GMS_STOLEN_352M:
 646                         if (sc->chiptype == CHIP_I965 ||
 647                             sc->chiptype == CHIP_G4X) {
 648                                 stolen = 352 * 1024;
 649                         } else {
 650                                 stolen = 0;
 651                         }
 652                         break;
 653                 default:
 654                         device_printf(dev, "unknown memory configuration, "
 655                             "disabling\n");
 656                         bus_release_resources(dev, sc->sc_res_spec,
 657                             sc->sc_res);
 658                         kfree(gatt, M_AGP);
 659                         agp_generic_detach(dev);
 660                         return EINVAL;
 661                 }
 662
 663                 if (sc->chiptype != CHIP_G4X)
 664                     gtt_size += 4;
 665
 666                 sc->stolen = (stolen - gtt_size) * 1024 / 4096;
 667                 if (sc->stolen > 0)
 668                         device_printf(dev, "detected %dk stolen memory\n", sc->stolen * 4);
 669                 device_printf(dev, "aperture size is %dM\n", sc->initial_aperture / 1024 / 1024);
 670
 671                 /* GATT address is already in there, make sure it's enabled */
 672                 pgtblctl = bus_read_4(sc->sc_res[0], AGP_I810_PGTBL_CTL);
 673                 pgtblctl |= 1;
 674                 bus_write_4(sc->sc_res[0], AGP_I810_PGTBL_CTL, pgtblctl);
 675
 676                 gatt->ag_physical = pgtblctl & ~1;
 677         }
 678
 679         /* Add a device for the drm to attach to */
 680         /* XXX This will go away once we have vgapci */
 681         if (!device_add_child(dev, "drmsub", -1))
 682                 device_printf(dev, "could not add drm subdevice\n");
 683
 684         if (0)
 685                 agp_i810_dump_regs(dev);
 686
 687         return 0;
 688 }
 689
 690 static int
 691 agp_i810_detach(device_t dev)
 692 {
 693         struct agp_i810_softc *sc = device_get_softc(dev);
 694         device_t child;
 695
 696         agp_free_cdev(dev);
 697
 698         /* Clear the GATT base. */
 699         if ( sc->chiptype == CHIP_I810 ) {
 700                 bus_write_4(sc->sc_res[0], AGP_I810_PGTBL_CTL, 0);
 701         } else {
 702                 unsigned int pgtblctl;
 703                 pgtblctl = bus_read_4(sc->sc_res[0], AGP_I810_PGTBL_CTL);
 704                 pgtblctl &= ~1;
 705                 bus_write_4(sc->sc_res[0], AGP_I810_PGTBL_CTL, pgtblctl);
 706         }
 707
 708         /* Put the aperture back the way it started. */
 709         AGP_SET_APERTURE(dev, sc->initial_aperture);
 710
 711         if ( sc->chiptype == CHIP_I810 ) {
 712                 contigfree(sc->gatt->ag_virtual, 64 * 1024, M_AGP);
 713         }
 714         kfree(sc->gatt, M_AGP);
 715
 716         bus_release_resources(dev, sc->sc_res_spec, sc->sc_res);
 717         agp_free_res(dev);
 718
 719         /* XXX This will go away once we have vgapci */
 720         child = device_find_child(dev, "drmsub", 0);
 721         if (child != NULL)
 722                 device_delete_child(dev, child);
 723
 724         return 0;
 725 }
 726
 727 static int
 728 agp_i810_resume(device_t dev)
 729 {
 730         struct agp_i810_softc *sc;
 731         sc = device_get_softc(dev);
 732
 733         AGP_SET_APERTURE(dev, sc->initial_aperture);
 734
 735         /* Install the GATT. */
 736         bus_write_4(sc->sc_res[0], AGP_I810_PGTBL_CTL,
 737         sc->gatt->ag_physical | 1);
 738
 739         return (bus_generic_resume(dev));
 740 }
 741
 742 /**
 743  * Sets the PCI resource size of the aperture on i830-class and below chipsets,
 744  * while returning failure on later chipsets when an actual change is
 745  * requested.
 746  *
 747  * This whole function is likely bogus, as the kernel would probably need to
 748  * reconfigure the placement of the AGP aperture if a larger size is requested,
 749  * which doesn't happen currently.
 750  */
 751 static int
 752 agp_i810_set_aperture(device_t dev, u_int32_t aperture)
 753 {
 754         struct agp_i810_softc *sc = device_get_softc(dev);
 755         u_int16_t miscc, gcc1;
 756
 757         switch (sc->chiptype) {
 758         case CHIP_I810:
 759                 /*
 760                  * Double check for sanity.
 761                  */
 762                 if (aperture != 32 * 1024 * 1024 && aperture != 64 * 1024 * 1024) {
 763                         device_printf(dev, "bad aperture size %d\n", aperture);
 764                         return EINVAL;
 765                 }
 766
 767                 miscc = pci_read_config(sc->bdev, AGP_I810_MISCC, 2);
 768                 miscc &= ~AGP_I810_MISCC_WINSIZE;
 769                 if (aperture == 32 * 1024 * 1024)
 770                         miscc |= AGP_I810_MISCC_WINSIZE_32;
 771                 else
 772                         miscc |= AGP_I810_MISCC_WINSIZE_64;
 773
 774                 pci_write_config(sc->bdev, AGP_I810_MISCC, miscc, 2);
 775                 break;
 776         case CHIP_I830:
 777                 if (aperture != 64 * 1024 * 1024 &&
 778                     aperture != 128 * 1024 * 1024) {
 779                         device_printf(dev, "bad aperture size %d\n", aperture);
 780                         return EINVAL;
 781                 }
 782                 gcc1 = pci_read_config(sc->bdev, AGP_I830_GCC1, 2);
 783                 gcc1 &= ~AGP_I830_GCC1_GMASIZE;
 784                 if (aperture == 64 * 1024 * 1024)
 785                         gcc1 |= AGP_I830_GCC1_GMASIZE_64;
 786                 else
 787                         gcc1 |= AGP_I830_GCC1_GMASIZE_128;
 788
 789                 pci_write_config(sc->bdev, AGP_I830_GCC1, gcc1, 2);
 790                 break;
 791         case CHIP_I855:
 792         case CHIP_I915:
 793         case CHIP_I965:
 794         case CHIP_G33:
 795                 return agp_generic_set_aperture(dev, aperture);
 796         }
 797
 798         return 0;
 799 }
 800
 801 /**
 802  * Writes a GTT entry mapping the page at the given offset from the beginning
 803  * of the aperture to the given physical address.
 804  */
 805 static void
 806 agp_i810_write_gtt_entry(device_t dev, int offset, vm_offset_t physical,
 807     int enabled)
 808 {
 809         struct agp_i810_softc *sc = device_get_softc(dev);
 810         u_int32_t pte;
 811
 812         pte = (u_int32_t)physical | 1;
 813         if (sc->chiptype == CHIP_I965 || sc->chiptype == CHIP_G33) {
 814                 pte |= (physical & 0x0000000f00000000ull) >> 28;
 815         } else {
 816                 /* If we do actually have memory above 4GB on an older system,
 817                  * crash cleanly rather than scribble on system memory,
 818                  * so we know we need to fix it.
 819                  */
 820                 KASSERT((pte & 0x0000000f00000000ull) == 0,
 821                     (">4GB physical address in agp"));
 822         }
 823
 824         switch (sc->chiptype) {
 825         case CHIP_I810:
 826         case CHIP_I830:
 827         case CHIP_I855:
 828                 bus_write_4(sc->sc_res[0],
 829                     AGP_I810_GTT + (offset >> AGP_PAGE_SHIFT) * 4, pte);
 830                 break;
 831         case CHIP_I915:
 832         case CHIP_G33:
 833                 bus_write_4(sc->sc_res[1],
 834                     (offset >> AGP_PAGE_SHIFT) * 4, pte);
 835                 break;
 836         case CHIP_I965:
 837                 bus_write_4(sc->sc_res[0],
 838                     (offset >> AGP_PAGE_SHIFT) * 4 + (512 * 1024), pte);
 839                 break;
 840         }
 841 }
 842
 843 static int
 844 agp_i810_bind_page(device_t dev, int offset, vm_offset_t physical)
 845 {
 846         struct agp_i810_softc *sc = device_get_softc(dev);
 847
 848         if (offset < 0 || offset >= (sc->gatt->ag_entries << AGP_PAGE_SHIFT)) {
 849                 device_printf(dev, "failed: offset is 0x%08x, shift is %d, entries is %d\n", offset, AGP_PAGE_SHIFT, sc->gatt->ag_entries);
 850                 return EINVAL;
 851         }
 852
 853         if ( sc->chiptype != CHIP_I810 ) {
 854                 if ( (offset >> AGP_PAGE_SHIFT) < sc->stolen ) {
 855                         device_printf(dev, "trying to bind into stolen memory");
 856                         return EINVAL;
 857                 }
 858         }
 859
 860         agp_i810_write_gtt_entry(dev, offset, physical, 1);
 861
 862         return 0;
 863 }
 864
 865 static int
 866 agp_i810_unbind_page(device_t dev, int offset)
 867 {
 868         struct agp_i810_softc *sc = device_get_softc(dev);
 869
 870         if (offset < 0 || offset >= (sc->gatt->ag_entries << AGP_PAGE_SHIFT))
 871                 return EINVAL;
 872
 873         if ( sc->chiptype != CHIP_I810 ) {
 874                 if ( (offset >> AGP_PAGE_SHIFT) < sc->stolen ) {
 875                         device_printf(dev, "trying to unbind from stolen memory");
 876                         return EINVAL;
 877                 }
 878         }
 879
 880         agp_i810_write_gtt_entry(dev, offset, 0, 0);
 881
 882         return 0;
 883 }
 884
 885 /*
 886  * Writing via memory mapped registers already flushes all TLBs.
 887  */
 888 static void
 889 agp_i810_flush_tlb(device_t dev)
 890 {
 891 }
 892
 893 static int
 894 agp_i810_enable(device_t dev, u_int32_t mode)
 895 {
 896
 897         return 0;
 898 }
 899
 900 static struct agp_memory *
 901 agp_i810_alloc_memory(device_t dev, int type, vm_size_t size)
 902 {
 903         struct agp_i810_softc *sc = device_get_softc(dev);
 904         struct agp_memory *mem;
 905
 906         if ((size & (AGP_PAGE_SIZE - 1)) != 0)
 907                 return 0;
 908
 909         if (sc->agp.as_allocated + size > sc->agp.as_maxmem)
 910                 return 0;
 911
 912         if (type == 1) {
 913                 /*
 914                  * Mapping local DRAM into GATT.
 915                  */
 916                 if ( sc->chiptype != CHIP_I810 )
 917                         return 0;
 918                 if (size != sc->dcache_size)
 919                         return 0;
 920         } else if (type == 2) {
 921                 /*
 922                  * Type 2 is the contiguous physical memory type, that hands
 923                  * back a physical address.  This is used for cursors on i810.
 924                  * Hand back as many single pages with physical as the user
 925                  * wants, but only allow one larger allocation (ARGB cursor)
 926                  * for simplicity.
 927                  */
 928                 if (size != AGP_PAGE_SIZE) {
 929                         if (sc->argb_cursor != NULL)
 930                                 return 0;
 931
 932                         /* Allocate memory for ARGB cursor, if we can. */
 933                         sc->argb_cursor = contigmalloc(size, M_AGP,
 934                            0, 0, ~0, PAGE_SIZE, 0);
 935                         if (sc->argb_cursor == NULL)
 936                                 return 0;
 937                 }
 938         }
 939
 940         mem = kmalloc(sizeof *mem, M_AGP, M_INTWAIT);
 941         mem->am_id = sc->agp.as_nextid++;
 942         mem->am_size = size;
 943         mem->am_type = type;
 944         if (type != 1 && (type != 2 || size == AGP_PAGE_SIZE))
 945                 mem->am_obj = vm_object_allocate(OBJT_DEFAULT,
 946                                                  atop(round_page(size)));
 947         else
 948                 mem->am_obj = 0;
 949
 950         if (type == 2) {
 951                 if (size == AGP_PAGE_SIZE) {
 952                         /*
 953                          * Allocate and wire down the page now so that we can
 954                          * get its physical address.
 955                          */
 956                         vm_page_t m;
 957
 958                         m = vm_page_grab(mem->am_obj, 0,
 959                                          VM_ALLOC_NORMAL|VM_ALLOC_ZERO|VM_ALLOC_RETRY);
 960                         if ((m->flags & PG_ZERO) == 0)
 961                                 vm_page_zero_fill(m);
 962                         vm_page_wire(m);
 963                         mem->am_physical = VM_PAGE_TO_PHYS(m);
 964                         vm_page_wakeup(m);
 965                 } else {
 966                         /* Our allocation is already nicely wired down for us.
 967                          * Just grab the physical address.
 968                          */
 969                         mem->am_physical = vtophys(sc->argb_cursor);
 970                 }
 971         } else {
 972                 mem->am_physical = 0;
 973         }
 974
 975         mem->am_offset = 0;
 976         mem->am_is_bound = 0;
 977         TAILQ_INSERT_TAIL(&sc->agp.as_memory, mem, am_link);
 978         sc->agp.as_allocated += size;
 979
 980         return mem;
 981 }
 982
 983 static int
 984 agp_i810_free_memory(device_t dev, struct agp_memory *mem)
 985 {
 986         struct agp_i810_softc *sc = device_get_softc(dev);
 987
 988         if (mem->am_is_bound)
 989                 return EBUSY;
 990
 991         if (mem->am_type == 2) {
 992                 if (mem->am_size == AGP_PAGE_SIZE) {
 993                         /*
 994                          * Unwire the page which we wired in alloc_memory.
 995                          */
 996                         vm_page_t m = vm_page_lookup(mem->am_obj, 0);
 997                         vm_page_unwire(m, 0);
 998                 } else {
 999                         contigfree(sc->argb_cursor, mem->am_size, M_AGP);
1000                         sc->argb_cursor = NULL;
1001                 }
1002         }
1003
1004         sc->agp.as_allocated -= mem->am_size;
1005         TAILQ_REMOVE(&sc->agp.as_memory, mem, am_link);
1006         if (mem->am_obj)
1007                 vm_object_deallocate(mem->am_obj);
1008         kfree(mem, M_AGP);
1009         return 0;
1010 }
1011
1012 static int
1013 agp_i810_bind_memory(device_t dev, struct agp_memory *mem,
1014                      vm_offset_t offset)
1015 {
1016         struct agp_i810_softc *sc = device_get_softc(dev);
1017         vm_offset_t i;
1018
1019         /* Do some sanity checks first. */
1020         if (offset < 0 || (offset & (AGP_PAGE_SIZE - 1)) != 0 ||
1021             offset + mem->am_size > AGP_GET_APERTURE(dev)) {
1022                 device_printf(dev, "binding memory at bad offset %#x\n",
1023                     (int)offset);
1024                 return EINVAL;
1025         }
1026
1027         if (mem->am_type == 2 && mem->am_size != AGP_PAGE_SIZE) {
1028                 lockmgr(&sc->agp.as_lock, LK_EXCLUSIVE);
1029                 if (mem->am_is_bound) {
1030                         lockmgr(&sc->agp.as_lock, LK_RELEASE);
1031                         return EINVAL;
1032                 }
1033                 /* The memory's already wired down, just stick it in the GTT. */
1034                 for (i = 0; i < mem->am_size; i += AGP_PAGE_SIZE) {
1035                         agp_i810_write_gtt_entry(dev, offset + i,
1036                             mem->am_physical + i, 1);
1037                 }
1038                 agp_flush_cache();
1039                 mem->am_offset = offset;
1040                 mem->am_is_bound = 1;
1041                 lockmgr(&sc->agp.as_lock, LK_RELEASE);
1042                 return 0;
1043         }
1044
1045         if (mem->am_type != 1)
1046                 return agp_generic_bind_memory(dev, mem, offset);
1047
1048         if ( sc->chiptype != CHIP_I810 )
1049                 return EINVAL;
1050
1051         for (i = 0; i < mem->am_size; i += AGP_PAGE_SIZE) {
1052                 bus_write_4(sc->sc_res[0],
1053                     AGP_I810_GTT + (i >> AGP_PAGE_SHIFT) * 4, i | 3);
1054         }
1055
1056         return 0;
1057 }
1058
1059 static int
1060 agp_i810_unbind_memory(device_t dev, struct agp_memory *mem)
1061 {
1062         struct agp_i810_softc *sc = device_get_softc(dev);
1063         vm_offset_t i;
1064
1065         if (mem->am_type == 2 && mem->am_size != AGP_PAGE_SIZE) {
1066                 lockmgr(&sc->agp.as_lock, LK_EXCLUSIVE);
1067                 if (!mem->am_is_bound) {
1068                         lockmgr(&sc->agp.as_lock, LK_RELEASE);
1069                         return EINVAL;
1070                 }
1071
1072                 for (i = 0; i < mem->am_size; i += AGP_PAGE_SIZE) {
1073                         agp_i810_write_gtt_entry(dev, mem->am_offset + i,
1074                             0, 0);
1075                 }
1076                 agp_flush_cache();
1077                 mem->am_is_bound = 0;
1078                 lockmgr(&sc->agp.as_lock, LK_RELEASE);
1079                 return 0;
1080         }
1081
1082         if (mem->am_type != 1)
1083                 return agp_generic_unbind_memory(dev, mem);
1084
1085         if ( sc->chiptype != CHIP_I810 )
1086                 return EINVAL;
1087
1088         for (i = 0; i < mem->am_size; i += AGP_PAGE_SIZE) {
1089                 bus_write_4(sc->sc_res[0],
1090                     AGP_I810_GTT + (i >> AGP_PAGE_SHIFT) * 4, 0);
1091         }
1092
1093         return 0;
1094 }
1095
1096 static device_method_t agp_i810_methods[] = {
1097         /* Device interface */
1098         DEVMETHOD(device_identify,      agp_i810_identify),
1099         DEVMETHOD(device_probe,         agp_i810_probe),
1100         DEVMETHOD(device_attach,        agp_i810_attach),
1101         DEVMETHOD(device_detach,        agp_i810_detach),
1102         DEVMETHOD(device_suspend,       bus_generic_suspend),
1103         DEVMETHOD(device_resume,        agp_i810_resume),
1104
1105         /* AGP interface */
1106         DEVMETHOD(agp_get_aperture,     agp_generic_get_aperture),
1107         DEVMETHOD(agp_set_aperture,     agp_i810_set_aperture),
1108         DEVMETHOD(agp_bind_page,        agp_i810_bind_page),
1109         DEVMETHOD(agp_unbind_page,      agp_i810_unbind_page),
1110         DEVMETHOD(agp_flush_tlb,        agp_i810_flush_tlb),
1111         DEVMETHOD(agp_enable,           agp_i810_enable),
1112         DEVMETHOD(agp_alloc_memory,     agp_i810_alloc_memory),
1113         DEVMETHOD(agp_free_memory,      agp_i810_free_memory),
1114         DEVMETHOD(agp_bind_memory,      agp_i810_bind_memory),
1115         DEVMETHOD(agp_unbind_memory,    agp_i810_unbind_memory),
1116
1117         { 0, 0 }
1118 };
1119
1120 static driver_t agp_i810_driver = {
1121         "agp",
1122         agp_i810_methods,
1123         sizeof(struct agp_i810_softc),
1124 };
1125
1126 static devclass_t agp_devclass;
1127
1128 DRIVER_MODULE(agp_i810, pci, agp_i810_driver, agp_devclass, 0, 0);
1129 MODULE_DEPEND(agp_i810, agp, 1, 1, 1);
1130 MODULE_DEPEND(agp_i810, pci, 1, 1, 1);