2 * Copyright (c) 2002-2009 Sam Leffler, Errno Consulting
3 * Copyright (c) 2002-2008 Atheros Communications, Inc.
5 * Permission to use, copy, modify, and/or distribute this software for any
6 * purpose with or without fee is hereby granted, provided that the above
7 * copyright notice and this permission notice appear in all copies.
9 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
10 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
11 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
12 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
13 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
14 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
15 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
17 * $FreeBSD: head/sys/dev/ath/ath_hal/ar5212/ar2425.c 188979 2009-02-24 01:07:06Z sam $
22 #include "ah_internal.h"
24 #include "ar5212/ar5212.h"
25 #include "ar5212/ar5212reg.h"
26 #include "ar5212/ar5212phy.h"
28 #include "ah_eeprom_v3.h"
32 #include "ar5212/ar5212.ini"
35 RF_HAL_FUNCS base; /* public state, must be first */
36 uint16_t pcdacTable[PWR_TABLE_SIZE_2413];
38 uint32_t Bank1Data[NELEM(ar5212Bank1_2425)];
39 uint32_t Bank2Data[NELEM(ar5212Bank2_2425)];
40 uint32_t Bank3Data[NELEM(ar5212Bank3_2425)];
41 uint32_t Bank6Data[NELEM(ar5212Bank6_2425)]; /* 2417 is same size */
42 uint32_t Bank7Data[NELEM(ar5212Bank7_2425)];
44 #define AR2425(ah) ((struct ar2425State *) AH5212(ah)->ah_rfHal)
46 extern void ar5212ModifyRfBuffer(uint32_t *rfBuf, uint32_t reg32,
47 uint32_t numBits, uint32_t firstBit, uint32_t column);
50 ar2425WriteRegs(struct ath_hal *ah, u_int modesIndex, u_int freqIndex,
53 HAL_INI_WRITE_ARRAY(ah, ar5212Modes_2425, modesIndex, writes);
54 HAL_INI_WRITE_ARRAY(ah, ar5212Common_2425, 1, writes);
55 HAL_INI_WRITE_ARRAY(ah, ar5212BB_RfGain_2425, freqIndex, writes);
58 * for SWAN similar to Condor
59 * Bit 0 enables link to go to L1 when MAC goes to sleep.
60 * Bit 3 enables the loop back the link down to reset.
62 if (AH_PRIVATE(ah)->ah_ispcie && && ath_hal_pcieL1SKPEnable) {
63 OS_REG_WRITE(ah, AR_PCIE_PMC,
64 AR_PCIE_PMC_ENA_L1 | AR_PCIE_PMC_ENA_RESET);
67 * for Standby issue in Swan/Condor.
68 * Bit 9 (MAC_WOW_PWR_STATE_MASK_D2)to be set to avoid skips
69 * before last Training Sequence 2 (TS2)
70 * Bit 8 (MAC_WOW_PWR_STATE_MASK_D1)to be unset to assert
71 * Power Reset along with PCI Reset
73 OS_REG_SET_BIT(ah, AR_PCIE_PMC, MAC_WOW_PWR_STATE_MASK_D2);
78 * Take the MHz channel value and set the Channel value
80 * ASSUMES: Writes enabled to analog bus
83 ar2425SetChannel(struct ath_hal *ah, const struct ieee80211_channel *chan)
85 uint16_t freq = ath_hal_gethwchannel(ah, chan);
86 uint32_t channelSel = 0;
87 uint32_t bModeSynth = 0;
88 uint32_t aModeRefSel = 0;
91 OS_MARK(ah, AH_MARK_SETCHANNEL, freq);
96 channelSel = freq - 2272;
97 channelSel = ath_hal_reverseBits(channelSel, 8);
99 txctl = OS_REG_READ(ah, AR_PHY_CCK_TX_CTRL);
101 // Enable channel spreading for channel 14
102 OS_REG_WRITE(ah, AR_PHY_CCK_TX_CTRL,
103 txctl | AR_PHY_CCK_TX_CTRL_JAPAN);
105 OS_REG_WRITE(ah, AR_PHY_CCK_TX_CTRL,
106 txctl &~ AR_PHY_CCK_TX_CTRL_JAPAN);
109 } else if (((freq % 5) == 2) && (freq <= 5435)) {
110 freq = freq - 2; /* Align to even 5MHz raster */
111 channelSel = ath_hal_reverseBits(
112 (uint32_t)(((freq - 4800)*10)/25 + 1), 8);
113 aModeRefSel = ath_hal_reverseBits(0, 2);
114 } else if ((freq % 20) == 0 && freq >= 5120) {
115 channelSel = ath_hal_reverseBits(
116 ((freq - 4800) / 20 << 2), 8);
117 aModeRefSel = ath_hal_reverseBits(1, 2);
118 } else if ((freq % 10) == 0) {
119 channelSel = ath_hal_reverseBits(
120 ((freq - 4800) / 10 << 1), 8);
121 aModeRefSel = ath_hal_reverseBits(1, 2);
122 } else if ((freq % 5) == 0) {
123 channelSel = ath_hal_reverseBits(
124 (freq - 4800) / 5, 8);
125 aModeRefSel = ath_hal_reverseBits(1, 2);
127 HALDEBUG(ah, HAL_DEBUG_ANY, "%s: invalid channel %u MHz\n",
132 reg32 = (channelSel << 4) | (aModeRefSel << 2) | (bModeSynth << 1) |
134 OS_REG_WRITE(ah, AR_PHY(0x27), reg32 & 0xff);
137 OS_REG_WRITE(ah, AR_PHY(0x36), reg32 & 0x7f);
139 AH_PRIVATE(ah)->ah_curchan = chan;
144 * Reads EEPROM header info from device structure and programs
147 * REQUIRES: Access to the analog rf device
150 ar2425SetRfRegs(struct ath_hal *ah,
151 const struct ieee80211_channel *chan,
152 uint16_t modesIndex, uint16_t *rfXpdGain)
154 #define RF_BANK_SETUP(_priv, _ix, _col) do { \
156 for (i = 0; i < NELEM(ar5212Bank##_ix##_2425); i++) \
157 (_priv)->Bank##_ix##Data[i] = ar5212Bank##_ix##_2425[i][_col];\
159 struct ath_hal_5212 *ahp = AH5212(ah);
160 const HAL_EEPROM *ee = AH_PRIVATE(ah)->ah_eeprom;
161 struct ar2425State *priv = AR2425(ah);
162 uint16_t ob2GHz = 0, db2GHz = 0;
165 HALDEBUG(ah, HAL_DEBUG_RFPARAM, "%s: chan %u/0x%x modesIndex %u\n",
166 __func__, chan->ic_freq, chan->ic_flags, modesIndex);
170 /* Setup rf parameters */
171 if (IEEE80211_IS_CHAN_B(chan)) {
172 ob2GHz = ee->ee_obFor24;
173 db2GHz = ee->ee_dbFor24;
175 ob2GHz = ee->ee_obFor24g;
176 db2GHz = ee->ee_dbFor24g;
180 RF_BANK_SETUP(priv, 1, 1);
183 RF_BANK_SETUP(priv, 2, modesIndex);
186 RF_BANK_SETUP(priv, 3, modesIndex);
189 RF_BANK_SETUP(priv, 6, modesIndex);
191 ar5212ModifyRfBuffer(priv->Bank6Data, ob2GHz, 3, 193, 0);
192 ar5212ModifyRfBuffer(priv->Bank6Data, db2GHz, 3, 190, 0);
195 RF_BANK_SETUP(priv, 7, modesIndex);
197 /* Write Analog registers */
198 HAL_INI_WRITE_BANK(ah, ar5212Bank1_2425, priv->Bank1Data, regWrites);
199 HAL_INI_WRITE_BANK(ah, ar5212Bank2_2425, priv->Bank2Data, regWrites);
200 HAL_INI_WRITE_BANK(ah, ar5212Bank3_2425, priv->Bank3Data, regWrites);
202 HALASSERT(NELEM(ar5212Bank6_2425) == NELEM(ar5212Bank6_2417));
203 HAL_INI_WRITE_BANK(ah, ar5212Bank6_2417, priv->Bank6Data,
206 HAL_INI_WRITE_BANK(ah, ar5212Bank6_2425, priv->Bank6Data,
208 HAL_INI_WRITE_BANK(ah, ar5212Bank7_2425, priv->Bank7Data, regWrites);
210 /* Now that we have reprogrammed rfgain value, clear the flag. */
211 ahp->ah_rfgainState = HAL_RFGAIN_INACTIVE;
213 HALDEBUG(ah, HAL_DEBUG_RFPARAM, "<==%s\n", __func__);
219 * Return a reference to the requested RF Bank.
222 ar2425GetRfBank(struct ath_hal *ah, int bank)
224 struct ar2425State *priv = AR2425(ah);
226 HALASSERT(priv != AH_NULL);
228 case 1: return priv->Bank1Data;
229 case 2: return priv->Bank2Data;
230 case 3: return priv->Bank3Data;
231 case 6: return priv->Bank6Data;
232 case 7: return priv->Bank7Data;
234 HALDEBUG(ah, HAL_DEBUG_ANY, "%s: unknown RF Bank %d requested\n",
240 * Return indices surrounding the value in sorted integer lists.
242 * NB: the input list is assumed to be sorted in ascending order
245 GetLowerUpperIndex(int16_t v, const uint16_t *lp, uint16_t listSize,
246 uint32_t *vlo, uint32_t *vhi)
249 const uint16_t *ep = lp+listSize;
253 * Check first and last elements for out-of-bounds conditions.
255 if (target < lp[0]) {
259 if (target >= ep[-1]) {
260 *vlo = *vhi = listSize - 1;
264 /* look for value being near or between 2 values in list */
265 for (tp = lp; tp < ep; tp++) {
267 * If value is close to the current value of the list
268 * then target is not between values, it is one of the values
271 *vlo = *vhi = tp - (const uint16_t *) lp;
275 * Look for value being between current value and next value
276 * if so return these 2 values
278 if (target < tp[1]) {
279 *vlo = tp - (const uint16_t *) lp;
287 * Fill the Vpdlist for indices Pmax-Pmin
290 ar2425FillVpdTable(uint32_t pdGainIdx, int16_t Pmin, int16_t Pmax,
291 const int16_t *pwrList, const uint16_t *VpdList,
292 uint16_t numIntercepts,
293 uint16_t retVpdList[][64])
296 int16_t currPwr = (int16_t)(2*Pmin);
297 /* since Pmin is pwr*2 and pwrList is 4*pwr */
302 if (numIntercepts < 2)
305 while (ii <= (uint16_t)(Pmax - Pmin)) {
306 GetLowerUpperIndex(currPwr, (const uint16_t *) pwrList,
307 numIntercepts, &(idxL), &(idxR));
309 idxR = 1; /* extrapolate below */
310 if (idxL == (uint32_t)(numIntercepts - 1))
311 idxL = numIntercepts - 2; /* extrapolate above */
312 if (pwrList[idxL] == pwrList[idxR])
316 (((currPwr - pwrList[idxL])*VpdList[idxR]+
317 (pwrList[idxR] - currPwr)*VpdList[idxL])/
318 (pwrList[idxR] - pwrList[idxL]));
319 retVpdList[pdGainIdx][ii] = kk;
321 currPwr += 2; /* half dB steps */
328 * Returns interpolated or the scaled up interpolated value
331 interpolate_signed(uint16_t target, uint16_t srcLeft, uint16_t srcRight,
332 int16_t targetLeft, int16_t targetRight)
336 if (srcRight != srcLeft) {
337 rv = ((target - srcLeft)*targetRight +
338 (srcRight - target)*targetLeft) / (srcRight - srcLeft);
346 * Uses the data points read from EEPROM to reconstruct the pdadc power table
347 * Called by ar2425SetPowerTable()
350 ar2425getGainBoundariesAndPdadcsForPowers(struct ath_hal *ah, uint16_t channel,
351 const RAW_DATA_STRUCT_2413 *pRawDataset,
352 uint16_t pdGainOverlap_t2,
353 int16_t *pMinCalPower, uint16_t pPdGainBoundaries[],
354 uint16_t pPdGainValues[], uint16_t pPDADCValues[])
356 /* Note the items statically allocated below are to reduce stack usage */
358 int32_t ss;/* potentially -ve index for taking care of pdGainOverlap */
360 uint32_t numPdGainsUsed = 0;
361 static uint16_t VpdTable_L[MAX_NUM_PDGAINS_PER_CHANNEL][MAX_PWR_RANGE_IN_HALF_DB];
362 /* filled out Vpd table for all pdGains (chanL) */
363 static uint16_t VpdTable_R[MAX_NUM_PDGAINS_PER_CHANNEL][MAX_PWR_RANGE_IN_HALF_DB];
364 /* filled out Vpd table for all pdGains (chanR) */
365 static uint16_t VpdTable_I[MAX_NUM_PDGAINS_PER_CHANNEL][MAX_PWR_RANGE_IN_HALF_DB];
366 /* filled out Vpd table for all pdGains (interpolated) */
368 * If desired to support -ve power levels in future, just
369 * change pwr_I_0 to signed 5-bits.
371 static int16_t Pmin_t2[MAX_NUM_PDGAINS_PER_CHANNEL];
372 /* to accomodate -ve power levels later on. */
373 static int16_t Pmax_t2[MAX_NUM_PDGAINS_PER_CHANNEL];
374 /* to accomodate -ve power levels later on */
378 uint32_t sizeCurrVpdTable, maxIndex, tgtIndex;
380 HALDEBUG(ah, HAL_DEBUG_RFPARAM, "==>%s:\n", __func__);
382 /* Get upper lower index */
383 GetLowerUpperIndex(channel, pRawDataset->pChannels,
384 pRawDataset->numChannels, &(idxL), &(idxR));
386 for (ii = 0; ii < MAX_NUM_PDGAINS_PER_CHANNEL; ii++) {
387 jj = MAX_NUM_PDGAINS_PER_CHANNEL - ii - 1;
388 /* work backwards 'cause highest pdGain for lowest power */
389 numVpd = pRawDataset->pDataPerChannel[idxL].pDataPerPDGain[jj].numVpd;
391 pPdGainValues[numPdGainsUsed] = pRawDataset->pDataPerChannel[idxL].pDataPerPDGain[jj].pd_gain;
392 Pmin_t2[numPdGainsUsed] = pRawDataset->pDataPerChannel[idxL].pDataPerPDGain[jj].pwr_t4[0];
393 if (Pmin_t2[numPdGainsUsed] >pRawDataset->pDataPerChannel[idxR].pDataPerPDGain[jj].pwr_t4[0]) {
394 Pmin_t2[numPdGainsUsed] = pRawDataset->pDataPerChannel[idxR].pDataPerPDGain[jj].pwr_t4[0];
396 Pmin_t2[numPdGainsUsed] = (int16_t)
397 (Pmin_t2[numPdGainsUsed] / 2);
398 Pmax_t2[numPdGainsUsed] = pRawDataset->pDataPerChannel[idxL].pDataPerPDGain[jj].pwr_t4[numVpd-1];
399 if (Pmax_t2[numPdGainsUsed] > pRawDataset->pDataPerChannel[idxR].pDataPerPDGain[jj].pwr_t4[numVpd-1])
400 Pmax_t2[numPdGainsUsed] =
401 pRawDataset->pDataPerChannel[idxR].pDataPerPDGain[jj].pwr_t4[numVpd-1];
402 Pmax_t2[numPdGainsUsed] = (int16_t)(Pmax_t2[numPdGainsUsed] / 2);
404 numPdGainsUsed, Pmin_t2[numPdGainsUsed], Pmax_t2[numPdGainsUsed],
405 &(pRawDataset->pDataPerChannel[idxL].pDataPerPDGain[jj].pwr_t4[0]),
406 &(pRawDataset->pDataPerChannel[idxL].pDataPerPDGain[jj].Vpd[0]), numVpd, VpdTable_L
409 numPdGainsUsed, Pmin_t2[numPdGainsUsed], Pmax_t2[numPdGainsUsed],
410 &(pRawDataset->pDataPerChannel[idxR].pDataPerPDGain[jj].pwr_t4[0]),
411 &(pRawDataset->pDataPerChannel[idxR].pDataPerPDGain[jj].Vpd[0]), numVpd, VpdTable_R
413 for (kk = 0; kk < (uint16_t)(Pmax_t2[numPdGainsUsed] - Pmin_t2[numPdGainsUsed]); kk++) {
414 VpdTable_I[numPdGainsUsed][kk] =
416 channel, pRawDataset->pChannels[idxL], pRawDataset->pChannels[idxR],
417 (int16_t)VpdTable_L[numPdGainsUsed][kk], (int16_t)VpdTable_R[numPdGainsUsed][kk]);
419 /* fill VpdTable_I for this pdGain */
422 /* if this pdGain is used */
425 *pMinCalPower = Pmin_t2[0];
426 kk = 0; /* index for the final table */
427 for (ii = 0; ii < numPdGainsUsed; ii++) {
428 if (ii == (numPdGainsUsed - 1))
429 pPdGainBoundaries[ii] = Pmax_t2[ii] +
430 PD_GAIN_BOUNDARY_STRETCH_IN_HALF_DB;
432 pPdGainBoundaries[ii] = (uint16_t)
433 ((Pmax_t2[ii] + Pmin_t2[ii+1]) / 2 );
435 /* Find starting index for this pdGain */
437 ss = 0; /* for the first pdGain, start from index 0 */
439 ss = (pPdGainBoundaries[ii-1] - Pmin_t2[ii]) -
441 Vpd_step = (uint16_t)(VpdTable_I[ii][1] - VpdTable_I[ii][0]);
442 Vpd_step = (uint16_t)((Vpd_step < 1) ? 1 : Vpd_step);
444 *-ve ss indicates need to extrapolate data below for this pdGain
447 tmpVal = (int16_t)(VpdTable_I[ii][0] + ss*Vpd_step);
448 pPDADCValues[kk++] = (uint16_t)((tmpVal < 0) ? 0 : tmpVal);
452 sizeCurrVpdTable = Pmax_t2[ii] - Pmin_t2[ii];
453 tgtIndex = pPdGainBoundaries[ii] + pdGainOverlap_t2 - Pmin_t2[ii];
454 maxIndex = (tgtIndex < sizeCurrVpdTable) ? tgtIndex : sizeCurrVpdTable;
456 while (ss < (int16_t)maxIndex)
457 pPDADCValues[kk++] = VpdTable_I[ii][ss++];
459 Vpd_step = (uint16_t)(VpdTable_I[ii][sizeCurrVpdTable-1] -
460 VpdTable_I[ii][sizeCurrVpdTable-2]);
461 Vpd_step = (uint16_t)((Vpd_step < 1) ? 1 : Vpd_step);
463 * for last gain, pdGainBoundary == Pmax_t2, so will
464 * have to extrapolate
466 if (tgtIndex > maxIndex) { /* need to extrapolate above */
467 while(ss < (int16_t)tgtIndex) {
469 (VpdTable_I[ii][sizeCurrVpdTable-1] +
470 (ss-maxIndex)*Vpd_step);
471 pPDADCValues[kk++] = (tmpVal > 127) ?
475 } /* extrapolated above */
476 } /* for all pdGainUsed */
478 while (ii < MAX_NUM_PDGAINS_PER_CHANNEL) {
479 pPdGainBoundaries[ii] = pPdGainBoundaries[ii-1];
483 pPDADCValues[kk] = pPDADCValues[kk-1];
487 HALDEBUG(ah, HAL_DEBUG_RFPARAM, "<==%s\n", __func__);
491 /* Same as 2413 set power table */
493 ar2425SetPowerTable(struct ath_hal *ah,
494 int16_t *minPower, int16_t *maxPower,
495 const struct ieee80211_channel *chan,
498 uint16_t freq = ath_hal_gethwchannel(ah, chan);
499 struct ath_hal_5212 *ahp = AH5212(ah);
500 const HAL_EEPROM *ee = AH_PRIVATE(ah)->ah_eeprom;
501 const RAW_DATA_STRUCT_2413 *pRawDataset = AH_NULL;
502 uint16_t pdGainOverlap_t2;
503 int16_t minCalPower2413_t2;
504 uint16_t *pdadcValues = ahp->ah_pcdacTable;
505 uint16_t gainBoundaries[4];
506 uint32_t i, reg32, regoffset;
508 HALDEBUG(ah, HAL_DEBUG_RFPARAM, "%s:chan 0x%x flag 0x%x\n",
509 __func__, freq, chan->ic_flags);
511 if (IEEE80211_IS_CHAN_G(chan) || IEEE80211_IS_CHAN_108G(chan))
512 pRawDataset = &ee->ee_rawDataset2413[headerInfo11G];
513 else if (IEEE80211_IS_CHAN_B(chan))
514 pRawDataset = &ee->ee_rawDataset2413[headerInfo11B];
516 HALDEBUG(ah, HAL_DEBUG_ANY, "%s:illegal mode\n", __func__);
520 pdGainOverlap_t2 = (uint16_t) SM(OS_REG_READ(ah, AR_PHY_TPCRG5),
521 AR_PHY_TPCRG5_PD_GAIN_OVERLAP);
523 ar2425getGainBoundariesAndPdadcsForPowers(ah, freq,
524 pRawDataset, pdGainOverlap_t2,&minCalPower2413_t2,gainBoundaries,
525 rfXpdGain, pdadcValues);
527 OS_REG_RMW_FIELD(ah, AR_PHY_TPCRG1, AR_PHY_TPCRG1_NUM_PD_GAIN,
528 (pRawDataset->pDataPerChannel[0].numPdGains - 1));
531 * Note the pdadc table may not start at 0 dBm power, could be
532 * negative or greater than 0. Need to offset the power
533 * values by the amount of minPower for griffin
535 if (minCalPower2413_t2 != 0)
536 ahp->ah_txPowerIndexOffset = (int16_t)(0 - minCalPower2413_t2);
538 ahp->ah_txPowerIndexOffset = 0;
540 /* Finally, write the power values into the baseband power table */
541 regoffset = 0x9800 + (672 <<2); /* beginning of pdadc table in griffin */
542 for (i = 0; i < 32; i++) {
543 reg32 = ((pdadcValues[4*i + 0] & 0xFF) << 0) |
544 ((pdadcValues[4*i + 1] & 0xFF) << 8) |
545 ((pdadcValues[4*i + 2] & 0xFF) << 16) |
546 ((pdadcValues[4*i + 3] & 0xFF) << 24) ;
547 OS_REG_WRITE(ah, regoffset, reg32);
551 OS_REG_WRITE(ah, AR_PHY_TPCRG5,
552 SM(pdGainOverlap_t2, AR_PHY_TPCRG5_PD_GAIN_OVERLAP) |
553 SM(gainBoundaries[0], AR_PHY_TPCRG5_PD_GAIN_BOUNDARY_1) |
554 SM(gainBoundaries[1], AR_PHY_TPCRG5_PD_GAIN_BOUNDARY_2) |
555 SM(gainBoundaries[2], AR_PHY_TPCRG5_PD_GAIN_BOUNDARY_3) |
556 SM(gainBoundaries[3], AR_PHY_TPCRG5_PD_GAIN_BOUNDARY_4));
562 ar2425GetMinPower(struct ath_hal *ah, const RAW_DATA_PER_CHANNEL_2413 *data)
565 uint16_t Pmin=0,numVpd;
567 for (ii = 0; ii < MAX_NUM_PDGAINS_PER_CHANNEL; ii++) {
568 jj = MAX_NUM_PDGAINS_PER_CHANNEL - ii - 1;
569 /* work backwards 'cause highest pdGain for lowest power */
570 numVpd = data->pDataPerPDGain[jj].numVpd;
572 Pmin = data->pDataPerPDGain[jj].pwr_t4[0];
580 ar2425GetMaxPower(struct ath_hal *ah, const RAW_DATA_PER_CHANNEL_2413 *data)
583 uint16_t Pmax=0,numVpd;
585 for (ii=0; ii< MAX_NUM_PDGAINS_PER_CHANNEL; ii++) {
586 /* work forwards cuase lowest pdGain for highest power */
587 numVpd = data->pDataPerPDGain[ii].numVpd;
589 Pmax = data->pDataPerPDGain[ii].pwr_t4[numVpd-1];
598 ar2425GetChannelMaxMinPower(struct ath_hal *ah,
599 const struct ieee80211_channel *chan,
600 int16_t *maxPow, int16_t *minPow)
602 uint16_t freq = chan->ic_freq; /* NB: never mapped */
603 const HAL_EEPROM *ee = AH_PRIVATE(ah)->ah_eeprom;
604 const RAW_DATA_STRUCT_2413 *pRawDataset = AH_NULL;
605 const RAW_DATA_PER_CHANNEL_2413 *data = AH_NULL;
606 uint16_t numChannels;
607 int totalD,totalF, totalMin,last, i;
611 if (IEEE80211_IS_CHAN_G(chan) || IEEE80211_IS_CHAN_108G(chan))
612 pRawDataset = &ee->ee_rawDataset2413[headerInfo11G];
613 else if (IEEE80211_IS_CHAN_B(chan))
614 pRawDataset = &ee->ee_rawDataset2413[headerInfo11B];
618 numChannels = pRawDataset->numChannels;
619 data = pRawDataset->pDataPerChannel;
621 /* Make sure the channel is in the range of the TP values
627 if ((freq < data[0].channelValue) ||
628 (freq > data[numChannels-1].channelValue)) {
629 if (freq < data[0].channelValue) {
630 *maxPow = ar2425GetMaxPower(ah, &data[0]);
631 *minPow = ar2425GetMinPower(ah, &data[0]);
634 *maxPow = ar2425GetMaxPower(ah, &data[numChannels - 1]);
635 *minPow = ar2425GetMinPower(ah, &data[numChannels - 1]);
640 /* Linearly interpolate the power value now */
641 for (last=0,i=0; (i<numChannels) && (freq > data[i].channelValue);
643 totalD = data[i].channelValue - data[last].channelValue;
645 totalF = ar2425GetMaxPower(ah, &data[i]) - ar2425GetMaxPower(ah, &data[last]);
646 *maxPow = (int8_t) ((totalF*(freq-data[last].channelValue) +
647 ar2425GetMaxPower(ah, &data[last])*totalD)/totalD);
648 totalMin = ar2425GetMinPower(ah, &data[i]) - ar2425GetMinPower(ah, &data[last]);
649 *minPow = (int8_t) ((totalMin*(freq-data[last].channelValue) +
650 ar2425GetMinPower(ah, &data[last])*totalD)/totalD);
653 if (freq == data[i].channelValue) {
654 *maxPow = ar2425GetMaxPower(ah, &data[i]);
655 *minPow = ar2425GetMinPower(ah, &data[i]);
663 * Free memory for analog bank scratch buffers
666 ar2425RfDetach(struct ath_hal *ah)
668 struct ath_hal_5212 *ahp = AH5212(ah);
670 HALASSERT(ahp->ah_rfHal != AH_NULL);
671 ath_hal_free(ahp->ah_rfHal);
672 ahp->ah_rfHal = AH_NULL;
676 * Allocate memory for analog bank scratch buffers
677 * Scratch Buffer will be reinitialized every reset so no need to zero now
680 ar2425RfAttach(struct ath_hal *ah, HAL_STATUS *status)
682 struct ath_hal_5212 *ahp = AH5212(ah);
683 struct ar2425State *priv;
685 HALASSERT(ah->ah_magic == AR5212_MAGIC);
687 HALASSERT(ahp->ah_rfHal == AH_NULL);
688 priv = ath_hal_malloc(sizeof(struct ar2425State));
689 if (priv == AH_NULL) {
690 HALDEBUG(ah, HAL_DEBUG_ANY,
691 "%s: cannot allocate private state\n", __func__);
692 *status = HAL_ENOMEM; /* XXX */
695 priv->base.rfDetach = ar2425RfDetach;
696 priv->base.writeRegs = ar2425WriteRegs;
697 priv->base.getRfBank = ar2425GetRfBank;
698 priv->base.setChannel = ar2425SetChannel;
699 priv->base.setRfRegs = ar2425SetRfRegs;
700 priv->base.setPowerTable = ar2425SetPowerTable;
701 priv->base.getChannelMaxMinPower = ar2425GetChannelMaxMinPower;
702 priv->base.getNfAdjust = ar5212GetNfAdjust;
704 ahp->ah_pcdacTable = priv->pcdacTable;
705 ahp->ah_pcdacTableSize = sizeof(priv->pcdacTable);
706 ahp->ah_rfHal = &priv->base;
712 ar2425Probe(struct ath_hal *ah)
714 return IS_2425(ah) || IS_2417(ah);
716 AH_RF(RF2425, ar2425Probe, ar2425RfAttach);