2 * Copyright (c) 2002-2009 Sam Leffler, Errno Consulting
3 * Copyright (c) 2002-2008 Atheros Communications, Inc.
5 * Permission to use, copy, modify, and/or distribute this software for any
6 * purpose with or without fee is hereby granted, provided that the above
7 * copyright notice and this permission notice appear in all copies.
9 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
10 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
11 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
12 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
13 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
14 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
15 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
17 * $FreeBSD: head/sys/dev/ath/ath_hal/ar5416/ar2133.c 188980 2009-02-24 01:16:40Z sam $
22 #include "ah_internal.h"
24 #include "ah_eeprom_v14.h"
26 #include "ar5416/ar5416.h"
27 #include "ar5416/ar5416reg.h"
28 #include "ar5416/ar5416phy.h"
31 RF_HAL_FUNCS base; /* public state, must be first */
32 uint16_t pcdacTable[1];
41 /* NB: Bank*Data storage follows */
43 #define AR2133(ah) ((struct ar2133State *) AH5212(ah)->ah_rfHal)
45 #define ar5416ModifyRfBuffer ar5212ModifyRfBuffer /*XXX*/
47 void ar5416ModifyRfBuffer(uint32_t *rfBuf, uint32_t reg32,
48 uint32_t numBits, uint32_t firstBit, uint32_t column);
51 ar2133WriteRegs(struct ath_hal *ah, u_int modesIndex, u_int freqIndex,
54 (void) ath_hal_ini_write(ah, &AH5416(ah)->ah_ini_bb_rfgain,
59 * Take the MHz channel value and set the Channel value
61 * ASSUMES: Writes enabled to analog bus
64 ar2133SetChannel(struct ath_hal *ah, const struct ieee80211_channel *chan)
66 uint32_t channelSel = 0;
67 uint32_t bModeSynth = 0;
68 uint32_t aModeRefSel = 0;
73 OS_MARK(ah, AH_MARK_SETCHANNEL, chan->ic_freq);
75 ar5416GetChannelCenters(ah, chan, ¢ers);
76 freq = centers.synth_center;
81 if (((freq - 2192) % 5) == 0) {
82 channelSel = ((freq - 672) * 2 - 3040)/10;
84 } else if (((freq - 2224) % 5) == 0) {
85 channelSel = ((freq - 704) * 2 - 3040) / 10;
88 HALDEBUG(ah, HAL_DEBUG_ANY,
89 "%s: invalid channel %u MHz\n", __func__, freq);
93 channelSel = (channelSel << 2) & 0xff;
94 channelSel = ath_hal_reverseBits(channelSel, 8);
96 txctl = OS_REG_READ(ah, AR_PHY_CCK_TX_CTRL);
98 /* Enable channel spreading for channel 14 */
99 OS_REG_WRITE(ah, AR_PHY_CCK_TX_CTRL,
100 txctl | AR_PHY_CCK_TX_CTRL_JAPAN);
102 OS_REG_WRITE(ah, AR_PHY_CCK_TX_CTRL,
103 txctl &~ AR_PHY_CCK_TX_CTRL_JAPAN);
105 } else if ((freq % 20) == 0 && freq >= 5120) {
106 channelSel = ath_hal_reverseBits(((freq - 4800) / 20 << 2), 8);
107 if (AR_SREV_SOWL_10_OR_LATER(ah))
108 aModeRefSel = ath_hal_reverseBits(3, 2);
110 aModeRefSel = ath_hal_reverseBits(1, 2);
111 } else if ((freq % 10) == 0) {
112 channelSel = ath_hal_reverseBits(((freq - 4800) / 10 << 1), 8);
113 if (AR_SREV_SOWL_10_OR_LATER(ah))
114 aModeRefSel = ath_hal_reverseBits(2, 2);
116 aModeRefSel = ath_hal_reverseBits(1, 2);
117 } else if ((freq % 5) == 0) {
118 channelSel = ath_hal_reverseBits((freq - 4800) / 5, 8);
119 aModeRefSel = ath_hal_reverseBits(1, 2);
121 HALDEBUG(ah, HAL_DEBUG_ANY, "%s: invalid channel %u MHz\n",
126 reg32 = (channelSel << 8) | (aModeRefSel << 2) | (bModeSynth << 1) |
129 OS_REG_WRITE(ah, AR_PHY(0x37), reg32);
131 AH_PRIVATE(ah)->ah_curchan = chan;
137 * Return a reference to the requested RF Bank.
140 ar2133GetRfBank(struct ath_hal *ah, int bank)
142 struct ar2133State *priv = AR2133(ah);
144 HALASSERT(priv != AH_NULL);
146 case 1: return priv->Bank1Data;
147 case 2: return priv->Bank2Data;
148 case 3: return priv->Bank3Data;
149 case 6: return priv->Bank6Data;
150 case 7: return priv->Bank7Data;
152 HALDEBUG(ah, HAL_DEBUG_ANY, "%s: unknown RF Bank %d requested\n",
158 * Reads EEPROM header info from device structure and programs
161 * REQUIRES: Access to the analog rf device
164 ar2133SetRfRegs(struct ath_hal *ah, const struct ieee80211_channel *chan,
165 uint16_t modesIndex, uint16_t *rfXpdGain)
167 struct ar2133State *priv = AR2133(ah);
172 /* Setup Bank 0 Write */
173 ath_hal_ini_bank_setup(priv->Bank0Data, &AH5416(ah)->ah_ini_bank0, 1);
175 /* Setup Bank 1 Write */
176 ath_hal_ini_bank_setup(priv->Bank1Data, &AH5416(ah)->ah_ini_bank1, 1);
178 /* Setup Bank 2 Write */
179 ath_hal_ini_bank_setup(priv->Bank2Data, &AH5416(ah)->ah_ini_bank2, 1);
181 /* Setup Bank 3 Write */
182 ath_hal_ini_bank_setup(priv->Bank3Data, &AH5416(ah)->ah_ini_bank3, modesIndex);
184 /* Setup Bank 6 Write */
185 ath_hal_ini_bank_setup(priv->Bank6Data, &AH5416(ah)->ah_ini_bank6, modesIndex);
187 /* Only the 5 or 2 GHz OB/DB need to be set for a mode */
188 if (IEEE80211_IS_CHAN_2GHZ(chan)) {
189 ar5416ModifyRfBuffer(priv->Bank6Data,
190 ath_hal_eepromGet(ah, AR_EEP_OB_2, AH_NULL), 3, 197, 0);
191 ar5416ModifyRfBuffer(priv->Bank6Data,
192 ath_hal_eepromGet(ah, AR_EEP_DB_2, AH_NULL), 3, 194, 0);
194 ar5416ModifyRfBuffer(priv->Bank6Data,
195 ath_hal_eepromGet(ah, AR_EEP_OB_5, AH_NULL), 3, 203, 0);
196 ar5416ModifyRfBuffer(priv->Bank6Data,
197 ath_hal_eepromGet(ah, AR_EEP_DB_5, AH_NULL), 3, 200, 0);
199 /* Setup Bank 7 Setup */
200 ath_hal_ini_bank_setup(priv->Bank7Data, &AH5416(ah)->ah_ini_bank7, 1);
202 /* Write Analog registers */
203 writes = ath_hal_ini_bank_write(ah, &AH5416(ah)->ah_ini_bank0,
205 writes = ath_hal_ini_bank_write(ah, &AH5416(ah)->ah_ini_bank1,
206 priv->Bank1Data, writes);
207 writes = ath_hal_ini_bank_write(ah, &AH5416(ah)->ah_ini_bank2,
208 priv->Bank2Data, writes);
209 writes = ath_hal_ini_bank_write(ah, &AH5416(ah)->ah_ini_bank3,
210 priv->Bank3Data, writes);
211 writes = ath_hal_ini_bank_write(ah, &AH5416(ah)->ah_ini_bank6,
212 priv->Bank6Data, writes);
213 (void) ath_hal_ini_bank_write(ah, &AH5416(ah)->ah_ini_bank7,
214 priv->Bank7Data, writes);
221 * Read the transmit power levels from the structures taken from EEPROM
222 * Interpolate read transmit power values for this channel
223 * Organize the transmit power values into a table for writing into the hardware
227 ar2133SetPowerTable(struct ath_hal *ah, int16_t *pPowerMin, int16_t *pPowerMax,
228 const struct ieee80211_channel *chan, uint16_t *rfXpdGain)
235 ar2133GetMinPower(struct ath_hal *ah, EXPN_DATA_PER_CHANNEL_5112 *data)
238 int16_t minGain,minPwr,minPcdac,retVal;
240 /* Assume NUM_POINTS_XPD0 > 0 */
241 minGain = data->pDataPerXPD[0].xpd_gain;
242 for (minIndex=0,i=1; i<NUM_XPD_PER_CHANNEL; i++) {
243 if (data->pDataPerXPD[i].xpd_gain < minGain) {
245 minGain = data->pDataPerXPD[i].xpd_gain;
248 minPwr = data->pDataPerXPD[minIndex].pwr_t4[0];
249 minPcdac = data->pDataPerXPD[minIndex].pcdac[0];
250 for (i=1; i<NUM_POINTS_XPD0; i++) {
251 if (data->pDataPerXPD[minIndex].pwr_t4[i] < minPwr) {
252 minPwr = data->pDataPerXPD[minIndex].pwr_t4[i];
253 minPcdac = data->pDataPerXPD[minIndex].pcdac[i];
256 retVal = minPwr - (minPcdac*2);
262 ar2133GetChannelMaxMinPower(struct ath_hal *ah,
263 const struct ieee80211_channel *chan,
264 int16_t *maxPow, int16_t *minPow)
267 struct ath_hal_5212 *ahp = AH5212(ah);
268 int numChannels=0,i,last;
269 int totalD, totalF,totalMin;
270 EXPN_DATA_PER_CHANNEL_5112 *data=AH_NULL;
271 EEPROM_POWER_EXPN_5112 *powerArray=AH_NULL;
274 if (IS_CHAN_A(chan)) {
275 powerArray = ahp->ah_modePowerArray5112;
276 data = powerArray[headerInfo11A].pDataPerChannel;
277 numChannels = powerArray[headerInfo11A].numChannels;
278 } else if (IS_CHAN_G(chan) || IS_CHAN_108G(chan)) {
279 /* XXX - is this correct? Should we also use the same power for turbo G? */
280 powerArray = ahp->ah_modePowerArray5112;
281 data = powerArray[headerInfo11G].pDataPerChannel;
282 numChannels = powerArray[headerInfo11G].numChannels;
283 } else if (IS_CHAN_B(chan)) {
284 powerArray = ahp->ah_modePowerArray5112;
285 data = powerArray[headerInfo11B].pDataPerChannel;
286 numChannels = powerArray[headerInfo11B].numChannels;
290 /* Make sure the channel is in the range of the TP values
293 if ((numChannels < 1) ||
294 (chan->channel < data[0].channelValue) ||
295 (chan->channel > data[numChannels-1].channelValue))
298 /* Linearly interpolate the power value now */
300 (i<numChannels) && (chan->channel > data[i].channelValue);
302 totalD = data[i].channelValue - data[last].channelValue;
304 totalF = data[i].maxPower_t4 - data[last].maxPower_t4;
305 *maxPow = (int8_t) ((totalF*(chan->channel-data[last].channelValue) + data[last].maxPower_t4*totalD)/totalD);
307 totalMin = ar2133GetMinPower(ah,&data[i]) - ar2133GetMinPower(ah, &data[last]);
308 *minPow = (int8_t) ((totalMin*(chan->channel-data[last].channelValue) + ar2133GetMinPower(ah, &data[last])*totalD)/totalD);
311 if (chan->channel == data[i].channelValue) {
312 *maxPow = data[i].maxPower_t4;
313 *minPow = ar2133GetMinPower(ah, &data[i]);
319 *maxPow = *minPow = 0;
325 ar2133GetNoiseFloor(struct ath_hal *ah, int16_t nfarray[])
327 struct ath_hal_5416 *ahp = AH5416(ah);
330 switch (ahp->ah_rx_chainmask) {
332 nf = MS(OS_REG_READ(ah, AR_PHY_CH2_CCA), AR_PHY_CH2_MINCCA_PWR);
334 nf = 0 - ((nf ^ 0x1ff) + 1);
335 HALDEBUG(ah, HAL_DEBUG_NFCAL,
336 "NF calibrated [ctl] [chain 2] is %d\n", nf);
339 nf = MS(OS_REG_READ(ah, AR_PHY_CH2_EXT_CCA), AR_PHY_CH2_EXT_MINCCA_PWR);
341 nf = 0 - ((nf ^ 0x1ff) + 1);
342 HALDEBUG(ah, HAL_DEBUG_NFCAL,
343 "NF calibrated [ext] [chain 2] is %d\n", nf);
348 nf = MS(OS_REG_READ(ah, AR_PHY_CH1_CCA), AR_PHY_CH1_MINCCA_PWR);
350 nf = 0 - ((nf ^ 0x1ff) + 1);
351 HALDEBUG(ah, HAL_DEBUG_NFCAL,
352 "NF calibrated [ctl] [chain 1] is %d\n", nf);
356 nf = MS(OS_REG_READ(ah, AR_PHY_CH1_EXT_CCA), AR_PHY_CH1_EXT_MINCCA_PWR);
358 nf = 0 - ((nf ^ 0x1ff) + 1);
359 HALDEBUG(ah, HAL_DEBUG_NFCAL,
360 "NF calibrated [ext] [chain 1] is %d\n", nf);
364 nf = MS(OS_REG_READ(ah, AR_PHY_CCA), AR_PHY_MINCCA_PWR);
366 nf = 0 - ((nf ^ 0x1ff) + 1);
367 HALDEBUG(ah, HAL_DEBUG_NFCAL,
368 "NF calibrated [ctl] [chain 0] is %d\n", nf);
371 nf = MS(OS_REG_READ(ah, AR_PHY_EXT_CCA), AR_PHY_EXT_MINCCA_PWR);
373 nf = 0 - ((nf ^ 0x1ff) + 1);
374 HALDEBUG(ah, HAL_DEBUG_NFCAL,
375 "NF calibrated [ext] [chain 0] is %d\n", nf);
383 * Adjust NF based on statistical values for 5GHz frequencies.
384 * Stubbed:Not used by Fowl
387 ar2133GetNfAdjust(struct ath_hal *ah, const HAL_CHANNEL_INTERNAL *c)
393 * Free memory for analog bank scratch buffers
396 ar2133RfDetach(struct ath_hal *ah)
398 struct ath_hal_5212 *ahp = AH5212(ah);
400 HALASSERT(ahp->ah_rfHal != AH_NULL);
401 ath_hal_free(ahp->ah_rfHal);
402 ahp->ah_rfHal = AH_NULL;
406 * Allocate memory for analog bank scratch buffers
407 * Scratch Buffer will be reinitialized every reset so no need to zero now
410 ar2133RfAttach(struct ath_hal *ah, HAL_STATUS *status)
412 struct ath_hal_5212 *ahp = AH5212(ah);
413 struct ar2133State *priv;
416 HALDEBUG(ah, HAL_DEBUG_ATTACH, "%s: attach AR2133 radio\n", __func__);
418 HALASSERT(ahp->ah_rfHal == AH_NULL);
419 priv = ath_hal_malloc(sizeof(struct ar2133State)
420 + AH5416(ah)->ah_ini_bank0.rows * sizeof(uint32_t)
421 + AH5416(ah)->ah_ini_bank1.rows * sizeof(uint32_t)
422 + AH5416(ah)->ah_ini_bank2.rows * sizeof(uint32_t)
423 + AH5416(ah)->ah_ini_bank3.rows * sizeof(uint32_t)
424 + AH5416(ah)->ah_ini_bank6.rows * sizeof(uint32_t)
425 + AH5416(ah)->ah_ini_bank7.rows * sizeof(uint32_t)
427 if (priv == AH_NULL) {
428 HALDEBUG(ah, HAL_DEBUG_ANY,
429 "%s: cannot allocate private state\n", __func__);
430 *status = HAL_ENOMEM; /* XXX */
433 priv->base.rfDetach = ar2133RfDetach;
434 priv->base.writeRegs = ar2133WriteRegs;
435 priv->base.getRfBank = ar2133GetRfBank;
436 priv->base.setChannel = ar2133SetChannel;
437 priv->base.setRfRegs = ar2133SetRfRegs;
438 priv->base.setPowerTable = ar2133SetPowerTable;
439 priv->base.getChannelMaxMinPower = ar2133GetChannelMaxMinPower;
440 priv->base.getNfAdjust = ar2133GetNfAdjust;
442 bankData = (uint32_t *) &priv[1];
443 priv->Bank0Data = bankData, bankData += AH5416(ah)->ah_ini_bank0.rows;
444 priv->Bank1Data = bankData, bankData += AH5416(ah)->ah_ini_bank1.rows;
445 priv->Bank2Data = bankData, bankData += AH5416(ah)->ah_ini_bank2.rows;
446 priv->Bank3Data = bankData, bankData += AH5416(ah)->ah_ini_bank3.rows;
447 priv->Bank6Data = bankData, bankData += AH5416(ah)->ah_ini_bank6.rows;
448 priv->Bank7Data = bankData, bankData += AH5416(ah)->ah_ini_bank7.rows;
450 ahp->ah_pcdacTable = priv->pcdacTable;
451 ahp->ah_pcdacTableSize = sizeof(priv->pcdacTable);
452 ahp->ah_rfHal = &priv->base;
454 * Set noise floor adjust method; we arrange a
455 * direct call instead of thunking.
457 AH_PRIVATE(ah)->ah_getNfAdjust = priv->base.getNfAdjust;
458 AH_PRIVATE(ah)->ah_getNoiseFloor = ar2133GetNoiseFloor;