2 * Copyright (c) 2003 Nate Lawson (SDG)
3 * Copyright (c) 2001 Michael Smith
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
9 * 1. Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * 2. Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
27 * $FreeBSD: src/sys/dev/acpica/acpi_cpu.c,v 1.36 2004/05/07 05:22:37 njl Exp $
28 * $DragonFly: src/sys/dev/acpica5/acpi_cpu.c,v 1.3 2004/06/27 08:52:39 dillon Exp $
32 #include <sys/param.h>
34 #include <sys/kernel.h>
35 #include <sys/malloc.h>
36 #include <sys/globaldata.h>
37 #include <sys/power.h>
41 #include <bus/pci/pcivar.h>
42 #include <machine/atomic.h>
43 #include <machine/bus.h>
44 #include <machine/globaldata.h>
45 #include <machine/smp.h>
52 * Support for ACPI Processor devices, including ACPI 2.0 throttling
53 * and C[1-3] sleep states.
55 * TODO: implement scans of all CPUs to be sure all Cx states are
59 /* Hooks for the ACPI CA debugging infrastructure */
60 #define _COMPONENT ACPI_PROCESSOR
61 ACPI_MODULE_NAME("PROCESSOR")
64 struct resource *p_lvlx; /* Register to read to enter state. */
65 uint32_t type; /* C1-3 (C4 and up treated as C3). */
66 uint32_t trans_lat; /* Transition latency (usec). */
67 uint32_t power; /* Power consumed (mW). */
69 #define MAX_CX_STATES 8
71 struct acpi_cx_stats {
72 int long_slp; /* Count of sleeps >= trans_lat. */
73 int short_slp; /* Count of sleeps < trans_lat. */
76 struct acpi_cpu_softc {
78 ACPI_HANDLE cpu_handle;
79 uint32_t acpi_id; /* ACPI processor id */
80 uint32_t cpu_p_blk; /* ACPI P_BLK location */
81 uint32_t cpu_p_blk_len; /* P_BLK length (must be 6). */
82 struct resource *cpu_p_cnt; /* Throttling control register */
83 struct acpi_cx cpu_cx_states[MAX_CX_STATES];
84 int cpu_cx_count; /* Number of valid Cx states. */
87 #define CPU_GET_REG(reg, width) \
88 (bus_space_read_ ## width(rman_get_bustag((reg)), \
89 rman_get_bushandle((reg)), 0))
90 #define CPU_SET_REG(reg, width, val) \
91 (bus_space_write_ ## width(rman_get_bustag((reg)), \
92 rman_get_bushandle((reg)), 0, (val)))
95 * Speeds are stored in counts, from 1 to CPU_MAX_SPEED, and
96 * reported to the user in tenths of a percent.
98 static uint32_t cpu_duty_offset;
99 static uint32_t cpu_duty_width;
100 #define CPU_MAX_SPEED (1 << cpu_duty_width)
101 #define CPU_SPEED_PERCENT(x) ((1000 * (x)) / CPU_MAX_SPEED)
102 #define CPU_SPEED_PRINTABLE(x) (CPU_SPEED_PERCENT(x) / 10), \
103 (CPU_SPEED_PERCENT(x) % 10)
104 #define CPU_P_CNT_THT_EN (1<<4)
105 #define PM_USEC(x) ((x) >> 2) /* ~4 clocks per usec (3.57955 Mhz) */
107 #define ACPI_CPU_NOTIFY_PERF_STATES 0x80 /* _PSS changed. */
108 #define ACPI_CPU_NOTIFY_CX_STATES 0x81 /* _CST changed. */
110 #define CPU_QUIRK_NO_C3 0x0001 /* C3-type states are not usable. */
111 #define CPU_QUIRK_NO_THROTTLE 0x0002 /* Throttling is not usable. */
113 #define PCI_VENDOR_INTEL 0x8086
114 #define PCI_DEVICE_82371AB_3 0x7113 /* PIIX4 chipset for quirks. */
115 #define PCI_REVISION_A_STEP 0
116 #define PCI_REVISION_B_STEP 1
117 #define PCI_REVISION_4E 2
118 #define PCI_REVISION_4M 3
120 /* Platform hardware resource information. */
121 static uint32_t cpu_smi_cmd; /* Value to write to SMI_CMD. */
122 static uint8_t cpu_pstate_cnt;/* Register to take over throttling. */
123 static uint8_t cpu_cst_cnt; /* Indicate we are _CST aware. */
124 static uint32_t cpu_rid; /* Driver-wide resource id. */
125 static uint32_t cpu_quirks; /* Indicate any hardware bugs. */
128 static int cpu_cx_count; /* Number of valid states */
129 static uint32_t cpu_cx_next; /* State to use for next sleep. */
130 static uint32_t cpu_non_c3; /* Index of lowest non-C3 state. */
131 static struct acpi_cx_stats cpu_cx_stats[MAX_CX_STATES];
132 static int cpu_idle_busy; /* Count of CPUs in acpi_cpu_idle. */
134 /* Values for sysctl. */
135 static uint32_t cpu_throttle_state;
136 static uint32_t cpu_throttle_max;
137 static int cpu_cx_lowest;
138 static char cpu_cx_supported[64];
140 static device_t *cpu_devices;
141 static int cpu_ndevices;
142 static struct acpi_cpu_softc **cpu_softc;
144 static struct sysctl_ctx_list acpi_cpu_sysctl_ctx;
145 static struct sysctl_oid *acpi_cpu_sysctl_tree;
147 static int acpi_cpu_probe(device_t dev);
148 static int acpi_cpu_attach(device_t dev);
149 static int acpi_pcpu_get_id(uint32_t idx, uint32_t *acpi_id,
151 static int acpi_cpu_shutdown(device_t dev);
152 static int acpi_cpu_throttle_probe(struct acpi_cpu_softc *sc);
153 static int acpi_cpu_cx_probe(struct acpi_cpu_softc *sc);
154 static int acpi_cpu_cx_cst(struct acpi_cpu_softc *sc);
155 static void acpi_cpu_startup(void *arg);
156 static void acpi_cpu_startup_throttling(void);
157 static void acpi_cpu_startup_cx(void);
158 static void acpi_cpu_throttle_set(uint32_t speed);
159 static void acpi_cpu_idle(void);
160 static void acpi_cpu_c1(void);
161 static void acpi_cpu_notify(ACPI_HANDLE h, UINT32 notify, void *context);
162 static int acpi_cpu_quirks(struct acpi_cpu_softc *sc);
163 static int acpi_cpu_throttle_sysctl(SYSCTL_HANDLER_ARGS);
164 static int acpi_cpu_history_sysctl(SYSCTL_HANDLER_ARGS);
165 static int acpi_cpu_cx_lowest_sysctl(SYSCTL_HANDLER_ARGS);
167 static device_method_t acpi_cpu_methods[] = {
168 /* Device interface */
169 DEVMETHOD(device_probe, acpi_cpu_probe),
170 DEVMETHOD(device_attach, acpi_cpu_attach),
171 DEVMETHOD(device_shutdown, acpi_cpu_shutdown),
176 static driver_t acpi_cpu_driver = {
179 sizeof(struct acpi_cpu_softc),
182 static devclass_t acpi_cpu_devclass;
183 DRIVER_MODULE(cpu, acpi, acpi_cpu_driver, acpi_cpu_devclass, 0, 0);
184 MODULE_DEPEND(cpu, acpi, 1, 1, 1);
187 acpi_cpu_probe(device_t dev)
189 int acpi_id, cpu_id, cx_count;
196 if (acpi_disabled("cpu") || acpi_get_type(dev) != ACPI_TYPE_PROCESSOR)
199 handle = acpi_get_handle(dev);
200 if (cpu_softc == NULL)
201 cpu_softc = malloc(sizeof(struct acpi_cpu_softc *) *
202 SMP_MAXCPU, M_TEMP /* XXX */, M_INTWAIT | M_ZERO);
204 /* Get our Processor object. */
206 buf.Length = ACPI_ALLOCATE_BUFFER;
207 status = AcpiEvaluateObject(handle, NULL, NULL, &buf);
208 if (ACPI_FAILURE(status)) {
209 device_printf(dev, "probe failed to get Processor obj - %s\n",
210 AcpiFormatException(status));
213 obj = (ACPI_OBJECT *)buf.Pointer;
214 if (obj->Type != ACPI_TYPE_PROCESSOR) {
215 device_printf(dev, "Processor object has bad type %d\n", obj->Type);
221 * Find the processor associated with our unit. We could use the
222 * ProcId as a key, however, some boxes do not have the same values
223 * in their Processor object as the ProcId values in the MADT.
225 acpi_id = obj->Processor.ProcId;
227 if (acpi_pcpu_get_id(device_get_unit(dev), &acpi_id, &cpu_id) != 0)
231 * Check if we already probed this processor. We scan the bus twice
232 * so it's possible we've already seen this one.
234 if (cpu_softc[cpu_id] != NULL)
237 /* Get a count of Cx states for our device string. */
240 buf.Length = ACPI_ALLOCATE_BUFFER;
241 status = AcpiEvaluateObject(handle, "_CST", NULL, &buf);
242 if (ACPI_SUCCESS(status)) {
243 obj = (ACPI_OBJECT *)buf.Pointer;
244 if (ACPI_PKG_VALID(obj, 2))
245 acpi_PkgInt32(obj, 0, &cx_count);
248 if (AcpiGbl_FADT->Plvl2Lat <= 100)
250 if (AcpiGbl_FADT->Plvl3Lat <= 1000)
256 snprintf(msg, sizeof(msg), "ACPI CPU (%d Cx states)", cx_count);
258 strlcpy(msg, "ACPI CPU", sizeof(msg));
259 device_set_desc_copy(dev, msg);
261 /* Mark this processor as in-use and save our derived id for attach. */
262 cpu_softc[cpu_id] = (void *)1;
263 acpi_set_magic(dev, cpu_id);
269 acpi_cpu_attach(device_t dev)
273 struct acpi_cpu_softc *sc;
274 struct acpi_softc *acpi_sc;
278 ACPI_FUNCTION_TRACE((char *)(uintptr_t)__func__);
282 sc = device_get_softc(dev);
284 sc->cpu_handle = acpi_get_handle(dev);
285 cpu_softc[acpi_get_magic(dev)] = sc;
288 buf.Length = ACPI_ALLOCATE_BUFFER;
289 status = AcpiEvaluateObject(sc->cpu_handle, NULL, NULL, &buf);
290 if (ACPI_FAILURE(status)) {
291 device_printf(dev, "attach failed to get Processor obj - %s\n",
292 AcpiFormatException(status));
295 obj = (ACPI_OBJECT *)buf.Pointer;
296 sc->cpu_p_blk = obj->Processor.PblkAddress;
297 sc->cpu_p_blk_len = obj->Processor.PblkLength;
298 sc->acpi_id = obj->Processor.ProcId;
300 ACPI_DEBUG_PRINT((ACPI_DB_INFO, "acpi_cpu%d: P_BLK at %#x/%d\n",
301 device_get_unit(dev), sc->cpu_p_blk, sc->cpu_p_blk_len));
303 acpi_sc = acpi_device_get_parent_softc(dev);
304 sysctl_ctx_init(&acpi_cpu_sysctl_ctx);
305 acpi_cpu_sysctl_tree = SYSCTL_ADD_NODE(&acpi_cpu_sysctl_ctx,
306 SYSCTL_CHILDREN(acpi_sc->acpi_sysctl_tree),
307 OID_AUTO, "cpu", CTLFLAG_RD, 0, "");
309 /* If this is the first device probed, check for quirks. */
310 if (device_get_unit(dev) == 0)
314 * Probe for throttling and Cx state support.
315 * If none of these is present, free up unused resources.
317 thr_ret = acpi_cpu_throttle_probe(sc);
318 cx_ret = acpi_cpu_cx_probe(sc);
319 if (thr_ret == 0 || cx_ret == 0) {
320 status = AcpiInstallNotifyHandler(sc->cpu_handle, ACPI_DEVICE_NOTIFY,
321 acpi_cpu_notify, sc);
322 if (device_get_unit(dev) == 0)
323 AcpiOsQueueForExecution(OSD_PRIORITY_LO, acpi_cpu_startup, NULL);
325 sysctl_ctx_free(&acpi_cpu_sysctl_ctx);
332 * Find the nth present CPU and return its pc_cpuid as well as set the
333 * pc_acpi_id from the most reliable source.
336 acpi_pcpu_get_id(uint32_t idx, uint32_t *acpi_id, uint32_t *cpu_id)
338 struct mdglobaldata *md;
341 KASSERT(acpi_id != NULL, ("Null acpi_id"));
342 KASSERT(cpu_id != NULL, ("Null cpu_id"));
343 for (i = 0; i <= ncpus; i++) {
344 if ((smp_active_mask & (1 << i)) == 0)
346 md = (struct mdglobaldata *)globaldata_find(i);
347 KASSERT(md != NULL, ("no pcpu data for %d", i));
350 * If pc_acpi_id was not initialized (e.g., a non-APIC UP box)
351 * override it with the value from the ASL. Otherwise, if the
352 * two don't match, prefer the MADT-derived value. Finally,
353 * return the pc_cpuid to reference this processor.
355 if (md->gd_acpi_id == 0xffffffff)
356 md->gd_acpi_id = *acpi_id;
357 else if (md->gd_acpi_id != *acpi_id)
358 *acpi_id = md->gd_acpi_id;
359 *cpu_id = md->mi.gd_cpuid;
368 acpi_cpu_shutdown(device_t dev)
370 ACPI_FUNCTION_TRACE((char *)(uintptr_t)__func__);
372 /* Disable any entry to the idle function. */
375 /* Wait for all processors to exit acpi_cpu_idle(). */
377 /*smp_rendezvous(NULL, NULL, NULL, NULL);*/
378 KKASSERT(0); /* XXX use rendezvous */
380 while (cpu_idle_busy > 0)
387 acpi_cpu_throttle_probe(struct acpi_cpu_softc *sc)
392 ACPI_GENERIC_ADDRESS gas;
395 ACPI_FUNCTION_TRACE((char *)(uintptr_t)__func__);
399 /* Get throttling parameters from the FADT. 0 means not supported. */
400 if (device_get_unit(sc->cpu_dev) == 0) {
401 cpu_smi_cmd = AcpiGbl_FADT->SmiCmd;
402 cpu_pstate_cnt = AcpiGbl_FADT->PstateCnt;
403 cpu_cst_cnt = AcpiGbl_FADT->CstCnt;
404 cpu_duty_offset = AcpiGbl_FADT->DutyOffset;
405 cpu_duty_width = AcpiGbl_FADT->DutyWidth;
407 if (cpu_duty_width == 0 || (cpu_quirks & CPU_QUIRK_NO_THROTTLE) != 0)
410 /* Validate the duty offset/width. */
411 duty_end = cpu_duty_offset + cpu_duty_width - 1;
413 device_printf(sc->cpu_dev, "CLK_VAL field overflows P_CNT register\n");
416 if (cpu_duty_offset <= 4 && duty_end >= 4) {
417 device_printf(sc->cpu_dev, "CLK_VAL field overlaps THT_EN bit\n");
422 * If not present, fall back to using the processor's P_BLK to find
423 * the P_CNT register.
425 * Note that some systems seem to duplicate the P_BLK pointer
426 * across multiple CPUs, so not getting the resource is not fatal.
429 buf.Length = sizeof(obj);
430 status = AcpiEvaluateObject(sc->cpu_handle, "_PTC", NULL, &buf);
431 if (ACPI_SUCCESS(status)) {
432 if (obj.Buffer.Length < sizeof(ACPI_GENERIC_ADDRESS) + 3) {
433 device_printf(sc->cpu_dev, "_PTC buffer too small\n");
436 memcpy(&gas, obj.Buffer.Pointer + 3, sizeof(gas));
437 sc->cpu_p_cnt = acpi_bus_alloc_gas(sc->cpu_dev, &cpu_rid, &gas);
438 if (sc->cpu_p_cnt != NULL) {
439 ACPI_DEBUG_PRINT((ACPI_DB_INFO, "acpi_cpu%d: P_CNT from _PTC\n",
440 device_get_unit(sc->cpu_dev)));
444 /* If _PTC not present or other failure, try the P_BLK. */
445 if (sc->cpu_p_cnt == NULL) {
447 * The spec says P_BLK must be 6 bytes long. However, some
448 * systems use it to indicate a fractional set of features
449 * present so we take anything >= 4.
451 if (sc->cpu_p_blk_len < 4)
453 gas.Address = sc->cpu_p_blk;
454 gas.AddressSpaceId = ACPI_ADR_SPACE_SYSTEM_IO;
455 gas.RegisterBitWidth = 32;
456 sc->cpu_p_cnt = acpi_bus_alloc_gas(sc->cpu_dev, &cpu_rid, &gas);
457 if (sc->cpu_p_cnt != NULL) {
458 ACPI_DEBUG_PRINT((ACPI_DB_INFO, "acpi_cpu%d: P_CNT from P_BLK\n",
459 device_get_unit(sc->cpu_dev)));
461 device_printf(sc->cpu_dev, "Failed to attach throttling P_CNT\n");
471 acpi_cpu_cx_probe(struct acpi_cpu_softc *sc)
473 ACPI_GENERIC_ADDRESS gas;
474 struct acpi_cx *cx_ptr;
477 ACPI_FUNCTION_TRACE((char *)(uintptr_t)__func__);
479 /* Bus mastering arbitration control is needed for C3. */
480 if (AcpiGbl_FADT->V1_Pm2CntBlk == 0 || AcpiGbl_FADT->Pm2CntLen == 0) {
481 cpu_quirks |= CPU_QUIRK_NO_C3;
482 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
483 "acpi_cpu%d: No BM control, C3 disabled\n",
484 device_get_unit(sc->cpu_dev)));
488 * First, check for the ACPI 2.0 _CST sleep states object.
489 * If not usable, fall back to the P_BLK's P_LVL2 and P_LVL3.
491 sc->cpu_cx_count = 0;
492 error = acpi_cpu_cx_cst(sc);
494 cx_ptr = sc->cpu_cx_states;
496 /* C1 has been required since just after ACPI 1.0 */
497 cx_ptr->type = ACPI_STATE_C1;
498 cx_ptr->trans_lat = 0;
504 * The spec says P_BLK must be 6 bytes long. However, some systems
505 * use it to indicate a fractional set of features present so we
506 * take 5 as C2. Some may also have a value of 7 to indicate
507 * another C3 but most use _CST for this (as required) and having
508 * "only" C1-C3 is not a hardship.
510 if (sc->cpu_p_blk_len < 5)
513 /* Validate and allocate resources for C2 (P_LVL2). */
514 gas.AddressSpaceId = ACPI_ADR_SPACE_SYSTEM_IO;
515 gas.RegisterBitWidth = 8;
516 if (AcpiGbl_FADT->Plvl2Lat <= 100) {
517 gas.Address = sc->cpu_p_blk + 4;
518 cx_ptr->p_lvlx = acpi_bus_alloc_gas(sc->cpu_dev, &cpu_rid, &gas);
519 if (cx_ptr->p_lvlx != NULL) {
521 cx_ptr->type = ACPI_STATE_C2;
522 cx_ptr->trans_lat = AcpiGbl_FADT->Plvl2Lat;
528 if (sc->cpu_p_blk_len < 6)
531 /* Validate and allocate resources for C3 (P_LVL3). */
532 if (AcpiGbl_FADT->Plvl3Lat <= 1000 &&
533 (cpu_quirks & CPU_QUIRK_NO_C3) == 0) {
535 gas.Address = sc->cpu_p_blk + 5;
536 cx_ptr->p_lvlx = acpi_bus_alloc_gas(sc->cpu_dev, &cpu_rid, &gas);
537 if (cx_ptr->p_lvlx != NULL) {
539 cx_ptr->type = ACPI_STATE_C3;
540 cx_ptr->trans_lat = AcpiGbl_FADT->Plvl3Lat;
548 /* If no valid registers were found, don't attach. */
549 if (sc->cpu_cx_count == 0)
556 * Parse a _CST package and set up its Cx states. Since the _CST object
557 * can change dynamically, our notify handler may call this function
558 * to clean up and probe the new _CST package.
561 acpi_cpu_cx_cst(struct acpi_cpu_softc *sc)
563 struct acpi_cx *cx_ptr;
571 ACPI_FUNCTION_TRACE((char *)(uintptr_t)__func__);
574 buf.Length = ACPI_ALLOCATE_BUFFER;
575 status = AcpiEvaluateObject(sc->cpu_handle, "_CST", NULL, &buf);
576 if (ACPI_FAILURE(status))
579 /* _CST is a package with a count and at least one Cx package. */
580 top = (ACPI_OBJECT *)buf.Pointer;
581 if (!ACPI_PKG_VALID(top, 2) || acpi_PkgInt32(top, 0, &count) != 0) {
582 device_printf(sc->cpu_dev, "Invalid _CST package\n");
583 AcpiOsFree(buf.Pointer);
586 if (count != top->Package.Count - 1) {
587 device_printf(sc->cpu_dev, "Invalid _CST state count (%d != %d)\n",
588 count, top->Package.Count - 1);
589 count = top->Package.Count - 1;
591 if (count > MAX_CX_STATES) {
592 device_printf(sc->cpu_dev, "_CST has too many states (%d)\n", count);
593 count = MAX_CX_STATES;
596 /* Set up all valid states. */
597 sc->cpu_cx_count = 0;
598 cx_ptr = sc->cpu_cx_states;
599 for (i = 0; i < count; i++) {
600 pkg = &top->Package.Elements[i + 1];
601 if (!ACPI_PKG_VALID(pkg, 4) ||
602 acpi_PkgInt32(pkg, 1, &cx_ptr->type) != 0 ||
603 acpi_PkgInt32(pkg, 2, &cx_ptr->trans_lat) != 0 ||
604 acpi_PkgInt32(pkg, 3, &cx_ptr->power) != 0) {
606 device_printf(sc->cpu_dev, "Skipping invalid Cx state package\n");
610 /* Validate the state to see if we should use it. */
611 switch (cx_ptr->type) {
618 if (cx_ptr->trans_lat > 100) {
619 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
620 "acpi_cpu%d: C2[%d] not available.\n",
621 device_get_unit(sc->cpu_dev), i));
628 if (cx_ptr->trans_lat > 1000 ||
629 (cpu_quirks & CPU_QUIRK_NO_C3) != 0) {
631 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
632 "acpi_cpu%d: C3[%d] not available.\n",
633 device_get_unit(sc->cpu_dev), i));
640 /* Free up any previous register. */
641 if (cx_ptr->p_lvlx != NULL) {
642 bus_release_resource(sc->cpu_dev, 0, 0, cx_ptr->p_lvlx);
643 cx_ptr->p_lvlx = NULL;
647 /* Allocate the control register for C2 or C3. */
648 acpi_PkgGas(sc->cpu_dev, pkg, 0, &cpu_rid, &cx_ptr->p_lvlx);
649 if (cx_ptr->p_lvlx != NULL) {
651 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
652 "acpi_cpu%d: Got C%d - %d latency\n",
653 device_get_unit(sc->cpu_dev), cx_ptr->type,
659 AcpiOsFree(buf.Pointer);
665 * Call this *after* all CPUs have been attached.
668 acpi_cpu_startup(void *arg)
670 struct acpi_cpu_softc *sc;
673 /* Get set of CPU devices */
674 devclass_get_devices(acpi_cpu_devclass, &cpu_devices, &cpu_ndevices);
677 * Make sure all the processors' Cx counts match. We should probably
678 * also check the contents of each. However, no known systems have
679 * non-matching Cx counts so we'll deal with this later.
681 count = MAX_CX_STATES;
682 for (i = 0; i < cpu_ndevices; i++) {
683 sc = device_get_softc(cpu_devices[i]);
684 count = min(sc->cpu_cx_count, count);
686 cpu_cx_count = count;
688 /* Perform throttling and Cx final initialization. */
689 sc = device_get_softc(cpu_devices[0]);
690 if (sc->cpu_p_cnt != NULL)
691 acpi_cpu_startup_throttling();
692 if (cpu_cx_count > 0)
693 acpi_cpu_startup_cx();
697 * Takes the ACPI lock to avoid fighting anyone over the SMI command
701 acpi_cpu_startup_throttling()
705 /* Initialise throttling states */
706 cpu_throttle_max = CPU_MAX_SPEED;
707 cpu_throttle_state = CPU_MAX_SPEED;
709 SYSCTL_ADD_INT(&acpi_cpu_sysctl_ctx,
710 SYSCTL_CHILDREN(acpi_cpu_sysctl_tree),
711 OID_AUTO, "throttle_max", CTLFLAG_RD,
712 &cpu_throttle_max, 0, "maximum CPU speed");
713 SYSCTL_ADD_PROC(&acpi_cpu_sysctl_ctx,
714 SYSCTL_CHILDREN(acpi_cpu_sysctl_tree),
715 OID_AUTO, "throttle_state",
716 CTLTYPE_INT | CTLFLAG_RW, &cpu_throttle_state,
717 0, acpi_cpu_throttle_sysctl, "I", "current CPU speed");
719 /* If ACPI 2.0+, signal platform that we are taking over throttling. */
721 if (cpu_pstate_cnt != 0)
722 AcpiOsWritePort(cpu_smi_cmd, cpu_pstate_cnt, 8);
724 /* Set initial speed to maximum. */
725 acpi_cpu_throttle_set(cpu_throttle_max);
728 printf("acpi_cpu: throttling enabled, %d steps (100%% to %d.%d%%), "
729 "currently %d.%d%%\n", CPU_MAX_SPEED, CPU_SPEED_PRINTABLE(1),
730 CPU_SPEED_PRINTABLE(cpu_throttle_state));
734 extern void (*cpu_idle_hook)(void);
737 acpi_cpu_startup_cx()
739 struct acpi_cpu_softc *sc;
744 sc = device_get_softc(cpu_devices[0]);
745 sbuf_new(&sb, cpu_cx_supported, sizeof(cpu_cx_supported), SBUF_FIXEDLEN);
746 for (i = 0; i < cpu_cx_count; i++)
747 sbuf_printf(&sb, "C%d/%d ", i + 1, sc->cpu_cx_states[i].trans_lat);
750 SYSCTL_ADD_STRING(&acpi_cpu_sysctl_ctx,
751 SYSCTL_CHILDREN(acpi_cpu_sysctl_tree),
752 OID_AUTO, "cx_supported", CTLFLAG_RD, cpu_cx_supported,
753 0, "Cx/microsecond values for supported Cx states");
754 SYSCTL_ADD_PROC(&acpi_cpu_sysctl_ctx,
755 SYSCTL_CHILDREN(acpi_cpu_sysctl_tree),
756 OID_AUTO, "cx_lowest", CTLTYPE_STRING | CTLFLAG_RW,
757 NULL, 0, acpi_cpu_cx_lowest_sysctl, "A",
758 "lowest Cx sleep state to use");
759 SYSCTL_ADD_PROC(&acpi_cpu_sysctl_ctx,
760 SYSCTL_CHILDREN(acpi_cpu_sysctl_tree),
761 OID_AUTO, "cx_history", CTLTYPE_STRING | CTLFLAG_RD,
762 NULL, 0, acpi_cpu_history_sysctl, "A",
763 "count of full sleeps for Cx state / short sleeps");
766 /* Signal platform that we can handle _CST notification. */
767 if (cpu_cst_cnt != 0) {
769 AcpiOsWritePort(cpu_smi_cmd, cpu_cst_cnt, 8);
774 /* Take over idling from cpu_idle_default_hook(). */
775 cpu_cx_next = cpu_cx_lowest;
777 cpu_idle_hook = acpi_cpu_idle;
781 * Set CPUs to the new state.
783 * Must be called with the ACPI lock held.
786 acpi_cpu_throttle_set(uint32_t speed)
788 struct acpi_cpu_softc *sc;
790 uint32_t p_cnt, clk_val;
794 /* Iterate over processors */
795 for (i = 0; i < cpu_ndevices; i++) {
796 sc = device_get_softc(cpu_devices[i]);
797 if (sc->cpu_p_cnt == NULL)
800 /* Get the current P_CNT value and disable throttling */
801 p_cnt = CPU_GET_REG(sc->cpu_p_cnt, 4);
802 p_cnt &= ~CPU_P_CNT_THT_EN;
803 CPU_SET_REG(sc->cpu_p_cnt, 4, p_cnt);
805 /* If we're at maximum speed, that's all */
806 if (speed < CPU_MAX_SPEED) {
807 /* Mask the old CLK_VAL off and or-in the new value */
808 clk_val = (CPU_MAX_SPEED - 1) << cpu_duty_offset;
810 p_cnt |= (speed << cpu_duty_offset);
812 /* Write the new P_CNT value and then enable throttling */
813 CPU_SET_REG(sc->cpu_p_cnt, 4, p_cnt);
814 p_cnt |= CPU_P_CNT_THT_EN;
815 CPU_SET_REG(sc->cpu_p_cnt, 4, p_cnt);
817 ACPI_VPRINT(sc->cpu_dev, acpi_device_get_parent_softc(sc->cpu_dev),
818 "set speed to %d.%d%%\n", CPU_SPEED_PRINTABLE(speed));
820 cpu_throttle_state = speed;
824 * Idle the CPU in the lowest state possible.
825 * This function is called with interrupts disabled.
830 struct acpi_cpu_softc *sc;
831 struct acpi_cx *cx_next;
832 uint32_t start_time, end_time;
833 int bm_active, i, asleep;
835 /* If disabled, return immediately. */
836 if (cpu_cx_count == 0) {
842 * Look up our CPU id to get our softc. If it's NULL, we'll use C1
843 * since there is no ACPI processor object for this CPU. This occurs
844 * for logical CPUs in the HTT case.
846 sc = cpu_softc[mdcpu->mi.gd_cpuid];
852 /* Record that a CPU is in the idle function. */
853 atomic_add_int(&cpu_idle_busy, 1);
856 * Check for bus master activity. If there was activity, clear
857 * the bit and use the lowest non-C3 state. Note that the USB
858 * driver polling for new devices keeps this bit set all the
859 * time if USB is enabled.
861 AcpiGetRegister(ACPI_BITREG_BUS_MASTER_STATUS, &bm_active,
862 ACPI_MTX_DO_NOT_LOCK);
863 if (bm_active != 0) {
864 AcpiSetRegister(ACPI_BITREG_BUS_MASTER_STATUS, 1,
865 ACPI_MTX_DO_NOT_LOCK);
866 cpu_cx_next = min(cpu_cx_next, cpu_non_c3);
869 /* Perform the actual sleep based on the Cx-specific semantics. */
870 cx_next = &sc->cpu_cx_states[cpu_cx_next];
871 switch (cx_next->type) {
873 panic("acpi_cpu_idle: attempting to sleep in C0");
876 /* Execute HLT (or equivalent) and wait for an interrupt. */
880 * We can't calculate the time spent in C1 since the place we
881 * wake up is an ISR. Use a constant time of 1 ms.
888 * Read from P_LVLx to enter C2, checking time spent asleep.
889 * Use the ACPI timer for measuring sleep time. Since we need to
890 * get the time very close to the CPU start/stop clock logic, this
891 * is the only reliable time source.
893 AcpiHwLowLevelRead(32, &start_time, &AcpiGbl_FADT->XPmTmrBlk);
894 CPU_GET_REG(cx_next->p_lvlx, 1);
897 * Read the end time twice. Since it may take an arbitrary time
898 * to enter the idle state, the first read may be executed before
899 * the processor has stopped. Doing it again provides enough
900 * margin that we are certain to have a correct value.
902 AcpiHwLowLevelRead(32, &end_time, &AcpiGbl_FADT->XPmTmrBlk);
903 AcpiHwLowLevelRead(32, &end_time, &AcpiGbl_FADT->XPmTmrBlk);
908 /* Disable bus master arbitration and enable bus master wakeup. */
909 AcpiSetRegister(ACPI_BITREG_ARB_DISABLE, 1, ACPI_MTX_DO_NOT_LOCK);
910 AcpiSetRegister(ACPI_BITREG_BUS_MASTER_RLD, 1, ACPI_MTX_DO_NOT_LOCK);
912 /* Read from P_LVLx to enter C3, checking time spent asleep. */
913 AcpiHwLowLevelRead(32, &start_time, &AcpiGbl_FADT->XPmTmrBlk);
914 CPU_GET_REG(cx_next->p_lvlx, 1);
916 /* Read the end time twice. See comment for C2 above. */
917 AcpiHwLowLevelRead(32, &end_time, &AcpiGbl_FADT->XPmTmrBlk);
918 AcpiHwLowLevelRead(32, &end_time, &AcpiGbl_FADT->XPmTmrBlk);
920 /* Enable bus master arbitration and disable bus master wakeup. */
921 AcpiSetRegister(ACPI_BITREG_ARB_DISABLE, 0, ACPI_MTX_DO_NOT_LOCK);
922 AcpiSetRegister(ACPI_BITREG_BUS_MASTER_RLD, 0, ACPI_MTX_DO_NOT_LOCK);
927 /* Find the actual time asleep in microseconds, minus overhead. */
928 end_time = acpi_TimerDelta(end_time, start_time);
929 asleep = PM_USEC(end_time) - cx_next->trans_lat;
931 /* Record statistics */
932 if (asleep < cx_next->trans_lat)
933 cpu_cx_stats[cpu_cx_next].short_slp++;
935 cpu_cx_stats[cpu_cx_next].long_slp++;
938 * If we slept 100 us or more, use the lowest Cx state.
939 * Otherwise, find the lowest state that has a latency less than
940 * or equal to the length of our last sleep.
943 cpu_cx_next = cpu_cx_lowest;
945 for (i = cpu_cx_lowest; i >= 0; i--) {
946 if (sc->cpu_cx_states[i].trans_lat <= asleep) {
953 /* Decrement reference count checked by acpi_cpu_shutdown(). */
954 atomic_subtract_int(&cpu_idle_busy, 1);
957 /* Put the CPU in C1 in a machine-dependant way. */
962 ia64_call_pal_static(PAL_HALT_LIGHT, 0, 0, 0);
964 __asm __volatile("sti; hlt");
969 * Re-evaluate the _PSS and _CST objects when we are notified that they
972 * XXX Re-evaluation disabled until locking is done.
975 acpi_cpu_notify(ACPI_HANDLE h, UINT32 notify, void *context)
977 struct acpi_cpu_softc *sc = (struct acpi_cpu_softc *)context;
980 case ACPI_CPU_NOTIFY_PERF_STATES:
981 device_printf(sc->cpu_dev, "Performance states changed\n");
982 /* acpi_cpu_px_available(sc); */
984 case ACPI_CPU_NOTIFY_CX_STATES:
985 device_printf(sc->cpu_dev, "Cx states changed\n");
986 /* acpi_cpu_cx_cst(sc); */
989 device_printf(sc->cpu_dev, "Unknown notify %#x\n", notify);
995 acpi_cpu_quirks(struct acpi_cpu_softc *sc)
999 * C3 is not supported on multiple CPUs since this would require
1000 * flushing all caches which is currently too expensive.
1003 cpu_quirks |= CPU_QUIRK_NO_C3;
1006 /* Look for various quirks of the PIIX4 part. */
1007 acpi_dev = pci_find_device(PCI_VENDOR_INTEL, PCI_DEVICE_82371AB_3);
1008 if (acpi_dev != NULL) {
1009 switch (pci_get_revid(acpi_dev)) {
1011 * Disable throttling control on PIIX4 A and B-step.
1012 * See specification changes #13 ("Manual Throttle Duty Cycle")
1013 * and #14 ("Enabling and Disabling Manual Throttle"), plus
1014 * erratum #5 ("STPCLK# Deassertion Time") from the January
1015 * 2002 PIIX4 specification update. Note that few (if any)
1016 * mobile systems ever used this part.
1018 case PCI_REVISION_A_STEP:
1019 case PCI_REVISION_B_STEP:
1020 cpu_quirks |= CPU_QUIRK_NO_THROTTLE;
1023 * Disable C3 support for all PIIX4 chipsets. Some of these parts
1024 * do not report the BMIDE status to the BM status register and
1025 * others have a livelock bug if Type-F DMA is enabled. Linux
1026 * works around the BMIDE bug by reading the BM status directly
1027 * but we take the simpler approach of disabling C3 for these
1030 * See erratum #18 ("C3 Power State/BMIDE and Type-F DMA
1031 * Livelock") from the January 2002 PIIX4 specification update.
1032 * Applies to all PIIX4 models.
1034 case PCI_REVISION_4E:
1035 case PCI_REVISION_4M:
1036 cpu_quirks |= CPU_QUIRK_NO_C3;
1047 /* Handle changes in the CPU throttling setting. */
1049 acpi_cpu_throttle_sysctl(SYSCTL_HANDLER_ARGS)
1056 argp = (uint32_t *)oidp->oid_arg1;
1058 error = sysctl_handle_int(oidp, &arg, 0, req);
1060 /* Error or no new value */
1061 if (error != 0 || req->newptr == NULL)
1063 if (arg < 1 || arg > cpu_throttle_max)
1066 /* If throttling changed, notify the BIOS of the new rate. */
1070 acpi_cpu_throttle_set(arg);
1078 acpi_cpu_history_sysctl(SYSCTL_HANDLER_ARGS)
1084 sbuf_new(&sb, buf, sizeof(buf), SBUF_FIXEDLEN);
1085 for (i = 0; i < cpu_cx_count; i++) {
1086 sbuf_printf(&sb, "%u/%u ", cpu_cx_stats[i].long_slp,
1087 cpu_cx_stats[i].short_slp);
1091 sysctl_handle_string(oidp, sbuf_data(&sb), sbuf_len(&sb), req);
1098 acpi_cpu_cx_lowest_sysctl(SYSCTL_HANDLER_ARGS)
1100 struct acpi_cpu_softc *sc;
1104 sc = device_get_softc(cpu_devices[0]);
1105 snprintf(state, sizeof(state), "C%d", cpu_cx_lowest + 1);
1106 error = sysctl_handle_string(oidp, state, sizeof(state), req);
1107 if (error != 0 || req->newptr == NULL)
1109 if (strlen(state) < 2 || toupper(state[0]) != 'C')
1111 val = (int) strtol(state + 1, NULL, 10) - 1;
1112 if (val < 0 || val > cpu_cx_count - 1)
1115 /* Use the new value for the next idle slice. */
1116 cpu_cx_lowest = val;
1119 /* If not disabling, cache the new lowest non-C3 state. */
1121 for (i = cpu_cx_lowest; i >= 0; i--) {
1122 if (sc->cpu_cx_states[i].type < ACPI_STATE_C3) {
1128 /* Reset the statistics counters. */
1129 memset(cpu_cx_stats, 0, sizeof(cpu_cx_stats));