sys/bus/usb/ehci.c

   1 /*      $NetBSD: ehci.c,v 1.91 2005/02/27 00:27:51 perry Exp $ */
   2 /*      $FreeBSD: src/sys/dev/usb/ehci.c,v 1.36.2.3 2006/09/24 13:39:04 iedowse Exp $   */
   3 /*      $DragonFly: src/sys/bus/usb/ehci.c,v 1.36 2008/08/14 20:55:53 hasso Exp $       */
   4
   5 /*
   6  * Copyright (c) 2004 The NetBSD Foundation, Inc.
   7  * All rights reserved.
   8  *
   9  * This code is derived from software contributed to The NetBSD Foundation
  10  * by Lennart Augustsson (lennart@augustsson.net) and by Charles M. Hannum.
  11  *
  12  * Redistribution and use in source and binary forms, with or without
  13  * modification, are permitted provided that the following conditions
  14  * are met:
  15  * 1. Redistributions of source code must retain the above copyright
  16  *    notice, this list of conditions and the following disclaimer.
  17  * 2. Redistributions in binary form must reproduce the above copyright
  18  *    notice, this list of conditions and the following disclaimer in the
  19  *    documentation and/or other materials provided with the distribution.
  20  * 3. All advertising materials mentioning features or use of this software
  21  *    must display the following acknowledgement:
  22  *        This product includes software developed by the NetBSD
  23  *        Foundation, Inc. and its contributors.
  24  * 4. Neither the name of The NetBSD Foundation nor the names of its
  25  *    contributors may be used to endorse or promote products derived
  26  *    from this software without specific prior written permission.
  27  *
  28  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
  29  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
  30  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
  31  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
  32  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
  33  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
  34  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
  35  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
  36  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
  37  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
  38  * POSSIBILITY OF SUCH DAMAGE.
  39  */
  40
  41 /*
  42  * USB Enhanced Host Controller Driver, a.k.a. USB 2.0 controller.
  43  *
  44  * The EHCI 1.0 spec can be found at
  45  * http://developer.intel.com/technology/usb/download/ehci-r10.pdf
  46  * and the USB 2.0 spec at
  47  * http://www.usb.org/developers/docs/usb_20.zip
  48  *
  49  */
  50
  51 /*
  52  * TODO:
  53  * 1) The EHCI driver lacks support for isochronous transfers, so
  54  *    devices using them don't work.
  55  *
  56  * 2) Interrupt transfer scheduling does not manage the time available
  57  *    in each frame, so it is possible for the transfers to overrun
  58  *    the end of the frame.
  59  *
  60  * 3) Command failures are not recovered correctly.
  61  */
  62
  63 #include <sys/param.h>
  64 #include <sys/systm.h>
  65 #include <sys/malloc.h>
  66 #include <sys/kernel.h>
  67 #include <sys/endian.h>
  68 #include <sys/module.h>
  69 #include <sys/bus.h>
  70 #include <sys/lock.h>
  71 #include <sys/proc.h>
  72 #include <sys/queue.h>
  73 #include <sys/sysctl.h>
  74 #include <sys/thread2.h>
  75
  76 #include <machine/cpu.h>
  77 #include <machine/endian.h>
  78
  79 #include <bus/usb/usb.h>
  80 #include <bus/usb/usbdi.h>
  81 #include <bus/usb/usbdivar.h>
  82 #include <bus/usb/usb_mem.h>
  83 #include <bus/usb/usb_quirks.h>
  84
  85 #include <bus/usb/ehcireg.h>
  86 #include <bus/usb/ehcivar.h>
  87
  88 #ifdef USB_DEBUG
  89 #define EHCI_DEBUG USB_DEBUG
  90 #define DPRINTF(x)      do { if (ehcidebug) kprintf x; } while (0)
  91 #define DPRINTFN(n,x)   do { if (ehcidebug>(n)) kprintf x; } while (0)
  92 int ehcidebug = 0;
  93 SYSCTL_NODE(_hw_usb, OID_AUTO, ehci, CTLFLAG_RW, 0, "USB ehci");
  94 SYSCTL_INT(_hw_usb_ehci, OID_AUTO, debug, CTLFLAG_RW,
  95            &ehcidebug, 0, "ehci debug level");
  96 #define bitmask_snprintf(q,f,b,l) ksnprintf((b), (l), "%b", (q), (f))
  97 #else
  98 #define DPRINTF(x)
  99 #define DPRINTFN(n,x)
 100 #endif
 101
 102 struct ehci_pipe {
 103         struct usbd_pipe pipe;
 104
 105         ehci_soft_qh_t *sqh;
 106         union {
 107                 ehci_soft_qtd_t *qtd;
 108                 /* ehci_soft_itd_t *itd; */
 109         } tail;
 110         union {
 111                 /* Control pipe */
 112                 struct {
 113                         usb_dma_t reqdma;
 114                         u_int length;
 115                         /*ehci_soft_qtd_t *setup, *data, *stat;*/
 116                 } ctl;
 117                 /* Interrupt pipe */
 118                 struct {
 119                         u_int length;
 120                 } intr;
 121                 /* Bulk pipe */
 122                 struct {
 123                         u_int length;
 124                 } bulk;
 125                 /* Iso pipe */
 126                 /* XXX */
 127         } u;
 128 };
 129
 130 static usbd_status      ehci_open(usbd_pipe_handle);
 131 static void             ehci_poll(struct usbd_bus *);
 132 static void             ehci_softintr(void *);
 133 static int              ehci_intr1(ehci_softc_t *);
 134 static void             ehci_waitintr(ehci_softc_t *, usbd_xfer_handle);
 135 static void             ehci_check_intr(ehci_softc_t *, struct ehci_xfer *);
 136 static void             ehci_idone(struct ehci_xfer *);
 137 static void             ehci_timeout(void *);
 138 static void             ehci_timeout_task(void *);
 139 static void             ehci_intrlist_timeout(void *);
 140
 141 static usbd_status      ehci_allocm(struct usbd_bus *, usb_dma_t *, u_int32_t);
 142 static void             ehci_freem(struct usbd_bus *, usb_dma_t *);
 143
 144 static usbd_xfer_handle ehci_allocx(struct usbd_bus *);
 145 static void             ehci_freex(struct usbd_bus *, usbd_xfer_handle);
 146
 147 static usbd_status      ehci_root_ctrl_transfer(usbd_xfer_handle);
 148 static usbd_status      ehci_root_ctrl_start(usbd_xfer_handle);
 149 static void             ehci_root_ctrl_abort(usbd_xfer_handle);
 150 static void             ehci_root_ctrl_close(usbd_pipe_handle);
 151 static void             ehci_root_ctrl_done(usbd_xfer_handle);
 152
 153 static usbd_status      ehci_root_intr_transfer(usbd_xfer_handle);
 154 static usbd_status      ehci_root_intr_start(usbd_xfer_handle);
 155 static void             ehci_root_intr_abort(usbd_xfer_handle);
 156 static void             ehci_root_intr_close(usbd_pipe_handle);
 157 static void             ehci_root_intr_done(usbd_xfer_handle);
 158
 159 static usbd_status      ehci_device_ctrl_transfer(usbd_xfer_handle);
 160 static usbd_status      ehci_device_ctrl_start(usbd_xfer_handle);
 161 static void             ehci_device_ctrl_abort(usbd_xfer_handle);
 162 static void             ehci_device_ctrl_close(usbd_pipe_handle);
 163 static void             ehci_device_ctrl_done(usbd_xfer_handle);
 164
 165 static usbd_status      ehci_device_bulk_transfer(usbd_xfer_handle);
 166 static usbd_status      ehci_device_bulk_start(usbd_xfer_handle);
 167 static void             ehci_device_bulk_abort(usbd_xfer_handle);
 168 static void             ehci_device_bulk_close(usbd_pipe_handle);
 169 static void             ehci_device_bulk_done(usbd_xfer_handle);
 170
 171 static usbd_status      ehci_device_intr_transfer(usbd_xfer_handle);
 172 static usbd_status      ehci_device_intr_start(usbd_xfer_handle);
 173 static void             ehci_device_intr_abort(usbd_xfer_handle);
 174 static void             ehci_device_intr_close(usbd_pipe_handle);
 175 static void             ehci_device_intr_done(usbd_xfer_handle);
 176
 177 static usbd_status      ehci_device_isoc_transfer(usbd_xfer_handle);
 178 static usbd_status      ehci_device_isoc_start(usbd_xfer_handle);
 179 static void             ehci_device_isoc_abort(usbd_xfer_handle);
 180 static void             ehci_device_isoc_close(usbd_pipe_handle);
 181 static void             ehci_device_isoc_done(usbd_xfer_handle);
 182
 183 static void             ehci_device_clear_toggle(usbd_pipe_handle pipe);
 184 static void             ehci_noop(usbd_pipe_handle pipe);
 185
 186 static int              ehci_str(usb_string_descriptor_t *, int, char *);
 187 static void             ehci_pcd(ehci_softc_t *, usbd_xfer_handle);
 188 static void             ehci_disown(ehci_softc_t *, int, int);
 189
 190 static ehci_soft_qh_t  *ehci_alloc_sqh(ehci_softc_t *);
 191 static void             ehci_free_sqh(ehci_softc_t *, ehci_soft_qh_t *);
 192
 193 static ehci_soft_qtd_t  *ehci_alloc_sqtd(ehci_softc_t *);
 194 static void             ehci_free_sqtd(ehci_softc_t *, ehci_soft_qtd_t *);
 195 static usbd_status      ehci_alloc_sqtd_chain(struct ehci_pipe *,
 196                             ehci_softc_t *, int, int, usbd_xfer_handle,
 197                             ehci_soft_qtd_t **, ehci_soft_qtd_t **);
 198 static void             ehci_free_sqtd_chain(ehci_softc_t *, ehci_soft_qtd_t *,
 199                                             ehci_soft_qtd_t *);
 200
 201 static usbd_status      ehci_device_request(usbd_xfer_handle xfer);
 202
 203 static usbd_status      ehci_device_setintr(ehci_softc_t *, ehci_soft_qh_t *,
 204                             int ival);
 205
 206 static void             ehci_add_qh(ehci_soft_qh_t *, ehci_soft_qh_t *);
 207 static void             ehci_rem_qh(ehci_softc_t *, ehci_soft_qh_t *,
 208                                     ehci_soft_qh_t *);
 209 static void             ehci_set_qh_qtd(ehci_soft_qh_t *, ehci_soft_qtd_t *);
 210 static void             ehci_sync_hc(ehci_softc_t *);
 211
 212 static void             ehci_close_pipe(usbd_pipe_handle, ehci_soft_qh_t *);
 213 static void             ehci_abort_xfer(usbd_xfer_handle, usbd_status);
 214
 215 #ifdef EHCI_DEBUG
 216 static void             ehci_dump_regs(ehci_softc_t *);
 217 void                    ehci_dump(void);
 218 static ehci_softc_t     *theehci;
 219 static void             ehci_dump_link(ehci_link_t, int);
 220 static void             ehci_dump_sqtds(ehci_soft_qtd_t *);
 221 static void             ehci_dump_sqtd(ehci_soft_qtd_t *);
 222 static void             ehci_dump_qtd(ehci_qtd_t *);
 223 static void             ehci_dump_sqh(ehci_soft_qh_t *);
 224 #ifdef DIAGNOSTIC
 225 static void             ehci_dump_exfer(struct ehci_xfer *);
 226 #endif
 227 #endif
 228
 229 #define EHCI_NULL htole32(EHCI_LINK_TERMINATE)
 230
 231 #define EHCI_INTR_ENDPT 1
 232
 233 #define ehci_add_intr_list(sc, ex) \
 234         LIST_INSERT_HEAD(&(sc)->sc_intrhead, (ex), inext);
 235 #define ehci_del_intr_list(ex) \
 236         do { \
 237                 LIST_REMOVE((ex), inext); \
 238                 (ex)->inext.le_prev = NULL; \
 239         } while (0)
 240 #define ehci_active_intr_list(ex) ((ex)->inext.le_prev != NULL)
 241
 242 static struct usbd_bus_methods ehci_bus_methods = {
 243         ehci_open,
 244         ehci_softintr,
 245         ehci_poll,
 246         ehci_allocm,
 247         ehci_freem,
 248         ehci_allocx,
 249         ehci_freex,
 250 };
 251
 252 static struct usbd_pipe_methods ehci_root_ctrl_methods = {
 253         ehci_root_ctrl_transfer,
 254         ehci_root_ctrl_start,
 255         ehci_root_ctrl_abort,
 256         ehci_root_ctrl_close,
 257         ehci_noop,
 258         ehci_root_ctrl_done,
 259 };
 260
 261 static struct usbd_pipe_methods ehci_root_intr_methods = {
 262         ehci_root_intr_transfer,
 263         ehci_root_intr_start,
 264         ehci_root_intr_abort,
 265         ehci_root_intr_close,
 266         ehci_noop,
 267         ehci_root_intr_done,
 268 };
 269
 270 static struct usbd_pipe_methods ehci_device_ctrl_methods = {
 271         ehci_device_ctrl_transfer,
 272         ehci_device_ctrl_start,
 273         ehci_device_ctrl_abort,
 274         ehci_device_ctrl_close,
 275         ehci_noop,
 276         ehci_device_ctrl_done,
 277 };
 278
 279 static struct usbd_pipe_methods ehci_device_intr_methods = {
 280         ehci_device_intr_transfer,
 281         ehci_device_intr_start,
 282         ehci_device_intr_abort,
 283         ehci_device_intr_close,
 284         ehci_device_clear_toggle,
 285         ehci_device_intr_done,
 286 };
 287
 288 static struct usbd_pipe_methods ehci_device_bulk_methods = {
 289         ehci_device_bulk_transfer,
 290         ehci_device_bulk_start,
 291         ehci_device_bulk_abort,
 292         ehci_device_bulk_close,
 293         ehci_device_clear_toggle,
 294         ehci_device_bulk_done,
 295 };
 296
 297 static struct usbd_pipe_methods ehci_device_isoc_methods = {
 298         ehci_device_isoc_transfer,
 299         ehci_device_isoc_start,
 300         ehci_device_isoc_abort,
 301         ehci_device_isoc_close,
 302         ehci_noop,
 303         ehci_device_isoc_done,
 304 };
 305
 306 usbd_status
 307 ehci_init(ehci_softc_t *sc)
 308 {
 309         u_int32_t vers, sparams, cparams, hcr;
 310         u_int i;
 311         usbd_status err;
 312         ehci_soft_qh_t *sqh;
 313         u_int ncomp;
 314         int lev;
 315
 316         DPRINTF(("ehci_init: start\n"));
 317 #ifdef EHCI_DEBUG
 318         theehci = sc;
 319 #endif
 320
 321         sc->sc_offs = EREAD1(sc, EHCI_CAPLENGTH);
 322
 323         vers = EREAD2(sc, EHCI_HCIVERSION);
 324         device_printf(sc->sc_bus.bdev,
 325             "EHCI version %x.%x\n", vers >> 8, vers & 0xff);
 326         /* Disable all interrupts */
 327         EOWRITE4(sc, EHCI_USBINTR, 0);
 328
 329         sparams = EREAD4(sc, EHCI_HCSPARAMS);
 330         DPRINTF(("ehci_init: sparams=0x%x\n", sparams));
 331         sc->sc_npcomp = EHCI_HCS_N_PCC(sparams);
 332         ncomp = EHCI_HCS_N_CC(sparams);
 333         if (ncomp != sc->sc_ncomp) {
 334                 device_printf(sc->sc_bus.bdev,
 335                     "wrong number of companions (%d != %d)\n",
 336                     ncomp, sc->sc_ncomp);
 337                 if (ncomp < sc->sc_ncomp)
 338                         sc->sc_ncomp = ncomp;
 339         }
 340         if (sc->sc_ncomp > 0) {
 341                 device_printf(sc->sc_bus.bdev,
 342                     "companion controller%s, %d port%s each:",
 343                     sc->sc_ncomp!=1 ? "s" : "",
 344                     EHCI_HCS_N_PCC(sparams),
 345                     EHCI_HCS_N_PCC(sparams)!=1 ? "s" : "");
 346                 for (i = 0; i < sc->sc_ncomp; i++)
 347                         kprintf(" %s", device_get_nameunit(sc->sc_comps[i]->bdev));
 348                 kprintf("\n");
 349         }
 350         sc->sc_noport = EHCI_HCS_N_PORTS(sparams);
 351         cparams = EREAD4(sc, EHCI_HCCPARAMS);
 352         DPRINTF(("ehci_init: cparams=0x%x\n", cparams));
 353
 354         if (EHCI_HCC_64BIT(cparams)) {
 355                 /* MUST clear segment register if 64 bit capable. */
 356                 EWRITE4(sc, EHCI_CTRLDSSEGMENT, 0);
 357         }
 358
 359         sc->sc_bus.usbrev = USBREV_2_0;
 360
 361         /* Reset the controller */
 362         DPRINTF(("%s: resetting\n", device_get_nameunit(sc->sc_bus.bdev)));
 363         EOWRITE4(sc, EHCI_USBCMD, 0);   /* Halt controller */
 364         usb_delay_ms(&sc->sc_bus, 1);
 365         EOWRITE4(sc, EHCI_USBCMD, EHCI_CMD_HCRESET);
 366         for (i = 0; i < 100; i++) {
 367                 usb_delay_ms(&sc->sc_bus, 1);
 368                 hcr = EOREAD4(sc, EHCI_USBCMD) & EHCI_CMD_HCRESET;
 369                 if (!hcr)
 370                         break;
 371         }
 372         if (hcr) {
 373                 device_printf(sc->sc_bus.bdev, "reset timeout\n");
 374                 return (USBD_IOERROR);
 375         }
 376
 377         /* frame list size at default, read back what we got and use that */
 378         switch (EHCI_CMD_FLS(EOREAD4(sc, EHCI_USBCMD))) {
 379         case 0: sc->sc_flsize = 1024; break;
 380         case 1: sc->sc_flsize = 512; break;
 381         case 2: sc->sc_flsize = 256; break;
 382         case 3: return (USBD_IOERROR);
 383         }
 384         err = usb_allocmem(&sc->sc_bus, sc->sc_flsize * sizeof(ehci_link_t),
 385                            EHCI_FLALIGN_ALIGN, &sc->sc_fldma);
 386         if (err)
 387                 return (err);
 388         DPRINTF(("%s: flsize=%d\n", device_get_nameunit(sc->sc_bus.bdev),sc->sc_flsize));
 389         sc->sc_flist = KERNADDR(&sc->sc_fldma, 0);
 390         EOWRITE4(sc, EHCI_PERIODICLISTBASE, DMAADDR(&sc->sc_fldma, 0));
 391
 392         /* Set up the bus struct. */
 393         sc->sc_bus.methods = &ehci_bus_methods;
 394         sc->sc_bus.pipe_size = sizeof(struct ehci_pipe);
 395
 396         sc->sc_eintrs = EHCI_NORMAL_INTRS;
 397
 398         /*
 399          * Allocate the interrupt dummy QHs. These are arranged to give
 400          * poll intervals that are powers of 2 times 1ms.
 401          */
 402         for (i = 0; i < EHCI_INTRQHS; i++) {
 403                 sqh = ehci_alloc_sqh(sc);
 404                 if (sqh == NULL) {
 405                         err = USBD_NOMEM;
 406                         goto bad1;
 407                 }
 408                 sc->sc_islots[i].sqh = sqh;
 409         }
 410         lev = 0;
 411         for (i = 0; i < EHCI_INTRQHS; i++) {
 412                 if (i == EHCI_IQHIDX(lev + 1, 0))
 413                         lev++;
 414                 sqh = sc->sc_islots[i].sqh;
 415                 if (i == 0) {
 416                         /* The last (1ms) QH terminates. */
 417                         sqh->qh.qh_link = EHCI_NULL;
 418                         sqh->next = NULL;
 419                 } else {
 420                         /* Otherwise the next QH has half the poll interval */
 421                         sqh->next =
 422                             sc->sc_islots[EHCI_IQHIDX(lev - 1, i + 1)].sqh;
 423                         sqh->qh.qh_link = htole32(sqh->next->physaddr |
 424                             EHCI_LINK_QH);
 425                 }
 426                 sqh->qh.qh_endp = htole32(EHCI_QH_SET_EPS(EHCI_QH_SPEED_HIGH));
 427                 sqh->qh.qh_endphub = htole32(EHCI_QH_SET_MULT(1));
 428                 sqh->qh.qh_curqtd = EHCI_NULL;
 429                 sqh->qh.qh_qtd.qtd_next = EHCI_NULL;
 430                 sqh->qh.qh_qtd.qtd_altnext = EHCI_NULL;
 431                 sqh->qh.qh_qtd.qtd_status = htole32(EHCI_QTD_HALTED);
 432                 sqh->sqtd = NULL;
 433         }
 434         /* Point the frame list at the last level (128ms). */
 435         for (i = 0; i < sc->sc_flsize; i++) {
 436                 sc->sc_flist[i] = htole32(EHCI_LINK_QH |
 437                     sc->sc_islots[EHCI_IQHIDX(EHCI_IPOLLRATES - 1,
 438                     i)].sqh->physaddr);
 439         }
 440
 441         /* Allocate dummy QH that starts the async list. */
 442         sqh = ehci_alloc_sqh(sc);
 443         if (sqh == NULL) {
 444                 err = USBD_NOMEM;
 445                 goto bad1;
 446         }
 447         /* Fill the QH */
 448         sqh->qh.qh_endp =
 449             htole32(EHCI_QH_SET_EPS(EHCI_QH_SPEED_HIGH) | EHCI_QH_HRECL);
 450         sqh->qh.qh_link =
 451             htole32(sqh->physaddr | EHCI_LINK_QH);
 452         sqh->qh.qh_curqtd = EHCI_NULL;
 453         sqh->prev = sqh; /*It's a circular list.. */
 454         sqh->next = sqh;
 455         /* Fill the overlay qTD */
 456         sqh->qh.qh_qtd.qtd_next = EHCI_NULL;
 457         sqh->qh.qh_qtd.qtd_altnext = EHCI_NULL;
 458         sqh->qh.qh_qtd.qtd_status = htole32(EHCI_QTD_HALTED);
 459         sqh->sqtd = NULL;
 460 #ifdef EHCI_DEBUG
 461         if (ehcidebug) {
 462                 ehci_dump_sqh(sqh);
 463         }
 464 #endif
 465
 466         /* Point to async list */
 467         sc->sc_async_head = sqh;
 468         EOWRITE4(sc, EHCI_ASYNCLISTADDR, sqh->physaddr | EHCI_LINK_QH);
 469
 470         callout_init(&sc->sc_tmo_intrlist);
 471
 472         lockinit(&sc->sc_doorbell_lock, "ehcidb", 0, 0);
 473
 474         /* Turn on controller */
 475         EOWRITE4(sc, EHCI_USBCMD,
 476                  EHCI_CMD_ITC_2 | /* 2 microframes interrupt delay */
 477                  (EOREAD4(sc, EHCI_USBCMD) & EHCI_CMD_FLS_M) |
 478                  EHCI_CMD_ASE |
 479                  EHCI_CMD_PSE |
 480                  EHCI_CMD_RS);
 481
 482         /* Take over port ownership */
 483         EOWRITE4(sc, EHCI_CONFIGFLAG, EHCI_CONF_CF);
 484
 485         for (i = 0; i < 100; i++) {
 486                 usb_delay_ms(&sc->sc_bus, 1);
 487                 hcr = EOREAD4(sc, EHCI_USBSTS) & EHCI_STS_HCH;
 488                 if (!hcr)
 489                         break;
 490         }
 491         if (hcr) {
 492                 device_printf(sc->sc_bus.bdev, "run timeout\n");
 493                 return (USBD_IOERROR);
 494         }
 495
 496         crit_enter();
 497         sc->sc_flags |= EHCI_SCFLG_DONEINIT;
 498         EOWRITE4(sc, EHCI_USBINTR, sc->sc_eintrs);
 499         ehci_intr(sc);
 500         crit_exit();
 501
 502         return (USBD_NORMAL_COMPLETION);
 503
 504 #if 0
 505  bad2:
 506         ehci_free_sqh(sc, sc->sc_async_head);
 507 #endif
 508  bad1:
 509         usb_freemem(&sc->sc_bus, &sc->sc_fldma);
 510         return (err);
 511 }
 512
 513 int
 514 ehci_intr(void *v)
 515 {
 516         ehci_softc_t *sc = v;
 517
 518         if (sc->sc_dying || (sc->sc_flags & EHCI_SCFLG_DONEINIT) == 0)
 519                 return (0);
 520
 521         /* If we get an interrupt while polling, then just ignore it. */
 522         if (sc->sc_bus.use_polling) {
 523                 u_int32_t intrs = EHCI_STS_INTRS(EOREAD4(sc, EHCI_USBSTS));
 524
 525                 if (intrs)
 526                         EOWRITE4(sc, EHCI_USBSTS, intrs); /* Acknowledge */
 527 #ifdef DIAGNOSTIC
 528                 DPRINTFN(16, ("ehci_intr: ignored interrupt while polling\n"));
 529 #endif
 530                 return (0);
 531         }
 532
 533         return (ehci_intr1(sc));
 534 }
 535
 536 static int
 537 ehci_intr1(ehci_softc_t *sc)
 538 {
 539         u_int32_t intrs, eintrs;
 540
 541         DPRINTFN(20,("ehci_intr1: enter\n"));
 542
 543         intrs = EHCI_STS_INTRS(EOREAD4(sc, EHCI_USBSTS));
 544         if (!intrs)
 545                 return (0);
 546
 547         eintrs = intrs & sc->sc_eintrs;
 548         DPRINTFN(7, ("ehci_intr1: sc=%p intrs=0x%x(0x%x) eintrs=0x%x\n",
 549                      sc, (u_int)intrs, EOREAD4(sc, EHCI_USBSTS),
 550                      (u_int)eintrs));
 551         if (!eintrs)
 552                 return (0);
 553
 554         EOWRITE4(sc, EHCI_USBSTS, intrs); /* Acknowledge */
 555         sc->sc_bus.intr_context++;
 556         sc->sc_bus.no_intrs++;
 557         if (eintrs & EHCI_STS_IAA) {
 558                 DPRINTF(("ehci_intr1: door bell\n"));
 559                 wakeup(&sc->sc_async_head);
 560                 eintrs &= ~EHCI_STS_IAA;
 561         }
 562         if (eintrs & (EHCI_STS_INT | EHCI_STS_ERRINT)) {
 563                 DPRINTFN(5,("ehci_intr1: %s %s\n",
 564                             eintrs & EHCI_STS_INT ? "INT" : "",
 565                             eintrs & EHCI_STS_ERRINT ? "ERRINT" : ""));
 566                 usb_schedsoftintr(&sc->sc_bus);
 567                 eintrs &= ~(EHCI_STS_INT | EHCI_STS_ERRINT);
 568         }
 569         if (eintrs & EHCI_STS_HSE) {
 570                 device_printf(sc->sc_bus.bdev,
 571                     "unrecoverable error, controller halted\n");
 572                 /* XXX what else */
 573         }
 574         if (eintrs & EHCI_STS_PCD) {
 575                 ehci_pcd(sc, sc->sc_intrxfer);
 576                 eintrs &= ~EHCI_STS_PCD;
 577         }
 578
 579         sc->sc_bus.intr_context--;
 580
 581         if (eintrs != 0) {
 582                 /* Block unprocessed interrupts. */
 583                 sc->sc_eintrs &= ~eintrs;
 584                 EOWRITE4(sc, EHCI_USBINTR, sc->sc_eintrs);
 585                 device_printf(sc->sc_bus.bdev,
 586                     "blocking intrs 0x%x\n", eintrs);
 587         }
 588
 589         return (1);
 590 }
 591
 592 void
 593 ehci_pcd(ehci_softc_t *sc, usbd_xfer_handle xfer)
 594 {
 595         u_char *p;
 596         int i, m;
 597
 598         if (xfer == NULL) {
 599                 /* Just ignore the change. */
 600                 return;
 601         }
 602
 603         p = KERNADDR(&xfer->dmabuf, 0);
 604         m = min(sc->sc_noport, xfer->length * 8 - 1);
 605         memset(p, 0, xfer->length);
 606         for (i = 1; i <= m; i++) {
 607                 /* Pick out CHANGE bits from the status reg. */
 608                 if (EOREAD4(sc, EHCI_PORTSC(i)) & EHCI_PS_CLEAR)
 609                         p[i/8] |= 1 << (i%8);
 610         }
 611         DPRINTF(("ehci_pcd: change=0x%02x\n", *p));
 612         xfer->actlen = xfer->length;
 613         xfer->status = USBD_NORMAL_COMPLETION;
 614
 615         usb_transfer_complete(xfer);
 616 }
 617
 618 void
 619 ehci_softintr(void *v)
 620 {
 621         ehci_softc_t *sc = v;
 622         struct ehci_xfer *ex, *nextex;
 623
 624         DPRINTFN(10,("%s: ehci_softintr (%d)\n", device_get_nameunit(sc->sc_bus.bdev),
 625                      sc->sc_bus.intr_context));
 626
 627         sc->sc_bus.intr_context++;
 628
 629         /*
 630          * The only explanation I can think of for why EHCI is as brain dead
 631          * as UHCI interrupt-wise is that Intel was involved in both.
 632          * An interrupt just tells us that something is done, we have no
 633          * clue what, so we need to scan through all active transfers. :-(
 634          */
 635         for (ex = LIST_FIRST(&sc->sc_intrhead); ex; ex = nextex) {
 636                 nextex = LIST_NEXT(ex, inext);
 637                 ehci_check_intr(sc, ex);
 638         }
 639
 640         /* Schedule a callout to catch any dropped transactions. */
 641         if ((sc->sc_flags & EHCI_SCFLG_LOSTINTRBUG) &&
 642             !LIST_EMPTY(&sc->sc_intrhead))
 643                 callout_reset(&sc->sc_tmo_intrlist, hz / 5, ehci_intrlist_timeout,
 644                    sc);
 645
 646 #ifdef USB_USE_SOFTINTR
 647         if (sc->sc_softwake) {
 648                 sc->sc_softwake = 0;
 649                 wakeup(&sc->sc_softwake);
 650         }
 651 #endif /* USB_USE_SOFTINTR */
 652
 653         sc->sc_bus.intr_context--;
 654 }
 655
 656 /* Check for an interrupt. */
 657 void
 658 ehci_check_intr(ehci_softc_t *sc, struct ehci_xfer *ex)
 659 {
 660         ehci_soft_qtd_t *sqtd, *lsqtd;
 661         u_int32_t status;
 662
 663         DPRINTFN(/*15*/2, ("ehci_check_intr: ex=%p\n", ex));
 664
 665         if (ex->sqtdstart == NULL) {
 666                 kprintf("ehci_check_intr: sqtdstart=NULL\n");
 667                 return;
 668         }
 669         lsqtd = ex->sqtdend;
 670 #ifdef DIAGNOSTIC
 671         if (lsqtd == NULL) {
 672                 kprintf("ehci_check_intr: lsqtd==0\n");
 673                 return;
 674         }
 675 #endif
 676         /*
 677          * If the last TD is still active we need to check whether there
 678          * is a an error somewhere in the middle, or whether there was a
 679          * short packet (SPD and not ACTIVE).
 680          */
 681         if (le32toh(lsqtd->qtd.qtd_status) & EHCI_QTD_ACTIVE) {
 682                 DPRINTFN(12, ("ehci_check_intr: active ex=%p\n", ex));
 683                 for (sqtd = ex->sqtdstart; sqtd != lsqtd; sqtd=sqtd->nextqtd) {
 684                         status = le32toh(sqtd->qtd.qtd_status);
 685                         /* If there's an active QTD the xfer isn't done. */
 686                         if (status & EHCI_QTD_ACTIVE)
 687                                 break;
 688                         /* Any kind of error makes the xfer done. */
 689                         if (status & EHCI_QTD_HALTED)
 690                                 goto done;
 691                         /* We want short packets, and it is short: it's done */
 692                         if (EHCI_QTD_GET_BYTES(status) != 0)
 693                                 goto done;
 694                 }
 695                 DPRINTFN(12, ("ehci_check_intr: ex=%p std=%p still active\n",
 696                               ex, ex->sqtdstart));
 697                 return;
 698         }
 699  done:
 700         DPRINTFN(12, ("ehci_check_intr: ex=%p done\n", ex));
 701         callout_stop(&ex->xfer.timeout_handle);
 702         usb_rem_task(ex->xfer.pipe->device, &ex->abort_task);
 703         ehci_idone(ex);
 704 }
 705
 706 void
 707 ehci_idone(struct ehci_xfer *ex)
 708 {
 709         usbd_xfer_handle xfer = &ex->xfer;
 710 #ifdef USB_DEBUG
 711         struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe;
 712 #endif
 713         ehci_soft_qtd_t *sqtd, *lsqtd;
 714         u_int32_t status = 0, nstatus = 0;
 715         int actlen, cerr;
 716
 717         DPRINTFN(/*12*/2, ("ehci_idone: ex=%p\n", ex));
 718 #ifdef DIAGNOSTIC
 719         {
 720                 crit_enter();
 721                 if (ex->isdone) {
 722                         crit_exit();
 723 #ifdef EHCI_DEBUG
 724                         kprintf("ehci_idone: ex is done!\n   ");
 725                         ehci_dump_exfer(ex);
 726 #else
 727                         kprintf("ehci_idone: ex=%p is done!\n", ex);
 728 #endif
 729                         return;
 730                 }
 731                 ex->isdone = 1;
 732                 crit_exit();
 733         }
 734 #endif
 735
 736         if (xfer->status == USBD_CANCELLED ||
 737             xfer->status == USBD_TIMEOUT) {
 738                 DPRINTF(("ehci_idone: aborted xfer=%p\n", xfer));
 739                 return;
 740         }
 741
 742 #ifdef EHCI_DEBUG
 743         DPRINTFN(/*10*/2, ("ehci_idone: xfer=%p, pipe=%p ready\n", xfer, epipe));
 744         if (ehcidebug > 10)
 745                 ehci_dump_sqtds(ex->sqtdstart);
 746 #endif
 747
 748         /* The transfer is done, compute actual length and status. */
 749         lsqtd = ex->sqtdend;
 750         actlen = 0;
 751         for (sqtd = ex->sqtdstart; sqtd != lsqtd->nextqtd; sqtd=sqtd->nextqtd) {
 752                 nstatus = le32toh(sqtd->qtd.qtd_status);
 753                 if (nstatus & EHCI_QTD_ACTIVE)
 754                         break;
 755
 756                 status = nstatus;
 757                 /* halt is ok if descriptor is last, and complete */
 758                 if (sqtd->qtd.qtd_next == EHCI_NULL &&
 759                     EHCI_QTD_GET_BYTES(status) == 0)
 760                         status &= ~EHCI_QTD_HALTED;
 761                 if (EHCI_QTD_GET_PID(status) != EHCI_QTD_PID_SETUP)
 762                         actlen += sqtd->len - EHCI_QTD_GET_BYTES(status);
 763         }
 764
 765         cerr = EHCI_QTD_GET_CERR(status);
 766         DPRINTFN(/*10*/2, ("ehci_idone: len=%d, actlen=%d, cerr=%d, "
 767             "status=0x%x\n", xfer->length, actlen, cerr, status));
 768         xfer->actlen = actlen;
 769         if ((status & EHCI_QTD_HALTED) != 0) {
 770 #ifdef EHCI_DEBUG
 771                 char sbuf[128];
 772
 773                 bitmask_snprintf((u_int32_t)status,
 774                     "\20\7HALTED\6BUFERR\5BABBLE\4XACTERR"
 775                     "\3MISSED\2SPLIT\1PING", sbuf, sizeof(sbuf));
 776
 777                 DPRINTFN(2,
 778                          ("ehci_idone: error, addr=%d, endpt=0x%02x, "
 779                           "status 0x%s\n",
 780                           xfer->pipe->device->address,
 781                           xfer->pipe->endpoint->edesc->bEndpointAddress,
 782                           sbuf));
 783                 if (ehcidebug > 2) {
 784                         ehci_dump_sqh(epipe->sqh);
 785                         ehci_dump_sqtds(ex->sqtdstart);
 786                 }
 787 #endif
 788                 if ((status & EHCI_QTD_BABBLE) == 0 && cerr > 0)
 789                         xfer->status = USBD_STALLED;
 790                 else
 791                         xfer->status = USBD_IOERROR; /* more info XXX */
 792         } else {
 793                 xfer->status = USBD_NORMAL_COMPLETION;
 794         }
 795
 796         usb_transfer_complete(xfer);
 797         DPRINTFN(/*12*/2, ("ehci_idone: ex=%p done\n", ex));
 798 }
 799
 800 /*
 801  * Wait here until controller claims to have an interrupt.
 802  * Then call ehci_intr and return.  Use timeout to avoid waiting
 803  * too long.
 804  */
 805 void
 806 ehci_waitintr(ehci_softc_t *sc, usbd_xfer_handle xfer)
 807 {
 808         int timo = xfer->timeout;
 809         int usecs;
 810         u_int32_t intrs;
 811
 812         xfer->status = USBD_IN_PROGRESS;
 813         for (usecs = timo * 1000000 / hz; usecs > 0; usecs -= 1000) {
 814                 usb_delay_ms(&sc->sc_bus, 1);
 815                 if (sc->sc_dying)
 816                         break;
 817                 intrs = EHCI_STS_INTRS(EOREAD4(sc, EHCI_USBSTS)) &
 818                         sc->sc_eintrs;
 819                 DPRINTFN(15,("ehci_waitintr: 0x%04x\n", intrs));
 820 #ifdef EHCI_DEBUG
 821                 if (ehcidebug > 15)
 822                         ehci_dump_regs(sc);
 823 #endif
 824                 if (intrs) {
 825                         ehci_intr1(sc);
 826                         if (xfer->status != USBD_IN_PROGRESS)
 827                                 return;
 828                 }
 829         }
 830
 831         /* Timeout */
 832         DPRINTF(("ehci_waitintr: timeout\n"));
 833         xfer->status = USBD_TIMEOUT;
 834         usb_transfer_complete(xfer);
 835         /* XXX should free TD */
 836 }
 837
 838 void
 839 ehci_poll(struct usbd_bus *bus)
 840 {
 841         ehci_softc_t *sc = (ehci_softc_t *)bus;
 842 #ifdef EHCI_DEBUG
 843         static int last;
 844         int new;
 845         new = EHCI_STS_INTRS(EOREAD4(sc, EHCI_USBSTS));
 846         if (new != last) {
 847                 DPRINTFN(10,("ehci_poll: intrs=0x%04x\n", new));
 848                 last = new;
 849         }
 850 #endif
 851         crit_enter();
 852         ehci_intr1(sc);
 853         ehci_softintr(sc);
 854         crit_exit();
 855 }
 856
 857 int
 858 ehci_detach(struct ehci_softc *sc, int flags)
 859 {
 860         int rv = 0;
 861
 862         crit_enter();
 863         sc->sc_dying = 1;
 864         callout_stop(&sc->sc_tmo_intrlist);
 865         EOWRITE4(sc, EHCI_USBINTR, 0);
 866         EOWRITE4(sc, EHCI_USBCMD, 0);
 867         EOWRITE4(sc, EHCI_USBCMD, EHCI_CMD_HCRESET);
 868         crit_exit();
 869
 870         usb_delay_ms(&sc->sc_bus, 300); /* XXX let stray task complete */
 871
 872         usb_freemem(&sc->sc_bus, &sc->sc_fldma);
 873         /* XXX free other data structures XXX */
 874
 875         return (rv);
 876 }
 877
 878 /*
 879  * Handle suspend/resume.
 880  *
 881  * We need to switch to polling mode here, because this routine is
 882  * called from an interrupt context.  This is all right since we
 883  * are almost suspended anyway.
 884  */
 885 void
 886 ehci_power(int why, void *v)
 887 {
 888         ehci_softc_t *sc = v;
 889         u_int32_t cmd, hcr;
 890         int i;
 891
 892 #ifdef EHCI_DEBUG
 893         DPRINTF(("ehci_power: sc=%p, why=%d\n", sc, why));
 894         if (ehcidebug > 0)
 895                 ehci_dump_regs(sc);
 896 #endif
 897
 898         crit_enter();
 899
 900         switch (why) {
 901         case PWR_SUSPEND:
 902                 sc->sc_bus.use_polling++;
 903
 904                 for (i = 1; i <= sc->sc_noport; i++) {
 905                         cmd = EOREAD4(sc, EHCI_PORTSC(i));
 906                         if ((cmd & EHCI_PS_PO) == 0 &&
 907                             (cmd & EHCI_PS_PE) == EHCI_PS_PE)
 908                                 EOWRITE4(sc, EHCI_PORTSC(i),
 909                                     cmd | EHCI_PS_SUSP);
 910                 }
 911
 912                 sc->sc_cmd = EOREAD4(sc, EHCI_USBCMD);
 913
 914                 cmd = sc->sc_cmd & ~(EHCI_CMD_ASE | EHCI_CMD_PSE);
 915                 EOWRITE4(sc, EHCI_USBCMD, cmd);
 916
 917                 for (i = 0; i < 100; i++) {
 918                         hcr = EOREAD4(sc, EHCI_USBSTS) &
 919                             (EHCI_STS_ASS | EHCI_STS_PSS);
 920                         if (hcr == 0)
 921                                 break;
 922
 923                         usb_delay_ms(&sc->sc_bus, 1);
 924                 }
 925                 if (hcr != 0) {
 926                         device_printf(sc->sc_bus.bdev, "reset timeout\n");
 927                 }
 928
 929                 cmd &= ~EHCI_CMD_RS;
 930                 EOWRITE4(sc, EHCI_USBCMD, cmd);
 931
 932                 for (i = 0; i < 100; i++) {
 933                         hcr = EOREAD4(sc, EHCI_USBSTS) & EHCI_STS_HCH;
 934                         if (hcr == EHCI_STS_HCH)
 935                                 break;
 936
 937                         usb_delay_ms(&sc->sc_bus, 1);
 938                 }
 939                 if (hcr != EHCI_STS_HCH) {
 940                         device_printf(sc->sc_bus.bdev, "config timeout\n");
 941                 }
 942
 943                 sc->sc_bus.use_polling--;
 944                 break;
 945
 946         case PWR_RESUME:
 947                 sc->sc_bus.use_polling++;
 948
 949                 /* restore things in case the bios sucks */
 950                 EOWRITE4(sc, EHCI_CTRLDSSEGMENT, 0);
 951                 EOWRITE4(sc, EHCI_PERIODICLISTBASE, DMAADDR(&sc->sc_fldma, 0));
 952                 EOWRITE4(sc, EHCI_ASYNCLISTADDR,
 953                     sc->sc_async_head->physaddr | EHCI_LINK_QH);
 954                 EOWRITE4(sc, EHCI_USBINTR, sc->sc_eintrs);
 955
 956                 hcr = 0;
 957                 for (i = 1; i <= sc->sc_noport; i++) {
 958                         cmd = EOREAD4(sc, EHCI_PORTSC(i));
 959                         if ((cmd & EHCI_PS_PO) == 0 &&
 960                             (cmd & EHCI_PS_SUSP) == EHCI_PS_SUSP) {
 961                                 EOWRITE4(sc, EHCI_PORTSC(i),
 962                                     cmd | EHCI_PS_FPR);
 963                                 hcr = 1;
 964                         }
 965                 }
 966
 967                 if (hcr) {
 968                         usb_delay_ms(&sc->sc_bus, USB_RESUME_WAIT);
 969
 970                         for (i = 1; i <= sc->sc_noport; i++) {
 971                                 cmd = EOREAD4(sc, EHCI_PORTSC(i));
 972                                 if ((cmd & EHCI_PS_PO) == 0 &&
 973                                     (cmd & EHCI_PS_SUSP) == EHCI_PS_SUSP)
 974                                         EOWRITE4(sc, EHCI_PORTSC(i),
 975                                             cmd & ~EHCI_PS_FPR);
 976                         }
 977                 }
 978
 979                 EOWRITE4(sc, EHCI_USBCMD, sc->sc_cmd);
 980
 981                 for (i = 0; i < 100; i++) {
 982                         hcr = EOREAD4(sc, EHCI_USBSTS) & EHCI_STS_HCH;
 983                         if (hcr != EHCI_STS_HCH)
 984                                 break;
 985
 986                         usb_delay_ms(&sc->sc_bus, 1);
 987                 }
 988                 if (hcr == EHCI_STS_HCH) {
 989                         device_printf(sc->sc_bus.bdev, "config timeout\n");
 990                 }
 991
 992                 usb_delay_ms(&sc->sc_bus, USB_RESUME_WAIT);
 993
 994                 sc->sc_bus.use_polling--;
 995                 break;
 996         }
 997         crit_exit();
 998
 999 #ifdef EHCI_DEBUG
1000         DPRINTF(("ehci_power: sc=%p\n", sc));
1001         if (ehcidebug > 0)
1002                 ehci_dump_regs(sc);
1003 #endif
1004 }
1005
1006 /*
1007  * Shut down the controller when the system is going down.
1008  */
1009 void
1010 ehci_shutdown(void *v)
1011 {
1012         ehci_softc_t *sc = v;
1013
1014         DPRINTF(("ehci_shutdown: stopping the HC\n"));
1015         crit_enter();
1016         sc->sc_dying = 1;
1017         callout_stop(&sc->sc_tmo_intrlist);
1018         EOWRITE4(sc, EHCI_USBINTR, 0);
1019         EOWRITE4(sc, EHCI_USBCMD, 0);
1020         EOWRITE4(sc, EHCI_USBCMD, EHCI_CMD_HCRESET);
1021         crit_exit();
1022 }
1023
1024 usbd_status
1025 ehci_allocm(struct usbd_bus *bus, usb_dma_t *dma, u_int32_t size)
1026 {
1027         usbd_status err;
1028
1029         err = usb_allocmem(bus, size, 0, dma);
1030 #ifdef EHCI_DEBUG
1031         if (err)
1032                 kprintf("ehci_allocm: usb_allocmem()=%d\n", err);
1033 #endif
1034         return (err);
1035 }
1036
1037 void
1038 ehci_freem(struct usbd_bus *bus, usb_dma_t *dma)
1039 {
1040         usb_freemem(bus, dma);
1041 }
1042
1043 usbd_xfer_handle
1044 ehci_allocx(struct usbd_bus *bus)
1045 {
1046         struct ehci_softc *sc = (struct ehci_softc *)bus;
1047         usbd_xfer_handle xfer;
1048
1049         xfer = STAILQ_FIRST(&sc->sc_free_xfers);
1050         if (xfer != NULL) {
1051                 STAILQ_REMOVE_HEAD(&sc->sc_free_xfers, next);
1052 #ifdef DIAGNOSTIC
1053                 if (xfer->busy_free != XFER_FREE) {
1054                         kprintf("ehci_allocx: xfer=%p not free, 0x%08x\n", xfer,
1055                                xfer->busy_free);
1056                 }
1057 #endif
1058         } else {
1059                 xfer = kmalloc(sizeof(struct ehci_xfer), M_USB, M_INTWAIT);
1060         }
1061         if (xfer != NULL) {
1062                 memset(xfer, 0, sizeof(struct ehci_xfer));
1063                 usb_init_task(&EXFER(xfer)->abort_task, ehci_timeout_task,
1064                     xfer);
1065                 EXFER(xfer)->ehci_xfer_flags = 0;
1066 #ifdef DIAGNOSTIC
1067                 EXFER(xfer)->isdone = 1;
1068                 xfer->busy_free = XFER_BUSY;
1069 #endif
1070         }
1071         return (xfer);
1072 }
1073
1074 void
1075 ehci_freex(struct usbd_bus *bus, usbd_xfer_handle xfer)
1076 {
1077         struct ehci_softc *sc = (struct ehci_softc *)bus;
1078
1079 #ifdef DIAGNOSTIC
1080         if (xfer->busy_free != XFER_BUSY) {
1081                 kprintf("ehci_freex: xfer=%p not busy, 0x%08x\n", xfer,
1082                        xfer->busy_free);
1083                 return;
1084         }
1085         xfer->busy_free = XFER_FREE;
1086         if (!EXFER(xfer)->isdone) {
1087                 kprintf("ehci_freex: !isdone\n");
1088                 return;
1089         }
1090 #endif
1091         STAILQ_INSERT_HEAD(&sc->sc_free_xfers, xfer, next);
1092 }
1093
1094 static void
1095 ehci_device_clear_toggle(usbd_pipe_handle pipe)
1096 {
1097         struct ehci_pipe *epipe = (struct ehci_pipe *)pipe;
1098
1099         DPRINTF(("ehci_device_clear_toggle: epipe=%p status=0x%x\n",
1100                  epipe, epipe->sqh->qh.qh_qtd.qtd_status));
1101 #ifdef USB_DEBUG
1102         if (ehcidebug)
1103                 usbd_dump_pipe(pipe);
1104 #endif
1105         KASSERT((epipe->sqh->qh.qh_qtd.qtd_status &
1106             htole32(EHCI_QTD_ACTIVE)) == 0,
1107             ("ehci_device_clear_toggle: queue active"));
1108         epipe->sqh->qh.qh_qtd.qtd_status &= htole32(~EHCI_QTD_TOGGLE_MASK);
1109 }
1110
1111 static void
1112 ehci_noop(usbd_pipe_handle pipe)
1113 {
1114 }
1115
1116 #ifdef EHCI_DEBUG
1117 void
1118 ehci_dump_regs(ehci_softc_t *sc)
1119 {
1120         int i;
1121         kprintf("cmd=0x%08x, sts=0x%08x, ien=0x%08x\n",
1122                EOREAD4(sc, EHCI_USBCMD),
1123                EOREAD4(sc, EHCI_USBSTS),
1124                EOREAD4(sc, EHCI_USBINTR));
1125         kprintf("frindex=0x%08x ctrdsegm=0x%08x periodic=0x%08x async=0x%08x\n",
1126                EOREAD4(sc, EHCI_FRINDEX),
1127                EOREAD4(sc, EHCI_CTRLDSSEGMENT),
1128                EOREAD4(sc, EHCI_PERIODICLISTBASE),
1129                EOREAD4(sc, EHCI_ASYNCLISTADDR));
1130         for (i = 1; i <= sc->sc_noport; i++)
1131                 kprintf("port %d status=0x%08x\n", i,
1132                        EOREAD4(sc, EHCI_PORTSC(i)));
1133 }
1134
1135 /*
1136  * Unused function - this is meant to be called from a kernel
1137  * debugger.
1138  */
1139 void
1140 ehci_dump(void)
1141 {
1142         ehci_dump_regs(theehci);
1143 }
1144
1145 void
1146 ehci_dump_link(ehci_link_t link, int type)
1147 {
1148         link = le32toh(link);
1149         kprintf("0x%08x", link);
1150         if (link & EHCI_LINK_TERMINATE)
1151                 kprintf("<T>");
1152         else {
1153                 kprintf("<");
1154                 if (type) {
1155                         switch (EHCI_LINK_TYPE(link)) {
1156                         case EHCI_LINK_ITD: kprintf("ITD"); break;
1157                         case EHCI_LINK_QH: kprintf("QH"); break;
1158                         case EHCI_LINK_SITD: kprintf("SITD"); break;
1159                         case EHCI_LINK_FSTN: kprintf("FSTN"); break;
1160                         }
1161                 }
1162                 kprintf(">");
1163         }
1164 }
1165
1166 void
1167 ehci_dump_sqtds(ehci_soft_qtd_t *sqtd)
1168 {
1169         int i;
1170         u_int32_t stop;
1171
1172         stop = 0;
1173         for (i = 0; sqtd && i < 20 && !stop; sqtd = sqtd->nextqtd, i++) {
1174                 ehci_dump_sqtd(sqtd);
1175                 stop = sqtd->qtd.qtd_next & htole32(EHCI_LINK_TERMINATE);
1176         }
1177         if (sqtd)
1178                 kprintf("dump aborted, too many TDs\n");
1179 }
1180
1181 void
1182 ehci_dump_sqtd(ehci_soft_qtd_t *sqtd)
1183 {
1184         kprintf("QTD(%p) at 0x%08x:\n", sqtd, sqtd->physaddr);
1185         ehci_dump_qtd(&sqtd->qtd);
1186 }
1187
1188 void
1189 ehci_dump_qtd(ehci_qtd_t *qtd)
1190 {
1191         u_int32_t s;
1192         char sbuf[128];
1193
1194         kprintf("  next="); ehci_dump_link(qtd->qtd_next, 0);
1195         kprintf(" altnext="); ehci_dump_link(qtd->qtd_altnext, 0);
1196         kprintf("\n");
1197         s = le32toh(qtd->qtd_status);
1198         bitmask_snprintf(EHCI_QTD_GET_STATUS(s),
1199                          "\20\10ACTIVE\7HALTED\6BUFERR\5BABBLE\4XACTERR"
1200                          "\3MISSED\2SPLIT\1PING", sbuf, sizeof(sbuf));
1201         kprintf("  status=0x%08x: toggle=%d bytes=0x%x ioc=%d c_page=0x%x\n",
1202                s, EHCI_QTD_GET_TOGGLE(s), EHCI_QTD_GET_BYTES(s),
1203                EHCI_QTD_GET_IOC(s), EHCI_QTD_GET_C_PAGE(s));
1204         kprintf("    cerr=%d pid=%d stat=0x%s\n", EHCI_QTD_GET_CERR(s),
1205                EHCI_QTD_GET_PID(s), sbuf);
1206         for (s = 0; s < 5; s++)
1207                 kprintf("  buffer[%d]=0x%08x\n", s, le32toh(qtd->qtd_buffer[s]));
1208 }
1209
1210 void
1211 ehci_dump_sqh(ehci_soft_qh_t *sqh)
1212 {
1213         ehci_qh_t *qh = &sqh->qh;
1214         u_int32_t endp, endphub;
1215
1216         kprintf("QH(%p) at 0x%08x:\n", sqh, sqh->physaddr);
1217         kprintf("  link="); ehci_dump_link(qh->qh_link, 1); kprintf("\n");
1218         endp = le32toh(qh->qh_endp);
1219         kprintf("  endp=0x%08x\n", endp);
1220         kprintf("    addr=0x%02x inact=%d endpt=%d eps=%d dtc=%d hrecl=%d\n",
1221                EHCI_QH_GET_ADDR(endp), EHCI_QH_GET_INACT(endp),
1222                EHCI_QH_GET_ENDPT(endp),  EHCI_QH_GET_EPS(endp),
1223                EHCI_QH_GET_DTC(endp), EHCI_QH_GET_HRECL(endp));
1224         kprintf("    mpl=0x%x ctl=%d nrl=%d\n",
1225                EHCI_QH_GET_MPL(endp), EHCI_QH_GET_CTL(endp),
1226                EHCI_QH_GET_NRL(endp));
1227         endphub = le32toh(qh->qh_endphub);
1228         kprintf("  endphub=0x%08x\n", endphub);
1229         kprintf("    smask=0x%02x cmask=0x%02x huba=0x%02x port=%d mult=%d\n",
1230                EHCI_QH_GET_SMASK(endphub), EHCI_QH_GET_CMASK(endphub),
1231                EHCI_QH_GET_HUBA(endphub), EHCI_QH_GET_PORT(endphub),
1232                EHCI_QH_GET_MULT(endphub));
1233         kprintf("  curqtd="); ehci_dump_link(qh->qh_curqtd, 0); kprintf("\n");
1234         kprintf("Overlay qTD:\n");
1235         ehci_dump_qtd(&qh->qh_qtd);
1236 }
1237
1238 #ifdef DIAGNOSTIC
1239 static void
1240 ehci_dump_exfer(struct ehci_xfer *ex)
1241 {
1242         kprintf("ehci_dump_exfer: ex=%p\n", ex);
1243 }
1244 #endif
1245 #endif
1246
1247 usbd_status
1248 ehci_open(usbd_pipe_handle pipe)
1249 {
1250         usbd_device_handle dev = pipe->device;
1251         ehci_softc_t *sc = (ehci_softc_t *)dev->bus;
1252         usb_endpoint_descriptor_t *ed = pipe->endpoint->edesc;
1253         u_int8_t addr = dev->address;
1254         u_int8_t xfertype = ed->bmAttributes & UE_XFERTYPE;
1255         struct ehci_pipe *epipe = (struct ehci_pipe *)pipe;
1256         ehci_soft_qh_t *sqh;
1257         usbd_status err;
1258         int ival, speed, naks;
1259         int hshubaddr, hshubport;
1260
1261         DPRINTFN(1, ("ehci_open: pipe=%p, addr=%d, endpt=%d (%d)\n",
1262                      pipe, addr, ed->bEndpointAddress, sc->sc_addr));
1263
1264         if (dev->myhsport) {
1265                 hshubaddr = dev->myhsport->parent->address;
1266                 hshubport = dev->myhsport->portno;
1267         } else {
1268                 hshubaddr = 0;
1269                 hshubport = 0;
1270         }
1271
1272         if (sc->sc_dying)
1273                 return (USBD_IOERROR);
1274
1275         if (addr == sc->sc_addr) {
1276                 switch (ed->bEndpointAddress) {
1277                 case USB_CONTROL_ENDPOINT:
1278                         pipe->methods = &ehci_root_ctrl_methods;
1279                         break;
1280                 case UE_DIR_IN | EHCI_INTR_ENDPT:
1281                         pipe->methods = &ehci_root_intr_methods;
1282                         break;
1283                 default:
1284                         return (USBD_INVAL);
1285                 }
1286                 return (USBD_NORMAL_COMPLETION);
1287         }
1288
1289         /* XXX All this stuff is only valid for async. */
1290         switch (dev->speed) {
1291         case USB_SPEED_LOW:  speed = EHCI_QH_SPEED_LOW;  break;
1292         case USB_SPEED_FULL: speed = EHCI_QH_SPEED_FULL; break;
1293         case USB_SPEED_HIGH: speed = EHCI_QH_SPEED_HIGH; break;
1294         default: panic("ehci_open: bad device speed %d", dev->speed);
1295         }
1296         if (speed != EHCI_QH_SPEED_HIGH && xfertype == UE_ISOCHRONOUS) {
1297                 device_printf(sc->sc_bus.bdev,
1298                     "*** WARNING: opening low/full speed device, this "
1299                     "does not work yet.\n");
1300                 DPRINTFN(1,("ehci_open: hshubaddr=%d hshubport=%d\n",
1301                             hshubaddr, hshubport));
1302                 return USBD_INVAL;
1303         }
1304
1305         naks = 8;               /* XXX */
1306         sqh = ehci_alloc_sqh(sc);
1307         if (sqh == NULL)
1308                 goto bad0;
1309         /* qh_link filled when the QH is added */
1310         sqh->qh.qh_endp = htole32(
1311                 EHCI_QH_SET_ADDR(addr) |
1312                 EHCI_QH_SET_ENDPT(UE_GET_ADDR(ed->bEndpointAddress)) |
1313                 EHCI_QH_SET_EPS(speed) |
1314                 (xfertype == UE_CONTROL ? EHCI_QH_DTC : 0) |
1315                 EHCI_QH_SET_MPL(UGETW(ed->wMaxPacketSize)) |
1316                 (speed != EHCI_QH_SPEED_HIGH && xfertype == UE_CONTROL ?
1317                  EHCI_QH_CTL : 0) |
1318                 EHCI_QH_SET_NRL(naks)
1319                 );
1320         sqh->qh.qh_endphub = htole32(
1321                 EHCI_QH_SET_MULT(1) |
1322                 EHCI_QH_SET_HUBA(hshubaddr) |
1323                 EHCI_QH_SET_PORT(hshubport) |
1324                 EHCI_QH_SET_CMASK(0x1c) |
1325                 EHCI_QH_SET_SMASK(xfertype == UE_INTERRUPT ? 0x01 : 0)
1326                 );
1327         sqh->qh.qh_curqtd = EHCI_NULL;
1328         /* Fill the overlay qTD */
1329         sqh->qh.qh_qtd.qtd_next = EHCI_NULL;
1330         sqh->qh.qh_qtd.qtd_altnext = EHCI_NULL;
1331         sqh->qh.qh_qtd.qtd_status =
1332             htole32(EHCI_QTD_SET_TOGGLE(pipe->endpoint->savedtoggle));
1333
1334         epipe->sqh = sqh;
1335
1336         switch (xfertype) {
1337         case UE_CONTROL:
1338                 err = usb_allocmem(&sc->sc_bus, sizeof(usb_device_request_t),
1339                                    0, &epipe->u.ctl.reqdma);
1340 #ifdef EHCI_DEBUG
1341                 if (err)
1342                         kprintf("ehci_open: usb_allocmem()=%d\n", err);
1343 #endif
1344                 if (err)
1345                         goto bad1;
1346                 pipe->methods = &ehci_device_ctrl_methods;
1347                 crit_enter();
1348                 ehci_add_qh(sqh, sc->sc_async_head);
1349                 crit_exit();
1350                 break;
1351         case UE_BULK:
1352                 pipe->methods = &ehci_device_bulk_methods;
1353                 crit_enter();
1354                 ehci_add_qh(sqh, sc->sc_async_head);
1355                 crit_exit();
1356                 break;
1357         case UE_INTERRUPT:
1358                 pipe->methods = &ehci_device_intr_methods;
1359                 ival = pipe->interval;
1360                 if (ival == USBD_DEFAULT_INTERVAL)
1361                         ival = ed->bInterval;
1362                 return (ehci_device_setintr(sc, sqh, ival));
1363         case UE_ISOCHRONOUS:
1364                 pipe->methods = &ehci_device_isoc_methods;
1365                 return (USBD_INVAL);
1366         default:
1367                 return (USBD_INVAL);
1368         }
1369         return (USBD_NORMAL_COMPLETION);
1370
1371  bad1:
1372         ehci_free_sqh(sc, sqh);
1373  bad0:
1374         return (USBD_NOMEM);
1375 }
1376
1377 /*
1378  * Add an ED to the schedule.  Called while in a critical section.
1379  * If in the async schedule, it will always have a next.
1380  * If in the intr schedule it may not.
1381  */
1382 void
1383 ehci_add_qh(ehci_soft_qh_t *sqh, ehci_soft_qh_t *head)
1384 {
1385         sqh->next = head->next;
1386         sqh->prev = head;
1387         sqh->qh.qh_link = head->qh.qh_link;
1388         head->next = sqh;
1389         if (sqh->next)
1390                 sqh->next->prev = sqh;
1391         head->qh.qh_link = htole32(sqh->physaddr | EHCI_LINK_QH);
1392
1393 #ifdef EHCI_DEBUG
1394         if (ehcidebug > 5) {
1395                 kprintf("ehci_add_qh:\n");
1396                 ehci_dump_sqh(sqh);
1397         }
1398 #endif
1399 }
1400
1401 /*
1402  * Remove an ED from the schedule.  Called while in a critical section.
1403  * Will always have a 'next' if it's in the async list as it's circular.
1404  */
1405 void
1406 ehci_rem_qh(ehci_softc_t *sc, ehci_soft_qh_t *sqh, ehci_soft_qh_t *head)
1407 {
1408         /* XXX */
1409         sqh->prev->qh.qh_link = sqh->qh.qh_link;
1410         sqh->prev->next = sqh->next;
1411         if (sqh->next)
1412                 sqh->next->prev = sqh->prev;
1413         ehci_sync_hc(sc);
1414 }
1415
1416 void
1417 ehci_set_qh_qtd(ehci_soft_qh_t *sqh, ehci_soft_qtd_t *sqtd)
1418 {
1419         int i;
1420         u_int32_t status;
1421
1422         /* Save toggle bit and ping status. */
1423         status = sqh->qh.qh_qtd.qtd_status &
1424             htole32(EHCI_QTD_TOGGLE_MASK |
1425                     EHCI_QTD_SET_STATUS(EHCI_QTD_PINGSTATE));
1426         /* Set HALTED to make hw leave it alone. */
1427         sqh->qh.qh_qtd.qtd_status =
1428             htole32(EHCI_QTD_SET_STATUS(EHCI_QTD_HALTED));
1429         sqh->qh.qh_curqtd = 0;
1430         sqh->qh.qh_qtd.qtd_next = htole32(sqtd->physaddr);
1431         sqh->qh.qh_qtd.qtd_altnext = 0;
1432         for (i = 0; i < EHCI_QTD_NBUFFERS; i++)
1433                 sqh->qh.qh_qtd.qtd_buffer[i] = 0;
1434         sqh->sqtd = sqtd;
1435         /* Set !HALTED && !ACTIVE to start execution, preserve some fields */
1436         sqh->qh.qh_qtd.qtd_status = status;
1437 }
1438
1439 /*
1440  * Ensure that the HC has released all references to the QH.  We do this
1441  * by asking for a Async Advance Doorbell interrupt and then we wait for
1442  * the interrupt.
1443  * To make this easier we first obtain exclusive use of the doorbell.
1444  */
1445 void
1446 ehci_sync_hc(ehci_softc_t *sc)
1447 {
1448         int error;
1449
1450         if (sc->sc_dying) {
1451                 DPRINTFN(2,("ehci_sync_hc: dying\n"));
1452                 return;
1453         }
1454         DPRINTFN(2,("ehci_sync_hc: enter\n"));
1455         /* get doorbell */
1456         lockmgr(&sc->sc_doorbell_lock, LK_EXCLUSIVE);
1457         crit_enter();
1458         /* ask for doorbell */
1459         EOWRITE4(sc, EHCI_USBCMD, EOREAD4(sc, EHCI_USBCMD) | EHCI_CMD_IAAD);
1460         DPRINTFN(1,("ehci_sync_hc: cmd=0x%08x sts=0x%08x\n",
1461                     EOREAD4(sc, EHCI_USBCMD), EOREAD4(sc, EHCI_USBSTS)));
1462         error = tsleep(&sc->sc_async_head, 0, "ehcidi", hz); /* bell wait */
1463         DPRINTFN(1,("ehci_sync_hc: cmd=0x%08x sts=0x%08x\n",
1464                     EOREAD4(sc, EHCI_USBCMD), EOREAD4(sc, EHCI_USBSTS)));
1465         crit_exit();
1466         /* release doorbell */
1467         lockmgr(&sc->sc_doorbell_lock, LK_RELEASE);
1468 #ifdef DIAGNOSTIC
1469         if (error)
1470                 kprintf("ehci_sync_hc: tsleep() = %d\n", error);
1471 #endif
1472         DPRINTFN(2,("ehci_sync_hc: exit\n"));
1473 }
1474
1475 /***********/
1476
1477 /*
1478  * Data structures and routines to emulate the root hub.
1479  */
1480 static usb_device_descriptor_t ehci_devd = {
1481         USB_DEVICE_DESCRIPTOR_SIZE,
1482         UDESC_DEVICE,           /* type */
1483         {0x00, 0x02},           /* USB version */
1484         UDCLASS_HUB,            /* class */
1485         UDSUBCLASS_HUB,         /* subclass */
1486         UDPROTO_HSHUBSTT,       /* protocol */
1487         64,                     /* max packet */
1488         {0},{0},{0x00,0x01},    /* device id */
1489         1,2,0,                  /* string indicies */
1490         1                       /* # of configurations */
1491 };
1492
1493 static usb_device_qualifier_t ehci_odevd = {
1494         USB_DEVICE_DESCRIPTOR_SIZE,
1495         UDESC_DEVICE_QUALIFIER, /* type */
1496         {0x00, 0x02},           /* USB version */
1497         UDCLASS_HUB,            /* class */
1498         UDSUBCLASS_HUB,         /* subclass */
1499         UDPROTO_FSHUB,          /* protocol */
1500         64,                     /* max packet */
1501         1,                      /* # of configurations */
1502         0
1503 };
1504
1505 static usb_config_descriptor_t ehci_confd = {
1506         USB_CONFIG_DESCRIPTOR_SIZE,
1507         UDESC_CONFIG,
1508         {USB_CONFIG_DESCRIPTOR_SIZE +
1509          USB_INTERFACE_DESCRIPTOR_SIZE +
1510          USB_ENDPOINT_DESCRIPTOR_SIZE},
1511         1,
1512         1,
1513         0,
1514         UC_SELF_POWERED,
1515         0                       /* max power */
1516 };
1517
1518 static usb_interface_descriptor_t ehci_ifcd = {
1519         USB_INTERFACE_DESCRIPTOR_SIZE,
1520         UDESC_INTERFACE,
1521         0,
1522         0,
1523         1,
1524         UICLASS_HUB,
1525         UISUBCLASS_HUB,
1526         UIPROTO_HSHUBSTT,
1527         0
1528 };
1529
1530 static usb_endpoint_descriptor_t ehci_endpd = {
1531         USB_ENDPOINT_DESCRIPTOR_SIZE,
1532         UDESC_ENDPOINT,
1533         UE_DIR_IN | EHCI_INTR_ENDPT,
1534         UE_INTERRUPT,
1535         {8, 0},                 /* max packet */
1536         255
1537 };
1538
1539 static usb_hub_descriptor_t ehci_hubd = {
1540         USB_HUB_DESCRIPTOR_SIZE,
1541         UDESC_HUB,
1542         0,
1543         {0,0},
1544         0,
1545         0,
1546         {0},
1547 };
1548
1549 static int
1550 ehci_str(usb_string_descriptor_t *p, int l, char *s)
1551 {
1552         int i;
1553
1554         if (l == 0)
1555                 return (0);
1556         p->bLength = 2 * strlen(s) + 2;
1557         if (l == 1)
1558                 return (1);
1559         p->bDescriptorType = UDESC_STRING;
1560         l -= 2;
1561         for (i = 0; s[i] && l > 1; i++, l -= 2)
1562                 USETW2(p->bString[i], 0, s[i]);
1563         return (2*i+2);
1564 }
1565
1566 /*
1567  * Simulate a hardware hub by handling all the necessary requests.
1568  */
1569 static usbd_status
1570 ehci_root_ctrl_transfer(usbd_xfer_handle xfer)
1571 {
1572         usbd_status err;
1573
1574         /* Insert last in queue. */
1575         err = usb_insert_transfer(xfer);
1576         if (err)
1577                 return (err);
1578
1579         /* Pipe isn't running, start first */
1580         return (ehci_root_ctrl_start(STAILQ_FIRST(&xfer->pipe->queue)));
1581 }
1582
1583 static usbd_status
1584 ehci_root_ctrl_start(usbd_xfer_handle xfer)
1585 {
1586         ehci_softc_t *sc = (ehci_softc_t *)xfer->pipe->device->bus;
1587         usb_device_request_t *req;
1588         void *buf = NULL;
1589         int port, i;
1590         int len, value, index, l, totlen = 0;
1591         usb_port_status_t ps;
1592         usb_hub_descriptor_t hubd;
1593         usbd_status err;
1594         u_int32_t v;
1595
1596         if (sc->sc_dying)
1597                 return (USBD_IOERROR);
1598
1599 #ifdef DIAGNOSTIC
1600         if (!(xfer->rqflags & URQ_REQUEST))
1601                 /* XXX panic */
1602                 return (USBD_INVAL);
1603 #endif
1604         req = &xfer->request;
1605
1606         DPRINTFN(4,("ehci_root_ctrl_start: type=0x%02x request=%02x\n",
1607                     req->bmRequestType, req->bRequest));
1608
1609         len = UGETW(req->wLength);
1610         value = UGETW(req->wValue);
1611         index = UGETW(req->wIndex);
1612
1613         if (len != 0)
1614                 buf = KERNADDR(&xfer->dmabuf, 0);
1615
1616 #define C(x,y) ((x) | ((y) << 8))
1617         switch(C(req->bRequest, req->bmRequestType)) {
1618         case C(UR_CLEAR_FEATURE, UT_WRITE_DEVICE):
1619         case C(UR_CLEAR_FEATURE, UT_WRITE_INTERFACE):
1620         case C(UR_CLEAR_FEATURE, UT_WRITE_ENDPOINT):
1621                 /*
1622                  * DEVICE_REMOTE_WAKEUP and ENDPOINT_HALT are no-ops
1623                  * for the integrated root hub.
1624                  */
1625                 break;
1626         case C(UR_GET_CONFIG, UT_READ_DEVICE):
1627                 if (len > 0) {
1628                         *(u_int8_t *)buf = sc->sc_conf;
1629                         totlen = 1;
1630                 }
1631                 break;
1632         case C(UR_GET_DESCRIPTOR, UT_READ_DEVICE):
1633                 DPRINTFN(8,("ehci_root_ctrl_start: wValue=0x%04x\n", value));
1634                 switch(value >> 8) {
1635                 case UDESC_DEVICE:
1636                         if ((value & 0xff) != 0) {
1637                                 err = USBD_IOERROR;
1638                                 goto ret;
1639                         }
1640                         totlen = l = min(len, USB_DEVICE_DESCRIPTOR_SIZE);
1641                         USETW(ehci_devd.idVendor, sc->sc_id_vendor);
1642                         memcpy(buf, &ehci_devd, l);
1643                         break;
1644                 /*
1645                  * We can't really operate at another speed, but the spec says
1646                  * we need this descriptor.
1647                  */
1648                 case UDESC_DEVICE_QUALIFIER:
1649                         if ((value & 0xff) != 0) {
1650                                 err = USBD_IOERROR;
1651                                 goto ret;
1652                         }
1653                         totlen = l = min(len, USB_DEVICE_DESCRIPTOR_SIZE);
1654                         memcpy(buf, &ehci_odevd, l);
1655                         break;
1656                 /*
1657                  * We can't really operate at another speed, but the spec says
1658                  * we need this descriptor.
1659                  */
1660                 case UDESC_OTHER_SPEED_CONFIGURATION:
1661                 case UDESC_CONFIG:
1662                         if ((value & 0xff) != 0) {
1663                                 err = USBD_IOERROR;
1664                                 goto ret;
1665                         }
1666                         totlen = l = min(len, USB_CONFIG_DESCRIPTOR_SIZE);
1667                         memcpy(buf, &ehci_confd, l);
1668                         ((usb_config_descriptor_t *)buf)->bDescriptorType =
1669                                 value >> 8;
1670                         buf = (char *)buf + l;
1671                         len -= l;
1672                         l = min(len, USB_INTERFACE_DESCRIPTOR_SIZE);
1673                         totlen += l;
1674                         memcpy(buf, &ehci_ifcd, l);
1675                         buf = (char *)buf + l;
1676                         len -= l;
1677                         l = min(len, USB_ENDPOINT_DESCRIPTOR_SIZE);
1678                         totlen += l;
1679                         memcpy(buf, &ehci_endpd, l);
1680                         break;
1681                 case UDESC_STRING:
1682                         if (len == 0)
1683                                 break;
1684                         *(u_int8_t *)buf = 0;
1685                         totlen = 1;
1686                         switch (value & 0xff) {
1687                         case 0: /* Language table */
1688                                 totlen = ehci_str(buf, len, "\001");
1689                                 break;
1690                         case 1: /* Vendor */
1691                                 totlen = ehci_str(buf, len, sc->sc_vendor);
1692                                 break;
1693                         case 2: /* Product */
1694                                 totlen = ehci_str(buf, len, "EHCI root hub");
1695                                 break;
1696                         }
1697                         break;
1698                 default:
1699                         err = USBD_IOERROR;
1700                         goto ret;
1701                 }
1702                 break;
1703         case C(UR_GET_INTERFACE, UT_READ_INTERFACE):
1704                 if (len > 0) {
1705                         *(u_int8_t *)buf = 0;
1706                         totlen = 1;
1707                 }
1708                 break;
1709         case C(UR_GET_STATUS, UT_READ_DEVICE):
1710                 if (len > 1) {
1711                         USETW(((usb_status_t *)buf)->wStatus,UDS_SELF_POWERED);
1712                         totlen = 2;
1713                 }
1714                 break;
1715         case C(UR_GET_STATUS, UT_READ_INTERFACE):
1716         case C(UR_GET_STATUS, UT_READ_ENDPOINT):
1717                 if (len > 1) {
1718                         USETW(((usb_status_t *)buf)->wStatus, 0);
1719                         totlen = 2;
1720                 }
1721                 break;
1722         case C(UR_SET_ADDRESS, UT_WRITE_DEVICE):
1723                 if (value >= USB_MAX_DEVICES) {
1724                         err = USBD_IOERROR;
1725                         goto ret;
1726                 }
1727                 sc->sc_addr = value;
1728                 break;
1729         case C(UR_SET_CONFIG, UT_WRITE_DEVICE):
1730                 if (value != 0 && value != 1) {
1731                         err = USBD_IOERROR;
1732                         goto ret;
1733                 }
1734                 sc->sc_conf = value;
1735                 break;
1736         case C(UR_SET_DESCRIPTOR, UT_WRITE_DEVICE):
1737                 break;
1738         case C(UR_SET_FEATURE, UT_WRITE_DEVICE):
1739         case C(UR_SET_FEATURE, UT_WRITE_INTERFACE):
1740         case C(UR_SET_FEATURE, UT_WRITE_ENDPOINT):
1741                 err = USBD_IOERROR;
1742                 goto ret;
1743         case C(UR_SET_INTERFACE, UT_WRITE_INTERFACE):
1744                 break;
1745         case C(UR_SYNCH_FRAME, UT_WRITE_ENDPOINT):
1746                 break;
1747         /* Hub requests */
1748         case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_DEVICE):
1749                 break;
1750         case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_OTHER):
1751                 DPRINTFN(8, ("ehci_root_ctrl_start: UR_CLEAR_PORT_FEATURE "
1752                              "port=%d feature=%d\n",
1753                              index, value));
1754                 if (index < 1 || index > sc->sc_noport) {
1755                         err = USBD_IOERROR;
1756                         goto ret;
1757                 }
1758                 port = EHCI_PORTSC(index);
1759                 v = EOREAD4(sc, port) &~ EHCI_PS_CLEAR;
1760                 switch(value) {
1761                 case UHF_PORT_ENABLE:
1762                         EOWRITE4(sc, port, v &~ EHCI_PS_PE);
1763                         break;
1764                 case UHF_PORT_SUSPEND:
1765                         EOWRITE4(sc, port, v &~ EHCI_PS_SUSP);
1766                         break;
1767                 case UHF_PORT_POWER:
1768                         EOWRITE4(sc, port, v &~ EHCI_PS_PP);
1769                         break;
1770                 case UHF_PORT_TEST:
1771                         DPRINTFN(2,("ehci_root_ctrl_start: clear port test "
1772                                     "%d\n", index));
1773                         break;
1774                 case UHF_PORT_INDICATOR:
1775                         DPRINTFN(2,("ehci_root_ctrl_start: clear port ind "
1776                                     "%d\n", index));
1777                         EOWRITE4(sc, port, v &~ EHCI_PS_PIC);
1778                         break;
1779                 case UHF_C_PORT_CONNECTION:
1780                         EOWRITE4(sc, port, v | EHCI_PS_CSC);
1781                         break;
1782                 case UHF_C_PORT_ENABLE:
1783                         EOWRITE4(sc, port, v | EHCI_PS_PEC);
1784                         break;
1785                 case UHF_C_PORT_SUSPEND:
1786                         /* how? */
1787                         break;
1788                 case UHF_C_PORT_OVER_CURRENT:
1789                         EOWRITE4(sc, port, v | EHCI_PS_OCC);
1790                         break;
1791                 case UHF_C_PORT_RESET:
1792                         sc->sc_isreset = 0;
1793                         break;
1794                 default:
1795                         err = USBD_IOERROR;
1796                         goto ret;
1797                 }
1798                 break;
1799         case C(UR_GET_DESCRIPTOR, UT_READ_CLASS_DEVICE):
1800                 if ((value & 0xff) != 0) {
1801                         err = USBD_IOERROR;
1802                         goto ret;
1803                 }
1804                 hubd = ehci_hubd;
1805                 hubd.bNbrPorts = sc->sc_noport;
1806                 v = EOREAD4(sc, EHCI_HCSPARAMS);
1807                 USETW(hubd.wHubCharacteristics,
1808                     EHCI_HCS_PPC(v) ? UHD_PWR_INDIVIDUAL : UHD_PWR_NO_SWITCH |
1809                     EHCI_HCS_P_INDICATOR(EREAD4(sc, EHCI_HCSPARAMS))
1810                         ? UHD_PORT_IND : 0);
1811                 hubd.bPwrOn2PwrGood = 200; /* XXX can't find out? */
1812                 for (i = 0, l = sc->sc_noport; l > 0; i++, l -= 8, v >>= 8)
1813                         hubd.DeviceRemovable[i++] = 0; /* XXX can't find out? */
1814                 hubd.bDescLength = USB_HUB_DESCRIPTOR_SIZE + i;
1815                 l = min(len, hubd.bDescLength);
1816                 totlen = l;
1817                 memcpy(buf, &hubd, l);
1818                 break;
1819         case C(UR_GET_STATUS, UT_READ_CLASS_DEVICE):
1820                 if (len != 4) {
1821                         err = USBD_IOERROR;
1822                         goto ret;
1823                 }
1824                 memset(buf, 0, len); /* ? XXX */
1825                 totlen = len;
1826                 break;
1827         case C(UR_GET_STATUS, UT_READ_CLASS_OTHER):
1828                 DPRINTFN(8,("ehci_root_ctrl_start: get port status i=%d\n",
1829                             index));
1830                 if (index < 1 || index > sc->sc_noport) {
1831                         err = USBD_IOERROR;
1832                         goto ret;
1833                 }
1834                 if (len != 4) {
1835                         err = USBD_IOERROR;
1836                         goto ret;
1837                 }
1838                 v = EOREAD4(sc, EHCI_PORTSC(index));
1839                 DPRINTFN(8,("ehci_root_ctrl_start: port status=0x%04x\n", v));
1840                 i = UPS_HIGH_SPEED;
1841                 if (v & EHCI_PS_CS)     i |= UPS_CURRENT_CONNECT_STATUS;
1842                 if (v & EHCI_PS_PE)     i |= UPS_PORT_ENABLED;
1843                 if (v & EHCI_PS_SUSP)   i |= UPS_SUSPEND;
1844                 if (v & EHCI_PS_OCA)    i |= UPS_OVERCURRENT_INDICATOR;
1845                 if (v & EHCI_PS_PR)     i |= UPS_RESET;
1846                 if (v & EHCI_PS_PP)     i |= UPS_PORT_POWER;
1847                 USETW(ps.wPortStatus, i);
1848                 i = 0;
1849                 if (v & EHCI_PS_CSC)    i |= UPS_C_CONNECT_STATUS;
1850                 if (v & EHCI_PS_PEC)    i |= UPS_C_PORT_ENABLED;
1851                 if (v & EHCI_PS_OCC)    i |= UPS_C_OVERCURRENT_INDICATOR;
1852                 if (sc->sc_isreset)     i |= UPS_C_PORT_RESET;
1853                 USETW(ps.wPortChange, i);
1854                 l = min(len, sizeof ps);
1855                 memcpy(buf, &ps, l);
1856                 totlen = l;
1857                 break;
1858         case C(UR_SET_DESCRIPTOR, UT_WRITE_CLASS_DEVICE):
1859                 err = USBD_IOERROR;
1860                 goto ret;
1861         case C(UR_SET_FEATURE, UT_WRITE_CLASS_DEVICE):
1862                 break;
1863         case C(UR_SET_FEATURE, UT_WRITE_CLASS_OTHER):
1864                 if (index < 1 || index > sc->sc_noport) {
1865                         err = USBD_IOERROR;
1866                         goto ret;
1867                 }
1868                 port = EHCI_PORTSC(index);
1869                 v = EOREAD4(sc, port) &~ EHCI_PS_CLEAR;
1870                 switch(value) {
1871                 case UHF_PORT_ENABLE:
1872                         EOWRITE4(sc, port, v | EHCI_PS_PE);
1873                         break;
1874                 case UHF_PORT_SUSPEND:
1875                         EOWRITE4(sc, port, v | EHCI_PS_SUSP);
1876                         break;
1877                 case UHF_PORT_RESET:
1878                         DPRINTFN(5,("ehci_root_ctrl_start: reset port %d\n",
1879                                     index));
1880                         if (EHCI_PS_IS_LOWSPEED(v)) {
1881                                 /* Low speed device, give up ownership. */
1882                                 ehci_disown(sc, index, 1);
1883                                 break;
1884                         }
1885                         /* Start reset sequence. */
1886                         v &= ~ (EHCI_PS_PE | EHCI_PS_PR);
1887                         EOWRITE4(sc, port, v | EHCI_PS_PR);
1888                         /* Wait for reset to complete. */
1889                         usb_delay_ms(&sc->sc_bus, USB_PORT_ROOT_RESET_DELAY);
1890                         if (sc->sc_dying) {
1891                                 err = USBD_IOERROR;
1892                                 goto ret;
1893                         }
1894                         /* Terminate reset sequence. */
1895                         EOWRITE4(sc, port, v);
1896                         /* Wait for HC to complete reset. */
1897                         usb_delay_ms(&sc->sc_bus, EHCI_PORT_RESET_COMPLETE);
1898                         if (sc->sc_dying) {
1899                                 err = USBD_IOERROR;
1900                                 goto ret;
1901                         }
1902                         v = EOREAD4(sc, port);
1903                         DPRINTF(("ehci after reset, status=0x%08x\n", v));
1904                         if (v & EHCI_PS_PR) {
1905                                 device_printf(sc->sc_bus.bdev,
1906                                     "port reset timeout\n");
1907                                 return (USBD_TIMEOUT);
1908                         }
1909                         if (!(v & EHCI_PS_PE)) {
1910                                 /* Not a high speed device, give up ownership.*/
1911                                 ehci_disown(sc, index, 0);
1912                                 break;
1913                         }
1914                         sc->sc_isreset = 1;
1915                         DPRINTF(("ehci port %d reset, status = 0x%08x\n",
1916                                  index, v));
1917                         break;
1918                 case UHF_PORT_POWER:
1919                         DPRINTFN(2,("ehci_root_ctrl_start: set port power "
1920                                     "%d\n", index));
1921                         EOWRITE4(sc, port, v | EHCI_PS_PP);
1922                         break;
1923                 case UHF_PORT_TEST:
1924                         DPRINTFN(2,("ehci_root_ctrl_start: set port test "
1925                                     "%d\n", index));
1926                         break;
1927                 case UHF_PORT_INDICATOR:
1928                         DPRINTFN(2,("ehci_root_ctrl_start: set port ind "
1929                                     "%d\n", index));
1930                         EOWRITE4(sc, port, v | EHCI_PS_PIC);
1931                         break;
1932                 default:
1933                         err = USBD_IOERROR;
1934                         goto ret;
1935                 }
1936                 break;
1937         case C(UR_CLEAR_TT_BUFFER, UT_WRITE_CLASS_OTHER):
1938         case C(UR_RESET_TT, UT_WRITE_CLASS_OTHER):
1939         case C(UR_GET_TT_STATE, UT_READ_CLASS_OTHER):
1940         case C(UR_STOP_TT, UT_WRITE_CLASS_OTHER):
1941                 break;
1942         default:
1943                 err = USBD_IOERROR;
1944                 goto ret;
1945         }
1946         xfer->actlen = totlen;
1947         err = USBD_NORMAL_COMPLETION;
1948  ret:
1949         xfer->status = err;
1950         crit_enter();
1951         usb_transfer_complete(xfer);
1952         crit_exit();
1953         return (USBD_IN_PROGRESS);
1954 }
1955
1956 void
1957 ehci_disown(ehci_softc_t *sc, int index, int lowspeed)
1958 {
1959         int port;
1960         u_int32_t v;
1961
1962         DPRINTF(("ehci_disown: index=%d lowspeed=%d\n", index, lowspeed));
1963 #ifdef DIAGNOSTIC
1964         if (sc->sc_npcomp != 0) {
1965                 int i = (index-1) / sc->sc_npcomp;
1966                 if (i >= sc->sc_ncomp)
1967                         device_printf(sc->sc_bus.bdev, "strange port\n");
1968                 else
1969                         device_printf(sc->sc_bus.bdev,
1970                             "handing over %s speed device on port %d to %s\n",
1971                             (lowspeed ? "low" : "full"),
1972                             index, device_get_nameunit(sc->sc_comps[i]->bdev));
1973         } else {
1974                 device_printf(sc->sc_bus.bdev, "npcomp == 0\n");
1975         }
1976 #endif
1977         port = EHCI_PORTSC(index);
1978         v = EOREAD4(sc, port) &~ EHCI_PS_CLEAR;
1979         EOWRITE4(sc, port, v | EHCI_PS_PO);
1980 }
1981
1982 /* Abort a root control request. */
1983 static void
1984 ehci_root_ctrl_abort(usbd_xfer_handle xfer)
1985 {
1986         /* Nothing to do, all transfers are synchronous. */
1987 }
1988
1989 /* Close the root pipe. */
1990 static void
1991 ehci_root_ctrl_close(usbd_pipe_handle pipe)
1992 {
1993         DPRINTF(("ehci_root_ctrl_close\n"));
1994         /* Nothing to do. */
1995 }
1996
1997 void
1998 ehci_root_intr_done(usbd_xfer_handle xfer)
1999 {
2000 }
2001
2002 static usbd_status
2003 ehci_root_intr_transfer(usbd_xfer_handle xfer)
2004 {
2005         usbd_status err;
2006
2007         /* Insert last in queue. */
2008         err = usb_insert_transfer(xfer);
2009         if (err)
2010                 return (err);
2011
2012         /* Pipe isn't running, start first */
2013         return (ehci_root_intr_start(STAILQ_FIRST(&xfer->pipe->queue)));
2014 }
2015
2016 static usbd_status
2017 ehci_root_intr_start(usbd_xfer_handle xfer)
2018 {
2019         usbd_pipe_handle pipe = xfer->pipe;
2020         ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus;
2021
2022         if (sc->sc_dying)
2023                 return (USBD_IOERROR);
2024
2025         sc->sc_intrxfer = xfer;
2026
2027         return (USBD_IN_PROGRESS);
2028 }
2029
2030 /* Abort a root interrupt request. */
2031 static void
2032 ehci_root_intr_abort(usbd_xfer_handle xfer)
2033 {
2034         if (xfer->pipe->intrxfer == xfer) {
2035                 DPRINTF(("ehci_root_intr_abort: remove\n"));
2036                 xfer->pipe->intrxfer = NULL;
2037         }
2038         xfer->status = USBD_CANCELLED;
2039         crit_enter();
2040         usb_transfer_complete(xfer);
2041         crit_exit();
2042 }
2043
2044 /* Close the root pipe. */
2045 static void
2046 ehci_root_intr_close(usbd_pipe_handle pipe)
2047 {
2048         ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus;
2049
2050         DPRINTF(("ehci_root_intr_close\n"));
2051
2052         sc->sc_intrxfer = NULL;
2053 }
2054
2055 void
2056 ehci_root_ctrl_done(usbd_xfer_handle xfer)
2057 {
2058 }
2059
2060 /************************/
2061
2062 ehci_soft_qh_t *
2063 ehci_alloc_sqh(ehci_softc_t *sc)
2064 {
2065         ehci_soft_qh_t *sqh;
2066         usbd_status err;
2067         int i, offs;
2068         usb_dma_t dma;
2069
2070         if (sc->sc_freeqhs == NULL) {
2071                 DPRINTFN(2, ("ehci_alloc_sqh: allocating chunk\n"));
2072                 err = usb_allocmem(&sc->sc_bus, EHCI_SQH_SIZE * EHCI_SQH_CHUNK,
2073                           EHCI_PAGE_SIZE, &dma);
2074 #ifdef EHCI_DEBUG
2075                 if (err)
2076                         kprintf("ehci_alloc_sqh: usb_allocmem()=%d\n", err);
2077 #endif
2078                 if (err)
2079                         return (NULL);
2080                 for(i = 0; i < EHCI_SQH_CHUNK; i++) {
2081                         offs = i * EHCI_SQH_SIZE;
2082                         sqh = KERNADDR(&dma, offs);
2083                         sqh->physaddr = DMAADDR(&dma, offs);
2084                         sqh->next = sc->sc_freeqhs;
2085                         sc->sc_freeqhs = sqh;
2086                 }
2087         }
2088         sqh = sc->sc_freeqhs;
2089         sc->sc_freeqhs = sqh->next;
2090         memset(&sqh->qh, 0, sizeof(ehci_qh_t));
2091         sqh->next = NULL;
2092         sqh->prev = NULL;
2093         return (sqh);
2094 }
2095
2096 void
2097 ehci_free_sqh(ehci_softc_t *sc, ehci_soft_qh_t *sqh)
2098 {
2099         sqh->next = sc->sc_freeqhs;
2100         sc->sc_freeqhs = sqh;
2101 }
2102
2103 ehci_soft_qtd_t *
2104 ehci_alloc_sqtd(ehci_softc_t *sc)
2105 {
2106         ehci_soft_qtd_t *sqtd;
2107         usbd_status err;
2108         int i, offs;
2109         usb_dma_t dma;
2110
2111         if (sc->sc_freeqtds == NULL) {
2112                 DPRINTFN(2, ("ehci_alloc_sqtd: allocating chunk\n"));
2113                 err = usb_allocmem(&sc->sc_bus, EHCI_SQTD_SIZE*EHCI_SQTD_CHUNK,
2114                           EHCI_PAGE_SIZE, &dma);
2115 #ifdef EHCI_DEBUG
2116                 if (err)
2117                         kprintf("ehci_alloc_sqtd: usb_allocmem()=%d\n", err);
2118 #endif
2119                 if (err)
2120                         return (NULL);
2121                 crit_enter();
2122                 for(i = 0; i < EHCI_SQTD_CHUNK; i++) {
2123                         offs = i * EHCI_SQTD_SIZE;
2124                         sqtd = KERNADDR(&dma, offs);
2125                         sqtd->physaddr = DMAADDR(&dma, offs);
2126                         sqtd->nextqtd = sc->sc_freeqtds;
2127                         sc->sc_freeqtds = sqtd;
2128                 }
2129                 crit_exit();
2130         }
2131
2132         crit_enter();
2133         sqtd = sc->sc_freeqtds;
2134         sc->sc_freeqtds = sqtd->nextqtd;
2135         memset(&sqtd->qtd, 0, sizeof(ehci_qtd_t));
2136         sqtd->nextqtd = NULL;
2137         sqtd->xfer = NULL;
2138         crit_exit();
2139
2140         return (sqtd);
2141 }
2142
2143 void
2144 ehci_free_sqtd(ehci_softc_t *sc, ehci_soft_qtd_t *sqtd)
2145 {
2146         crit_enter();
2147         sqtd->nextqtd = sc->sc_freeqtds;
2148         sc->sc_freeqtds = sqtd;
2149         crit_exit();
2150 }
2151
2152 usbd_status
2153 ehci_alloc_sqtd_chain(struct ehci_pipe *epipe, ehci_softc_t *sc,
2154                      int alen, int rd, usbd_xfer_handle xfer,
2155                      ehci_soft_qtd_t **sp, ehci_soft_qtd_t **ep)
2156 {
2157         ehci_soft_qtd_t *next, *cur;
2158         ehci_physaddr_t dataphys, dataphyspage, dataphyslastpage, nextphys;
2159         u_int32_t qtdstatus;
2160         int len, curlen, mps, offset;
2161         int i, iscontrol;
2162         usb_dma_t *dma = &xfer->dmabuf;
2163
2164         DPRINTFN(alen<4*4096,("ehci_alloc_sqtd_chain: start len=%d\n", alen));
2165
2166         offset = 0;
2167         len = alen;
2168         iscontrol = (epipe->pipe.endpoint->edesc->bmAttributes & UE_XFERTYPE) ==
2169             UE_CONTROL;
2170         dataphys = DMAADDR(dma, 0);
2171         dataphyslastpage = EHCI_PAGE(DMAADDR(dma, len - 1));
2172         qtdstatus = EHCI_QTD_ACTIVE |
2173             EHCI_QTD_SET_PID(rd ? EHCI_QTD_PID_IN : EHCI_QTD_PID_OUT) |
2174             EHCI_QTD_SET_CERR(3)
2175             /* IOC set below */
2176             /* BYTES set below */
2177             ;
2178         mps = UGETW(epipe->pipe.endpoint->edesc->wMaxPacketSize);
2179         /*
2180          * The control transfer data stage always starts with a toggle of 1.
2181          * For other transfers we let the hardware track the toggle state.
2182          */
2183         if (iscontrol)
2184                 qtdstatus |= EHCI_QTD_SET_TOGGLE(1);
2185
2186         cur = ehci_alloc_sqtd(sc);
2187         *sp = cur;
2188         if (cur == NULL)
2189                 goto nomem;
2190         for (;;) {
2191                 dataphyspage = EHCI_PAGE(dataphys);
2192                 /* XXX This is pretty broken: Because we do not allocate
2193                  * a contiguous buffer (contiguous in physical pages) we
2194                  * can only transfer one page in one go.
2195                  * So check whether the start and end of the buffer are on
2196                  * the same page.
2197                  */
2198                 if (dataphyspage == dataphyslastpage) {
2199                         curlen = len;
2200                 }
2201                 else {
2202                         /* See comment above (XXX) */
2203                         curlen = EHCI_PAGE_SIZE -
2204                                  EHCI_PAGE_MASK(dataphys);
2205                         /* the length must be a multiple of the max size */
2206                         curlen -= curlen % mps;
2207                         DPRINTFN(1,("ehci_alloc_sqtd_chain: multiple QTDs, "
2208                                     "curlen=%d\n", curlen));
2209                         KASSERT(curlen != 0, ("ehci_alloc_std: curlen == 0"));
2210                 }
2211                 DPRINTFN(4,("ehci_alloc_sqtd_chain: dataphys=0x%08x "
2212                             "dataphyslastpage=0x%08x len=%d curlen=%d\n",
2213                             dataphys, dataphyslastpage,
2214                             len, curlen));
2215                 len -= curlen;
2216
2217                 if (len != 0) {
2218                         next = ehci_alloc_sqtd(sc);
2219                         if (next == NULL)
2220                                 goto nomem;
2221                         nextphys = htole32(next->physaddr);
2222                 } else {
2223                         next = NULL;
2224                         nextphys = EHCI_NULL;
2225                 }
2226
2227                 for (i = 0; i * EHCI_PAGE_SIZE < curlen; i++) {
2228                         ehci_physaddr_t a = dataphys + i * EHCI_PAGE_SIZE;
2229                         if (i != 0) /* use offset only in first buffer */
2230                                 a = EHCI_PAGE(a);
2231                         cur->qtd.qtd_buffer[i] = htole32(a);
2232                         cur->qtd.qtd_buffer_hi[i] = 0;
2233 #ifdef DIAGNOSTIC
2234                         if (i >= EHCI_QTD_NBUFFERS) {
2235                                 kprintf("ehci_alloc_sqtd_chain: i=%d\n", i);
2236                                 goto nomem;
2237                         }
2238 #endif
2239                 }
2240                 cur->nextqtd = next;
2241                 cur->qtd.qtd_next = cur->qtd.qtd_altnext = nextphys;
2242                 cur->qtd.qtd_status =
2243                     htole32(qtdstatus | EHCI_QTD_SET_BYTES(curlen));
2244                 cur->xfer = xfer;
2245                 cur->len = curlen;
2246                 DPRINTFN(10,("ehci_alloc_sqtd_chain: cbp=0x%08x end=0x%08x\n",
2247                             dataphys, dataphys + curlen));
2248                 if (iscontrol) {
2249                         /*
2250                          * adjust the toggle based on the number of packets
2251                          * in this qtd
2252                          */
2253                         if (((curlen + mps - 1) / mps) & 1)
2254                                 qtdstatus ^= EHCI_QTD_TOGGLE_MASK;
2255                 }
2256                 if (len == 0)
2257                         break;
2258                 DPRINTFN(10,("ehci_alloc_sqtd_chain: extend chain\n"));
2259                 offset += curlen;
2260                 dataphys = DMAADDR(dma, offset);
2261                 cur = next;
2262         }
2263         cur->qtd.qtd_status |= htole32(EHCI_QTD_IOC);
2264         *ep = cur;
2265
2266         DPRINTFN(10,("ehci_alloc_sqtd_chain: return sqtd=%p sqtdend=%p\n",
2267                      *sp, *ep));
2268
2269         return (USBD_NORMAL_COMPLETION);
2270
2271  nomem:
2272         /* XXX free chain */
2273         DPRINTFN(-1,("ehci_alloc_sqtd_chain: no memory\n"));
2274         return (USBD_NOMEM);
2275 }
2276
2277 static void
2278 ehci_free_sqtd_chain(ehci_softc_t *sc, ehci_soft_qtd_t *sqtd,
2279                     ehci_soft_qtd_t *sqtdend)
2280 {
2281         ehci_soft_qtd_t *p;
2282         int i;
2283
2284         DPRINTFN(10,("ehci_free_sqtd_chain: sqtd=%p sqtdend=%p\n",
2285                      sqtd, sqtdend));
2286
2287         for (i = 0; sqtd != sqtdend; sqtd = p, i++) {
2288                 p = sqtd->nextqtd;
2289                 ehci_free_sqtd(sc, sqtd);
2290         }
2291 }
2292
2293 /****************/
2294
2295 /*
2296  * Close a reqular pipe.
2297  * Assumes that there are no pending transactions.
2298  */
2299 void
2300 ehci_close_pipe(usbd_pipe_handle pipe, ehci_soft_qh_t *head)
2301 {
2302         struct ehci_pipe *epipe = (struct ehci_pipe *)pipe;
2303         ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus;
2304         ehci_soft_qh_t *sqh = epipe->sqh;
2305
2306         crit_enter();
2307         ehci_rem_qh(sc, sqh, head);
2308         crit_exit();
2309         pipe->endpoint->savedtoggle =
2310             EHCI_QTD_GET_TOGGLE(le32toh(sqh->qh.qh_qtd.qtd_status));
2311         ehci_free_sqh(sc, epipe->sqh);
2312 }
2313
2314 /*
2315  * Abort a device request.
2316  * If this routine is called from a critical section it guarantees that the
2317  * request will be removed from the hardware scheduling and that the callback
2318  * for it will be called with USBD_CANCELLED status.
2319  * It's impossible to guarantee that the requested transfer will not
2320  * have happened since the hardware runs concurrently.
2321  * If the transaction has already happened we rely on the ordinary
2322  * interrupt processing to process it.
2323  * XXX This is most probably wrong.
2324  */
2325 void
2326 ehci_abort_xfer(usbd_xfer_handle xfer, usbd_status status)
2327 {
2328 #define exfer EXFER(xfer)
2329         struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe;
2330         ehci_softc_t *sc = (ehci_softc_t *)epipe->pipe.device->bus;
2331         ehci_soft_qh_t *sqh = epipe->sqh;
2332         ehci_soft_qtd_t *sqtd, *snext, **psqtd;
2333         ehci_physaddr_t cur, us, next;
2334         int hit;
2335         /* int count = 0; */
2336         ehci_soft_qh_t *psqh;
2337
2338         DPRINTF(("ehci_abort_xfer: xfer=%p pipe=%p\n", xfer, epipe));
2339
2340         if (sc->sc_dying) {
2341                 /* If we're dying, just do the software part. */
2342                 crit_enter();
2343                 xfer->status = status;  /* make software ignore it */
2344                 callout_stop(&xfer->timeout_handle);
2345                 usb_rem_task(epipe->pipe.device, &exfer->abort_task);
2346                 usb_transfer_complete(xfer);
2347                 crit_exit();
2348                 return;
2349         }
2350
2351         if (xfer->device->bus->intr_context /* || !curproc REMOVED DFly */)
2352                 panic("ehci_abort_xfer: not in process context");
2353
2354         /*
2355          * If an abort is already in progress then just wait for it to
2356          * complete and return.
2357          */
2358         if (exfer->ehci_xfer_flags & EHCI_XFER_ABORTING) {
2359                 DPRINTFN(2, ("ehci_abort_xfer: already aborting\n"));
2360                 /* No need to wait if we're aborting from a timeout. */
2361                 if (status == USBD_TIMEOUT)
2362                         return;
2363                 /* Override the status which might be USBD_TIMEOUT. */
2364                 xfer->status = status;
2365                 DPRINTFN(2, ("ehci_abort_xfer: waiting for abort to finish\n"));
2366                 exfer->ehci_xfer_flags |= EHCI_XFER_ABORTWAIT;
2367                 while (exfer->ehci_xfer_flags & EHCI_XFER_ABORTING)
2368                         tsleep(&exfer->ehci_xfer_flags, 0, "ehciaw", 0);
2369                 return;
2370         }
2371
2372         /*
2373          * Step 1: Make interrupt routine and timeouts ignore xfer.
2374          */
2375         crit_enter();
2376         exfer->ehci_xfer_flags |= EHCI_XFER_ABORTING;
2377         xfer->status = status;  /* make software ignore it */
2378         callout_stop(&xfer->timeout_handle);
2379         usb_rem_task(epipe->pipe.device, &exfer->abort_task);
2380         crit_exit();
2381
2382         /*
2383          * Step 2: Wait until we know hardware has finished any possible
2384          * use of the xfer. We do this by removing the entire
2385          * queue from the async schedule and waiting for the doorbell.
2386          * Nothing else should be touching the queue now.
2387          */
2388         psqh = sqh->prev;
2389         ehci_rem_qh(sc, sqh, psqh);
2390
2391         /*
2392          * Step 3:  make sure the soft interrupt routine
2393          * has run. This should remove any completed items off the queue.
2394          * The hardware has no reference to completed items (TDs).
2395          * It's safe to remove them at any time.
2396          */
2397         crit_enter();
2398 #ifdef USB_USE_SOFTINTR
2399         sc->sc_softwake = 1;
2400 #endif /* USB_USE_SOFTINTR */
2401         usb_schedsoftintr(&sc->sc_bus);
2402 #ifdef USB_USE_SOFTINTR
2403         tsleep(&sc->sc_softwake, 0, "ehciab", 0);
2404 #endif /* USB_USE_SOFTINTR */
2405
2406         /*
2407          * Step 4: Remove any vestiges of the xfer from the hardware.
2408          * The complication here is that the hardware may have executed
2409          * into or even beyond the xfer we're trying to abort.
2410          * So as we're scanning the TDs of this xfer we check if
2411          * the hardware points to any of them.
2412          *
2413          * first we need to see if there are any transfers
2414          * on this queue before the xfer we are aborting.. we need
2415          * to update any pointers that point to us to point past
2416          * the aborting xfer.  (If there is something past us).
2417          * Hardware and software.
2418          */
2419         cur = EHCI_LINK_ADDR(le32toh(sqh->qh.qh_curqtd));
2420         hit = 0;
2421
2422         /* If they initially point here. */
2423         us = exfer->sqtdstart->physaddr;
2424
2425         /* We will change them to point here */
2426         snext = exfer->sqtdend->nextqtd;
2427         next = snext ? htole32(snext->physaddr) : EHCI_NULL;
2428
2429         /*
2430          * Now loop through any qTDs before us and keep track of the pointer
2431          * that points to us for the end.
2432          */
2433         psqtd = &sqh->sqtd;
2434         sqtd = sqh->sqtd;
2435         while (sqtd && sqtd != exfer->sqtdstart) {
2436                 hit |= (cur == sqtd->physaddr);
2437                 if (EHCI_LINK_ADDR(le32toh(sqtd->qtd.qtd_next)) == us)
2438                         sqtd->qtd.qtd_next = next;
2439                 if (EHCI_LINK_ADDR(le32toh(sqtd->qtd.qtd_altnext)) == us)
2440                         sqtd->qtd.qtd_altnext = next;
2441                 psqtd = &sqtd->nextqtd;
2442                 sqtd = sqtd->nextqtd;
2443         }
2444                 /* make the software pointer bypass us too */
2445         *psqtd = exfer->sqtdend->nextqtd;
2446
2447         /*
2448          * If we already saw the active one then we are pretty much done.
2449          * We've done all the relinking we need to do.
2450          */
2451         if (!hit) {
2452
2453                 /*
2454                  * Now reinitialise the QH to point to the next qTD
2455                  * (if there is one). We only need to do this if
2456                  * it was previously pointing to us.
2457                  */
2458                 for (sqtd = exfer->sqtdstart; ; sqtd = sqtd->nextqtd) {
2459                         if (cur == sqtd->physaddr) {
2460                                 hit++;
2461                         }
2462                         if (sqtd == exfer->sqtdend)
2463                                 break;
2464                 }
2465                 sqtd = sqtd->nextqtd;
2466                 /*
2467                  * Only need to alter the QH if it was pointing at a qTD
2468                  * that we are removing.
2469                  */
2470                 if (hit) {
2471                         if (snext) {
2472                                 ehci_set_qh_qtd(sqh, snext);
2473                         } else {
2474
2475                                 sqh->qh.qh_curqtd = 0; /* unlink qTDs */
2476                                 sqh->qh.qh_qtd.qtd_status &=
2477                                     htole32(EHCI_QTD_TOGGLE_MASK);
2478                                 sqh->qh.qh_qtd.qtd_next =
2479                                     sqh->qh.qh_qtd.qtd_altnext
2480                                         = EHCI_NULL;
2481                                 DPRINTFN(1,("ehci_abort_xfer: no hit\n"));
2482                         }
2483                 }
2484         }
2485         ehci_add_qh(sqh, psqh);
2486         /*
2487          * Step 5: Execute callback.
2488          */
2489 #ifdef DIAGNOSTIC
2490         exfer->isdone = 1;
2491 #endif
2492         /* Do the wakeup first to avoid touching the xfer after the callback. */
2493         exfer->ehci_xfer_flags &= ~EHCI_XFER_ABORTING;
2494         if (exfer->ehci_xfer_flags & EHCI_XFER_ABORTWAIT) {
2495                 exfer->ehci_xfer_flags &= ~EHCI_XFER_ABORTWAIT;
2496                 wakeup(&exfer->ehci_xfer_flags);
2497         }
2498         usb_transfer_complete(xfer);
2499
2500         /* kprintf("%s: %d TDs aborted\n", __func__, count); */
2501         crit_exit();
2502 #undef exfer
2503 }
2504
2505 void
2506 ehci_timeout(void *addr)
2507 {
2508         struct ehci_xfer *exfer = addr;
2509         struct ehci_pipe *epipe = (struct ehci_pipe *)exfer->xfer.pipe;
2510         ehci_softc_t *sc = (ehci_softc_t *)epipe->pipe.device->bus;
2511
2512         DPRINTF(("ehci_timeout: exfer=%p\n", exfer));
2513 #ifdef USB_DEBUG
2514         if (ehcidebug > 1)
2515                 usbd_dump_pipe(exfer->xfer.pipe);
2516 #endif
2517
2518         if (sc->sc_dying) {
2519                 ehci_abort_xfer(&exfer->xfer, USBD_TIMEOUT);
2520                 return;
2521         }
2522
2523         /* Execute the abort in a process context. */
2524         usb_add_task(exfer->xfer.pipe->device, &exfer->abort_task,
2525                      USB_TASKQ_HC);
2526 }
2527
2528 void
2529 ehci_timeout_task(void *addr)
2530 {
2531         usbd_xfer_handle xfer = addr;
2532
2533         DPRINTF(("ehci_timeout_task: xfer=%p\n", xfer));
2534         crit_enter();
2535         ehci_abort_xfer(xfer, USBD_TIMEOUT);
2536         crit_exit();
2537 }
2538
2539 /*
2540  * Some EHCI chips from VIA / ATI seem to trigger interrupts before writing
2541  * back the qTD status, or miss signalling occasionally under heavy load.
2542  * If the host machine is too fast, we can miss transaction completion - when
2543  * we scan the active list the transaction still seems to be active. This
2544  * generally exhibits itself as a umass stall that never recovers.
2545  *
2546  * We work around this behaviour by setting up this callback after any softintr
2547  * that completes with transactions still pending, giving us another chance to
2548  * check for completion after the writeback has taken place.
2549  */
2550 void
2551 ehci_intrlist_timeout(void *arg)
2552 {
2553         ehci_softc_t *sc = arg;
2554
2555         DPRINTFN(3, ("ehci_intrlist_timeout\n"));
2556         usb_schedsoftintr(&sc->sc_bus);
2557 }
2558
2559 /************************/
2560
2561 static usbd_status
2562 ehci_device_ctrl_transfer(usbd_xfer_handle xfer)
2563 {
2564         usbd_status err;
2565
2566         /* Insert last in queue. */
2567         err = usb_insert_transfer(xfer);
2568         if (err)
2569                 return (err);
2570
2571         /* Pipe isn't running, start first */
2572         return (ehci_device_ctrl_start(STAILQ_FIRST(&xfer->pipe->queue)));
2573 }
2574
2575 static usbd_status
2576 ehci_device_ctrl_start(usbd_xfer_handle xfer)
2577 {
2578         ehci_softc_t *sc = (ehci_softc_t *)xfer->pipe->device->bus;
2579         usbd_status err;
2580
2581         if (sc->sc_dying)
2582                 return (USBD_IOERROR);
2583
2584 #ifdef DIAGNOSTIC
2585         if (!(xfer->rqflags & URQ_REQUEST)) {
2586                 /* XXX panic */
2587                 kprintf("ehci_device_ctrl_transfer: not a request\n");
2588                 return (USBD_INVAL);
2589         }
2590 #endif
2591
2592         err = ehci_device_request(xfer);
2593         if (err)
2594                 return (err);
2595
2596         if (sc->sc_bus.use_polling)
2597                 ehci_waitintr(sc, xfer);
2598         return (USBD_IN_PROGRESS);
2599 }
2600
2601 void
2602 ehci_device_ctrl_done(usbd_xfer_handle xfer)
2603 {
2604         struct ehci_xfer *ex = EXFER(xfer);
2605         ehci_softc_t *sc = (ehci_softc_t *)xfer->pipe->device->bus;
2606         /*struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe;*/
2607
2608         DPRINTFN(10,("ehci_ctrl_done: xfer=%p\n", xfer));
2609
2610 #ifdef DIAGNOSTIC
2611         if (!(xfer->rqflags & URQ_REQUEST)) {
2612                 panic("ehci_ctrl_done: not a request");
2613         }
2614 #endif
2615
2616         if (xfer->status != USBD_NOMEM && ehci_active_intr_list(ex)) {
2617                 ehci_del_intr_list(ex); /* remove from active list */
2618                 ehci_free_sqtd_chain(sc, ex->sqtdstart, NULL);
2619         }
2620
2621         DPRINTFN(5, ("ehci_ctrl_done: length=%d\n", xfer->actlen));
2622 }
2623
2624 /* Abort a device control request. */
2625 static void
2626 ehci_device_ctrl_abort(usbd_xfer_handle xfer)
2627 {
2628         DPRINTF(("ehci_device_ctrl_abort: xfer=%p\n", xfer));
2629         ehci_abort_xfer(xfer, USBD_CANCELLED);
2630 }
2631
2632 /* Close a device control pipe. */
2633 static void
2634 ehci_device_ctrl_close(usbd_pipe_handle pipe)
2635 {
2636         ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus;
2637         /*struct ehci_pipe *epipe = (struct ehci_pipe *)pipe;*/
2638
2639         DPRINTF(("ehci_device_ctrl_close: pipe=%p\n", pipe));
2640         ehci_close_pipe(pipe, sc->sc_async_head);
2641 }
2642
2643 usbd_status
2644 ehci_device_request(usbd_xfer_handle xfer)
2645 {
2646 #define exfer EXFER(xfer)
2647         struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe;
2648         usb_device_request_t *req = &xfer->request;
2649         usbd_device_handle dev = epipe->pipe.device;
2650         ehci_softc_t *sc = (ehci_softc_t *)dev->bus;
2651         int addr = dev->address;
2652         ehci_soft_qtd_t *setup, *stat, *next;
2653         ehci_soft_qh_t *sqh;
2654         int isread;
2655         int len;
2656         usbd_status err;
2657
2658         isread = req->bmRequestType & UT_READ;
2659         len = UGETW(req->wLength);
2660
2661         DPRINTFN(3,("ehci_device_request: type=0x%02x, request=0x%02x, "
2662                     "wValue=0x%04x, wIndex=0x%04x len=%d, addr=%d, endpt=%d\n",
2663                     req->bmRequestType, req->bRequest, UGETW(req->wValue),
2664                     UGETW(req->wIndex), len, addr,
2665                     epipe->pipe.endpoint->edesc->bEndpointAddress));
2666
2667         setup = ehci_alloc_sqtd(sc);
2668         if (setup == NULL) {
2669                 err = USBD_NOMEM;
2670                 goto bad1;
2671         }
2672         stat = ehci_alloc_sqtd(sc);
2673         if (stat == NULL) {
2674                 err = USBD_NOMEM;
2675                 goto bad2;
2676         }
2677
2678         sqh = epipe->sqh;
2679         epipe->u.ctl.length = len;
2680
2681         /* Update device address and length since they may have changed
2682            during the setup of the control pipe in usbd_new_device(). */
2683         /* XXX This only needs to be done once, but it's too early in open. */
2684         /* XXXX Should not touch ED here! */
2685         sqh->qh.qh_endp =
2686             (sqh->qh.qh_endp & htole32(~(EHCI_QH_ADDRMASK | EHCI_QH_MPLMASK))) |
2687             htole32(
2688              EHCI_QH_SET_ADDR(addr) |
2689              EHCI_QH_SET_MPL(UGETW(epipe->pipe.endpoint->edesc->wMaxPacketSize))
2690             );
2691
2692         /* Set up data transaction */
2693         if (len != 0) {
2694                 ehci_soft_qtd_t *end;
2695
2696                 err = ehci_alloc_sqtd_chain(epipe, sc, len, isread, xfer,
2697                           &next, &end);
2698                 if (err)
2699                         goto bad3;
2700                 end->qtd.qtd_status &= htole32(~EHCI_QTD_IOC);
2701                 end->nextqtd = stat;
2702                 end->qtd.qtd_next =
2703                 end->qtd.qtd_altnext = htole32(stat->physaddr);
2704         } else {
2705                 next = stat;
2706         }
2707
2708         memcpy(KERNADDR(&epipe->u.ctl.reqdma, 0), req, sizeof *req);
2709
2710         /* Clear toggle */
2711         setup->qtd.qtd_status = htole32(
2712             EHCI_QTD_ACTIVE |
2713             EHCI_QTD_SET_PID(EHCI_QTD_PID_SETUP) |
2714             EHCI_QTD_SET_CERR(3) |
2715             EHCI_QTD_SET_TOGGLE(0) |
2716             EHCI_QTD_SET_BYTES(sizeof *req)
2717             );
2718         setup->qtd.qtd_buffer[0] = htole32(DMAADDR(&epipe->u.ctl.reqdma, 0));
2719         setup->qtd.qtd_buffer_hi[0] = 0;
2720         setup->nextqtd = next;
2721         setup->qtd.qtd_next = setup->qtd.qtd_altnext = htole32(next->physaddr);
2722         setup->xfer = xfer;
2723         setup->len = sizeof *req;
2724
2725         stat->qtd.qtd_status = htole32(
2726             EHCI_QTD_ACTIVE |
2727             EHCI_QTD_SET_PID(isread ? EHCI_QTD_PID_OUT : EHCI_QTD_PID_IN) |
2728             EHCI_QTD_SET_CERR(3) |
2729             EHCI_QTD_SET_TOGGLE(1) |
2730             EHCI_QTD_IOC
2731             );
2732         stat->qtd.qtd_buffer[0] = 0; /* XXX not needed? */
2733         stat->qtd.qtd_buffer_hi[0] = 0; /* XXX not needed? */
2734         stat->nextqtd = NULL;
2735         stat->qtd.qtd_next = stat->qtd.qtd_altnext = EHCI_NULL;
2736         stat->xfer = xfer;
2737         stat->len = 0;
2738
2739 #ifdef EHCI_DEBUG
2740         if (ehcidebug > 5) {
2741                 DPRINTF(("ehci_device_request:\n"));
2742                 ehci_dump_sqh(sqh);
2743                 ehci_dump_sqtds(setup);
2744         }
2745 #endif
2746
2747         exfer->sqtdstart = setup;
2748         exfer->sqtdend = stat;
2749 #ifdef DIAGNOSTIC
2750         if (!exfer->isdone) {
2751                 kprintf("ehci_device_request: not done, exfer=%p\n", exfer);
2752         }
2753         exfer->isdone = 0;
2754 #endif
2755
2756         /* Insert qTD in QH list. */
2757         crit_enter();
2758         ehci_set_qh_qtd(sqh, setup);
2759         if (xfer->timeout && !sc->sc_bus.use_polling) {
2760                 callout_reset(&xfer->timeout_handle, MS_TO_TICKS(xfer->timeout),
2761                             ehci_timeout, xfer);
2762         }
2763         ehci_add_intr_list(sc, exfer);
2764         xfer->status = USBD_IN_PROGRESS;
2765         crit_exit();
2766
2767 #ifdef EHCI_DEBUG
2768         if (ehcidebug > 10) {
2769                 DPRINTF(("ehci_device_request: status=%x\n",
2770                          EOREAD4(sc, EHCI_USBSTS)));
2771                 DELAY(10000);
2772                 ehci_dump_regs(sc);
2773                 ehci_dump_sqh(sc->sc_async_head);
2774                 ehci_dump_sqh(sqh);
2775                 ehci_dump_sqtds(setup);
2776         }
2777 #endif
2778
2779         return (USBD_NORMAL_COMPLETION);
2780
2781  bad3:
2782         ehci_free_sqtd(sc, stat);
2783  bad2:
2784         ehci_free_sqtd(sc, setup);
2785  bad1:
2786         DPRINTFN(-1,("ehci_device_request: no memory\n"));
2787         xfer->status = err;
2788         usb_transfer_complete(xfer);
2789         return (err);
2790 #undef exfer
2791 }
2792
2793 /************************/
2794
2795 static usbd_status
2796 ehci_device_bulk_transfer(usbd_xfer_handle xfer)
2797 {
2798         usbd_status err;
2799
2800         /* Insert last in queue. */
2801         err = usb_insert_transfer(xfer);
2802         if (err)
2803                 return (err);
2804
2805         /* Pipe isn't running, start first */
2806         return (ehci_device_bulk_start(STAILQ_FIRST(&xfer->pipe->queue)));
2807 }
2808
2809 usbd_status
2810 ehci_device_bulk_start(usbd_xfer_handle xfer)
2811 {
2812 #define exfer EXFER(xfer)
2813         struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe;
2814         usbd_device_handle dev = epipe->pipe.device;
2815         ehci_softc_t *sc = (ehci_softc_t *)dev->bus;
2816         ehci_soft_qtd_t *data, *dataend;
2817         ehci_soft_qh_t *sqh;
2818         usbd_status err;
2819         int len, isread, endpt;
2820
2821         DPRINTFN(2, ("ehci_device_bulk_start: xfer=%p len=%d flags=%d\n",
2822                      xfer, xfer->length, xfer->flags));
2823
2824         if (sc->sc_dying)
2825                 return (USBD_IOERROR);
2826
2827 #ifdef DIAGNOSTIC
2828         if (xfer->rqflags & URQ_REQUEST)
2829                 panic("ehci_device_bulk_start: a request");
2830 #endif
2831
2832         len = xfer->length;
2833         endpt = epipe->pipe.endpoint->edesc->bEndpointAddress;
2834         isread = UE_GET_DIR(endpt) == UE_DIR_IN;
2835         sqh = epipe->sqh;
2836
2837         epipe->u.bulk.length = len;
2838
2839         err = ehci_alloc_sqtd_chain(epipe, sc, len, isread, xfer, &data,
2840                                    &dataend);
2841         if (err) {
2842                 DPRINTFN(-1,("ehci_device_bulk_start: no memory\n"));
2843                 xfer->status = err;
2844                 usb_transfer_complete(xfer);
2845                 return (err);
2846         }
2847
2848 #ifdef EHCI_DEBUG
2849         if (ehcidebug > 5) {
2850                 DPRINTF(("ehci_device_bulk_start: data(1)\n"));
2851                 ehci_dump_sqh(sqh);
2852                 ehci_dump_sqtds(data);
2853         }
2854 #endif
2855
2856         /* Set up interrupt info. */
2857         exfer->sqtdstart = data;
2858         exfer->sqtdend = dataend;
2859 #ifdef DIAGNOSTIC
2860         if (!exfer->isdone) {
2861                 kprintf("ehci_device_bulk_start: not done, ex=%p\n", exfer);
2862         }
2863         exfer->isdone = 0;
2864 #endif
2865
2866         crit_enter();
2867         ehci_set_qh_qtd(sqh, data);
2868         if (xfer->timeout && !sc->sc_bus.use_polling) {
2869                 callout_reset(&xfer->timeout_handle, MS_TO_TICKS(xfer->timeout),
2870                             ehci_timeout, xfer);
2871         }
2872         ehci_add_intr_list(sc, exfer);
2873         xfer->status = USBD_IN_PROGRESS;
2874         crit_exit();
2875
2876 #ifdef EHCI_DEBUG
2877         if (ehcidebug > 10) {
2878                 DPRINTF(("ehci_device_bulk_start: data(2)\n"));
2879                 DELAY(10000);
2880                 DPRINTF(("ehci_device_bulk_start: data(3)\n"));
2881                 ehci_dump_regs(sc);
2882 #if 0
2883                 kprintf("async_head:\n");
2884                 ehci_dump_sqh(sc->sc_async_head);
2885 #endif
2886                 kprintf("sqh:\n");
2887                 ehci_dump_sqh(sqh);
2888                 ehci_dump_sqtds(data);
2889         }
2890 #endif
2891
2892         if (sc->sc_bus.use_polling)
2893                 ehci_waitintr(sc, xfer);
2894
2895         return (USBD_IN_PROGRESS);
2896 #undef exfer
2897 }
2898
2899 static void
2900 ehci_device_bulk_abort(usbd_xfer_handle xfer)
2901 {
2902         DPRINTF(("ehci_device_bulk_abort: xfer=%p\n", xfer));
2903         ehci_abort_xfer(xfer, USBD_CANCELLED);
2904 }
2905
2906 /*
2907  * Close a device bulk pipe.
2908  */
2909 static void
2910 ehci_device_bulk_close(usbd_pipe_handle pipe)
2911 {
2912         ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus;
2913
2914         DPRINTF(("ehci_device_bulk_close: pipe=%p\n", pipe));
2915         ehci_close_pipe(pipe, sc->sc_async_head);
2916 }
2917
2918 void
2919 ehci_device_bulk_done(usbd_xfer_handle xfer)
2920 {
2921         struct ehci_xfer *ex = EXFER(xfer);
2922         ehci_softc_t *sc = (ehci_softc_t *)xfer->pipe->device->bus;
2923         /*struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe;*/
2924
2925         DPRINTFN(10,("ehci_bulk_done: xfer=%p, actlen=%d\n",
2926                      xfer, xfer->actlen));
2927
2928         if (xfer->status != USBD_NOMEM && ehci_active_intr_list(ex)) {
2929                 ehci_del_intr_list(ex); /* remove from active list */
2930                 ehci_free_sqtd_chain(sc, ex->sqtdstart, NULL);
2931         }
2932
2933         DPRINTFN(5, ("ehci_bulk_done: length=%d\n", xfer->actlen));
2934 }
2935
2936 /************************/
2937
2938 static usbd_status
2939 ehci_device_setintr(ehci_softc_t *sc, ehci_soft_qh_t *sqh, int ival)
2940 {
2941         struct ehci_soft_islot *isp;
2942         int islot, lev;
2943
2944         /* Find a poll rate that is large enough. */
2945         for (lev = EHCI_IPOLLRATES - 1; lev > 0; lev--)
2946                 if (EHCI_ILEV_IVAL(lev) <= ival)
2947                         break;
2948
2949         /* Pick an interrupt slot at the right level. */
2950         /* XXX could do better than picking at random. */
2951         islot = EHCI_IQHIDX(lev, karc4random());
2952
2953         sqh->islot = islot;
2954         isp = &sc->sc_islots[islot];
2955         ehci_add_qh(sqh, isp->sqh);
2956
2957         return (USBD_NORMAL_COMPLETION);
2958 }
2959
2960 static usbd_status
2961 ehci_device_intr_transfer(usbd_xfer_handle xfer)
2962 {
2963         usbd_status err;
2964
2965         /* Insert last in queue. */
2966         err = usb_insert_transfer(xfer);
2967         if (err)
2968                 return (err);
2969
2970         /*
2971          * Pipe isn't running (otherwise err would be USBD_INPROG),
2972          * so start it first.
2973          */
2974         return (ehci_device_intr_start(STAILQ_FIRST(&xfer->pipe->queue)));
2975 }
2976
2977 static usbd_status
2978 ehci_device_intr_start(usbd_xfer_handle xfer)
2979 {
2980 #define exfer EXFER(xfer)
2981         struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe;
2982         usbd_device_handle dev = xfer->pipe->device;
2983         ehci_softc_t *sc = (ehci_softc_t *)dev->bus;
2984         ehci_soft_qtd_t *data, *dataend;
2985         ehci_soft_qh_t *sqh;
2986         usbd_status err;
2987         int len, isread, endpt;
2988
2989         DPRINTFN(2, ("ehci_device_intr_start: xfer=%p len=%d flags=%d\n",
2990             xfer, xfer->length, xfer->flags));
2991
2992         if (sc->sc_dying)
2993                 return (USBD_IOERROR);
2994
2995 #ifdef DIAGNOSTIC
2996         if (xfer->rqflags & URQ_REQUEST)
2997                 panic("ehci_device_intr_start: a request");
2998 #endif
2999
3000         len = xfer->length;
3001         endpt = epipe->pipe.endpoint->edesc->bEndpointAddress;
3002         isread = UE_GET_DIR(endpt) == UE_DIR_IN;
3003         sqh = epipe->sqh;
3004
3005         epipe->u.intr.length = len;
3006
3007         err = ehci_alloc_sqtd_chain(epipe, sc, len, isread, xfer, &data,
3008             &dataend);
3009         if (err) {
3010                 DPRINTFN(-1, ("ehci_device_intr_start: no memory\n"));
3011                 xfer->status = err;
3012                 usb_transfer_complete(xfer);
3013                 return (err);
3014         }
3015
3016 #ifdef EHCI_DEBUG
3017         if (ehcidebug > 5) {
3018                 DPRINTF(("ehci_device_intr_start: data(1)\n"));
3019                 ehci_dump_sqh(sqh);
3020                 ehci_dump_sqtds(data);
3021         }
3022 #endif
3023
3024         /* Set up interrupt info. */
3025         exfer->sqtdstart = data;
3026         exfer->sqtdend = dataend;
3027 #ifdef DIAGNOSTIC
3028         if (!exfer->isdone) {
3029                 kprintf("ehci_device_intr_start: not done, ex=%p\n", exfer);
3030         }
3031         exfer->isdone = 0;
3032 #endif
3033
3034         crit_enter();
3035         ehci_set_qh_qtd(sqh, data);
3036         if (xfer->timeout && !sc->sc_bus.use_polling) {
3037                 callout_reset(&xfer->timeout_handle, MS_TO_TICKS(xfer->timeout),
3038                     ehci_timeout, xfer);
3039         }
3040         ehci_add_intr_list(sc, exfer);
3041         xfer->status = USBD_IN_PROGRESS;
3042         crit_exit();
3043
3044 #ifdef EHCI_DEBUG
3045         if (ehcidebug > 10) {
3046                 DPRINTF(("ehci_device_intr_start: data(2)\n"));
3047                 DELAY(10000);
3048                 DPRINTF(("ehci_device_intr_start: data(3)\n"));
3049                 ehci_dump_regs(sc);
3050                 kprintf("sqh:\n");
3051                 ehci_dump_sqh(sqh);
3052                 ehci_dump_sqtds(data);
3053         }
3054 #endif
3055
3056         if (sc->sc_bus.use_polling)
3057                 ehci_waitintr(sc, xfer);
3058
3059         return (USBD_IN_PROGRESS);
3060 #undef exfer
3061 }
3062
3063 static void
3064 ehci_device_intr_abort(usbd_xfer_handle xfer)
3065 {
3066         DPRINTFN(1, ("ehci_device_intr_abort: xfer=%p\n", xfer));
3067         if (xfer->pipe->intrxfer == xfer) {
3068                 DPRINTFN(1, ("ehci_device_intr_abort: remove\n"));
3069                 xfer->pipe->intrxfer = NULL;
3070         }
3071         ehci_abort_xfer(xfer, USBD_CANCELLED);
3072 }
3073
3074 static void
3075 ehci_device_intr_close(usbd_pipe_handle pipe)
3076 {
3077         ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus;
3078         struct ehci_pipe *epipe = (struct ehci_pipe *)pipe;
3079         struct ehci_soft_islot *isp;
3080
3081         isp = &sc->sc_islots[epipe->sqh->islot];
3082         ehci_close_pipe(pipe, isp->sqh);
3083 }
3084
3085 static void
3086 ehci_device_intr_done(usbd_xfer_handle xfer)
3087 {
3088 #define exfer EXFER(xfer)
3089         struct ehci_xfer *ex = EXFER(xfer);
3090         ehci_softc_t *sc = (ehci_softc_t *)xfer->pipe->device->bus;
3091         struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe;
3092         ehci_soft_qtd_t *data, *dataend;
3093         ehci_soft_qh_t *sqh;
3094         usbd_status err;
3095         int len, isread, endpt;
3096
3097         DPRINTFN(10, ("ehci_device_intr_done: xfer=%p, actlen=%d\n",
3098             xfer, xfer->actlen));
3099
3100         if (xfer->pipe->repeat) {
3101                 ehci_free_sqtd_chain(sc, ex->sqtdstart, NULL);
3102
3103                 len = epipe->u.intr.length;
3104                 xfer->length = len;
3105                 endpt = epipe->pipe.endpoint->edesc->bEndpointAddress;
3106                 isread = UE_GET_DIR(endpt) == UE_DIR_IN;
3107                 sqh = epipe->sqh;
3108
3109                 err = ehci_alloc_sqtd_chain(epipe, sc, len, isread, xfer,
3110                     &data, &dataend);
3111                 if (err) {
3112                         DPRINTFN(-1, ("ehci_device_intr_done: no memory\n"));
3113                         xfer->status = err;
3114                         return;
3115                 }
3116
3117                 /* Set up interrupt info. */
3118                 exfer->sqtdstart = data;
3119                 exfer->sqtdend = dataend;
3120 #ifdef DIAGNOSTIC
3121                 if (!exfer->isdone) {
3122                         kprintf("ehci_device_intr_done: not done, ex=%p\n",
3123                             exfer);
3124                 }
3125                 exfer->isdone = 0;
3126 #endif
3127
3128                 crit_enter();
3129                 ehci_set_qh_qtd(sqh, data);
3130                 if (xfer->timeout && !sc->sc_bus.use_polling) {
3131                         callout_reset(&xfer->timeout_handle,
3132                             MS_TO_TICKS(xfer->timeout), ehci_timeout, xfer);
3133                 }
3134                 crit_exit();
3135
3136                 xfer->status = USBD_IN_PROGRESS;
3137         } else if (xfer->status != USBD_NOMEM && ehci_active_intr_list(ex)) {
3138                 ehci_del_intr_list(ex); /* remove from active list */
3139                 ehci_free_sqtd_chain(sc, ex->sqtdstart, NULL);
3140         }
3141 #undef exfer
3142 }
3143
3144 /************************/
3145
3146 static usbd_status
3147 ehci_device_isoc_transfer(usbd_xfer_handle xfer)
3148 {
3149         return USBD_IOERROR;
3150 }
3151
3152 static usbd_status
3153 ehci_device_isoc_start(usbd_xfer_handle xfer)
3154 {
3155         return USBD_IOERROR;
3156 }
3157
3158 static void
3159 ehci_device_isoc_abort(usbd_xfer_handle xfer)
3160 {
3161 }
3162
3163 static void
3164 ehci_device_isoc_close(usbd_pipe_handle pipe)
3165 {
3166 }
3167
3168 static void
3169 ehci_device_isoc_done(usbd_xfer_handle xfer)
3170 {
3171 }