Merge branch 'master' of ssh://crater.dragonflybsd.org/repository/git/dragonfly
[dragonfly.git] / sys / bus / usb / ehci_pci.c
1 /*
2  * Copyright (c) 1998 The NetBSD Foundation, Inc.
3  * All rights reserved.
4  *
5  * This code is derived from software contributed to The NetBSD Foundation
6  * by Lennart Augustsson (augustss@carlstedt.se) at
7  * Carlstedt Research & Technology.
8  *
9  * Redistribution and use in source and binary forms, with or without
10  * modification, are permitted provided that the following conditions
11  * are met:
12  * 1. Redistributions of source code must retain the above copyright
13  *    notice, this list of conditions and the following disclaimer.
14  * 2. Redistributions in binary form must reproduce the above copyright
15  *    notice, this list of conditions and the following disclaimer in the
16  *    documentation and/or other materials provided with the distribution.
17  * 3. All advertising materials mentioning features or use of this software
18  *    must display the following acknowledgement:
19  *        This product includes software developed by the NetBSD
20  *        Foundation, Inc. and its contributors.
21  * 4. Neither the name of The NetBSD Foundation nor the names of its
22  *    contributors may be used to endorse or promote products derived
23  *    from this software without specific prior written permission.
24  *
25  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
26  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
27  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
28  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
29  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
30  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
31  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
32  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
33  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
34  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
35  * POSSIBILITY OF SUCH DAMAGE.
36  *
37  * $FreeBSD: src/sys/dev/usb/ehci_pci.c,v 1.18.2.1 2006/01/26 01:43:13 iedowse Exp $
38  * $DragonFly: src/sys/bus/usb/ehci_pci.c,v 1.19 2008/05/21 19:56:46 mneumann Exp $
39  */
40
41 /*
42  * USB Enhanced Host Controller Driver, a.k.a. USB 2.0 controller.
43  *
44  * The EHCI 1.0 spec can be found at
45  * http://developer.intel.com/technology/usb/download/ehci-r10.pdf
46  * and the USB 2.0 spec at
47  * http://www.usb.org/developers/docs/usb_20.zip
48  */
49
50 /* The low level controller code for EHCI has been split into
51  * PCI probes and EHCI specific code. This was done to facilitate the
52  * sharing of code between *BSD's
53  */
54
55 #include "opt_bus.h"
56
57 #include <sys/param.h>
58 #include <sys/systm.h>
59 #include <sys/kernel.h>
60 #include <sys/module.h>
61 #include <sys/bus.h>
62 #include <sys/queue.h>
63 #include <sys/lock.h>
64 #include <sys/rman.h>
65
66 #include <bus/pci/pcivar.h>
67 #include <bus/pci/pcireg.h>
68
69 #include <bus/usb/usb.h>
70 #include <bus/usb/usbdi.h>
71 #include <bus/usb/usbdivar.h>
72 #include <bus/usb/usb_mem.h>
73
74 #include <bus/usb/ehcireg.h>
75 #include <bus/usb/ehcivar.h>
76
77 #define PCI_EHCI_VENDORID_ACERLABS      0x10b9
78 #define PCI_EHCI_VENDORID_AMD           0x1022
79 #define PCI_EHCI_VENDORID_APPLE         0x106b
80 #define PCI_EHCI_VENDORID_ATI           0x1002
81 #define PCI_EHCI_VENDORID_CMDTECH       0x1095
82 #define PCI_EHCI_VENDORID_INTEL         0x8086
83 #define PCI_EHCI_VENDORID_NEC           0x1033
84 #define PCI_EHCI_VENDORID_OPTI          0x1045
85 #define PCI_EHCI_VENDORID_PHILIPS       0x1131
86 #define PCI_EHCI_VENDORID_SIS           0x1039
87 #define PCI_EHCI_VENDORID_NVIDIA        0x12D2
88 #define PCI_EHCI_VENDORID_NVIDIA2       0x10DE
89 #define PCI_EHCI_VENDORID_VIA           0x1106
90
91 /* AcerLabs/ALi */
92 #define PCI_EHCI_DEVICEID_M5239         0x523910b9
93 static const char *ehci_device_m5239 = "ALi M5239 USB 2.0 controller";
94
95 /* AMD */
96 #define PCI_EHCI_DEVICEID_8111          0x74631022
97 #define PCI_EHCI_DEVICEID_CS5536        0x20951022
98 static const char *ehci_device_8111 = "AMD 8111 USB 2.0 controller";
99 static const char *ehci_device_CS5536 = "AMD CS5536 USB 2.0 controller";
100
101 /* ATI */
102 #define PCI_EHCI_DEVICEID_SB200         0x43451002
103 static const char *ehci_device_sb200 = "ATI SB200 USB 2.0 controller";
104 #define PCI_EHCI_DEVICEID_SB400         0x43731002
105 static const char *ehci_device_sb400 = "ATI SB400 USB 2.0 controller";
106
107 /* Intel */
108 #define PCI_EHCI_DEVICEID_6300          0x25ad8086
109 static const char *ehci_device_6300 = "Intel 6300ESB USB 2.0 controller";
110 #define PCI_EHCI_DEVICEID_ICH4          0x24cd8086
111 static const char *ehci_device_ich4 = "Intel 82801DB/L/M USB 2.0 controller";
112 #define PCI_EHCI_DEVICEID_ICH5          0x24dd8086
113 static const char *ehci_device_ich5 = "Intel 82801EB/R USB 2.0 controller";
114 #define PCI_EHCI_DEVICEID_ICH6          0x265c8086
115 static const char *ehci_device_ich6 = "Intel 82801FB USB 2.0 controller";
116 #define PCI_EHCI_DEVICEID_ICH7          0x27cc8086
117 static const char *ehci_device_ich7 = "Intel 82801GB/R USB 2.0 controller";
118  
119 /* NEC */
120 #define PCI_EHCI_DEVICEID_NEC           0x00e01033
121 static const char *ehci_device_nec = "NEC uPD 720100 USB 2.0 controller";
122
123 /* NVIDIA */
124 #define PCI_EHCI_DEVICEID_NF2           0x006810de
125 static const char *ehci_device_nf2 = "NVIDIA nForce2 USB 2.0 controller";
126 #define PCI_EHCI_DEVICEID_NF2_400       0x008810de
127 static const char *ehci_device_nf2_400 = "NVIDIA nForce2 Ultra 400 USB 2.0 controller";
128 #define PCI_EHCI_DEVICEID_NF3           0x00d810de
129 static const char *ehci_device_nf3 = "NVIDIA nForce3 USB 2.0 controller";
130 #define PCI_EHCI_DEVICEID_NF3_250       0x00e810de
131 static const char *ehci_device_nf3_250 = "NVIDIA nForce3 250 USB 2.0 controller";
132 #define PCI_EHCI_DEVICEID_NF4           0x005b10de
133 static const char *ehci_device_nf4 = "NVIDIA nForce4 USB 2.0 controller";
134
135 /* Philips */
136 #define PCI_EHCI_DEVICEID_ISP156X       0x15621131
137 static const char *ehci_device_isp156x = "Philips ISP156x USB 2.0 controller";
138
139 /* VIA */
140 #define PCI_EHCI_DEVICEID_VIA           0x31041106
141 static const char *ehci_device_via = "VIA VT6202 USB 2.0 controller";
142
143 /* Generic */
144 static const char *ehci_device_generic = "EHCI (generic) USB 2.0 controller";
145
146 #define PCI_EHCI_BASE_REG       0x10
147
148 #ifdef USB_DEBUG
149 #define EHCI_DEBUG USB_DEBUG
150 #define DPRINTF(x)      do { if (ehcidebug) kprintf x; } while (0)
151 extern int ehcidebug;
152 #else
153 #define DPRINTF(x)
154 #endif
155
156 static int ehci_pci_attach(device_t self);
157 static int ehci_pci_detach(device_t self);
158 static int ehci_pci_shutdown(device_t self);
159 static int ehci_pci_suspend(device_t self);
160 static int ehci_pci_resume(device_t self);
161 static void ehci_pci_givecontroller(device_t self);
162 static void ehci_pci_takecontroller(device_t self);
163
164 static int
165 ehci_pci_suspend(device_t self)
166 {
167         ehci_softc_t *sc = device_get_softc(self);
168         int err;
169
170         err = bus_generic_suspend(self);
171         if (err)
172                 return (err);
173         ehci_power(PWR_SUSPEND, sc);
174
175         return 0;
176 }
177
178 static int
179 ehci_pci_resume(device_t self)
180 {
181         ehci_softc_t *sc = device_get_softc(self);
182
183         ehci_pci_takecontroller(self);
184         ehci_power(PWR_RESUME, sc);
185         bus_generic_resume(self);
186
187         return 0;
188 }
189
190 static int
191 ehci_pci_shutdown(device_t self)
192 {
193         ehci_softc_t *sc = device_get_softc(self);
194         int err;
195
196         err = bus_generic_shutdown(self);
197         if (sc->sc_flags & EHCI_SCFLG_DONEINIT) {
198                 ehci_shutdown(sc);
199                 ehci_pci_givecontroller(self);
200         }
201
202         return err;
203 }
204
205 static const char *
206 ehci_pci_match(device_t self)
207 {
208         u_int32_t device_id = pci_get_devid(self);
209
210         switch (device_id) {
211         case PCI_EHCI_DEVICEID_M5239:
212                 return (ehci_device_m5239);
213         case PCI_EHCI_DEVICEID_8111:
214                 return (ehci_device_8111);
215         case PCI_EHCI_DEVICEID_CS5536:
216                 return (ehci_device_CS5536);
217         case PCI_EHCI_DEVICEID_SB200:
218                 return (ehci_device_sb200);
219         case PCI_EHCI_DEVICEID_SB400:
220                 return (ehci_device_sb400);
221         case PCI_EHCI_DEVICEID_6300:
222                 return (ehci_device_6300);
223         case PCI_EHCI_DEVICEID_ICH4:
224                 return (ehci_device_ich4);
225         case PCI_EHCI_DEVICEID_ICH5:
226                 return (ehci_device_ich5);
227         case PCI_EHCI_DEVICEID_ICH6:
228                 return (ehci_device_ich6);
229         case PCI_EHCI_DEVICEID_ICH7:
230                 return (ehci_device_ich7);
231         case PCI_EHCI_DEVICEID_NEC:
232                 return (ehci_device_nec);
233         case PCI_EHCI_DEVICEID_NF2:
234                 return (ehci_device_nf2);
235         case PCI_EHCI_DEVICEID_NF2_400:
236                 return (ehci_device_nf2_400);
237         case PCI_EHCI_DEVICEID_NF3:
238                 return (ehci_device_nf3);
239         case PCI_EHCI_DEVICEID_NF3_250:
240                 return (ehci_device_nf3_250);
241         case PCI_EHCI_DEVICEID_NF4:
242                 return (ehci_device_nf4);
243         case PCI_EHCI_DEVICEID_ISP156X:
244                 return (ehci_device_isp156x);
245         case PCI_EHCI_DEVICEID_VIA:
246                 return (ehci_device_via);
247         default:
248                 if (pci_get_class(self) == PCIC_SERIALBUS
249                     && pci_get_subclass(self) == PCIS_SERIALBUS_USB
250                     && pci_get_progif(self) == PCI_INTERFACE_EHCI) {
251                         return (ehci_device_generic);
252                 }
253         }
254
255         return NULL;            /* dunno */
256 }
257
258 static int
259 ehci_pci_probe(device_t self)
260 {
261         const char *desc = ehci_pci_match(self);
262
263         if (desc) {
264                 device_set_desc(self, desc);
265                 device_set_async_attach(self, TRUE);
266                 return 0;
267         } else {
268                 return ENXIO;
269         }
270 }
271
272 static int
273 ehci_pci_attach(device_t self)
274 {
275         ehci_softc_t *sc = device_get_softc(self);
276         device_t parent;
277         device_t *neighbors;
278         device_t *nbus;
279         struct usb_softc *usb_sc;
280         struct usbd_bus *bsc;
281         int err;
282         int rid;
283         int ncomp;
284         int count, buscount;
285         int slot, function;
286         int res;
287         int i;
288
289         switch(pci_read_config(self, PCI_USBREV, 1) & PCI_USBREV_MASK) {
290         case PCI_USBREV_PRE_1_0:
291         case PCI_USBREV_1_0:
292         case PCI_USBREV_1_1:
293                 sc->sc_bus.usbrev = USBREV_UNKNOWN;
294                 kprintf("pre-2.0 USB rev\n");
295                 return ENXIO;
296         case PCI_USBREV_2_0:
297                 sc->sc_bus.usbrev = USBREV_2_0;
298                 break;
299         default:
300                 sc->sc_bus.usbrev = USBREV_UNKNOWN;
301                 break;
302         }
303
304         pci_enable_busmaster(self);
305
306         rid = PCI_CBMEM;
307         sc->io_res = bus_alloc_resource_any(self, SYS_RES_MEMORY, &rid,
308             RF_ACTIVE);
309         if (!sc->io_res) {
310                 device_printf(self, "Could not map memory\n");
311                 return ENXIO;
312         }
313         sc->iot = rman_get_bustag(sc->io_res);
314         sc->ioh = rman_get_bushandle(sc->io_res);
315
316         rid = 0;
317         sc->irq_res = bus_alloc_resource_any(self, SYS_RES_IRQ, &rid,
318             RF_SHAREABLE | RF_ACTIVE);
319         if (sc->irq_res == NULL) {
320                 device_printf(self, "Could not allocate irq\n");
321                 ehci_pci_detach(self);
322                 return ENXIO;
323         }
324         sc->sc_bus.bdev = device_add_child(self, "usb", -1);
325         if (!sc->sc_bus.bdev) {
326                 device_printf(self, "Could not add USB device\n");
327                 ehci_pci_detach(self);
328                 return ENOMEM;
329         }
330         device_set_ivars(sc->sc_bus.bdev, &sc->sc_bus);
331
332         /* ehci_pci_match will never return NULL if ehci_pci_probe succeeded */
333         device_set_desc(sc->sc_bus.bdev, ehci_pci_match(self));
334         switch (pci_get_vendor(self)) {
335         case PCI_EHCI_VENDORID_ACERLABS:
336                 ksprintf(sc->sc_vendor, "AcerLabs");
337                 break;
338         case PCI_EHCI_VENDORID_AMD:
339                 ksprintf(sc->sc_vendor, "AMD");
340                 break;
341         case PCI_EHCI_VENDORID_APPLE:
342                 ksprintf(sc->sc_vendor, "Apple");
343                 break;
344         case PCI_EHCI_VENDORID_ATI:
345                 ksprintf(sc->sc_vendor, "ATI");
346                 break;
347         case PCI_EHCI_VENDORID_CMDTECH:
348                 ksprintf(sc->sc_vendor, "CMDTECH");
349                 break;
350         case PCI_EHCI_VENDORID_INTEL:
351                 ksprintf(sc->sc_vendor, "Intel");
352                 break;
353         case PCI_EHCI_VENDORID_NEC:
354                 ksprintf(sc->sc_vendor, "NEC");
355                 break;
356         case PCI_EHCI_VENDORID_OPTI:
357                 ksprintf(sc->sc_vendor, "OPTi");
358                 break;
359         case PCI_EHCI_VENDORID_SIS:
360                 ksprintf(sc->sc_vendor, "SiS");
361                 break;
362         case PCI_EHCI_VENDORID_NVIDIA:
363         case PCI_EHCI_VENDORID_NVIDIA2:
364                 ksprintf(sc->sc_vendor, "nVidia");
365                 break;
366         case PCI_EHCI_VENDORID_VIA:
367                 ksprintf(sc->sc_vendor, "VIA");
368                 break;
369         default:
370                 if (bootverbose)
371                         device_printf(self, "(New EHCI DeviceId=0x%08x)\n",
372                             pci_get_devid(self));
373                 ksprintf(sc->sc_vendor, "(0x%04x)", pci_get_vendor(self));
374         }
375
376         err = bus_setup_intr(self, sc->irq_res, 0,
377             (driver_intr_t *) ehci_intr, sc, &sc->ih, NULL);
378         if (err) {
379                 device_printf(self, "Could not setup irq, %d\n", err);
380                 sc->ih = NULL;
381                 ehci_pci_detach(self);
382                 return ENXIO;
383         }
384
385         /* Enable workaround for dropped interrupts as required */
386         switch (pci_get_vendor(self)) {
387         case PCI_EHCI_VENDORID_ATI:
388         case PCI_EHCI_VENDORID_VIA:
389                 sc->sc_flags |= EHCI_SCFLG_LOSTINTRBUG;
390                 if (bootverbose)
391                         device_printf(self,
392                             "Dropped interrupts workaround enabled\n");
393                 break;
394         default:
395                 break;
396         }
397
398         /*
399          * Find companion controllers.  According to the spec they always
400          * have lower function numbers so they should be enumerated already.
401          */
402         parent = device_get_parent(self);
403         res = device_get_children(parent, &neighbors, &count);
404         if (res != 0) {
405                 device_printf(self, "Error finding companion busses\n");
406                 ehci_pci_detach(self);
407                 return ENXIO;
408         }
409         ncomp = 0;
410         slot = pci_get_slot(self);
411         function = pci_get_function(self);
412         for (i = 0; i < count; i++) {
413                 if (pci_get_slot(neighbors[i]) == slot && \
414                         pci_get_function(neighbors[i]) < function) {
415                         res = device_get_children(neighbors[i],
416                                 &nbus, &buscount);
417                         if (res != 0 || buscount != 1)
418                                 continue;
419                         usb_sc = device_get_softc(nbus[0]);
420                         if (usb_sc == NULL)
421                                 continue;
422                         bsc = usb_getbushandle(usb_sc);
423                         if (bsc == NULL)
424                                 continue;
425                         DPRINTF(("ehci_pci_attach: companion %s\n",
426                             device_get_nameunit(bsc->bdev)));
427                         sc->sc_comps[ncomp++] = bsc;
428                         if (ncomp >= EHCI_COMPANION_MAX)
429                                 break;
430                 }
431         }
432         sc->sc_ncomp = ncomp;
433
434         ehci_pci_takecontroller(self);
435         err = ehci_init(sc);
436         if (err == 0)
437                 err = device_probe_and_attach(sc->sc_bus.bdev);
438
439         if (err) {
440                 device_printf(self, "USB init failed err=%d\n", err);
441                 ehci_pci_detach(self);
442                 return EIO;
443         }
444         return 0;
445 }
446
447 static int
448 ehci_pci_detach(device_t self)
449 {
450         ehci_softc_t *sc = device_get_softc(self);
451
452         if (sc->sc_flags & EHCI_SCFLG_DONEINIT) {
453                 ehci_detach(sc, 0);
454                 sc->sc_flags &= ~EHCI_SCFLG_DONEINIT;
455         }
456
457         /*
458          * disable interrupts that might have been switched on in ehci_init
459          */
460         if (sc->iot && sc->ioh)
461                 bus_space_write_4(sc->iot, sc->ioh, EHCI_USBINTR, 0);
462
463         if (sc->irq_res && sc->ih) {
464                 int err = bus_teardown_intr(self, sc->irq_res, sc->ih);
465
466                 if (err)
467                         /* XXX or should we panic? */
468                         device_printf(self, "Could not tear down irq, %d\n",
469                             err);
470                 sc->ih = NULL;
471         }
472         if (sc->sc_bus.bdev) {
473                 device_delete_child(self, sc->sc_bus.bdev);
474                 sc->sc_bus.bdev = NULL;
475         }
476         if (sc->irq_res) {
477                 bus_release_resource(self, SYS_RES_IRQ, 0, sc->irq_res);
478                 sc->irq_res = NULL;
479         }
480         if (sc->io_res) {
481                 bus_release_resource(self, SYS_RES_MEMORY, PCI_CBMEM, sc->io_res);
482                 sc->io_res = NULL;
483                 sc->iot = 0;
484                 sc->ioh = 0;
485         }
486         return 0;
487 }
488
489 static void
490 ehci_pci_takecontroller(device_t self)
491 {
492         ehci_softc_t *sc = device_get_softc(self);
493         u_int32_t cparams, eec, legsup;
494         int eecp, i;
495
496         cparams = EREAD4(sc, EHCI_HCCPARAMS);
497
498         /* Synchronise with the BIOS if it owns the controller. */
499         for (eecp = EHCI_HCC_EECP(cparams); eecp != 0;
500              eecp = EHCI_EECP_NEXT(eec)) {
501                 eec = pci_read_config(self, eecp, 4);
502                 if (EHCI_EECP_ID(eec) != EHCI_EC_LEGSUP)
503                         continue;
504                 legsup = eec;
505                 pci_write_config(self, eecp, legsup | EHCI_LEGSUP_OSOWNED, 4);
506                 if (legsup & EHCI_LEGSUP_BIOSOWNED) {
507                         device_printf(sc->sc_bus.bdev,
508                             "waiting for BIOS to give up control\n");
509                         for (i = 0; i < 5000; i++) {
510                                 legsup = pci_read_config(self, eecp, 4);
511                                 if ((legsup & EHCI_LEGSUP_BIOSOWNED) == 0)
512                                         break;
513                                 DELAY(1000);
514                         }
515                         if (legsup & EHCI_LEGSUP_BIOSOWNED)
516                                 device_printf(sc->sc_bus.bdev,
517                                     "timed out waiting for BIOS\n");
518                 }
519         }
520 }
521
522 /*
523  * Return the controller to the BIOS.  Do we really need to do this?
524  *
525  * One thing we do need to do is give the chip reset (from the shutdown)
526  * time to finish before handing anything back.  This fixes a machine
527  * lockup.
528  */
529 static void
530 ehci_pci_givecontroller(device_t self)
531 {
532         ehci_softc_t *sc = device_get_softc(self);
533         u_int32_t cparams, eec, legsup;
534         int eecp;
535
536         DELAY(1000);
537         cparams = EREAD4(sc, EHCI_HCCPARAMS);
538         for (eecp = EHCI_HCC_EECP(cparams); eecp != 0;
539              eecp = EHCI_EECP_NEXT(eec)) {
540                 eec = pci_read_config(self, eecp, 4);
541                 if (EHCI_EECP_ID(eec) != EHCI_EC_LEGSUP)
542                         continue;
543                 legsup = eec;
544                 pci_write_config(self, eecp, legsup & ~EHCI_LEGSUP_OSOWNED, 4);
545         }
546 }
547
548 static device_method_t ehci_methods[] = {
549         /* Device interface */
550         DEVMETHOD(device_probe, ehci_pci_probe),
551         DEVMETHOD(device_attach, ehci_pci_attach),
552         DEVMETHOD(device_detach, ehci_pci_detach),
553         DEVMETHOD(device_suspend, ehci_pci_suspend),
554         DEVMETHOD(device_resume, ehci_pci_resume),
555         DEVMETHOD(device_shutdown, ehci_pci_shutdown),
556
557         /* Bus interface */
558         DEVMETHOD(bus_print_child, bus_generic_print_child),
559
560         {0, 0}
561 };
562
563 static driver_t ehci_driver = {
564         "ehci",
565         ehci_methods,
566         sizeof(ehci_softc_t),
567 };
568
569 static devclass_t ehci_devclass;
570
571 DRIVER_MODULE(ehci, pci, ehci_driver, ehci_devclass, 0, 0);
572 DRIVER_MODULE(ehci, cardbus, ehci_driver, ehci_devclass, 0, 0);