sys/dev/drm/i915/intel_lvds.c

   1 /*
   2  * Copyright © 2006-2007 Intel Corporation
   3  * Copyright (c) 2006 Dave Airlie <airlied@linux.ie>
   4  *
   5  * Permission is hereby granted, free of charge, to any person obtaining a
   6  * copy of this software and associated documentation files (the "Software"),
   7  * to deal in the Software without restriction, including without limitation
   8  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   9  * and/or sell copies of the Software, and to permit persons to whom the
  10  * Software is furnished to do so, subject to the following conditions:
  11  *
  12  * The above copyright notice and this permission notice (including the next
  13  * paragraph) shall be included in all copies or substantial portions of the
  14  * Software.
  15  *
  16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  19  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  20  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  21  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
  22  * DEALINGS IN THE SOFTWARE.
  23  *
  24  * Authors:
  25  *      Eric Anholt <eric@anholt.net>
  26  *      Dave Airlie <airlied@linux.ie>
  27  *      Jesse Barnes <jesse.barnes@intel.com>
  28  */
  29
  30 #include "opt_drm.h"
  31
  32 #include <linux/dmi.h>
  33 #include <linux/i2c.h>
  34 #include <linux/slab.h>
  35 #include <linux/vga_switcheroo.h>
  36 #include <drm/drmP.h>
  37 #include <drm/drm_atomic_helper.h>
  38 #include <drm/drm_crtc.h>
  39 #include <drm/drm_edid.h>
  40 #include "intel_drv.h"
  41 #include <drm/i915_drm.h>
  42 #include "i915_drv.h"
  43 #include <linux/acpi.h>
  44
  45 /* Private structure for the integrated LVDS support */
  46 struct intel_lvds_connector {
  47         struct intel_connector base;
  48
  49         struct notifier_block lid_notifier;
  50 };
  51
  52 struct intel_lvds_pps {
  53         /* 100us units */
  54         int t1_t2;
  55         int t3;
  56         int t4;
  57         int t5;
  58         int tx;
  59
  60         int divider;
  61
  62         int port;
  63         bool powerdown_on_reset;
  64 };
  65
  66 struct intel_lvds_encoder {
  67         struct intel_encoder base;
  68
  69         bool is_dual_link;
  70         i915_reg_t reg;
  71         u32 a3_power;
  72
  73         struct intel_lvds_pps init_pps;
  74         u32 init_lvds_val;
  75
  76         struct intel_lvds_connector *attached_connector;
  77 };
  78
  79 static struct intel_lvds_encoder *to_lvds_encoder(struct drm_encoder *encoder)
  80 {
  81         return container_of(encoder, struct intel_lvds_encoder, base.base);
  82 }
  83
  84 static struct intel_lvds_connector *to_lvds_connector(struct drm_connector *connector)
  85 {
  86         return container_of(connector, struct intel_lvds_connector, base.base);
  87 }
  88
  89 static bool intel_lvds_get_hw_state(struct intel_encoder *encoder,
  90                                     enum i915_pipe *pipe)
  91 {
  92         struct drm_device *dev = encoder->base.dev;
  93         struct drm_i915_private *dev_priv = to_i915(dev);
  94         struct intel_lvds_encoder *lvds_encoder = to_lvds_encoder(&encoder->base);
  95         u32 tmp;
  96         bool ret;
  97
  98         if (!intel_display_power_get_if_enabled(dev_priv,
  99                                                 encoder->power_domain))
 100                 return false;
 101
 102         ret = false;
 103
 104         tmp = I915_READ(lvds_encoder->reg);
 105
 106         if (!(tmp & LVDS_PORT_EN))
 107                 goto out;
 108
 109         if (HAS_PCH_CPT(dev_priv))
 110                 *pipe = PORT_TO_PIPE_CPT(tmp);
 111         else
 112                 *pipe = PORT_TO_PIPE(tmp);
 113
 114         ret = true;
 115
 116 out:
 117         intel_display_power_put(dev_priv, encoder->power_domain);
 118
 119         return ret;
 120 }
 121
 122 static void intel_lvds_get_config(struct intel_encoder *encoder,
 123                                   struct intel_crtc_state *pipe_config)
 124 {
 125         struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
 126         struct intel_lvds_encoder *lvds_encoder = to_lvds_encoder(&encoder->base);
 127         u32 tmp, flags = 0;
 128
 129         tmp = I915_READ(lvds_encoder->reg);
 130         if (tmp & LVDS_HSYNC_POLARITY)
 131                 flags |= DRM_MODE_FLAG_NHSYNC;
 132         else
 133                 flags |= DRM_MODE_FLAG_PHSYNC;
 134         if (tmp & LVDS_VSYNC_POLARITY)
 135                 flags |= DRM_MODE_FLAG_NVSYNC;
 136         else
 137                 flags |= DRM_MODE_FLAG_PVSYNC;
 138
 139         pipe_config->base.adjusted_mode.flags |= flags;
 140
 141         if (INTEL_GEN(dev_priv) < 5)
 142                 pipe_config->gmch_pfit.lvds_border_bits =
 143                         tmp & LVDS_BORDER_ENABLE;
 144
 145         /* gen2/3 store dither state in pfit control, needs to match */
 146         if (INTEL_GEN(dev_priv) < 4) {
 147                 tmp = I915_READ(PFIT_CONTROL);
 148
 149                 pipe_config->gmch_pfit.control |= tmp & PANEL_8TO6_DITHER_ENABLE;
 150         }
 151
 152         pipe_config->base.adjusted_mode.crtc_clock = pipe_config->port_clock;
 153 }
 154
 155 static void intel_lvds_pps_get_hw_state(struct drm_i915_private *dev_priv,
 156                                         struct intel_lvds_pps *pps)
 157 {
 158         u32 val;
 159
 160         pps->powerdown_on_reset = I915_READ(PP_CONTROL(0)) & PANEL_POWER_RESET;
 161
 162         val = I915_READ(PP_ON_DELAYS(0));
 163         pps->port = (val & PANEL_PORT_SELECT_MASK) >>
 164                     PANEL_PORT_SELECT_SHIFT;
 165         pps->t1_t2 = (val & PANEL_POWER_UP_DELAY_MASK) >>
 166                      PANEL_POWER_UP_DELAY_SHIFT;
 167         pps->t5 = (val & PANEL_LIGHT_ON_DELAY_MASK) >>
 168                   PANEL_LIGHT_ON_DELAY_SHIFT;
 169
 170         val = I915_READ(PP_OFF_DELAYS(0));
 171         pps->t3 = (val & PANEL_POWER_DOWN_DELAY_MASK) >>
 172                   PANEL_POWER_DOWN_DELAY_SHIFT;
 173         pps->tx = (val & PANEL_LIGHT_OFF_DELAY_MASK) >>
 174                   PANEL_LIGHT_OFF_DELAY_SHIFT;
 175
 176         val = I915_READ(PP_DIVISOR(0));
 177         pps->divider = (val & PP_REFERENCE_DIVIDER_MASK) >>
 178                        PP_REFERENCE_DIVIDER_SHIFT;
 179         val = (val & PANEL_POWER_CYCLE_DELAY_MASK) >>
 180               PANEL_POWER_CYCLE_DELAY_SHIFT;
 181         /*
 182          * Remove the BSpec specified +1 (100ms) offset that accounts for a
 183          * too short power-cycle delay due to the asynchronous programming of
 184          * the register.
 185          */
 186         if (val)
 187                 val--;
 188         /* Convert from 100ms to 100us units */
 189         pps->t4 = val * 1000;
 190
 191         if (INTEL_INFO(dev_priv)->gen <= 4 &&
 192             pps->t1_t2 == 0 && pps->t5 == 0 && pps->t3 == 0 && pps->tx == 0) {
 193                 DRM_DEBUG_KMS("Panel power timings uninitialized, "
 194                               "setting defaults\n");
 195                 /* Set T2 to 40ms and T5 to 200ms in 100 usec units */
 196                 pps->t1_t2 = 40 * 10;
 197                 pps->t5 = 200 * 10;
 198                 /* Set T3 to 35ms and Tx to 200ms in 100 usec units */
 199                 pps->t3 = 35 * 10;
 200                 pps->tx = 200 * 10;
 201         }
 202
 203         DRM_DEBUG_DRIVER("LVDS PPS:t1+t2 %d t3 %d t4 %d t5 %d tx %d "
 204                          "divider %d port %d powerdown_on_reset %d\n",
 205                          pps->t1_t2, pps->t3, pps->t4, pps->t5, pps->tx,
 206                          pps->divider, pps->port, pps->powerdown_on_reset);
 207 }
 208
 209 static void intel_lvds_pps_init_hw(struct drm_i915_private *dev_priv,
 210                                    struct intel_lvds_pps *pps)
 211 {
 212         u32 val;
 213
 214         val = I915_READ(PP_CONTROL(0));
 215         WARN_ON((val & PANEL_UNLOCK_MASK) != PANEL_UNLOCK_REGS);
 216         if (pps->powerdown_on_reset)
 217                 val |= PANEL_POWER_RESET;
 218         I915_WRITE(PP_CONTROL(0), val);
 219
 220         I915_WRITE(PP_ON_DELAYS(0), (pps->port << PANEL_PORT_SELECT_SHIFT) |
 221                                     (pps->t1_t2 << PANEL_POWER_UP_DELAY_SHIFT) |
 222                                     (pps->t5 << PANEL_LIGHT_ON_DELAY_SHIFT));
 223         I915_WRITE(PP_OFF_DELAYS(0), (pps->t3 << PANEL_POWER_DOWN_DELAY_SHIFT) |
 224                                      (pps->tx << PANEL_LIGHT_OFF_DELAY_SHIFT));
 225
 226         val = pps->divider << PP_REFERENCE_DIVIDER_SHIFT;
 227         val |= (DIV_ROUND_UP(pps->t4, 1000) + 1) <<
 228                PANEL_POWER_CYCLE_DELAY_SHIFT;
 229         I915_WRITE(PP_DIVISOR(0), val);
 230 }
 231
 232 static void intel_pre_enable_lvds(struct intel_encoder *encoder,
 233                                   const struct intel_crtc_state *pipe_config,
 234                                   const struct drm_connector_state *conn_state)
 235 {
 236         struct intel_lvds_encoder *lvds_encoder = to_lvds_encoder(&encoder->base);
 237         struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
 238         struct intel_crtc *crtc = to_intel_crtc(pipe_config->base.crtc);
 239         const struct drm_display_mode *adjusted_mode = &pipe_config->base.adjusted_mode;
 240         int pipe = crtc->pipe;
 241         u32 temp;
 242
 243         if (HAS_PCH_SPLIT(dev_priv)) {
 244                 assert_fdi_rx_pll_disabled(dev_priv, pipe);
 245                 assert_shared_dpll_disabled(dev_priv,
 246                                             pipe_config->shared_dpll);
 247         } else {
 248                 assert_pll_disabled(dev_priv, pipe);
 249         }
 250
 251         intel_lvds_pps_init_hw(dev_priv, &lvds_encoder->init_pps);
 252
 253         temp = lvds_encoder->init_lvds_val;
 254         temp |= LVDS_PORT_EN | LVDS_A0A2_CLKA_POWER_UP;
 255
 256         if (HAS_PCH_CPT(dev_priv)) {
 257                 temp &= ~PORT_TRANS_SEL_MASK;
 258                 temp |= PORT_TRANS_SEL_CPT(pipe);
 259         } else {
 260                 if (pipe == 1) {
 261                         temp |= LVDS_PIPEB_SELECT;
 262                 } else {
 263                         temp &= ~LVDS_PIPEB_SELECT;
 264                 }
 265         }
 266
 267         /* set the corresponsding LVDS_BORDER bit */
 268         temp &= ~LVDS_BORDER_ENABLE;
 269         temp |= pipe_config->gmch_pfit.lvds_border_bits;
 270         /* Set the B0-B3 data pairs corresponding to whether we're going to
 271          * set the DPLLs for dual-channel mode or not.
 272          */
 273         if (lvds_encoder->is_dual_link)
 274                 temp |= LVDS_B0B3_POWER_UP | LVDS_CLKB_POWER_UP;
 275         else
 276                 temp &= ~(LVDS_B0B3_POWER_UP | LVDS_CLKB_POWER_UP);
 277
 278         /* It would be nice to set 24 vs 18-bit mode (LVDS_A3_POWER_UP)
 279          * appropriately here, but we need to look more thoroughly into how
 280          * panels behave in the two modes. For now, let's just maintain the
 281          * value we got from the BIOS.
 282          */
 283         temp &= ~LVDS_A3_POWER_MASK;
 284         temp |= lvds_encoder->a3_power;
 285
 286         /* Set the dithering flag on LVDS as needed, note that there is no
 287          * special lvds dither control bit on pch-split platforms, dithering is
 288          * only controlled through the PIPECONF reg. */
 289         if (IS_GEN4(dev_priv)) {
 290                 /* Bspec wording suggests that LVDS port dithering only exists
 291                  * for 18bpp panels. */
 292                 if (pipe_config->dither && pipe_config->pipe_bpp == 18)
 293                         temp |= LVDS_ENABLE_DITHER;
 294                 else
 295                         temp &= ~LVDS_ENABLE_DITHER;
 296         }
 297         temp &= ~(LVDS_HSYNC_POLARITY | LVDS_VSYNC_POLARITY);
 298         if (adjusted_mode->flags & DRM_MODE_FLAG_NHSYNC)
 299                 temp |= LVDS_HSYNC_POLARITY;
 300         if (adjusted_mode->flags & DRM_MODE_FLAG_NVSYNC)
 301                 temp |= LVDS_VSYNC_POLARITY;
 302
 303         I915_WRITE(lvds_encoder->reg, temp);
 304 }
 305
 306 /**
 307  * Sets the power state for the panel.
 308  */
 309 static void intel_enable_lvds(struct intel_encoder *encoder,
 310                               const struct intel_crtc_state *pipe_config,
 311                               const struct drm_connector_state *conn_state)
 312 {
 313         struct drm_device *dev = encoder->base.dev;
 314         struct intel_lvds_encoder *lvds_encoder = to_lvds_encoder(&encoder->base);
 315         struct drm_i915_private *dev_priv = to_i915(dev);
 316
 317         I915_WRITE(lvds_encoder->reg, I915_READ(lvds_encoder->reg) | LVDS_PORT_EN);
 318
 319         I915_WRITE(PP_CONTROL(0), I915_READ(PP_CONTROL(0)) | PANEL_POWER_ON);
 320         POSTING_READ(lvds_encoder->reg);
 321         if (intel_wait_for_register(dev_priv, PP_STATUS(0), PP_ON, PP_ON, 1000))
 322                 DRM_ERROR("timed out waiting for panel to power on\n");
 323
 324         intel_panel_enable_backlight(pipe_config, conn_state);
 325 }
 326
 327 static void intel_disable_lvds(struct intel_encoder *encoder,
 328                                const struct intel_crtc_state *old_crtc_state,
 329                                const struct drm_connector_state *old_conn_state)
 330 {
 331         struct intel_lvds_encoder *lvds_encoder = to_lvds_encoder(&encoder->base);
 332         struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
 333
 334         I915_WRITE(PP_CONTROL(0), I915_READ(PP_CONTROL(0)) & ~PANEL_POWER_ON);
 335         if (intel_wait_for_register(dev_priv, PP_STATUS(0), PP_ON, 0, 1000))
 336                 DRM_ERROR("timed out waiting for panel to power off\n");
 337
 338         I915_WRITE(lvds_encoder->reg, I915_READ(lvds_encoder->reg) & ~LVDS_PORT_EN);
 339         POSTING_READ(lvds_encoder->reg);
 340 }
 341
 342 static void gmch_disable_lvds(struct intel_encoder *encoder,
 343                               const struct intel_crtc_state *old_crtc_state,
 344                               const struct drm_connector_state *old_conn_state)
 345
 346 {
 347         intel_panel_disable_backlight(old_conn_state);
 348
 349         intel_disable_lvds(encoder, old_crtc_state, old_conn_state);
 350 }
 351
 352 static void pch_disable_lvds(struct intel_encoder *encoder,
 353                              const struct intel_crtc_state *old_crtc_state,
 354                              const struct drm_connector_state *old_conn_state)
 355 {
 356         intel_panel_disable_backlight(old_conn_state);
 357 }
 358
 359 static void pch_post_disable_lvds(struct intel_encoder *encoder,
 360                                   const struct intel_crtc_state *old_crtc_state,
 361                                   const struct drm_connector_state *old_conn_state)
 362 {
 363         intel_disable_lvds(encoder, old_crtc_state, old_conn_state);
 364 }
 365
 366 static enum drm_mode_status
 367 intel_lvds_mode_valid(struct drm_connector *connector,
 368                       struct drm_display_mode *mode)
 369 {
 370         struct intel_connector *intel_connector = to_intel_connector(connector);
 371         struct drm_display_mode *fixed_mode = intel_connector->panel.fixed_mode;
 372         int max_pixclk = to_i915(connector->dev)->max_dotclk_freq;
 373
 374         if (mode->hdisplay > fixed_mode->hdisplay)
 375                 return MODE_PANEL;
 376         if (mode->vdisplay > fixed_mode->vdisplay)
 377                 return MODE_PANEL;
 378         if (fixed_mode->clock > max_pixclk)
 379                 return MODE_CLOCK_HIGH;
 380
 381         return MODE_OK;
 382 }
 383
 384 static bool intel_lvds_compute_config(struct intel_encoder *intel_encoder,
 385                                       struct intel_crtc_state *pipe_config,
 386                                       struct drm_connector_state *conn_state)
 387 {
 388         struct drm_i915_private *dev_priv = to_i915(intel_encoder->base.dev);
 389         struct intel_lvds_encoder *lvds_encoder =
 390                 to_lvds_encoder(&intel_encoder->base);
 391         struct intel_connector *intel_connector =
 392                 &lvds_encoder->attached_connector->base;
 393         struct drm_display_mode *adjusted_mode = &pipe_config->base.adjusted_mode;
 394         struct intel_crtc *intel_crtc = to_intel_crtc(pipe_config->base.crtc);
 395         unsigned int lvds_bpp;
 396
 397         /* Should never happen!! */
 398         if (INTEL_GEN(dev_priv) < 4 && intel_crtc->pipe == 0) {
 399                 DRM_ERROR("Can't support LVDS on pipe A\n");
 400                 return false;
 401         }
 402
 403         if (lvds_encoder->a3_power == LVDS_A3_POWER_UP)
 404                 lvds_bpp = 8*3;
 405         else
 406                 lvds_bpp = 6*3;
 407
 408         if (lvds_bpp != pipe_config->pipe_bpp && !pipe_config->bw_constrained) {
 409                 DRM_DEBUG_KMS("forcing display bpp (was %d) to LVDS (%d)\n",
 410                               pipe_config->pipe_bpp, lvds_bpp);
 411                 pipe_config->pipe_bpp = lvds_bpp;
 412         }
 413
 414         /*
 415          * We have timings from the BIOS for the panel, put them in
 416          * to the adjusted mode.  The CRTC will be set up for this mode,
 417          * with the panel scaling set up to source from the H/VDisplay
 418          * of the original mode.
 419          */
 420         intel_fixed_panel_mode(intel_connector->panel.fixed_mode,
 421                                adjusted_mode);
 422
 423         if (HAS_PCH_SPLIT(dev_priv)) {
 424                 pipe_config->has_pch_encoder = true;
 425
 426                 intel_pch_panel_fitting(intel_crtc, pipe_config,
 427                                         conn_state->scaling_mode);
 428         } else {
 429                 intel_gmch_panel_fitting(intel_crtc, pipe_config,
 430                                          conn_state->scaling_mode);
 431
 432         }
 433
 434         /*
 435          * XXX: It would be nice to support lower refresh rates on the
 436          * panels to reduce power consumption, and perhaps match the
 437          * user's requested refresh rate.
 438          */
 439
 440         return true;
 441 }
 442
 443 /**
 444  * Detect the LVDS connection.
 445  *
 446  * Since LVDS doesn't have hotlug, we use the lid as a proxy.  Open means
 447  * connected and closed means disconnected.  We also send hotplug events as
 448  * needed, using lid status notification from the input layer.
 449  */
 450 static enum drm_connector_status
 451 intel_lvds_detect(struct drm_connector *connector, bool force)
 452 {
 453         struct drm_i915_private *dev_priv = to_i915(connector->dev);
 454         enum drm_connector_status status;
 455
 456         DRM_DEBUG_KMS("[CONNECTOR:%d:%s]\n",
 457                       connector->base.id, connector->name);
 458
 459         status = intel_panel_detect(dev_priv);
 460         if (status != connector_status_unknown)
 461                 return status;
 462
 463         return connector_status_connected;
 464 }
 465
 466 /**
 467  * Return the list of DDC modes if available, or the BIOS fixed mode otherwise.
 468  */
 469 static int intel_lvds_get_modes(struct drm_connector *connector)
 470 {
 471         struct intel_lvds_connector *lvds_connector = to_lvds_connector(connector);
 472         struct drm_device *dev = connector->dev;
 473         struct drm_display_mode *mode;
 474
 475         /* use cached edid if we have one */
 476         if (!IS_ERR_OR_NULL(lvds_connector->base.edid))
 477                 return drm_add_edid_modes(connector, lvds_connector->base.edid);
 478
 479         mode = drm_mode_duplicate(dev, lvds_connector->base.panel.fixed_mode);
 480         if (mode == NULL)
 481                 return 0;
 482
 483         drm_mode_probed_add(connector, mode);
 484         return 1;
 485 }
 486
 487 #if 0 /* unused */
 488 static int intel_no_modeset_on_lid_dmi_callback(const struct dmi_system_id *id)
 489 {
 490         DRM_INFO("Skipping forced modeset for %s\n", id->ident);
 491         return 1;
 492 }
 493
 494 /* The GPU hangs up on these systems if modeset is performed on LID open */
 495 static const struct dmi_system_id intel_no_modeset_on_lid[] = {
 496         {
 497                 .callback = intel_no_modeset_on_lid_dmi_callback,
 498                 .ident = "Toshiba Tecra A11",
 499                 .matches = {
 500                         DMI_MATCH(DMI_SYS_VENDOR, "TOSHIBA"),
 501                         DMI_MATCH(DMI_PRODUCT_NAME, "TECRA A11"),
 502                 },
 503         },
 504
 505         { }     /* terminating entry */
 506 };
 507
 508 /*
 509  * Lid events. Note the use of 'modeset':
 510  *  - we set it to MODESET_ON_LID_OPEN on lid close,
 511  *    and set it to MODESET_DONE on open
 512  *  - we use it as a "only once" bit (ie we ignore
 513  *    duplicate events where it was already properly set)
 514  *  - the suspend/resume paths will set it to
 515  *    MODESET_SUSPENDED and ignore the lid open event,
 516  *    because they restore the mode ("lid open").
 517  */
 518 static int intel_lid_notify(struct notifier_block *nb, unsigned long val,
 519                             void *unused)
 520 {
 521         struct intel_lvds_connector *lvds_connector =
 522                 container_of(nb, struct intel_lvds_connector, lid_notifier);
 523         struct drm_connector *connector = &lvds_connector->base.base;
 524         struct drm_device *dev = connector->dev;
 525         struct drm_i915_private *dev_priv = to_i915(dev);
 526
 527         if (dev->switch_power_state != DRM_SWITCH_POWER_ON)
 528                 return NOTIFY_OK;
 529
 530         mutex_lock(&dev_priv->modeset_restore_lock);
 531         if (dev_priv->modeset_restore == MODESET_SUSPENDED)
 532                 goto exit;
 533         /*
 534          * check and update the status of LVDS connector after receiving
 535          * the LID nofication event.
 536          */
 537         connector->status = connector->funcs->detect(connector, false);
 538
 539         /* Don't force modeset on machines where it causes a GPU lockup */
 540         if (dmi_check_system(intel_no_modeset_on_lid))
 541                 goto exit;
 542         if (!acpi_lid_open()) {
 543                 /* do modeset on next lid open event */
 544                 dev_priv->modeset_restore = MODESET_ON_LID_OPEN;
 545                 goto exit;
 546         }
 547
 548         if (dev_priv->modeset_restore == MODESET_DONE)
 549                 goto exit;
 550
 551         /*
 552          * Some old platform's BIOS love to wreak havoc while the lid is closed.
 553          * We try to detect this here and undo any damage. The split for PCH
 554          * platforms is rather conservative and a bit arbitrary expect that on
 555          * those platforms VGA disabling requires actual legacy VGA I/O access,
 556          * and as part of the cleanup in the hw state restore we also redisable
 557          * the vga plane.
 558          */
 559         if (!HAS_PCH_SPLIT(dev_priv))
 560                 intel_display_resume(dev);
 561
 562         dev_priv->modeset_restore = MODESET_DONE;
 563
 564 exit:
 565         mutex_unlock(&dev_priv->modeset_restore_lock);
 566         return NOTIFY_OK;
 567 }
 568 #endif
 569
 570 /**
 571  * intel_lvds_destroy - unregister and free LVDS structures
 572  * @connector: connector to free
 573  *
 574  * Unregister the DDC bus for this connector then free the driver private
 575  * structure.
 576  */
 577 static void intel_lvds_destroy(struct drm_connector *connector)
 578 {
 579         struct intel_lvds_connector *lvds_connector =
 580                 to_lvds_connector(connector);
 581
 582 #if 0
 583         if (lvds_connector->lid_notifier.notifier_call)
 584                 acpi_lid_notifier_unregister(&lvds_connector->lid_notifier);
 585 #endif
 586
 587         if (!IS_ERR_OR_NULL(lvds_connector->base.edid))
 588                 kfree(lvds_connector->base.edid);
 589
 590         intel_panel_fini(&lvds_connector->base.panel);
 591
 592         drm_connector_cleanup(connector);
 593         kfree(connector);
 594 }
 595
 596 static const struct drm_connector_helper_funcs intel_lvds_connector_helper_funcs = {
 597         .get_modes = intel_lvds_get_modes,
 598         .mode_valid = intel_lvds_mode_valid,
 599         .atomic_check = intel_digital_connector_atomic_check,
 600 };
 601
 602 static const struct drm_connector_funcs intel_lvds_connector_funcs = {
 603         .detect = intel_lvds_detect,
 604         .fill_modes = drm_helper_probe_single_connector_modes,
 605         .atomic_get_property = intel_digital_connector_atomic_get_property,
 606         .atomic_set_property = intel_digital_connector_atomic_set_property,
 607         .late_register = intel_connector_register,
 608         .early_unregister = intel_connector_unregister,
 609         .destroy = intel_lvds_destroy,
 610         .atomic_destroy_state = drm_atomic_helper_connector_destroy_state,
 611         .atomic_duplicate_state = intel_digital_connector_duplicate_state,
 612 };
 613
 614 static const struct drm_encoder_funcs intel_lvds_enc_funcs = {
 615         .destroy = intel_encoder_destroy,
 616 };
 617
 618 static int intel_no_lvds_dmi_callback(const struct dmi_system_id *id)
 619 {
 620         DRM_INFO("Skipping LVDS initialization for %s\n", id->ident);
 621         return 1;
 622 }
 623
 624 /* These systems claim to have LVDS, but really don't */
 625 static const struct dmi_system_id intel_no_lvds[] = {
 626         {
 627                 .callback = intel_no_lvds_dmi_callback,
 628                 .ident = "Apple Mac Mini (Core series)",
 629                 .matches = {
 630                         DMI_MATCH(DMI_SYS_VENDOR, "Apple"),
 631                         DMI_MATCH(DMI_PRODUCT_NAME, "Macmini1,1"),
 632                 },
 633         },
 634         {
 635                 .callback = intel_no_lvds_dmi_callback,
 636                 .ident = "Apple Mac Mini (Core 2 series)",
 637                 .matches = {
 638                         DMI_MATCH(DMI_SYS_VENDOR, "Apple"),
 639                         DMI_MATCH(DMI_PRODUCT_NAME, "Macmini2,1"),
 640                 },
 641         },
 642         {
 643                 .callback = intel_no_lvds_dmi_callback,
 644                 .ident = "MSI IM-945GSE-A",
 645                 .matches = {
 646                         DMI_MATCH(DMI_SYS_VENDOR, "MSI"),
 647                         DMI_MATCH(DMI_PRODUCT_NAME, "A9830IMS"),
 648                 },
 649         },
 650         {
 651                 .callback = intel_no_lvds_dmi_callback,
 652                 .ident = "Dell Studio Hybrid",
 653                 .matches = {
 654                         DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
 655                         DMI_MATCH(DMI_PRODUCT_NAME, "Studio Hybrid 140g"),
 656                 },
 657         },
 658         {
 659                 .callback = intel_no_lvds_dmi_callback,
 660                 .ident = "Dell OptiPlex FX170",
 661                 .matches = {
 662                         DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
 663                         DMI_MATCH(DMI_PRODUCT_NAME, "OptiPlex FX170"),
 664                 },
 665         },
 666         {
 667                 .callback = intel_no_lvds_dmi_callback,
 668                 .ident = "AOpen Mini PC",
 669                 .matches = {
 670                         DMI_MATCH(DMI_SYS_VENDOR, "AOpen"),
 671                         DMI_MATCH(DMI_PRODUCT_NAME, "i965GMx-IF"),
 672                 },
 673         },
 674         {
 675                 .callback = intel_no_lvds_dmi_callback,
 676                 .ident = "AOpen Mini PC MP915",
 677                 .matches = {
 678                         DMI_MATCH(DMI_BOARD_VENDOR, "AOpen"),
 679                         DMI_MATCH(DMI_BOARD_NAME, "i915GMx-F"),
 680                 },
 681         },
 682         {
 683                 .callback = intel_no_lvds_dmi_callback,
 684                 .ident = "AOpen i915GMm-HFS",
 685                 .matches = {
 686                         DMI_MATCH(DMI_BOARD_VENDOR, "AOpen"),
 687                         DMI_MATCH(DMI_BOARD_NAME, "i915GMm-HFS"),
 688                 },
 689         },
 690         {
 691                 .callback = intel_no_lvds_dmi_callback,
 692                 .ident = "AOpen i45GMx-I",
 693                 .matches = {
 694                         DMI_MATCH(DMI_BOARD_VENDOR, "AOpen"),
 695                         DMI_MATCH(DMI_BOARD_NAME, "i45GMx-I"),
 696                 },
 697         },
 698         {
 699                 .callback = intel_no_lvds_dmi_callback,
 700                 .ident = "Aopen i945GTt-VFA",
 701                 .matches = {
 702                         DMI_MATCH(DMI_PRODUCT_VERSION, "AO00001JW"),
 703                 },
 704         },
 705         {
 706                 .callback = intel_no_lvds_dmi_callback,
 707                 .ident = "Clientron U800",
 708                 .matches = {
 709                         DMI_MATCH(DMI_SYS_VENDOR, "Clientron"),
 710                         DMI_MATCH(DMI_PRODUCT_NAME, "U800"),
 711                 },
 712         },
 713         {
 714                 .callback = intel_no_lvds_dmi_callback,
 715                 .ident = "Clientron E830",
 716                 .matches = {
 717                         DMI_MATCH(DMI_SYS_VENDOR, "Clientron"),
 718                         DMI_MATCH(DMI_PRODUCT_NAME, "E830"),
 719                 },
 720         },
 721         {
 722                 .callback = intel_no_lvds_dmi_callback,
 723                 .ident = "Asus EeeBox PC EB1007",
 724                 .matches = {
 725                         DMI_MATCH(DMI_SYS_VENDOR, "ASUSTeK Computer INC."),
 726                         DMI_MATCH(DMI_PRODUCT_NAME, "EB1007"),
 727                 },
 728         },
 729         {
 730                 .callback = intel_no_lvds_dmi_callback,
 731                 .ident = "Asus AT5NM10T-I",
 732                 .matches = {
 733                         DMI_MATCH(DMI_BOARD_VENDOR, "ASUSTeK Computer INC."),
 734                         DMI_MATCH(DMI_BOARD_NAME, "AT5NM10T-I"),
 735                 },
 736         },
 737         {
 738                 .callback = intel_no_lvds_dmi_callback,
 739                 .ident = "Hewlett-Packard HP t5740",
 740                 .matches = {
 741                         DMI_MATCH(DMI_BOARD_VENDOR, "Hewlett-Packard"),
 742                         DMI_MATCH(DMI_PRODUCT_NAME, " t5740"),
 743                 },
 744         },
 745         {
 746                 .callback = intel_no_lvds_dmi_callback,
 747                 .ident = "Hewlett-Packard t5745",
 748                 .matches = {
 749                         DMI_MATCH(DMI_BOARD_VENDOR, "Hewlett-Packard"),
 750                         DMI_MATCH(DMI_PRODUCT_NAME, "hp t5745"),
 751                 },
 752         },
 753         {
 754                 .callback = intel_no_lvds_dmi_callback,
 755                 .ident = "Hewlett-Packard st5747",
 756                 .matches = {
 757                         DMI_MATCH(DMI_BOARD_VENDOR, "Hewlett-Packard"),
 758                         DMI_MATCH(DMI_PRODUCT_NAME, "hp st5747"),
 759                 },
 760         },
 761         {
 762                 .callback = intel_no_lvds_dmi_callback,
 763                 .ident = "MSI Wind Box DC500",
 764                 .matches = {
 765                         DMI_MATCH(DMI_BOARD_VENDOR, "MICRO-STAR INTERNATIONAL CO., LTD"),
 766                         DMI_MATCH(DMI_BOARD_NAME, "MS-7469"),
 767                 },
 768         },
 769         {
 770                 .callback = intel_no_lvds_dmi_callback,
 771                 .ident = "Gigabyte GA-D525TUD",
 772                 .matches = {
 773                         DMI_MATCH(DMI_BOARD_VENDOR, "Gigabyte Technology Co., Ltd."),
 774                         DMI_MATCH(DMI_BOARD_NAME, "D525TUD"),
 775                 },
 776         },
 777         {
 778                 .callback = intel_no_lvds_dmi_callback,
 779                 .ident = "Supermicro X7SPA-H",
 780                 .matches = {
 781                         DMI_MATCH(DMI_SYS_VENDOR, "Supermicro"),
 782                         DMI_MATCH(DMI_PRODUCT_NAME, "X7SPA-H"),
 783                 },
 784         },
 785         {
 786                 .callback = intel_no_lvds_dmi_callback,
 787                 .ident = "Fujitsu Esprimo Q900",
 788                 .matches = {
 789                         DMI_MATCH(DMI_SYS_VENDOR, "FUJITSU"),
 790                         DMI_MATCH(DMI_PRODUCT_NAME, "ESPRIMO Q900"),
 791                 },
 792         },
 793         {
 794                 .callback = intel_no_lvds_dmi_callback,
 795                 .ident = "Intel D410PT",
 796                 .matches = {
 797                         DMI_MATCH(DMI_BOARD_VENDOR, "Intel"),
 798                         DMI_MATCH(DMI_BOARD_NAME, "D410PT"),
 799                 },
 800         },
 801         {
 802                 .callback = intel_no_lvds_dmi_callback,
 803                 .ident = "Intel D425KT",
 804                 .matches = {
 805                         DMI_MATCH(DMI_BOARD_VENDOR, "Intel"),
 806                         DMI_EXACT_MATCH(DMI_BOARD_NAME, "D425KT"),
 807                 },
 808         },
 809         {
 810                 .callback = intel_no_lvds_dmi_callback,
 811                 .ident = "Intel D510MO",
 812                 .matches = {
 813                         DMI_MATCH(DMI_BOARD_VENDOR, "Intel"),
 814                         DMI_EXACT_MATCH(DMI_BOARD_NAME, "D510MO"),
 815                 },
 816         },
 817         {
 818                 .callback = intel_no_lvds_dmi_callback,
 819                 .ident = "Intel D525MW",
 820                 .matches = {
 821                         DMI_MATCH(DMI_BOARD_VENDOR, "Intel"),
 822                         DMI_EXACT_MATCH(DMI_BOARD_NAME, "D525MW"),
 823                 },
 824         },
 825
 826         { }     /* terminating entry */
 827 };
 828
 829 static int intel_dual_link_lvds_callback(const struct dmi_system_id *id)
 830 {
 831         DRM_INFO("Forcing lvds to dual link mode on %s\n", id->ident);
 832         return 1;
 833 }
 834
 835 static const struct dmi_system_id intel_dual_link_lvds[] = {
 836         {
 837                 .callback = intel_dual_link_lvds_callback,
 838                 .ident = "Apple MacBook Pro 15\" (2010)",
 839                 .matches = {
 840                         DMI_MATCH(DMI_SYS_VENDOR, "Apple Inc."),
 841                         DMI_MATCH(DMI_PRODUCT_NAME, "MacBookPro6,2"),
 842                 },
 843         },
 844         {
 845                 .callback = intel_dual_link_lvds_callback,
 846                 .ident = "Apple MacBook Pro 15\" (2011)",
 847                 .matches = {
 848                         DMI_MATCH(DMI_SYS_VENDOR, "Apple Inc."),
 849                         DMI_MATCH(DMI_PRODUCT_NAME, "MacBookPro8,2"),
 850                 },
 851         },
 852         {
 853                 .callback = intel_dual_link_lvds_callback,
 854                 .ident = "Apple MacBook Pro 15\" (2012)",
 855                 .matches = {
 856                         DMI_MATCH(DMI_SYS_VENDOR, "Apple Inc."),
 857                         DMI_MATCH(DMI_PRODUCT_NAME, "MacBookPro9,1"),
 858                 },
 859         },
 860         { }     /* terminating entry */
 861 };
 862
 863 struct intel_encoder *intel_get_lvds_encoder(struct drm_device *dev)
 864 {
 865         struct intel_encoder *intel_encoder;
 866
 867         for_each_intel_encoder(dev, intel_encoder)
 868                 if (intel_encoder->type == INTEL_OUTPUT_LVDS)
 869                         return intel_encoder;
 870
 871         return NULL;
 872 }
 873
 874 bool intel_is_dual_link_lvds(struct drm_device *dev)
 875 {
 876         struct intel_encoder *encoder = intel_get_lvds_encoder(dev);
 877
 878         return encoder && to_lvds_encoder(&encoder->base)->is_dual_link;
 879 }
 880
 881 static bool compute_is_dual_link_lvds(struct intel_lvds_encoder *lvds_encoder)
 882 {
 883         struct drm_device *dev = lvds_encoder->base.base.dev;
 884         unsigned int val;
 885         struct drm_i915_private *dev_priv = to_i915(dev);
 886
 887         /* use the module option value if specified */
 888         if (i915_modparams.lvds_channel_mode > 0)
 889                 return i915_modparams.lvds_channel_mode == 2;
 890
 891         /* single channel LVDS is limited to 112 MHz */
 892         if (lvds_encoder->attached_connector->base.panel.fixed_mode->clock
 893             > 112999)
 894                 return true;
 895
 896         if (dmi_check_system(intel_dual_link_lvds))
 897                 return true;
 898
 899         /* BIOS should set the proper LVDS register value at boot, but
 900          * in reality, it doesn't set the value when the lid is closed;
 901          * we need to check "the value to be set" in VBT when LVDS
 902          * register is uninitialized.
 903          */
 904         val = I915_READ(lvds_encoder->reg);
 905         if (!(val & ~(LVDS_PIPE_MASK | LVDS_DETECTED)))
 906                 val = dev_priv->vbt.bios_lvds_val;
 907
 908         return (val & LVDS_CLKB_POWER_MASK) == LVDS_CLKB_POWER_UP;
 909 }
 910
 911 static bool intel_lvds_supported(struct drm_i915_private *dev_priv)
 912 {
 913         /* With the introduction of the PCH we gained a dedicated
 914          * LVDS presence pin, use it. */
 915         if (HAS_PCH_IBX(dev_priv) || HAS_PCH_CPT(dev_priv))
 916                 return true;
 917
 918         /* Otherwise LVDS was only attached to mobile products,
 919          * except for the inglorious 830gm */
 920         if (INTEL_GEN(dev_priv) <= 4 &&
 921             IS_MOBILE(dev_priv) && !IS_I830(dev_priv))
 922                 return true;
 923
 924         return false;
 925 }
 926
 927 /**
 928  * intel_lvds_init - setup LVDS connectors on this device
 929  * @dev: drm device
 930  *
 931  * Create the connector, register the LVDS DDC bus, and try to figure out what
 932  * modes we can display on the LVDS panel (if present).
 933  */
 934 void intel_lvds_init(struct drm_i915_private *dev_priv)
 935 {
 936         struct drm_device *dev = &dev_priv->drm;
 937         struct intel_lvds_encoder *lvds_encoder;
 938         struct intel_encoder *intel_encoder;
 939         struct intel_lvds_connector *lvds_connector;
 940         struct intel_connector *intel_connector;
 941         struct drm_connector *connector;
 942         struct drm_encoder *encoder;
 943         struct drm_display_mode *scan; /* *modes, *bios_mode; */
 944         struct drm_display_mode *fixed_mode = NULL;
 945         struct drm_display_mode *downclock_mode = NULL;
 946         struct edid *edid;
 947         i915_reg_t lvds_reg;
 948         u32 lvds;
 949         u8 pin;
 950         u32 allowed_scalers;
 951
 952         if (!intel_lvds_supported(dev_priv))
 953                 return;
 954
 955         /* Skip init on machines we know falsely report LVDS */
 956         if (dmi_check_system(intel_no_lvds))
 957                 return;
 958
 959         if (HAS_PCH_SPLIT(dev_priv))
 960                 lvds_reg = PCH_LVDS;
 961         else
 962                 lvds_reg = LVDS;
 963
 964         lvds = I915_READ(lvds_reg);
 965
 966         if (HAS_PCH_SPLIT(dev_priv)) {
 967                 if ((lvds & LVDS_DETECTED) == 0)
 968                         return;
 969                 if (dev_priv->vbt.edp.support) {
 970                         DRM_DEBUG_KMS("disable LVDS for eDP support\n");
 971                         return;
 972                 }
 973         }
 974
 975         pin = GMBUS_PIN_PANEL;
 976         if (!intel_bios_is_lvds_present(dev_priv, &pin)) {
 977                 if ((lvds & LVDS_PORT_EN) == 0) {
 978                         DRM_DEBUG_KMS("LVDS is not present in VBT\n");
 979                         return;
 980                 }
 981                 DRM_DEBUG_KMS("LVDS is not present in VBT, but enabled anyway\n");
 982         }
 983
 984         lvds_encoder = kzalloc(sizeof(*lvds_encoder), GFP_KERNEL);
 985         if (!lvds_encoder)
 986                 return;
 987
 988         lvds_connector = kzalloc(sizeof(*lvds_connector), GFP_KERNEL);
 989         if (!lvds_connector) {
 990                 kfree(lvds_encoder);
 991                 return;
 992         }
 993
 994         if (intel_connector_init(&lvds_connector->base) < 0) {
 995                 kfree(lvds_connector);
 996                 kfree(lvds_encoder);
 997                 return;
 998         }
 999
1000         lvds_encoder->attached_connector = lvds_connector;
1001
1002         intel_encoder = &lvds_encoder->base;
1003         encoder = &intel_encoder->base;
1004         intel_connector = &lvds_connector->base;
1005         connector = &intel_connector->base;
1006         drm_connector_init(dev, &intel_connector->base, &intel_lvds_connector_funcs,
1007                            DRM_MODE_CONNECTOR_LVDS);
1008
1009         drm_encoder_init(dev, &intel_encoder->base, &intel_lvds_enc_funcs,
1010                          DRM_MODE_ENCODER_LVDS, "LVDS");
1011
1012         intel_encoder->enable = intel_enable_lvds;
1013         intel_encoder->pre_enable = intel_pre_enable_lvds;
1014         intel_encoder->compute_config = intel_lvds_compute_config;
1015         if (HAS_PCH_SPLIT(dev_priv)) {
1016                 intel_encoder->disable = pch_disable_lvds;
1017                 intel_encoder->post_disable = pch_post_disable_lvds;
1018         } else {
1019                 intel_encoder->disable = gmch_disable_lvds;
1020         }
1021         intel_encoder->get_hw_state = intel_lvds_get_hw_state;
1022         intel_encoder->get_config = intel_lvds_get_config;
1023         intel_connector->get_hw_state = intel_connector_get_hw_state;
1024
1025         intel_connector_attach_encoder(intel_connector, intel_encoder);
1026
1027         intel_encoder->type = INTEL_OUTPUT_LVDS;
1028         intel_encoder->power_domain = POWER_DOMAIN_PORT_OTHER;
1029         intel_encoder->port = PORT_NONE;
1030         intel_encoder->cloneable = 0;
1031         if (HAS_PCH_SPLIT(dev_priv))
1032                 intel_encoder->crtc_mask = (1 << 0) | (1 << 1) | (1 << 2);
1033         else if (IS_GEN4(dev_priv))
1034                 intel_encoder->crtc_mask = (1 << 0) | (1 << 1);
1035         else
1036                 intel_encoder->crtc_mask = (1 << 1);
1037
1038         drm_connector_helper_add(connector, &intel_lvds_connector_helper_funcs);
1039         connector->display_info.subpixel_order = SubPixelHorizontalRGB;
1040         connector->interlace_allowed = false;
1041         connector->doublescan_allowed = false;
1042
1043         lvds_encoder->reg = lvds_reg;
1044
1045         /* create the scaling mode property */
1046         allowed_scalers = BIT(DRM_MODE_SCALE_ASPECT);
1047         allowed_scalers |= BIT(DRM_MODE_SCALE_FULLSCREEN);
1048         allowed_scalers |= BIT(DRM_MODE_SCALE_CENTER);
1049         drm_connector_attach_scaling_mode_property(connector, allowed_scalers);
1050         connector->state->scaling_mode = DRM_MODE_SCALE_ASPECT;
1051
1052         intel_lvds_pps_get_hw_state(dev_priv, &lvds_encoder->init_pps);
1053         lvds_encoder->init_lvds_val = lvds;
1054
1055         /*
1056          * LVDS discovery:
1057          * 1) check for EDID on DDC
1058          * 2) check for VBT data
1059          * 3) check to see if LVDS is already on
1060          *    if none of the above, no panel
1061          * 4) make sure lid is open
1062          *    if closed, act like it's not there for now
1063          */
1064
1065         /*
1066          * Attempt to get the fixed panel mode from DDC.  Assume that the
1067          * preferred mode is the right one.
1068          */
1069         mutex_lock(&dev->mode_config.mutex);
1070         if (vga_switcheroo_handler_flags() & VGA_SWITCHEROO_CAN_SWITCH_DDC)
1071                 edid = drm_get_edid_switcheroo(connector,
1072                                     intel_gmbus_get_adapter(dev_priv, pin));
1073         else
1074                 edid = drm_get_edid(connector,
1075                                     intel_gmbus_get_adapter(dev_priv, pin));
1076         if (edid) {
1077                 if (drm_add_edid_modes(connector, edid)) {
1078                         drm_mode_connector_update_edid_property(connector,
1079                                                                 edid);
1080                 } else {
1081                         kfree(edid);
1082                         edid = ERR_PTR(-EINVAL);
1083                 }
1084         } else {
1085                 edid = ERR_PTR(-ENOENT);
1086         }
1087         lvds_connector->base.edid = edid;
1088
1089         list_for_each_entry(scan, &connector->probed_modes, head) {
1090                 if (scan->type & DRM_MODE_TYPE_PREFERRED) {
1091                         DRM_DEBUG_KMS("using preferred mode from EDID: ");
1092                         drm_mode_debug_printmodeline(scan);
1093
1094                         fixed_mode = drm_mode_duplicate(dev, scan);
1095                         if (fixed_mode)
1096                                 goto out;
1097                 }
1098         }
1099
1100         /* Failed to get EDID, what about VBT? */
1101         if (dev_priv->vbt.lfp_lvds_vbt_mode) {
1102                 DRM_DEBUG_KMS("using mode from VBT: ");
1103                 drm_mode_debug_printmodeline(dev_priv->vbt.lfp_lvds_vbt_mode);
1104
1105                 fixed_mode = drm_mode_duplicate(dev, dev_priv->vbt.lfp_lvds_vbt_mode);
1106                 if (fixed_mode) {
1107                         fixed_mode->type |= DRM_MODE_TYPE_PREFERRED;
1108                         connector->display_info.width_mm = fixed_mode->width_mm;
1109                         connector->display_info.height_mm = fixed_mode->height_mm;
1110                         goto out;
1111                 }
1112         }
1113
1114         /*
1115          * If we didn't get EDID, try checking if the panel is already turned
1116          * on.  If so, assume that whatever is currently programmed is the
1117          * correct mode.
1118          */
1119         fixed_mode = intel_encoder_current_mode(intel_encoder);
1120         if (fixed_mode) {
1121                 DRM_DEBUG_KMS("using current (BIOS) mode: ");
1122                 drm_mode_debug_printmodeline(fixed_mode);
1123                 fixed_mode->type |= DRM_MODE_TYPE_PREFERRED;
1124         }
1125
1126         /* If we still don't have a mode after all that, give up. */
1127         if (!fixed_mode)
1128                 goto failed;
1129
1130 out:
1131         mutex_unlock(&dev->mode_config.mutex);
1132
1133         intel_panel_init(&intel_connector->panel, fixed_mode, NULL,
1134                          downclock_mode);
1135         intel_panel_setup_backlight(connector, INVALID_PIPE);
1136
1137         lvds_encoder->is_dual_link = compute_is_dual_link_lvds(lvds_encoder);
1138         DRM_DEBUG_KMS("detected %s-link lvds configuration\n",
1139                       lvds_encoder->is_dual_link ? "dual" : "single");
1140
1141         lvds_encoder->a3_power = lvds & LVDS_A3_POWER_MASK;
1142
1143 #if 0
1144         lvds_connector->lid_notifier.notifier_call = intel_lid_notify;
1145         if (acpi_lid_notifier_register(&lvds_connector->lid_notifier)) {
1146                 DRM_DEBUG_KMS("lid notifier registration failed\n");
1147                 lvds_connector->lid_notifier.notifier_call = NULL;
1148         }
1149 #endif
1150
1151         return;
1152
1153 failed:
1154         mutex_unlock(&dev->mode_config.mutex);
1155
1156         DRM_DEBUG_KMS("No LVDS modes found, disabling.\n");
1157         drm_connector_cleanup(connector);
1158         drm_encoder_cleanup(encoder);
1159         kfree(lvds_encoder);
1160         kfree(lvds_connector);
1161         return;
1162 }