bge: Limit BCM5701 B5 to 32-bit mode
[dragonfly.git] / sys / dev / netif / bge / if_bge.c
index 1758d68..6f44e62 100644 (file)
@@ -1295,6 +1295,16 @@ bge_chipinit(struct bge_softc *sc)
            BGE_MODECTL_MAC_ATTN_INTR|BGE_MODECTL_HOST_SEND_BDS|
            BGE_MODECTL_TX_NO_PHDR_CSUM);
 
+       /*
+        * BCM5701 B5 have a bug causing data corruption when using
+        * 64-bit DMA reads, which can be terminated early and then
+        * completed later as 32-bit accesses, in combination with
+        * certain bridges.
+        */
+       if (sc->bge_asicrev == BGE_ASICREV_BCM5701 &&
+           sc->bge_chipid == BGE_CHIPID_BCM5701_B5)
+               BGE_SETBIT(sc, BGE_MODE_CTL, BGE_MODECTL_FORCE_PCI32);
+
        /*
         * Disable memory write invalidate.  Apparently it is not supported
         * properly by these devices.
@@ -2751,7 +2761,7 @@ bge_encap(struct bge_softc *sc, struct mbuf **m_head0, uint32_t *txidx)
 
        maxsegs = (BGE_TX_RING_CNT - sc->bge_txcnt) - BGE_NSEG_RSVD;
        KASSERT(maxsegs >= BGE_NSEG_SPARE,
-               ("not enough segments %d\n", maxsegs));
+               ("not enough segments %d", maxsegs));
 
        if (maxsegs > BGE_NSEG_NEW)
                maxsegs = BGE_NSEG_NEW;