struct tcphdr *tcp;
bus_dma_segment_t txsegs[ALC_MAXTXSEGS];
bus_dmamap_t map;
- uint32_t cflags, hdrlen, ip_off, poff, vtag;
+ uint32_t cflags, hdrlen, poff, vtag;
+#if 0 /* XXX: TSO */
+ uint32_t ip_off;
+#endif
int error, idx, nsegs, prod;
M_ASSERTPKTHDR((*m_head));
m = *m_head;
tcp = NULL;
- ip_off = poff = 0;
+ poff = 0;
#if 0 /* XXX: TSO */
+ ip_off = 0;
ip = NULL;
if ((m->m_pkthdr.csum_flags & (ALC_CSUM_FEATURES | CSUM_TSO)) != 0) {
struct ifnet *ifp = sc->sc_ifp;
struct ieee80211com *ic = ifp->if_l2com;
struct ath_buf *bf, *last;
- struct ath_desc *ds, *ds0;
+ struct ath_desc *ds;
struct ath_tx_status *ts;
struct ieee80211_node *ni;
struct ath_node *an;
bf = STAILQ_FIRST(&txq->axq_q);
if (bf == NULL)
break;
- ds0 = &bf->bf_desc[0];
ds = &bf->bf_desc[bf->bf_nseg - 1];
ts = &bf->bf_status.ds_txstat;
qbusy = ath_hal_txqenabled(ah, txq->axq_qnum);
EEPROM_POWER_EXPN_5112 *pPowerExpn)
{
int ii, jj, kk;
- int16_t maxPower_t4;
EXPN_DATA_PER_XPD_5112 *pExpnXPD;
/* ptr to array of info held per channel */
const EEPROM_DATA_PER_CHANNEL_5112 *pCalCh;
pCalCh->channelValue;
pPowerExpn->pDataPerChannel[ii].maxPower_t4 =
pCalCh->maxPower_t4;
- maxPower_t4 = pPowerExpn->pDataPerChannel[ii].maxPower_t4;
for (jj = 0; jj < NUM_XPD_PER_CHANNEL; jj++)
pPowerExpn->pDataPerChannel[ii].pDataPerXPD[jj].numPcdacs = 0;
const int16_t *pwrList, const uint16_t *VpdList,
uint16_t numIntercepts, uint16_t retVpdList[][64])
{
- uint16_t ii, jj, kk;
+ uint16_t ii, kk;
int16_t currPwr = (int16_t)(2*Pmin);
/* since Pmin is pwr*2 and pwrList is 4*pwr */
uint32_t idxL, idxR;
ii = 0;
- jj = 0;
if (numIntercepts < 2)
return AH_FALSE;
uint16_t numIntercepts,
uint16_t retVpdList[][64])
{
- uint16_t ii, jj, kk;
+ uint16_t ii, kk;
int16_t currPwr = (int16_t)(2*Pmin);
/* since Pmin is pwr*2 and pwrList is 4*pwr */
uint32_t idxL, idxR;
ii = 0;
- jj = 0;
if (numIntercepts < 2)
return AH_FALSE;
uint16_t numIntercepts,
uint16_t retVpdList[][64])
{
- uint16_t ii, jj, kk;
+ uint16_t ii, kk;
int16_t currPwr = (int16_t)(2*Pmin);
/* since Pmin is pwr*2 and pwrList is 4*pwr */
uint32_t idxL, idxR;
ii = 0;
- jj = 0;
if (numIntercepts < 2)
return AH_FALSE;
void
ar5416SetStaBeaconTimers(struct ath_hal *ah, const HAL_BEACON_STATE *bs)
{
- uint32_t nextTbtt, nextdtim,beaconintval, dtimperiod;
+ uint32_t nextTbtt, beaconintval, dtimperiod;
HALASSERT(bs->bs_intval != 0);
nextTbtt = bs->bs_nextdtim;
else
nextTbtt = bs->bs_nexttbtt;
- nextdtim = bs->bs_nextdtim;
OS_REG_WRITE(ah, AR_NEXT_DTIM,
TU_TO_USEC(bs->bs_nextdtim - SLEEP_SLOP));
static void
ar9280WriteIni(struct ath_hal *ah, const struct ieee80211_channel *chan)
{
- u_int modesIndex, freqIndex;
+ u_int modesIndex;
int regWrites = 0;
/* Setup the indices for the next set of register array writes */
/* XXX Ignore 11n dynamic mode on the AR5416 for the moment */
if (IEEE80211_IS_CHAN_2GHZ(chan)) {
- freqIndex = 2;
if (IEEE80211_IS_CHAN_HT40(chan))
modesIndex = 3;
else if (IEEE80211_IS_CHAN_108G(chan))
else
modesIndex = 4;
} else {
- freqIndex = 1;
if (IEEE80211_IS_CHAN_HT40(chan) ||
IEEE80211_IS_CHAN_TURBO(chan))
modesIndex = 2;
static void
ar9285WriteIni(struct ath_hal *ah, const struct ieee80211_channel *chan)
{
- u_int modesIndex, freqIndex;
+ u_int modesIndex;
int regWrites = 0;
/* Setup the indices for the next set of register array writes */
/* XXX Ignore 11n dynamic mode on the AR5416 for the moment */
- freqIndex = 2;
if (IEEE80211_IS_CHAN_HT40(chan))
modesIndex = 3;
else if (IEEE80211_IS_CHAN_108G(chan))
}
if (rts || cts) {
- int ctsrate;
int ctsduration = 0;
/* NB: this is intentionally not a runtime check */
("bogus cix %d, max %u, mode %u", cix, rt->rateCount,
sc->sc_curmode));
- ctsrate = rt->info[cix].rateCode | rt->info[cix].shortPreamble;
if (rts) /* SIFS + CTS */
ctsduration += rt->info[cix].spAckDuration;
while (sw_cons != hw_cons) {
struct mbuf *m = NULL;
struct l2_fhdr *l2fhdr = NULL;
- struct rx_bd *rxbd;
unsigned int len;
uint32_t status = 0;
sw_chain_cons = RX_CHAIN_IDX(sc, sw_cons);
sw_chain_prod = RX_CHAIN_IDX(sc, sw_prod);
- /* Get the used rx_bd. */
- rxbd = &sc->rx_bd_chain[RX_PAGE(sw_chain_cons)]
- [RX_IDX(sw_chain_cons)];
sc->free_rx_bd++;
/* The mbuf is stored with the last rx_bd entry of a packet. */
uint32_t hwcfg = 0, misccfg;
int error = 0, rid, capmask;
uint8_t ether_addr[ETHER_ADDR_LEN];
- uint16_t product, vendor;
+ uint16_t product;
driver_intr_t *intr_func;
uintptr_t mii_priv = 0;
u_int intr_flags;
lwkt_serialize_init(&sc->bnx_jslot_serializer);
product = pci_get_device(dev);
- vendor = pci_get_vendor(dev);
#ifndef BURN_BRIDGES
if (pci_get_powerstate(dev) != PCI_POWERSTATE_D0) {
unsigned rev_type = 0;
char chip_revision;
int eeprom_buff[CHKSUM_LEN];
- int chip_type, pp_isaint, pp_isadma;
+ int chip_type, pp_isaint;
+#if 0 /* Temporary disabled */
+ int pp_isadma;
+#endif
error = cs_alloc_port(dev, 0, CS_89x0_IO_PORTS);
if (error)
if(chip_type==CS8900) {
pp_isaint = PP_CS8900_ISAINT;
+#if 0 /* Temporary disabled */
pp_isadma = PP_CS8900_ISADMA;
+#endif
sc->send_cmd = TX_CS8900_AFTER_ALL;
} else {
pp_isaint = PP_CS8920_ISAINT;
+#if 0 /* Temporary disabled */
pp_isadma = PP_CS8920_ISADMA;
+#endif
sc->send_cmd = TX_CS8920_AFTER_ALL;
}
return (ENXIO);
}
- /*
- * Temporary disabled
- *
+#if 0 /* Temporary disabled */
if (drq>0)
cs_writereg(iobase, pp_isadma, drq);
else {
device_printf(dev, "incorrect drq\n");
return 0;
}
- */
+#endif
if (bootverbose)
device_printf(dev, "CS89%c0%s rev %c media%s%s%s\n",
{
struct en_softc * sc = (struct en_softc *)scp;
pcici_t id = scp->en_confid;
- int i, j, address, status;
+ int i, j, address;
u_int32_t data, t_data;
u_int8_t tmp;
data |= EN_PROM_CLK ;
pci_conf_write(id, EN_TONGA, data);
data = pci_conf_read(id, EN_TONGA);
- status = data & EN_PROM_DATA;
data &= ~EN_PROM_CLK ;
pci_conf_write(id, EN_TONGA, data);
data |= EN_PROM_DATA ;
data |= EN_PROM_CLK ;
pci_conf_write(id, EN_TONGA, data);
data = pci_conf_read(id, EN_TONGA);
- status = data & EN_PROM_DATA;
data &= ~EN_PROM_CLK ;
pci_conf_write(id, EN_TONGA, data);
data |= EN_PROM_DATA ;
union e1000_adv_tx_desc *txd = NULL;
struct mbuf *m_head = *m_headp;
uint32_t olinfo_status = 0, cmd_type_len = 0, cmd_rs = 0;
- int maxsegs, nsegs, i, j, error, last = 0;
+ int maxsegs, nsegs, i, j, error;
uint32_t hdrlen = 0;
if (m_head->m_pkthdr.csum_flags & CSUM_TSO) {
txd->read.buffer_addr = htole64(seg_addr);
txd->read.cmd_type_len = htole32(cmd_type_len | seg_len);
txd->read.olinfo_status = htole32(olinfo_status);
- last = i;
if (++i == txr->num_tx_desc)
i = 0;
tx_buf->m_head = NULL;
#define SUBTYPE(wh) ((wh)->i_fc[0] & IEEE80211_FC0_SUBTYPE_MASK)
const uint8_t *frm, *efrm, *wme;
struct ieee80211_node *ni;
- uint16_t capinfo, status, associd;
+ uint16_t capinfo, associd;
/* NB: +8 for capinfo, status, associd, and first ie */
if (!(sizeof(*wh)+8 < len && len < IEEE80211_MAX_LEN) ||
capinfo = le16toh(*(const uint16_t *)frm);
frm += 2;
- status = le16toh(*(const uint16_t *)frm);
frm += 2;
associd = le16toh(*(const uint16_t *)frm);
frm += 2;
static void
iwn_start(struct ifnet *ifp)
{
- struct iwn_softc *sc;
-
- sc = ifp->if_softc;
-
wlan_serialize_enter();
iwn_start_locked(ifp);
wlan_serialize_exit();
ixgbe_setup_receive_ring(struct rx_ring *rxr)
{
struct adapter *adapter;
+#if 0 /* NET_LRO */
struct ifnet *ifp;
device_t dev;
+#endif
struct ixgbe_rx_buf *rxbuf;
bus_dma_segment_t pseg[1], hseg[1];
#if 0 /* NET_LRO */
#endif /* DEV_NETMAP */
adapter = rxr->adapter;
+#if 0 /* NET_LRO */
ifp = adapter->ifp;
dev = adapter->dev;
+#endif
/* Clear the ring contents */
IXGBE_RX_LOCK(rxr);
static void
f54_intr(struct softc *sc)
{
- unsigned g, u, s;
-
+ unsigned u, s;
+#if 0
+ unsigned g;
g = sc->f54r->gis;
+#endif
u = sc->f54r->isr0 << 24;
u |= sc->f54r->isr1 << 16;
u |= sc->f54r->isr2 << 8;
struct ifnet *ifp = &sc_if->arpcom.ac_if;
struct sk_chain_data *cd = &sc_if->sk_cdata;
struct sk_ring_data *rd = &sc_if->sk_rdata;
- int i, reap, max_frmlen;
+ int i, max_frmlen;
DPRINTFN(2, ("sk_rxeof\n"));
else
max_frmlen = ETHER_MAX_LEN;
- reap = 0;
for (;;) {
struct sk_rx_desc *cur_desc;
uint32_t rxstat, sk_ctl;
* in the following processing any more.
*/
SK_INC(i, SK_RX_RING_CNT);
- reap = 1;
if ((sk_ctl & (SK_RXCTL_STATUS_VALID | SK_RXCTL_FIRSTFRAG |
SK_RXCTL_LASTFRAG)) != (SK_RXCTL_STATUS_VALID |
struct sk_chain_data *cd = &sc_if->sk_cdata;
struct ifnet *ifp = &sc_if->arpcom.ac_if;
uint32_t idx;
- int reap = 0;
DPRINTFN(2, ("sk_txeof\n"));
cd->sk_tx_mbuf[idx] = NULL;
}
sc_if->sk_cdata.sk_tx_cnt--;
- reap = 1;
SK_INC(idx, SK_TX_RING_CNT);
}