msk(4): Add support for Yukon Supreme

Obtained-from: FreeBSD 222230

diff --git a/sys/dev/netif/msk/if_msk.c b/sys/dev/netif/msk/if_msk.c
index 41bcf7d..6a3f4fc 100644 (file)
--- a/sys/dev/netif/msk/if_msk.c
+++ b/sys/dev/netif/msk/if_msk.c
@@ -200,6 +200,10 @@ static const struct msk_product {
            "Marvell Yukon 88E8071 Gigabit Ethernet" },
        { VENDORID_MARVELL, DEVICEID_MRVL_436C,
            "Marvell Yukon 88E8072 Gigabit Ethernet" },
+       { VENDORID_MARVELL, DEVICEID_MRVL_436D,
+           "Marvell Yukon 88E8055 Gigabit Ethernet" },
+       { VENDORID_MARVELL, DEVICEID_MRVL_4370,
+           "Marvell Yukon 88E8075 Gigabit Ethernet" },
        { VENDORID_MARVELL, DEVICEID_MRVL_4380,
            "Marvell Yukon 88E8057 Gigabit Ethernet" },
        { VENDORID_MARVELL, DEVICEID_MRVL_4381,
@@ -1191,12 +1195,17 @@ mskc_reset(struct msk_softc *sc)
                CSR_WRITE_4(sc, MR_ADDR(i, GMAC_CTRL), GMC_RST_SET);
                CSR_WRITE_4(sc, MR_ADDR(i, GMAC_CTRL), GMC_RST_CLR);
                CSR_WRITE_4(sc, MR_ADDR(i, GMAC_CTRL), GMC_F_LOOPB_OFF);
-               if (sc->msk_hw_id == CHIP_ID_YUKON_EX) {
+               if (sc->msk_hw_id == CHIP_ID_YUKON_EX ||
+                   sc->msk_hw_id == CHIP_ID_YUKON_SUPR) {
                        CSR_WRITE_4(sc, MR_ADDR(i, GMAC_CTRL),
                            GMC_BYP_MACSECRX_ON | GMC_BYP_MACSECTX_ON |
                            GMC_BYP_RETR_ON);
                }
        }
+
+       if (sc->msk_hw_id == CHIP_ID_YUKON_SUPR &&
+           sc->msk_hw_rev > CHIP_REV_YU_SU_B0)
+               CSR_PCI_WRITE_4(sc, PCI_OUR_REG_3, PCI_CLK_MACSEC_DIS);
        if (sc->msk_hw_id == CHIP_ID_YUKON_OPT && sc->msk_hw_rev == 0) {
                /* Disable PCIe PHY powerdown(reg 0x80, bit7). */
                CSR_WRITE_4(sc, Y2_PEX_PHY_DATA, (0x0080 << 16) | 0x0080);
@@ -1567,7 +1576,6 @@ mskc_attach(device_t dev)
        /* Bail out if chip is not recognized. */
        if (sc->msk_hw_id < CHIP_ID_YUKON_XL ||
            sc->msk_hw_id > CHIP_ID_YUKON_OPT ||
-           sc->msk_hw_id == CHIP_ID_YUKON_SUPR ||
            sc->msk_hw_id == CHIP_ID_YUKON_UNKNOWN) {
                device_printf(dev, "unknown device: id=0x%02x, rev=0x%02x\n",
                    sc->msk_hw_id, sc->msk_hw_rev);
@@ -1670,6 +1678,9 @@ mskc_attach(device_t dev)
        case CHIP_ID_YUKON_XL:
                sc->msk_clock = 156;    /* 156 Mhz */
                break;
+       case CHIP_ID_YUKON_SUPR:
+               sc->msk_clock = 125;    /* 125 MHz */
+               break;
        case CHIP_ID_YUKON_UL_2:
                sc->msk_clock = 125;    /* 125 Mhz */
                break;
@@ -3381,7 +3392,8 @@ msk_init(void *xsc)
        CSR_WRITE_4(sc, MR_ADDR(sc_if->msk_port, GMAC_CTRL), GMC_RST_SET);
        CSR_WRITE_4(sc, MR_ADDR(sc_if->msk_port, GMAC_CTRL), GMC_RST_CLR);
        CSR_WRITE_4(sc, MR_ADDR(sc_if->msk_port, GMAC_CTRL), GMC_F_LOOPB_OFF);
-       if (sc->msk_hw_id == CHIP_ID_YUKON_EX) {
+       if (sc->msk_hw_id == CHIP_ID_YUKON_EX ||
+           sc->msk_hw_id == CHIP_ID_YUKON_SUPR) {
                CSR_WRITE_4(sc, MR_ADDR(sc_if->msk_port, GMAC_CTRL),
                    GMC_BYP_MACSECRX_ON | GMC_BYP_MACSECTX_ON |
                    GMC_BYP_RETR_ON);
@@ -3578,7 +3590,8 @@ msk_init(void *xsc)
                msk_stop(sc_if);
                return;
        }
-       if (sc->msk_hw_id == CHIP_ID_YUKON_EX) {
+       if (sc->msk_hw_id == CHIP_ID_YUKON_EX ||
+           sc->msk_hw_id == CHIP_ID_YUKON_SUPR) {
                /* Disable flushing of non-ASF packets. */
                CSR_WRITE_4(sc, MR_ADDR(sc_if->msk_port, RX_GMF_CTRL_T),
                    GMF_RX_MACSEC_FLUSH_OFF);

diff --git a/sys/dev/netif/msk/if_mskreg.h b/sys/dev/netif/msk/if_mskreg.h
index bbafdda..967aac8 100644 (file)
--- a/sys/dev/netif/msk/if_mskreg.h
+++ b/sys/dev/netif/msk/if_mskreg.h
@@ -145,6 +145,8 @@
 #define DEVICEID_MRVL_436A     0x436A
 #define DEVICEID_MRVL_436B     0x436B
 #define DEVICEID_MRVL_436C     0x436C
+#define DEVICEID_MRVL_436D     0x436D
+#define DEVICEID_MRVL_4370     0x4370
 #define DEVICEID_MRVL_4380     0x4380
 #define DEVICEID_MRVL_4381     0x4381
 
@@ -321,6 +323,9 @@
 #define PCI_OS_SPD_X100                2       /* PCI-X 100MHz Bus */
 #define PCI_OS_SPD_X133                3       /* PCI-X 133MHz Bus */
 
+/* PCI_OUR_REG_3       32 bit  Our Register 3 (Yukon-ECU only) */
+#define        PCI_CLK_MACSEC_DIS      BIT_17  /* Disable Clock MACSec. */
+
 /* PCI_OUR_REG_4       32 bit  Our Register 4 (Yukon-ECU only) */
 #define        PCI_TIMER_VALUE_MSK     (0xff<<16)      /* Bit 23..16:  Timer Value Mask */
 #define        PCI_FORCE_ASPM_REQUEST  BIT_15  /* Force ASPM Request (A1 only) */
@@ -919,6 +924,10 @@
 #define        CHIP_REV_YU_EX_A0       1 /* Chip Rev. for Yukon-2 EX A0 */
 #define        CHIP_REV_YU_EX_B0       2 /* Chip Rev. for Yukon-2 EX B0 */
 
+#define        CHIP_REV_YU_SU_A0       0 /* Chip Rev. for Yukon-2 SUPR A0 */
+#define        CHIP_REV_YU_SU_B0       1 /* Chip Rev. for Yukon-2 SUPR B0 */
+#define        CHIP_REV_YU_SU_B1       3 /* Chip Rev. for Yukon-2 SUPR B1 */
+
 /*     B2_Y2_CLK_GATE   8 bit  Clock Gating (Yukon-2 only) */
 #define Y2_STATUS_LNK2_INAC    BIT_7   /* Status Link 2 inactiv (0 = activ) */
 #define Y2_CLK_GAT_LNK2_DIS    BIT_6   /* Disable clock gating Link 2 */