Add the hpt27xx(4) driver for HighPoint RocketRAID 27xx SAS controllers.

The manual page mentions the following adapters to be supported:

* RocketRAID 271x
* RocketRAID 272x
* RocketRAID 274x
* RocketRAID 276x
* RocketRAID 278x

I have tested it with a RocketRAID 2720.

Taken-from: FreeBSD

diff --git a/share/man/man4/Makefile b/share/man/man4/Makefile
index c3d4328..5c3a22e 100644 (file)
--- a/share/man/man4/Makefile
+++ b/share/man/man4/Makefile
@@ -104,6 +104,7 @@ MAN=        aac.4 \
        gre.4 \
        gusc.4 \
        hifn.4 \
+       hpt27xx.4 \
        hptiop.4 \
        hptmv.4 \
        hptrr.4 \

diff --git a/share/man/man4/hptmv.4 b/share/man/man4/hpt27xx.4
similarity index 76%
copy from share/man/man4/hptmv.4
copy to share/man/man4/hpt27xx.4
index 29fada3..8868d4a 100644 (file)
--- a/share/man/man4/hptmv.4
+++ b/share/man/man4/hpt27xx.4
@@ -1,5 +1,5 @@
 .\"
-.\" Copyright (c) 2004 David E. O'Brien
+.\" Copyright (c) 2011 iXsystems, Inc.
 .\" All rights reserved.
 .\"
 .\" Redistribution and use in source and binary forms, with or without
@@ -22,44 +22,52 @@
 .\" (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
 .\" THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 .\"
-.\" $FreeBSD: src/share/man/man4/hptmv.4,v 1.8 2006/09/18 15:24:18 ru Exp $
+.\" $FreeBSD: src/share/man/man4/hpt27xx.4,v 1.1 2011/12/28 23:26:58 delphij Exp $
 .\"
-.Dd January 4, 2011
-.Dt HPTMV 4
+.Dd August 8, 2012
+.Dt HPT27XX 4
 .Os
 .Sh NAME
-.Nm hptmv
-.Nd "HighPoint RocketRAID 182x device driver"
+.Nm hpt27xx
+.Nd "HighPoint RocketRAID 27xx SAS 6Gb/s HBA card driver"
 .Sh SYNOPSIS
 To compile this driver into the kernel,
 place the following line in your
 kernel configuration file:
 .Bd -ragged -offset indent
-.Cd "device hptmv"
+.Cd "device hpt27xx"
 .Ed
 .Pp
 Alternatively, to load the driver as a
 module at boot time, place the following line in
 .Xr loader.conf 5 :
 .Bd -literal -offset indent
-hptmv_load="YES"
+hpt27xx_load="YES"
 .Ed
 .Sh DESCRIPTION
 The
 .Nm
-driver provides support for HighPoint's RocketRAID 182x based RAID controller.
+driver provides support for HighPoint's RocketRAID 27xx based RAID controller.
 .Pp
-These devices support ATA disk drives
+These devices support SAS disk drives
 and provide RAID0 (striping), RAID1 (mirroring), and RAID5 functionality.
 .Sh HARDWARE
 The
 .Nm
-driver supports the following ATA RAID
+driver supports the following SAS
 controllers:
 .Pp
 .Bl -bullet -compact
 .It
-HighPoint's RocketRAID 182x series
+HighPoint's RocketRAID 271x series
+.It
+HighPoint's RocketRAID 272x series
+.It
+HighPoint's RocketRAID 274x series
+.It
+HighPoint's RocketRAID 276x series
+.It
+HighPoint's RocketRAID 278x series
 .El
 .Sh NOTES
 The
@@ -75,6 +83,7 @@ blob from the manufacturer which they only supply for these platforms.
 .\"enabled.
 .Sh SEE ALSO
 .Xr hptiop 4 ,
+.Xr hptmv 4 ,
 .Xr hptrr 4 ,
 .Xr kld 4 ,
 .Xr kldload 8 ,
@@ -83,21 +92,13 @@ blob from the manufacturer which they only supply for these platforms.
 The
 .Nm
 device driver first appeared in
-.Fx 5.3 .
+.Fx 10.0 .
 .Sh AUTHORS
 .An -nosplit
 The
 .Nm
 device driver was written by
-.An HighPoint Technologies, Inc. ,
-and ported to
-.Fx
-by
-.An Scott Long .
+.An HighPoint Technologies, Inc. .
 This manual page was written by
-.An David E. O'Brien .
-.Sh BUGS
-The
-.Nm
-driver does not support manipulating the RAID from the OS, RAIDs need
-to be set up from the on-board BIOS.
+.An Xin LI Aq delphij@FreeBSD.org
+for iXsystems, Inc.

diff --git a/share/man/man4/hptiop.4 b/share/man/man4/hptiop.4
index e499640..ac70a35 100644 (file)
--- a/share/man/man4/hptiop.4
+++ b/share/man/man4/hptiop.4
@@ -106,6 +106,7 @@ HighPoint RocketRAID 3020
 .\"driver has only been tested on the i386 and amd64 platforms.
 .Sh SEE ALSO
 .Xr cam 4 ,
+.Xr hpt27xx 4 ,
 .Xr hptmv 4 ,
 .Xr hptrr 4
 .Sh HISTORY

diff --git a/share/man/man4/hptmv.4 b/share/man/man4/hptmv.4
index 29fada3..9ce7fc8 100644 (file)
--- a/share/man/man4/hptmv.4
+++ b/share/man/man4/hptmv.4
@@ -74,6 +74,7 @@ blob from the manufacturer which they only supply for these platforms.
 .\".Xr pae 4
 .\"enabled.
 .Sh SEE ALSO
+.Xr hpt27xx 4 ,
 .Xr hptiop 4 ,
 .Xr hptrr 4 ,
 .Xr kld 4 ,

diff --git a/share/man/man4/hptrr.4 b/share/man/man4/hptrr.4
index 39c594d..ca7ba13 100644 (file)
--- a/share/man/man4/hptrr.4
+++ b/share/man/man4/hptrr.4
@@ -113,6 +113,7 @@ See the
 manual page for details on support.
 .Sh SEE ALSO
 .Xr cam 4 ,
+.Xr hpt27xx 4 ,
 .Xr hptiop 4 ,
 .Xr hptmv 4 ,
 .\".Xr mvs 4 ,

diff --git a/sys/conf/files b/sys/conf/files
index 531e81e..dcd1cad 100644 (file)
--- a/sys/conf/files
+++ b/sys/conf/files
@@ -366,6 +366,9 @@ dev/atm/hfa/fore_stats.c    optional nowerror hfa
 dev/atm/hfa/fore_timer.c       optional hfa
 dev/atm/hfa/fore_transmit.c    optional nowerror hfa
 dev/atm/hfa/fore_vcm.c         optional hfa
+dev/raid/hpt27xx/os_bsd.c      optional hpt27xx
+dev/raid/hpt27xx/osm_bsd.c     optional hpt27xx
+dev/raid/hpt27xx/hpt27xx_config.c optional hpt27xx
 dev/raid/hptiop/hptiop.c       optional hptiop scbus
 dev/raid/hptmv/entry.c         optional hptmv
 dev/raid/hptmv/mv.c            optional hptmv

diff --git a/sys/config/GENERIC b/sys/config/GENERIC
index 29c969a..e9717f9 100644 (file)
--- a/sys/config/GENERIC
+++ b/sys/config/GENERIC
@@ -145,7 +145,8 @@ device              arcmsr          # Areca SATA II RAID
 device         asr             # DPT SmartRAID V, VI and Adaptec SCSI RAID
 device         ciss            # Compaq SmartRAID 5* series
 device         dpt             # DPT Smartcache - See LINT for options!
-device         hptiop          # Highpoint RocketRaid 3xxx series
+device         "hpt27xx"       # Highpoint RocketRAID 27xx series
+device         hptiop          # Highpoint RocketRAID 3xxx series
 device         hptmv           # Highpoint RocketRAID 182x
 device         hptrr           # Highpoint RocketRAID 17xx, 22xx, 23xx, 25xx
 device         iir             # Intel Integrated RAID

diff --git a/sys/config/LINT b/sys/config/LINT
index 64c12e8..81a9b4d 100644 (file)
--- a/sys/config/LINT
+++ b/sys/config/LINT
@@ -1241,6 +1241,10 @@ device           hptmv
 device         hptrr
 
 #
+# Highpoint RocketRAID 27xx.
+device         "hpt27xx"
+
+#
 # Highpoint RocketRaid 3xxx series SATA RAID
 device         hptiop
 

diff --git a/sys/config/LINT64 b/sys/config/LINT64
index da65606..62f736b 100644 (file)
--- a/sys/config/LINT64
+++ b/sys/config/LINT64
@@ -1059,6 +1059,10 @@ device           hptmv
 device         hptrr
 
 #
+# Highpoint RocketRAID 27xx.
+device         "hpt27xx"
+
+#
 # Highpoint RocketRaid 3xxx series SATA RAID
 device         hptiop
 

diff --git a/sys/config/X86_64_GENERIC b/sys/config/X86_64_GENERIC
index d122c5b..5b52b62 100644 (file)
--- a/sys/config/X86_64_GENERIC
+++ b/sys/config/X86_64_GENERIC
@@ -133,7 +133,8 @@ device              arcmsr          # Areca SATA II RAID
 device         asr             # DPT SmartRAID V, VI and Adaptec SCSI RAID
 device         ciss            # Compaq SmartRAID 5* series
 device         dpt             # DPT Smartcache - See LINT for options!
-device         hptiop          # Highpoint RocketRaid 3xxx series
+device         "hpt27xx"       # Highpoint RocketRAID 27xx series
+device         hptiop          # Highpoint RocketRAID 3xxx series
 device         hptmv           # Highpoint RocketRAID 182x
 device         hptrr           # Highpoint RocketRAID 17xx, 22xx, 23xx, 25xx
 device         iir             # Intel Integrated RAID

diff --git a/sys/dev/raid/Makefile b/sys/dev/raid/Makefile
index 3aec05e..b89ec5e 100644 (file)
--- a/sys/dev/raid/Makefile
+++ b/sys/dev/raid/Makefile
@@ -1,4 +1,4 @@
-SUBDIR=        aac amr arcmsr asr ciss hptiop hptmv hptrr \
+SUBDIR=        aac amr arcmsr asr ciss hpt27xx hptiop hptmv hptrr \
        iir ips mfi mlx mly mps pst twa twe tws vinum
 
 .include <bsd.subdir.mk>

diff --git a/sys/dev/raid/hpt27xx/Makefile b/sys/dev/raid/hpt27xx/Makefile
new file mode 100644 (file)
index 0000000..a2cf52d
--- /dev/null
+++ b/sys/dev/raid/hpt27xx/Makefile
@@ -0,0 +1,15 @@
+# $FreeBSD: src/sys/modules/hpt27xx/Makefile,v 1.2 2012/02/21 21:20:52 dim Exp $
+
+KMOD=  hpt27xx
+SRCS=  bus_if.h device_if.h pci_if.h
+SRCS+= opt_cam.h opt_scsi.h
+SRCS+= os_bsd.h os_bsd.c osm_bsd.c hpt27xx_config.c
+OBJS+= hpt27xx_lib.o
+
+hpt27xx_lib.o:
+       uudecode -p < ${.CURDIR}/$(MACHINE_ARCH)-elf.hpt27xx_lib.o.uu > ${.TARGET}
+
+.include <bsd.kmod.mk>
+
+CWARNFLAGS.osm_bsd.c=  ${NO_WFORMAT_SECURITY}
+CWARNFLAGS+=           ${CWARNFLAGS.${.IMPSRC:T}}

diff --git a/sys/dev/raid/hpt27xx/README b/sys/dev/raid/hpt27xx/README
new file mode 100644 (file)
index 0000000..405acb3
--- /dev/null
+++ b/sys/dev/raid/hpt27xx/README
@@ -0,0 +1,196 @@
+RocketRAID Controller Driver for FreeBSD
+Copyright (C) 2011 HighPoint Technologies, Inc. All rights reserved.
+
+#############################################################################
+Revision History:
+   v1.0 2011-12-27
+        First source code release
+
+#############################################################################
+
+1. Overview
+---------------------
+  This package contains FreeBSD driver source code for HighPoint RocketRAID
+  controller, include:
+  SAS Controller: RR271x, RR272x, RR274x, RR276x, RR278x.
+
+  NO WARRANTY
+
+  THE DRIVER SOURCE CODE HIGHPOINT PROVIDED IS FREE OF CHARGE, AND THERE IS
+  NO WARRANTY FOR THE PROGRAM. THERE ARE NO RESTRICTIONS ON THE USE OF THIS
+  FREE SOURCE CODE. HIGHPOINT DOES NOT PROVIDE ANY TECHNICAL SUPPORT IF THE
+  CODE HAS BEEN CHANGED FROM ORIGINAL SOURCE CODE.
+
+  LIMITATION OF LIABILITY
+
+  IN NO EVENT WILL HIGHPOINT BE LIABLE FOR DIRECT, INDIRECT, SPECIAL,
+  INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT OF THE USE OF OR
+  INABILITY TO USE THIS PRODUCT OR DOCUMENTATION, EVEN IF ADVISED OF THE
+  POSSIBILITY OF SUCH DAMAGES. IN PARTICULAR, HIGHPOINT SHALL NOT HAVE
+  LIABILITY FOR ANY HARDWARE, SOFTWARE, OR DATA STORED USED WITH THE
+  PRODUCT, INCLUDING THE COSTS OF REPAIRING, REPLACING, OR RECOVERING
+  SUCH HARDWARE, OR DATA.
+
+
+2. Rebuild the kernel with HighPoint RocketRAID support
+-----------------------------------------------
+
+  1) Install kernel source package and building tools.
+
+  2) Extract the driver files under the kernel source tree:
+
+     # cd /usr/src/sys/
+     # tar xvzf /your/path/to/hpt27xx-freebsd-src-v1.0-111227.tgz
+
+  3) Update the kernel configuration file to include the HighPoint source.
+     Assume the configure file is GENERIC, and new kernel configure file is
+     MYKERNEL:
+
+     # cd i386/conf          (or amd64/conf for AMD64)
+     # cp GENERIC MYKERNEL
+
+  4) Edit MYKERNEL, and add the following line under "RAID controllers
+     interfaced to the SCSI subsystem":
+
+          device  "hpt27xx"   #HighPoint RocketRAID
+
+  5) For i386 system, edit /usr/src/sys/conf/files.i386 and append the lines
+     shown below:
+
+          hpt27xx_lib.o optional    hpt27xx  \
+              dependency  "$S/dev/hpt27xx/i386-elf.hpt27xx_lib.o.uu" \
+              compile-with    "uudecode < $S/dev/hpt27xx/i386-elf.hpt27xx_lib.o.uu" \
+              no-implicit-rule
+
+          dev/hpt27xx/os_bsd.c      optional        hpt27xx
+          dev/hpt27xx/osm_bsd.c     optional        hpt27xx
+          dev/hpt27xx/hpt27xx_config.c      optional        hpt27xx
+
+     For amd64 system, edit /usr/src/sys/conf/files.amd64 and append the lines
+     shown below:
+
+          hpt27xx_lib.o optional    hpt27xx  \
+              dependency  "$S/dev/hpt27xx/amd64-elf.hpt27xx_lib.o.uu" \
+              compile-with    "uudecode < $S/dev/hpt27xx/amd64-elf.hpt27xx_lib.o.uu" \
+              no-implicit-rule
+
+          dev/hpt27xx/os_bsd.c      optional        hpt27xx
+          dev/hpt27xx/osm_bsd.c     optional        hpt27xx
+          dev/hpt27xx/hpt27xx_config.c      optional        hpt27xx
+
+  6) Rebuild and install the kernel:
+
+     a) for FreeBSD 5.x-i386/6.x-i386/7.x-i386/8.x-i386/9.x-i386:
+
+        # cd /usr/src/sys/i386/conf/
+        # /usr/sbin/config MYKERNEL
+        # cd ../compile/MYKERNEL/
+        # make depend
+        # make
+        # make install
+
+     b) for FreeBSD 5.x-amd64/6.x-amd64/7.x-amd64/8.x-amd64/9.x-amd64:
+
+        # cd /usr/src/sys/amd64/conf/
+        # /usr/sbin/config MYKERNEL
+        # cd ../compile/MYKERNEL/
+        # make depend
+        # make
+        # make install
+
+     c) for FreeBSD 4.x:
+
+        # cd /usr/src/sys/i386/conf/
+        # /usr/sbin/config MYKERNEL
+        # cd ../../compile/MYKERNEL/
+        # make depend
+        # make
+        # make install
+
+    If the driver was previously configured as an auto-loaded module by
+    /boot/defaults/loader.conf, please remove the entry hpt27xx_load="YES"
+    from loader.conf to prevent the driver from being loaded twice.
+
+  7) Reboot from the new kernel.
+
+
+3. Build/Load the driver as a kernel module
+------------------------------------------------
+
+  1) Install kernel source package and building tools.
+
+  2) Extract the driver files under the kernel source tree:
+
+     # cd /usr/src/sys/
+     # tar xvzf /your/path/to/hpt27xx-freebsd-src-v1.0-111227.tgz
+
+
+  4) Build the driver module:
+
+     # cd modules/hpt27xx
+     # make
+
+  5) Copy the driver module to the kernel module directory
+
+     For FreeBSD 4.x:
+
+     # cp hpt27xx.ko /modules/
+
+     For FreeBSD 5.x/6.x/7.x/8.x/9.x:
+
+     # cp hpt27xx.ko /boot/kernel/
+
+  6) Reboot and load the driver under loader prompt. e.g:
+
+        BTX loader 1.00  BTX version is 1.01
+        Console: internal video/keyboard
+        BIOS driver A: is disk0
+        BIOS driver C: is disk2
+        BIOS 636kB/74512kB available memory
+
+        FreeBSD/i386 bootstrap loader, Revision 0.8
+        (mailto:jkh@narf.osd.bsdi.com, Sat Apr 21 08:46:19 GMT 2001)
+        Loading /boot/defaults/loader.conf
+        /kernel text=0x24f1db data=0x3007ec+0x2062c -
+
+        Hit [Enter] to boot immediagely, or any other key for command prompt.
+        Booting [kernel] in 9 seconds
+
+         <-- press SPACE key here
+        Type '?' for a list of commands, 'help' for more detailed help.
+        ok load hpt27xx
+        /modules/hpt27xx.ko text=0xf571 data=0x2c8+0x254
+        ok boot
+
+     For FreeBSD 5.x/6.x/7.x/8.x/9.x, you can select 6 on the boot menu to get a loader
+     prompt.
+
+  7) You can add a below line into /boot/defaults/loader.conf to load the
+     driver automatically:
+
+           hpt27xx_load="YES"
+
+     Please refer to the installation guide in HighPoint FreeBSD driver release
+     package for more information.
+
+
+#############################################################################
+Technical support and service
+
+  If you have questions about installing or using your HighPoint product,
+  check the user's guide or readme file first, and you will find answers to
+  most of your questions here. If you need further assistance, please
+  contact us. We offer the following support and information services:
+
+  1)  The HighPoint Web Site provides information on software upgrades,
+      answers to common questions, and other topics. The Web Site is
+      available from Internet 24 hours a day, 7 days a week, at
+      http://www.highpoint-tech.com.
+
+  2)  For technical support, send e-mail to support@highpoint-tech.com
+
+  NOTE: Before you send an e-mail, please visit our Web Site
+        (http://www.highpoint-tech.com) to check if there is a new or
+        updated device driver for your system.
+
+$FreeBSD: src/sys/dev/hpt27xx/README,v 1.2 2012/01/15 13:23:33 uqs Exp $

diff --git a/sys/dev/raid/hpt27xx/array.h b/sys/dev/raid/hpt27xx/array.h
new file mode 100644 (file)
index 0000000..8c404eb
--- /dev/null
+++ b/sys/dev/raid/hpt27xx/array.h
@@ -0,0 +1,187 @@
+/*-
+ * Copyright (c) 2011 HighPoint Technologies, Inc.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * $FreeBSD: src/sys/dev/hpt27xx/array.h,v 1.1 2011/12/28 23:26:58 delphij Exp $
+ */
+
+#include <dev/raid/hpt27xx/hpt27xx_config.h>
+
+#ifndef _HPT_ARRAY_H_
+#define _HPT_ARRAY_H_
+
+#define VERMAGIC_ARRAY 46
+
+#if defined(__cplusplus)
+extern "C" {
+#endif
+
+#define MAX_ARRAY_NAME 16
+
+#ifndef MAX_MEMBERS
+#define MAX_MEMBERS    16
+#endif
+
+#if MAX_MEMBERS<=16
+typedef HPT_U16 HPT_MMASK;
+#elif MAX_MEMBERS<=32
+typedef HPT_U32 HPT_MMASK;
+#elif MAX_MEMBERS<=64
+typedef HPT_U64 HPT_MMASK;
+#else
+#error "MAX_MEMBERS too large"
+#endif
+
+#define HPT_MMASK_VALUE(x) (HPT_MMASK)((HPT_MMASK)1<<(x))
+
+#if MAX_MEMBERS<32
+#define HPT_MMASK_VALUE_SAFE(x) HPT_MMASK_VALUE(x)
+#else
+#define HPT_MMASK_VALUE_SAFE(x) ((x)>=MAX_MEMBERS? (HPT_MMASK)0 : HPT_MMASK_VALUE(x))
+#endif
+
+#define MAX_REBUILD_SECTORS 128
+
+typedef struct _RAID_FLAGS {
+       HPT_UINT rf_need_initialize : 1;
+       HPT_UINT rf_need_rebuild: 1;
+       HPT_UINT rf_need_sync: 1;
+       /* ioctl flags */
+       HPT_UINT rf_auto_rebuild: 1;
+       HPT_UINT rf_rebuilding: 1;
+       HPT_UINT rf_verifying: 1;
+       HPT_UINT rf_initializing: 1;
+       HPT_UINT rf_abort_verifying: 1;
+       HPT_UINT rf_raid15: 1;
+       HPT_UINT rf_v3_format : 1;
+       HPT_UINT rf_need_transform : 1;
+       HPT_UINT rf_transforming : 1;
+       HPT_UINT rf_abort_transform : 1;
+       HPT_UINT rf_log_write: 1;
+} RAID_FLAGS;
+
+typedef struct transform_cmd_ext
+{
+       HPT_LBA lba;
+       HPT_U16 total_sectors;
+       HPT_U16 finished_sectors;
+} TRANSFORM_CMD_EXT , *PTRANSFORM_CMD_EXT;
+
+
+#define TO_MOVE_DATA        0
+#define TO_INITIALIZE       1
+#define TO_INITIALIZE_ONLY  2
+#define TO_MOVE_DATA_ONLY   3
+typedef struct hpt_transform
+{
+       HPT_U32 stamp;
+       PVDEV source;
+       PVDEV target;
+       struct list_head link;
+       HPT_U8 transform_from_tail;
+       struct tq_item task;
+
+       struct lock_request lock;
+       TRANSFORM_CMD_EXT cmdext;
+
+       HPT_U64 transform_point;
+       HPT_U16 transform_sectors_per_step;
+       HPT_U8  operation;
+       HPT_U8  disabled;
+} HPT_TRANSFORM, *PHPT_TRANSFORM;
+
+typedef struct hpt_array
+{
+       HPT_U32 array_stamp;
+       HPT_U32 data_stamp;
+       HPT_U32 array_sn;
+
+       HPT_U8  ndisk;
+       HPT_U8  block_size_shift;
+       HPT_U16 strip_width;
+       HPT_U8  sector_size_shift; /*sector size = 512B<<sector_size_shift*/
+       HPT_U8  jid;
+       HPT_U8  reserved[2];
+
+
+       HPT_MMASK outdated_members;
+       HPT_MMASK offline_members;
+
+       PVDEV member[MAX_MEMBERS];
+
+       RAID_FLAGS flags;
+
+       HPT_U64 rebuilt_sectors;
+
+
+       HPT_U8 name[MAX_ARRAY_NAME];
+       PHPT_TRANSFORM transform;
+
+       TIME_RECORD create_time;
+       HPT_U8  description[64];
+       HPT_U8  create_manager[16];
+
+#ifdef OS_SUPPORT_TASK
+       int floating_priority;
+       OSM_TASK ioctl_task;
+       IOCTL_ARG ioctl_arg;
+
+       char ioctl_inbuf[sizeof(PVDEV)+sizeof(HPT_U64)+sizeof(HPT_U16)];
+       char ioctl_outbuf[sizeof(HPT_UINT)];
+#endif
+
+} HPT_ARRAY, *PHPT_ARRAY;
+
+#ifdef OS_SUPPORT_TASK
+void ldm_start_rebuild(struct _VDEV *pArray);
+#else
+#define ldm_start_rebuild(pArray)
+#endif
+
+typedef struct _raw_partition{
+       struct _raw_partition * next;
+       __HPT_RAW_LBA start;
+       __HPT_RAW_LBA capacity;
+       PVDEV   vd_part;
+} RAW_PARTITION, *PRAW_PARTITION;
+
+typedef struct hpt_partiton
+{
+       PVDEV raw_disk;
+       __HPT_RAW_LBA des_location;
+       PRAW_PARTITION raw_part;
+       HPT_U8  del_mbr;
+       HPT_U8  reserved[3];
+} HPT_PARTITION, *PHPT_PARTITION;
+
+void ldm_check_array_online(PVDEV pArray);
+void ldm_generic_member_failed(PVDEV member);
+void ldm_sync_array_info(PVDEV pArray);
+void ldm_sync_array_stamp(PVDEV pArray);
+void ldm_add_spare_to_array(PVDEV pArray, PVDEV spare_partition);
+
+#if defined(__cplusplus)
+}
+#endif
+#endif

diff --git a/sys/dev/raid/hpt27xx/him.h b/sys/dev/raid/hpt27xx/him.h
new file mode 100644 (file)
index 0000000..3b6d3d6
--- /dev/null
+++ b/sys/dev/raid/hpt27xx/him.h
@@ -0,0 +1,496 @@
+/*-
+ * Copyright (c) 2011 HighPoint Technologies, Inc.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * $FreeBSD: src/sys/dev/hpt27xx/him.h,v 1.1 2011/12/28 23:26:58 delphij Exp $
+ */
+
+#include <dev/raid/hpt27xx/hpt27xx_config.h>
+
+#ifndef _HPT_HIM_H_
+#define _HPT_HIM_H_
+
+#define VERMAGIC_HIM 55
+
+#if defined(__cplusplus)
+extern "C" {
+#endif
+
+#include <dev/raid/hpt27xx/list.h>
+
+#define SECTOR_TO_BYTE_SHIFT 9
+#define SECTOR_TO_BYTE(x)       ((HPT_U32)(x) << SECTOR_TO_BYTE_SHIFT)
+#define BYTE_TO_SECTOR(x)       ((x)>>SECTOR_TO_BYTE_SHIFT)
+
+typedef struct _PCI_ID
+{
+       HPT_U16 vid;
+       HPT_U16 did;
+       HPT_U32 subsys;
+       HPT_U8  rev;
+       HPT_U8  nbase;
+       HPT_U16 reserve;
+}
+PCI_ID;
+
+typedef struct _PCI_ADDRESS
+{
+       HPT_U8 tree;
+       HPT_U8 bus;
+       HPT_U8 device;
+       HPT_U8 function;
+}
+PCI_ADDRESS;
+
+typedef struct _HIM_ADAPTER_CONFIG
+{
+       PCI_ADDRESS pci_addr;
+       PCI_ID  pci_id;
+
+       HPT_U8  max_devices;
+
+       HPT_U8  bProbeInInitializing:1;
+
+       HPT_U8  bSpinupOneDevEachTime:1;
+
+       HPT_U8  bGlobalNcq:1;
+       HPT_U8  bSGPIOPartSupport:1;
+
+       HPT_U8  bNeedSASIdleTimer:1;
+       HPT_U8  reserved:3;
+
+       HPT_U8  bDevsPerBus;
+       HPT_U8  first_on_slot;
+
+       HPT_U8  bChipType;
+       HPT_U8  bChipIntrNum;
+       HPT_U8  bChipFlags;
+       HPT_U8  bNumBuses;
+
+       HPT_U8  szVendorID[36];
+       HPT_U8  szProductID[36];
+       HPT_U32 nvramSize;
+       HPT_U64 nvramAddress;
+       HPT_U8  slot_index;
+       HPT_U8  reserved2[11];
+}
+HIM_ADAPTER_CONFIG, *PHIM_ADAPTER_CONFIG;
+
+typedef struct _HIM_CHANNEL_CONFIG
+{
+       HPT_U32 io_port;
+       HPT_U32 ctl_port;
+} HIM_CHANNEL_CONFIG, *PHIM_CHANNEL_CONFIG;
+
+typedef struct _HIM_DEVICE_FLAGS
+{
+       HPT_UINT df_atapi               :1;
+       HPT_UINT df_removable_drive     :1;
+       HPT_UINT df_on_line             :1;
+       HPT_UINT df_reduce_mode         :1;
+       HPT_UINT df_sata                :1;
+       HPT_UINT df_on_pm_port          :1;
+       HPT_UINT df_support_read_ahead  :1;
+       HPT_UINT df_read_ahead_enabled  :1;
+       HPT_UINT df_support_write_cache :1;
+       HPT_UINT df_write_cache_enabled :1;
+       HPT_UINT df_cdrom_device        :1;
+       HPT_UINT df_tape_device         :1;
+       HPT_UINT df_support_tcq         :1;
+       HPT_UINT df_tcq_enabled         :1;
+       HPT_UINT df_support_ncq         :1;
+       HPT_UINT df_ncq_enabled         :1;
+       HPT_UINT df_sas                 :1;
+       HPT_UINT df_in_enclosure        :1;
+       HPT_UINT df_ssd                 :1;
+} DEVICE_FLAGS, *PDEVICE_FLAGS;
+
+#pragma pack(1)
+typedef struct _IDENTIFY_DATA {
+       HPT_U16 GeneralConfiguration;
+       HPT_U16 NumberOfCylinders;
+       HPT_U16 Reserved1;
+       HPT_U16 NumberOfHeads;
+       HPT_U16 UnformattedBytesPerTrack;
+       HPT_U16 UnformattedBytesPerSector;
+       HPT_U8  SasAddress[8];
+       HPT_U16 SerialNumber[10];
+       HPT_U16 BufferType;
+       HPT_U16 BufferSectorSize;
+       HPT_U16 NumberOfEccBytes;
+       HPT_U16 FirmwareRevision[4];
+       HPT_U16 ModelNumber[20];
+       HPT_U8  MaximumBlockTransfer;
+       HPT_U8  VendorUnique2;
+       HPT_U16 DoubleWordIo;
+       HPT_U16 Capabilities;
+       HPT_U16 Reserved2;
+       HPT_U8  VendorUnique3;
+       HPT_U8  PioCycleTimingMode;
+       HPT_U8  VendorUnique4;
+       HPT_U8  DmaCycleTimingMode;
+       HPT_U16 TranslationFieldsValid;
+       HPT_U16 NumberOfCurrentCylinders;
+       HPT_U16 NumberOfCurrentHeads;
+       HPT_U16 CurrentSectorsPerTrack;
+       HPT_U32 CurrentSectorCapacity;
+       HPT_U16 CurrentMultiSectorSetting;
+       HPT_U32 UserAddressableSectors;
+       HPT_U8  SingleWordDMASupport;
+       HPT_U8  SingleWordDMAActive;
+       HPT_U8  MultiWordDMASupport;
+       HPT_U8  MultiWordDMAActive;
+       HPT_U8  AdvancedPIOModes;
+       HPT_U8  Reserved4;
+       HPT_U16 MinimumMWXferCycleTime;
+       HPT_U16 RecommendedMWXferCycleTime;
+       HPT_U16 MinimumPIOCycleTime;
+       HPT_U16 MinimumPIOCycleTimeIORDY;
+       HPT_U16 Reserved5[2];
+       HPT_U16 ReleaseTimeOverlapped;
+       HPT_U16 ReleaseTimeServiceCommand;
+       HPT_U16 MajorRevision;
+       HPT_U16 MinorRevision;
+       HPT_U16 MaxQueueDepth;
+       HPT_U16 SataCapability;
+       HPT_U16 Reserved6[9];
+       HPT_U16 CommandSupport;
+       HPT_U16 CommandEnable;
+       HPT_U16 UtralDmaMode;
+       HPT_U16 Reserved7[11];
+       HPT_U32 Lba48BitLow;
+       HPT_U32 Lba48BitHigh;
+       HPT_U16 Reserved8[23];
+       HPT_U16 SpecialFunctionsEnabled;
+       HPT_U16 Reserved9[128];
+}
+#ifdef __GNUC__
+__attribute__((packed))
+#endif
+IDENTIFY_DATA, *PIDENTIFY_DATA;
+#pragma pack()
+
+typedef struct _HIM_DEVICE_CONFIG
+{
+       HPT_U64 capacity;
+
+       DEVICE_FLAGS flags;
+
+       HPT_U8  path_id;
+       HPT_U8  target_id;
+       HPT_U8  max_queue_depth;
+       HPT_U8  spin_up_mode;
+
+       HPT_U8  reserved;
+       HPT_U8  transfer_mode;
+       HPT_U8  bMaxShowMode;
+       HPT_U8  bDeUsable_Mode;
+
+       HPT_U16 max_sectors_per_cmd;
+
+       PIDENTIFY_DATA pIdentifyData;
+
+
+       HPT_U8  fixed_path_id; /*equals to phy id */
+}
+HIM_DEVICE_CONFIG, *PHIM_DEVICE_CONFIG;
+
+
+#define _DIT_MODE               0
+#define _DIT_601                1
+#define _DIT_READ_AHEAD         2
+#define _DIT_WRITE_CACHE        3
+#define _DIT_TCQ                4
+#define _DIT_NCQ                5
+#define _DIT_BEEP_OFF           6
+#define _DIT_SPIN_UP_MODE       7
+#define _DIT_IDLE_STANDBY       8
+#define _DIT_IDENTIFY           9
+
+#define SPIN_UP_MODE_NOSUPPORT 0
+#define SPIN_UP_MODE_FULL      1
+#define SPIN_UP_MODE_STANDBY   2
+
+struct tcq_control {
+       HPT_U8 enable;
+       HPT_U8 depth;
+};
+
+struct ncq_control {
+       HPT_U8 enable;
+       HPT_U8 depth;
+};
+
+typedef struct _HIM_ALTERABLE_DEV_INFO{
+       HPT_U8 type;
+       union {
+               HPT_U8 mode;
+               HPT_U8 enable_read_ahead;
+               HPT_U8 enable_read_cache;
+               HPT_U8 enable_write_cache;
+               struct tcq_control tcq;
+               struct ncq_control ncq;
+               void * adapter;
+               HPT_U8 spin_up_mode;
+               HPT_U8 idle_standby_timeout;
+               HPT_U8 identify_indicator;
+       }u;
+} HIM_ALTERABLE_DEV_INFO, *PHIM_ALTERABLE_DEV_INFO;
+
+struct _COMMAND;
+struct _IOCTL_ARG;
+
+typedef void (*PROBE_CALLBACK)(void *arg, void *dev, int index);
+
+typedef struct _HIM {
+       char *name;
+       struct _HIM *next;
+       HPT_UINT max_sg_descriptors;
+       #define _HIM_INTERFACE(_type, _fn, _args) _type (* _fn) _args;
+       #include <dev/raid/hpt27xx/himfuncs.h>
+}
+HIM, *PHIM;
+
+
+#pragma pack(1)
+#ifdef SG_FLAG_EOT
+#error "don't use SG_FLAG_EOT with _SG.eot. clean the code!"
+#endif
+
+typedef struct _SG {
+       HPT_U32 size;
+       HPT_UINT eot;
+       union {
+               HPT_U8 FAR * _logical;
+               BUS_ADDRESS bus;
+       }
+       addr;
+}
+SG, *PSG;
+#pragma pack()
+
+typedef struct _AtaCommand
+{
+    HPT_U64     Lba;
+    HPT_U16     nSectors;
+    HPT_U16     pad;
+} AtaComm, *PAtaComm;
+
+#define ATA_CMD_NOP          0x0
+
+#define ATA_CMD_SET_FEATURES    0xef
+#define ATA_CMD_FLUSH           0xE7
+#define ATA_CMD_VERIFY          0x40
+#define ATA_CMD_STANDBY         0xe2
+#define ATA_CMD_READ_MULTI      0xC4
+#define ATA_CMD_READ_MULTI_EXT  0x29
+#define ATA_CMD_WRITE_MULTI     0xC5
+#define ATA_CMD_WRITE_MULTI_EXT 0x39
+#define ATA_CMD_WRITE_MULTI_FUA_EXT     0xCE
+
+#define ATA_CMD_READ_DMA        0xc8  /* IDE DMA read command           */
+#define ATA_CMD_WRITE_DMA       0xca  /* IDE DMA write command          */
+#define ATA_CMD_READ_DMA_EXT        0x25
+#define ATA_CMD_READ_QUEUE_EXT      0x26
+#define ATA_CMD_READ_MAX_ADDR       0x27
+#define ATA_CMD_READ_EXT            0x24
+#define ATA_CMD_VERIFY_EXT          0x42
+#define ATA_CMD_WRITE_DMA_EXT       0x35
+#define ATA_CMD_WRITE_QUEUE_EXT     0x36
+#define ATA_CMD_WRITE_EXT           0x34
+
+#define ATA_SET_FEATURES_XFER 0x3
+#define ATA_SECTOR_SIZE 512
+
+typedef struct _PassthroughCmd {
+       HPT_U16    bFeaturesReg;
+       HPT_U16    bSectorCountReg;
+       HPT_U16    bLbaLowReg;
+       HPT_U16    bLbaMidReg;
+       HPT_U16    bLbaHighReg;
+       HPT_U8     bDriveHeadReg;
+       HPT_U8     bCommandReg;
+       HPT_U16    nSectors;
+       HPT_U8    *pDataBuffer;
+}
+PassthroughCmd;
+
+typedef struct _ScsiComm {
+       HPT_U8  cdbLength;
+       HPT_U8  senseLength;
+       HPT_U8  scsiStatus;
+       HPT_U8  reserve1;
+       HPT_U32 dataLength;
+       HPT_U8 *cdb;
+       HPT_U8 *senseBuffer;
+}
+ScsiComm;
+
+
+#define CTRL_CMD_REBUILD 1
+#define CTRL_CMD_VERIFY  2
+#define CTRL_CMD_INIT    3
+
+
+typedef struct _R5ControlCmd {
+       HPT_U64  StripeLine;
+       HPT_U16 Offset;
+       HPT_U8  Command;
+       HPT_U8  reserve1;
+}
+R5ControlCmd, *PR5ControlCmd;
+
+typedef struct _HPT_ADDRESS
+{
+       HPT_U8 * logical;
+       BUS_ADDRESS bus;
+}
+HPT_ADDRESS;
+
+
+typedef struct ctl_pages {
+       HPT_ADDRESS *pages;
+       HPT_UINT        page_size;
+       HPT_UINT        npages;
+       HPT_UINT min_sg_descriptors;
+} CONTROL_PAGES, *PCONTROL_PAGES;
+
+typedef struct _R1ControlCmd {
+       HPT_U64  Lba;
+       HPT_U16 nSectors;
+       HPT_U8  Command;      /* CTRL_CMD_XXX */
+       HPT_U8  reserve1;
+       PCONTROL_PAGES ctl_pages;
+}
+R1ControlCmd, *PR1ControlCmd;
+
+typedef void (*TQ_PROC)(void *arg);
+
+struct tq_item {
+       TQ_PROC proc;
+       void *arg;
+       struct tq_item *next;
+};
+
+#define INIT_TQ_ITEM(t, p, a) \
+       do { (t)->proc = p; (t)->arg = a; (t)->next = 0; } while (0)
+
+typedef struct _COMMAND
+{
+
+       struct _VBUS * vbus;
+
+       struct freelist *grplist;
+       HPT_UINT grpcnt;
+
+
+       struct list_head q_link;
+       struct tq_item done_dpc;
+
+       HPT_UINT extsize;
+       void *ext;
+
+
+
+       void *target;
+       void *priv;
+       HPT_UPTR priv2;
+
+       int priority;
+       struct lock_request *owned_lock;
+       struct lock_request *lock_req;
+       void (*dtor)(struct _COMMAND *, void *);
+       void *dtor_arg;
+
+       union{
+               AtaComm Ide;
+               PassthroughCmd Passthrough;
+               ScsiComm Scsi;
+               R5ControlCmd R5Control;
+               R1ControlCmd R1Control;
+       } uCmd;
+
+       HPT_U8 type; /* CMD_TYPE_* */
+
+       struct {
+               HPT_U8  physical_sg: 1;
+               HPT_U8  data_in: 1;
+               HPT_U8  data_out: 1;
+               HPT_U8  transform : 1;
+               HPT_U8  hard_flush: 2;
+               HPT_U8  from_cc: 1;
+               HPT_U8  force_cc: 1;
+       } flags;
+
+       /* return status */
+       HPT_U8  Result;
+       /* retry count */
+       HPT_U8  RetryCount;
+
+
+       PSG psg;
+
+
+       int  (*buildsgl)(struct _COMMAND *cmd, PSG psg, int logical);
+       void (*done)(struct _COMMAND *cmd);
+}
+COMMAND, *PCOMMAND;
+
+/* command types */
+#define   CMD_TYPE_IO           0
+#define   CMD_TYPE_CONTROL      1
+#define   CMD_TYPE_ATAPI        2
+#define   CMD_TYPE_SCSI         CMD_TYPE_ATAPI
+#define   CMD_TYPE_PASSTHROUGH  3
+#define   CMD_TYPE_FLUSH        4
+#define   CMD_TYPE_IO_INDIRECT  0x80
+
+/* flush command flags */
+#define   CF_HARD_FLUSH_CACHE   1
+#define   CF_HARD_FLUSH_STANDBY 2
+
+/* command return values */
+#define   RETURN_PENDING             0
+#define   RETURN_SUCCESS             1
+#define   RETURN_BAD_DEVICE          2
+#define   RETURN_BAD_PARAMETER       3
+#define   RETURN_WRITE_NO_DRQ        4
+#define   RETURN_DEVICE_BUSY         5
+#define   RETURN_INVALID_REQUEST     6
+#define   RETURN_SELECTION_TIMEOUT   7
+#define   RETURN_IDE_ERROR           8
+#define   RETURN_NEED_LOGICAL_SG     9
+#define   RETURN_NEED_PHYSICAL_SG    10
+#define   RETURN_RETRY               11
+#define   RETURN_DATA_ERROR          12
+#define   RETURN_BUS_RESET           13
+#define   RETURN_BAD_TRANSFER_LENGTH 14
+#define   RETURN_INSUFFICIENT_MEMORY 15
+#define   RETURN_SECTOR_ERROR        16
+#define   RETURN_NEED_SPINUP         17
+
+#if defined(__cplusplus)
+}
+#endif
+#endif

diff --git a/sys/dev/raid/hpt27xx/himfuncs.h b/sys/dev/raid/hpt27xx/himfuncs.h
new file mode 100644 (file)
index 0000000..d9952a7
--- /dev/null
+++ b/sys/dev/raid/hpt27xx/himfuncs.h
@@ -0,0 +1,107 @@
+/*-
+ * Copyright (c) 2011 HighPoint Technologies, Inc.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * $FreeBSD: src/sys/dev/hpt27xx/himfuncs.h,v 1.1 2011/12/28 23:26:58 delphij Exp $
+ */
+
+#include <dev/raid/hpt27xx/hpt27xx_config.h>
+/*
+ * define _HIM_INTERFACE before include this file, and
+ * undef it after include this file.
+ */
+
+
+#ifndef _HIM_INTERFACE
+#error "you must define _HIM_INTERFACE before this file"
+#endif
+
+_HIM_INTERFACE(HPT_BOOL, get_supported_device_id, (int index, PCI_ID *id))
+
+_HIM_INTERFACE(HPT_U8, get_controller_count, (PCI_ID *id, HPT_U8 *reached, PCI_ADDRESS *addr))
+
+
+_HIM_INTERFACE(HPT_UINT, get_adapter_size, (const PCI_ID *id))
+
+
+_HIM_INTERFACE(HPT_BOOL, create_adapter, (const PCI_ID *id, PCI_ADDRESS pciAddress, void *adapter, void *osext))
+
+_HIM_INTERFACE(void, get_adapter_config, (void *adapter, HIM_ADAPTER_CONFIG *config))
+
+_HIM_INTERFACE(HPT_BOOL, get_meminfo, (void *adapter))
+
+
+_HIM_INTERFACE(HPT_BOOL, adapter_on_same_vbus, (void *adapter1, void *adapter2))
+_HIM_INTERFACE(void, route_irq, (void *adapter, HPT_BOOL enable))
+
+
+_HIM_INTERFACE(HPT_BOOL, initialize, (void *adapter))
+
+
+_HIM_INTERFACE(HPT_UINT, get_device_size, (void *adapter))
+
+
+_HIM_INTERFACE(HPT_BOOL, probe_device, (void *adapter, int index, void *devhandle, PROBE_CALLBACK done, void *arg))
+_HIM_INTERFACE(void *, get_device, (void *adapter, int index))
+_HIM_INTERFACE(void, get_device_config, (void *dev, HIM_DEVICE_CONFIG *config))
+_HIM_INTERFACE(void, remove_device, (void *dev))
+
+_HIM_INTERFACE(void, reset_device, (void * dev, void (*done)(void *arg), void *arg))
+
+
+_HIM_INTERFACE(HPT_U32, get_cmdext_size, (void))
+
+_HIM_INTERFACE(void, queue_cmd, (void *dev, struct _COMMAND *cmd))
+
+
+_HIM_INTERFACE(int, read_write, (void *dev,HPT_LBA lba, HPT_U16 nsector, HPT_U8 *buffer, HPT_BOOL read))
+
+_HIM_INTERFACE(HPT_BOOL, intr_handler, (void *adapter))
+_HIM_INTERFACE(HPT_BOOL, intr_control, (void * adapter, HPT_BOOL enable))
+
+
+_HIM_INTERFACE(int, get_channel_config, (void * adapter, int index, PHIM_CHANNEL_CONFIG pInfo))
+_HIM_INTERFACE(int, set_device_info, (void * dev, PHIM_ALTERABLE_DEV_INFO pInfo))
+_HIM_INTERFACE(void, unplug_device, (void * dev))
+
+
+_HIM_INTERFACE(void, shutdown, (void *adapter))
+_HIM_INTERFACE(void, suspend, (void *adapter))
+_HIM_INTERFACE(void, resume, (void *adapter))
+_HIM_INTERFACE(void, release_adapter, (void *adapter))
+
+/*called after ldm_register_adapter*/
+_HIM_INTERFACE(HPT_BOOL, verify_adapter, (void *adapter))
+
+/* (optional) */
+_HIM_INTERFACE(void, ioctl, (void * adapter, struct _IOCTL_ARG *arg))
+_HIM_INTERFACE(int, compare_slot_seq, (void *adapter1, void *adapter2))
+_HIM_INTERFACE(int, get_enclosure_count, (void *adapter))
+_HIM_INTERFACE(int, get_enclosure_info, (void *adapter, int id, void *pinfo))
+_HIM_INTERFACE(int, get_enclosure_info_v2, (void *adapter, int id, void *pinfo))
+_HIM_INTERFACE(int, get_enclosure_info_v3, (void *adapter, int id, void *pinfo))
+
+_HIM_INTERFACE(HPT_BOOL, flash_access, (void *adapter, HPT_U32 offset, void *value, int size, HPT_BOOL reading))
+
+#undef _HIM_INTERFACE

diff --git a/sys/dev/raid/hpt27xx/hpt27xx_config.c b/sys/dev/raid/hpt27xx/hpt27xx_config.c
new file mode 100644 (file)
index 0000000..7b9e2fe
--- /dev/null
+++ b/sys/dev/raid/hpt27xx/hpt27xx_config.c
@@ -0,0 +1,67 @@
+/*-
+ * Copyright (c) 2011 HighPoint Technologies, Inc.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * $FreeBSD: src/sys/dev/hpt27xx/hpt27xx_config.c,v 1.1 2011/12/28 23:26:58 delphij Exp $
+ */
+
+#include <dev/raid/hpt27xx/hpt27xx_config.h>
+/****************************************************************************
+ * config.c - auto-generated file
+ ****************************************************************************/
+#include <dev/raid/hpt27xx/os_bsd.h>
+
+extern int init_module_him_rr2720(void);
+extern int init_module_him_rr273x(void);
+extern int init_module_him_rr276x(void);
+extern int init_module_him_rr278x(void);
+extern int init_module_vdev_raw(void);
+extern int init_module_partition(void);
+extern int init_module_raid0(void);
+extern int init_module_raid1(void);
+extern int init_module_raid5(void);
+extern int init_module_jbod(void);
+
+int init_config(void)
+{
+       init_module_him_rr2720();
+       init_module_him_rr273x();
+       init_module_him_rr276x();
+       init_module_him_rr278x();
+       init_module_vdev_raw();
+       init_module_partition();
+       init_module_raid0();
+       init_module_raid1();
+       init_module_raid5();
+       init_module_jbod();
+       return 0;
+}
+
+char driver_name[] = "hpt27xx";
+char driver_name_long[] = "RocketRAID 27xx controller driver";
+char driver_ver[] = "v1.0 (" __DATE__ " " __TIME__ ")";
+int  osm_max_targets = 0xff;
+
+
+int os_max_cache_size = 0x1000000;

diff --git a/sys/dev/raid/hpt27xx/hpt27xx_config.h b/sys/dev/raid/hpt27xx/hpt27xx_config.h
new file mode 100644 (file)
index 0000000..52f8a13
--- /dev/null
+++ b/sys/dev/raid/hpt27xx/hpt27xx_config.h
@@ -0,0 +1,155 @@
+/*-
+ * Copyright (c) 2011 HighPoint Technologies, Inc.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * $FreeBSD: src/sys/dev/hpt27xx/hpt27xx_config.h,v 1.1 2011/12/28 23:26:58 delphij Exp $
+ */
+
+#ifndef hpt27xx_CONFIG_H
+#define hpt27xx_CONFIG_H
+#define SUPPORT_ARRAY
+#define __KERNEL__ 1
+#define DRIVER_MINOR 16
+#define TARGETNAME hpt27xx
+#define __dummy_reg hpt27xx___dummy_reg
+#define __ldm_alloc_cmd hpt27xx___ldm_alloc_cmd
+#define delay_between_spinup hpt27xx_delay_between_spinup
+#define dmapool_active hpt27xx_dmapool_active
+#define dmapool_get_page hpt27xx_dmapool_get_page
+#define dmapool_get_page_at hpt27xx_dmapool_get_page_at
+#define dmapool_init hpt27xx_dmapool_init
+#define dmapool_make_order hpt27xx_dmapool_make_order
+#define dmapool_max_class_pages hpt27xx_dmapool_max_class_pages
+#define dmapool_put_page hpt27xx_dmapool_put_page
+#define dmapool_register_client hpt27xx_dmapool_register_client
+#define driver_name hpt27xx_driver_name
+#define driver_name_long hpt27xx_driver_name_long
+#define driver_ver hpt27xx_driver_ver
+#define freelist_get hpt27xx_freelist_get
+#define freelist_get_dma hpt27xx_freelist_get_dma
+#define freelist_put hpt27xx_freelist_put
+#define freelist_put_dma hpt27xx_freelist_put_dma
+#define freelist_reserve hpt27xx_freelist_reserve
+#define freelist_reserve_dma hpt27xx_freelist_reserve_dma
+#define gGlobalNcqFlag hpt27xx_gGlobalNcqFlag
+#define gProbeInInitializing hpt27xx_gProbeInInitializing
+#define gSGPIOPartSupport hpt27xx_gSGPIOPartSupport
+#define gSpinupOneDevEachTime hpt27xx_gSpinupOneDevEachTime
+#define g_legacy_mode hpt27xx_g_legacy_mode
+#define gautorebuild hpt27xx_gautorebuild
+#define grebuildpriority hpt27xx_grebuildpriority
+#define him_handle_to_vbus hpt27xx_him_handle_to_vbus
+#define him_list hpt27xx_him_list
+#define init_config hpt27xx_init_config
+#define init_module_him_rr2720 hpt27xx_init_module_him_rr2720
+#define init_module_him_rr273x hpt27xx_init_module_him_rr273x
+#define init_module_him_rr276x hpt27xx_init_module_him_rr276x
+#define init_module_him_rr278x hpt27xx_init_module_him_rr278x
+#define init_module_jbod hpt27xx_init_module_jbod
+#define init_module_partition hpt27xx_init_module_partition
+#define init_module_raid0 hpt27xx_init_module_raid0
+#define init_module_raid1 hpt27xx_init_module_raid1
+#define init_module_raid5 hpt27xx_init_module_raid5
+#define init_module_vdev_raw hpt27xx_init_module_vdev_raw
+#define ldm_acquire_lock hpt27xx_ldm_acquire_lock
+#define ldm_add_spare_to_array hpt27xx_ldm_add_spare_to_array
+#define ldm_alloc_cmds_R_6_55_75_46_64 hpt27xx_ldm_alloc_cmds_R_6_55_75_46_64
+#define ldm_alloc_cmds_from_list hpt27xx_ldm_alloc_cmds_from_list
+#define ldm_check_array_online hpt27xx_ldm_check_array_online
+#define ldm_create_vbus hpt27xx_ldm_create_vbus
+#define ldm_create_vdev hpt27xx_ldm_create_vdev
+#define ldm_event_notify hpt27xx_ldm_event_notify
+#define ldm_find_stamp hpt27xx_ldm_find_stamp
+#define ldm_find_target hpt27xx_ldm_find_target
+#define ldm_finish_cmd hpt27xx_ldm_finish_cmd
+#define ldm_free_cmds hpt27xx_ldm_free_cmds
+#define ldm_free_cmds_to_list hpt27xx_ldm_free_cmds_to_list
+#define ldm_generic_member_failed hpt27xx_ldm_generic_member_failed
+#define ldm_get_cmd_size hpt27xx_ldm_get_cmd_size
+#define ldm_get_device_id hpt27xx_ldm_get_device_id
+#define ldm_get_mem_info hpt27xx_ldm_get_mem_info
+#define ldm_get_next_vbus hpt27xx_ldm_get_next_vbus
+#define ldm_get_vbus_ext hpt27xx_ldm_get_vbus_ext
+#define ldm_get_vbus_size hpt27xx_ldm_get_vbus_size
+#define ldm_ide_fixstring hpt27xx_ldm_ide_fixstring
+#define ldm_idle hpt27xx_ldm_idle
+#define ldm_initialize_vbus_async hpt27xx_ldm_initialize_vbus_async
+#define ldm_intr hpt27xx_ldm_intr
+#define ldm_ioctl hpt27xx_ldm_ioctl
+#define ldm_on_timer hpt27xx_ldm_on_timer
+#define ldm_queue_cmd hpt27xx_ldm_queue_cmd
+#define ldm_queue_task hpt27xx_ldm_queue_task
+#define ldm_queue_vbus_dpc hpt27xx_ldm_queue_vbus_dpc
+#define ldm_register_adapter hpt27xx_ldm_register_adapter
+#define ldm_register_device hpt27xx_ldm_register_device
+#define ldm_register_him_R_6_55_75_46_64 hpt27xx_ldm_register_him_R_6_55_75_46_64
+#define ldm_register_vdev_class_R_6_55_75_46_64 hpt27xx_ldm_register_vdev_class_R_6_55_75_46_64
+#define ldm_release_lock hpt27xx_ldm_release_lock
+#define ldm_release_vbus hpt27xx_ldm_release_vbus
+#define ldm_release_vdev hpt27xx_ldm_release_vdev
+#define ldm_remove_timer hpt27xx_ldm_remove_timer
+#define ldm_request_timer hpt27xx_ldm_request_timer
+#define ldm_reset_vbus hpt27xx_ldm_reset_vbus
+#define ldm_resume hpt27xx_ldm_resume
+#define ldm_run hpt27xx_ldm_run
+#define ldm_set_autorebuild hpt27xx_ldm_set_autorebuild
+#define ldm_shutdown hpt27xx_ldm_shutdown
+#define ldm_suspend hpt27xx_ldm_suspend
+#define ldm_sync_array_info hpt27xx_ldm_sync_array_info
+#define ldm_sync_array_stamp hpt27xx_ldm_sync_array_stamp
+#define ldm_timer_probe_device hpt27xx_ldm_timer_probe_device
+#define ldm_unregister_device hpt27xx_ldm_unregister_device
+#define log_sector_repair hpt27xx_log_sector_repair
+#define num_drives_per_spinup hpt27xx_num_drives_per_spinup
+#define os_get_stamp hpt27xx_os_get_stamp
+#define os_get_vbus_seq hpt27xx_os_get_vbus_seq
+#define os_inb hpt27xx_os_inb
+#define os_inl hpt27xx_os_inl
+#define os_insw hpt27xx_os_insw
+#define os_inw hpt27xx_os_inw
+#define os_map_pci_bar hpt27xx_os_map_pci_bar
+#define os_max_cache_size hpt27xx_os_max_cache_size
+#define os_outb hpt27xx_os_outb
+#define os_outl hpt27xx_os_outl
+#define os_outsw hpt27xx_os_outsw
+#define os_outw hpt27xx_os_outw
+#define os_pci_readb hpt27xx_os_pci_readb
+#define os_pci_readl hpt27xx_os_pci_readl
+#define os_pci_readw hpt27xx_os_pci_readw
+#define os_pci_writeb hpt27xx_os_pci_writeb
+#define os_pci_writel hpt27xx_os_pci_writel
+#define os_pci_writew hpt27xx_os_pci_writew
+#define os_printk hpt27xx_os_printk
+#define os_query_remove_device hpt27xx_os_query_remove_device
+#define os_query_time hpt27xx_os_query_time
+#define os_request_timer hpt27xx_os_request_timer
+#define os_revalidate_device hpt27xx_os_revalidate_device
+#define os_schedule_task hpt27xx_os_schedule_task
+#define os_stallexec hpt27xx_os_stallexec
+#define os_unmap_pci_bar hpt27xx_os_unmap_pci_bar
+#define osm_max_targets hpt27xx_osm_max_targets
+#define pcicfg_read_dword hpt27xx_pcicfg_read_dword
+#define vbus_list hpt27xx_vbus_list
+#define vdev_queue_cmd hpt27xx_vdev_queue_cmd
+#endif

diff --git a/sys/dev/raid/hpt27xx/hptintf.h b/sys/dev/raid/hpt27xx/hptintf.h
new file mode 100644 (file)
index 0000000..1e0603d
--- /dev/null
+++ b/sys/dev/raid/hpt27xx/hptintf.h
@@ -0,0 +1,2112 @@
+/*-
+ * Copyright (c) 2011 HighPoint Technologies, Inc.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * $FreeBSD: src/sys/dev/hpt27xx/hptintf.h,v 1.1 2011/12/28 23:26:58 delphij Exp $
+ */
+
+#include <dev/raid/hpt27xx/hpt27xx_config.h>
+
+#ifndef HPT_INTF_H
+#define HPT_INTF_H
+
+#if defined(__BIG_ENDIAN__)&&!defined(__BIG_ENDIAN_BITFIELD)
+#define __BIG_ENDIAN_BITFIELD
+#endif
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#ifndef __GNUC__
+#define __attribute__(x)
+#endif
+
+#pragma pack(1)
+
+/*
+ * Version of this interface.
+ * The user mode application must first issue a hpt_get_version() call to
+ * check HPT_INTERFACE_VERSION. When an utility using newer version interface
+ * is used with old version drivers, it must call only the functions that
+ * driver supported.
+ * A new version interface should only add ioctl functions; it should implement
+ * all old version functions without change their definition.
+ */
+#define __this_HPT_INTERFACE_VERSION 0x02010000
+
+#ifndef HPT_INTERFACE_VERSION
+#error "You must define HPT_INTERFACE_VERSION you implemented"
+#endif
+
+#if HPT_INTERFACE_VERSION > __this_HPT_INTERFACE_VERSION
+#error "HPT_INTERFACE_VERSION is invalid"
+#endif
+
+/*
+ * DEFINITION
+ *   Logical device  --- a device that can be accessed by OS.
+ *   Physical device --- device attached to the controller.
+ *  A logical device can be simply a physical device.
+ *
+ * Each logical and physical device has a 32bit ID. GUI will use this ID
+ * to identify devices.
+ *   1. The ID must be unique.
+ *   2. The ID must be immutable. Once an ID is assigned to a device, it
+ * must not change when system is running and the device exists.
+ *   3. The ID of logical device must be NOT reusable. If a device is
+ * removed, other newly created logical device must not use the same ID.
+ *   4. The ID must not be zero or 0xFFFFFFFF.
+ */
+typedef HPT_U32 DEVICEID;
+
+/*
+ * logical device type.
+ * Identify array (logical device) and physical device.
+ */
+#define LDT_ARRAY   1
+#define LDT_DEVICE  2
+
+/*
+ * Array types
+ * GUI will treat all array as 1-level RAID. No RAID0/1 or RAID1/0.
+ * A RAID0/1 device is type AT_RAID1. A RAID1/0 device is type AT_RAID0.
+ * Their members may be another array of type RAID0 or RAID1.
+ */
+#define AT_UNKNOWN  0
+#define AT_RAID0    1
+#define AT_RAID1    2
+#define AT_RAID5    3
+#define AT_RAID6    4
+#define AT_RAID3    5
+#define AT_RAID4    6
+#define AT_JBOD     7
+#define AT_RAID1E   8
+
+/*
+ * physical device type
+ */
+#define PDT_UNKNOWN     0
+#define PDT_HARDDISK    1
+#define PDT_CDROM       2
+#define PDT_TAPE        3
+
+/*
+ * Some constants.
+ */
+#define MAX_NAME_LENGTH     36
+#define MAX_ARRAYNAME_LEN   16
+
+#define MAX_ARRAY_MEMBERS_V1 8
+
+#ifndef MAX_ARRAY_MEMBERS_V2
+#define MAX_ARRAY_MEMBERS_V2 16
+#endif
+
+#ifndef MAX_ARRAY_MEMBERS_V3
+#define MAX_ARRAY_MEMBERS_V3 64
+#endif
+
+/* keep definition for source code compatiblity */
+#define MAX_ARRAY_MEMBERS MAX_ARRAY_MEMBERS_V1
+
+/*
+ * io commands
+ * GUI use these commands to do IO on logical/physical devices.
+ */
+#define IO_COMMAND_READ     1
+#define IO_COMMAND_WRITE    2
+
+
+
+/*
+ * array flags
+ */
+#define ARRAY_FLAG_DISABLED         0x00000001 /* The array is disabled */
+#define ARRAY_FLAG_NEEDBUILDING     0x00000002 /* array data need to be rebuilt */
+#define ARRAY_FLAG_REBUILDING       0x00000004 /* array is in rebuilding process */
+#define ARRAY_FLAG_BROKEN           0x00000008 /* broken but may still working */
+#define ARRAY_FLAG_BOOTDISK         0x00000010 /* array has a active partition */
+
+#define ARRAY_FLAG_BOOTMARK         0x00000040 /* array has boot mark set */
+#define ARRAY_FLAG_NEED_AUTOREBUILD 0x00000080 /* auto-rebuild should start */
+#define ARRAY_FLAG_VERIFYING        0x00000100 /* is being verified */
+#define ARRAY_FLAG_INITIALIZING     0x00000200 /* is being initialized */
+#define ARRAY_FLAG_TRANSFORMING     0x00000400 /* tranform in progress */
+#define ARRAY_FLAG_NEEDTRANSFORM    0x00000800 /* array need tranform */
+#define ARRAY_FLAG_NEEDINITIALIZING 0x00001000 /* the array's initialization hasn't finished*/
+#define ARRAY_FLAG_BROKEN_REDUNDANT 0x00002000 /* broken but redundant (raid6) */
+#define ARRAY_FLAG_RAID15PLUS       0x80000000 /* display this RAID 1 as RAID 1.5 */
+/*
+ * device flags
+ */
+#define DEVICE_FLAG_DISABLED        0x00000001 /* device is disabled */
+#define DEVICE_FLAG_BOOTDISK        0x00000002 /* disk has a active partition */
+#define DEVICE_FLAG_BOOTMARK        0x00000004 /* disk has boot mark set */
+#define DEVICE_FLAG_WITH_601        0x00000008 /* has HPT601 connected */
+#define DEVICE_FLAG_SATA            0x00000010 /* SATA or SAS device */
+#define DEVICE_FLAG_ON_PM_PORT      0x00000020 /* PM port */
+#define DEVICE_FLAG_SAS             0x00000040 /* SAS device */
+#define DEVICE_FLAG_IN_ENCLOSURE    0x00000080 /* PathId is enclosure# */
+#define DEVICE_FLAG_UNINITIALIZED   0x00010000 /* device is not initialized, can't be used to create array */
+#define DEVICE_FLAG_LEGACY          0x00020000 /* single disk & mbr contains at least one partition */
+
+#define DEVICE_FLAG_IS_SPARE        0x80000000 /* is a spare disk */
+
+/*
+ * array states used by hpt_set_array_state()
+ */
+/* old defines */
+#define MIRROR_REBUILD_START    1
+#define MIRROR_REBUILD_ABORT    2
+#define MIRROR_REBUILD_COMPLETE 3
+/* new defines */
+#define AS_REBUILD_START 1
+#define AS_REBUILD_ABORT 2
+#define AS_REBUILD_PAUSE AS_REBUILD_ABORT
+#define AS_REBUILD_COMPLETE 3
+#define AS_VERIFY_START 4
+#define AS_VERIFY_ABORT 5
+#define AS_VERIFY_COMPLETE 6
+#define AS_INITIALIZE_START 7
+#define AS_INITIALIZE_ABORT 8
+#define AS_INITIALIZE_COMPLETE 9
+#define AS_VERIFY_FAILED 10
+#define AS_REBUILD_STOP 11
+#define AS_SAVE_STATE   12
+#define AS_TRANSFORM_START 13
+#define AS_TRANSFORM_ABORT 14
+
+/************************************************************************
+ * ioctl code
+ * It would be better if ioctl code are the same on different platforms,
+ * but we must not conflict with system defined ioctl code.
+ ************************************************************************/
+#if defined(LINUX) || defined(__DragonFly__) || defined(linux)
+#define HPT_CTL_CODE(x) (x+0xFF00)
+#define HPT_CTL_CODE_LINUX_TO_IOP(x) ((x)-0xff00)
+#elif defined(_MS_WIN32_) || defined(WIN32)
+
+#ifndef CTL_CODE
+#define CTL_CODE( DeviceType, Function, Method, Access ) \
+                       (((DeviceType) << 16) | ((Access) << 14) | ((Function) << 2) | (Method))
+#endif
+#define HPT_CTL_CODE(x) CTL_CODE(0x370, 0x900+(x), 0, 0)
+#define HPT_CTL_CODE_WIN32_TO_IOP(x) ((((x) & 0xffff)>>2)-0x900)
+
+#else
+#define HPT_CTL_CODE(x) (x)
+#endif
+
+#define HPT_IOCTL_GET_VERSION               HPT_CTL_CODE(0)
+#define HPT_IOCTL_GET_CONTROLLER_COUNT      HPT_CTL_CODE(1)
+#define HPT_IOCTL_GET_CONTROLLER_INFO       HPT_CTL_CODE(2)
+#define HPT_IOCTL_GET_CHANNEL_INFO          HPT_CTL_CODE(3)
+#define HPT_IOCTL_GET_LOGICAL_DEVICES       HPT_CTL_CODE(4)
+#define HPT_IOCTL_GET_DEVICE_INFO           HPT_CTL_CODE(5)
+#define HPT_IOCTL_CREATE_ARRAY              HPT_CTL_CODE(6)
+#define HPT_IOCTL_DELETE_ARRAY              HPT_CTL_CODE(7)
+#define HPT_IOCTL_ARRAY_IO                  HPT_CTL_CODE(8)
+#define HPT_IOCTL_DEVICE_IO                 HPT_CTL_CODE(9)
+#define HPT_IOCTL_GET_EVENT                 HPT_CTL_CODE(10)
+#define HPT_IOCTL_REBUILD_MIRROR            HPT_CTL_CODE(11)
+/* use HPT_IOCTL_REBUILD_DATA_BLOCK from now on */
+#define HPT_IOCTL_REBUILD_DATA_BLOCK HPT_IOCTL_REBUILD_MIRROR
+#define HPT_IOCTL_ADD_SPARE_DISK            HPT_CTL_CODE(12)
+#define HPT_IOCTL_REMOVE_SPARE_DISK         HPT_CTL_CODE(13)
+#define HPT_IOCTL_ADD_DISK_TO_ARRAY         HPT_CTL_CODE(14)
+#define HPT_IOCTL_SET_ARRAY_STATE           HPT_CTL_CODE(15)
+#define HPT_IOCTL_SET_ARRAY_INFO            HPT_CTL_CODE(16)
+#define HPT_IOCTL_SET_DEVICE_INFO           HPT_CTL_CODE(17)
+#define HPT_IOCTL_RESCAN_DEVICES            HPT_CTL_CODE(18)
+#define HPT_IOCTL_GET_DRIVER_CAPABILITIES   HPT_CTL_CODE(19)
+#define HPT_IOCTL_GET_601_INFO              HPT_CTL_CODE(20)
+#define HPT_IOCTL_SET_601_INFO              HPT_CTL_CODE(21)
+#define HPT_IOCTL_LOCK_DEVICE               HPT_CTL_CODE(22)
+#define HPT_IOCTL_UNLOCK_DEVICE             HPT_CTL_CODE(23)
+#define HPT_IOCTL_IDE_PASS_THROUGH          HPT_CTL_CODE(24)
+#define HPT_IOCTL_VERIFY_DATA_BLOCK         HPT_CTL_CODE(25)
+#define HPT_IOCTL_INITIALIZE_DATA_BLOCK     HPT_CTL_CODE(26)
+#define HPT_IOCTL_ADD_DEDICATED_SPARE       HPT_CTL_CODE(27)
+#define HPT_IOCTL_DEVICE_IO_EX              HPT_CTL_CODE(28)
+#define HPT_IOCTL_SET_BOOT_MARK             HPT_CTL_CODE(29)
+#define HPT_IOCTL_QUERY_REMOVE              HPT_CTL_CODE(30)
+#define HPT_IOCTL_REMOVE_DEVICES            HPT_CTL_CODE(31)
+#define HPT_IOCTL_CREATE_ARRAY_V2           HPT_CTL_CODE(32)
+#define HPT_IOCTL_GET_DEVICE_INFO_V2        HPT_CTL_CODE(33)
+#define HPT_IOCTL_SET_DEVICE_INFO_V2        HPT_CTL_CODE(34)
+#define HPT_IOCTL_REBUILD_DATA_BLOCK_V2     HPT_CTL_CODE(35)
+#define HPT_IOCTL_VERIFY_DATA_BLOCK_V2      HPT_CTL_CODE(36)
+#define HPT_IOCTL_INITIALIZE_DATA_BLOCK_V2  HPT_CTL_CODE(37)
+#define HPT_IOCTL_LOCK_DEVICE_V2            HPT_CTL_CODE(38)
+#define HPT_IOCTL_DEVICE_IO_V2              HPT_CTL_CODE(39)
+#define HPT_IOCTL_DEVICE_IO_EX_V2           HPT_CTL_CODE(40)
+#define HPT_IOCTL_CREATE_TRANSFORM          HPT_CTL_CODE(41)
+#define HPT_IOCTL_STEP_TRANSFORM            HPT_CTL_CODE(42)
+#define HPT_IOCTL_SET_VDEV_INFO             HPT_CTL_CODE(43)
+#define HPT_IOCTL_CALC_MAX_CAPACITY         HPT_CTL_CODE(44)
+#define HPT_IOCTL_INIT_DISKS                HPT_CTL_CODE(45)
+#define HPT_IOCTL_GET_DEVICE_INFO_V3        HPT_CTL_CODE(46)
+#define HPT_IOCTL_GET_CONTROLLER_INFO_V2    HPT_CTL_CODE(47)
+#define HPT_IOCTL_I2C_TRANSACTION           HPT_CTL_CODE(48)
+#define HPT_IOCTL_GET_PARAMETER_LIST        HPT_CTL_CODE(49)
+#define HPT_IOCTL_GET_PARAMETER             HPT_CTL_CODE(50)
+#define HPT_IOCTL_SET_PARAMETER             HPT_CTL_CODE(51)
+#define HPT_IOCTL_GET_DRIVER_CAPABILITIES_V2 HPT_CTL_CODE(52)
+#define HPT_IOCTL_GET_CHANNEL_INFO_V2       HPT_CTL_CODE(53)
+#define HPT_IOCTL_GET_CONTROLLER_INFO_V3    HPT_CTL_CODE(54)
+#define HPT_IOCTL_GET_DEVICE_INFO_V4        HPT_CTL_CODE(55)
+#define HPT_IOCTL_CREATE_ARRAY_V3           HPT_CTL_CODE(56)
+#define HPT_IOCTL_CREATE_TRANSFORM_V2       HPT_CTL_CODE(57)
+#define HPT_IOCTL_CALC_MAX_CAPACITY_V2      HPT_CTL_CODE(58)
+#define HPT_IOCTL_SCSI_PASSTHROUGH          HPT_CTL_CODE(59)
+#define HPT_IOCTL_GET_PHYSICAL_DEVICES      HPT_CTL_CODE(60)
+#define HPT_IOCTL_GET_ENCLOSURE_COUNT       HPT_CTL_CODE(61)
+#define HPT_IOCTL_GET_ENCLOSURE_INFO        HPT_CTL_CODE(62)
+#define HPT_IOCTL_GET_PERFMON_STATUS        HPT_CTL_CODE(63)
+#define HPT_IOCTL_SET_PERFMON_STATUS        HPT_CTL_CODE(64)
+#define HPT_IOCTL_GET_PERFMON_DATA          HPT_CTL_CODE(65)
+#define HPT_IOCTL_IDE_PASS_THROUGH_V2       HPT_CTL_CODE(66)
+#define HPT_IOCTL_GET_ENCLOSURE_INFO_V2    HPT_CTL_CODE(67)
+#define HPT_IOCTL_GET_ENCLOSURE_INFO_V3    HPT_CTL_CODE(68)
+
+#define HPT_IOCTL_GET_CONTROLLER_IDS        HPT_CTL_CODE(100)
+#define HPT_IOCTL_GET_DCB                   HPT_CTL_CODE(101)
+
+#define HPT_IOCTL_EPROM_IO                  HPT_CTL_CODE(102)
+#define HPT_IOCTL_GET_CONTROLLER_VENID      HPT_CTL_CODE(103)
+
+/************************************************************************
+ * shared data structures
+ ************************************************************************/
+
+/*
+ * Chip Type
+ */
+#define CHIP_TYPE_HPT366      1
+#define CHIP_TYPE_HPT368      2
+#define CHIP_TYPE_HPT370      3
+#define CHIP_TYPE_HPT370A     4
+#define CHIP_TYPE_HPT370B     5
+#define CHIP_TYPE_HPT374      6
+#define CHIP_TYPE_HPT372      7
+#define CHIP_TYPE_HPT372A     8
+#define CHIP_TYPE_HPT302      9
+#define CHIP_TYPE_HPT371      10
+#define CHIP_TYPE_HPT372N     11
+#define CHIP_TYPE_HPT302N     12
+#define CHIP_TYPE_HPT371N     13
+#define CHIP_TYPE_SI3112A     14
+#define CHIP_TYPE_ICH5        15
+#define CHIP_TYPE_ICH5R       16
+#define CHIP_TYPE_MV50XX      20
+#define CHIP_TYPE_MV60X1      21
+#define CHIP_TYPE_MV60X2      22
+#define CHIP_TYPE_MV70X2      23
+#define CHIP_TYPE_MV5182      24
+#define CHIP_TYPE_IOP331      31
+#define CHIP_TYPE_IOP333      32
+#define CHIP_TYPE_IOP341      33
+#define CHIP_TYPE_IOP348      34
+
+/*
+ * Chip Flags
+ */
+#define CHIP_SUPPORT_ULTRA_66   0x20
+#define CHIP_SUPPORT_ULTRA_100  0x40
+#define CHIP_HPT3XX_DPLL_MODE   0x80
+#define CHIP_SUPPORT_ULTRA_133  0x01
+#define CHIP_SUPPORT_ULTRA_150  0x02
+#define CHIP_MASTER             0x04
+#define CHIP_SUPPORT_SATA_300   0x08
+
+#define HPT_SPIN_UP_MODE_NOSUPPORT 0
+#define HPT_SPIN_UP_MODE_FULL      1
+#define HPT_SPIN_UP_MODE_STANDBY   2
+
+typedef struct _DRIVER_CAPABILITIES {
+       HPT_U32 dwSize;
+
+       HPT_U8 MaximumControllers;           /* maximum controllers the driver can support */
+       HPT_U8 SupportCrossControllerRAID;   /* 1-support, 0-not support */
+       HPT_U8 MinimumBlockSizeShift;        /* minimum block size shift */
+       HPT_U8 MaximumBlockSizeShift;        /* maximum block size shift */
+
+       HPT_U8 SupportDiskModeSetting;
+       HPT_U8 SupportSparePool;
+       HPT_U8 MaximumArrayNameLength;
+       /* only one HPT_U8 left here! */
+#ifdef __BIG_ENDIAN_BITFIELD
+       HPT_U8 reserved: 2;
+       HPT_U8 SupportPerformanceMonitor: 1;
+       HPT_U8 SupportVariableSectorSize: 1;
+       HPT_U8 SupportHotSwap: 1;
+       HPT_U8 HighPerformanceRAID1: 1;
+       HPT_U8 RebuildProcessInDriver: 1;
+       HPT_U8 SupportDedicatedSpare: 1;
+#else
+       HPT_U8 SupportDedicatedSpare: 1;     /* call hpt_add_dedicated_spare() for dedicated spare. */
+       HPT_U8 RebuildProcessInDriver: 1;    /* Windows only. used by mid layer for rebuild control. */
+       HPT_U8 HighPerformanceRAID1: 1;
+       HPT_U8 SupportHotSwap: 1;
+       HPT_U8 SupportVariableSectorSize: 1;
+       HPT_U8 SupportPerformanceMonitor: 1;
+       HPT_U8 reserved: 2;
+#endif
+
+
+       HPT_U8 SupportedRAIDTypes[16];
+       /* maximum members in an array corresponding to SupportedRAIDTypes */
+       HPT_U8 MaximumArrayMembers[16];
+}
+DRIVER_CAPABILITIES, *PDRIVER_CAPABILITIES;
+
+typedef struct _DRIVER_CAPABILITIES_V2 {
+       DRIVER_CAPABILITIES v1;
+       HPT_U8 SupportedCachePolicies[16];
+       HPT_U32 reserved[17];
+}
+DRIVER_CAPABILITIES_V2, *PDRIVER_CAPABILITIES_V2;
+
+/*
+ * Controller information.
+ */
+typedef struct _CONTROLLER_INFO {
+       HPT_U8 ChipType;                    /* chip type */
+       HPT_U8 InterruptLevel;              /* IRQ level */
+       HPT_U8 NumBuses;                    /* bus count */
+       HPT_U8 ChipFlags;
+
+       HPT_U8 szProductID[MAX_NAME_LENGTH];/* product name */
+       HPT_U8 szVendorID[MAX_NAME_LENGTH]; /* vender name */
+
+} CONTROLLER_INFO, *PCONTROLLER_INFO;
+
+#if HPT_INTERFACE_VERSION>=0x01020000
+typedef struct _CONTROLLER_INFO_V2 {
+       HPT_U8 ChipType;                    /* chip type */
+       HPT_U8 InterruptLevel;              /* IRQ level */
+       HPT_U8 NumBuses;                    /* bus count */
+       HPT_U8 ChipFlags;
+
+       HPT_U8 szProductID[MAX_NAME_LENGTH];/* product name */
+       HPT_U8 szVendorID[MAX_NAME_LENGTH]; /* vender name */
+
+       HPT_U32 GroupId;                    /* low 32bit of vbus pointer the controller belongs
+                                                                                * the master controller has CHIP_MASTER flag set*/
+       HPT_U8  pci_tree;
+       HPT_U8  pci_bus;
+       HPT_U8  pci_device;
+       HPT_U8  pci_function;
+
+       HPT_U32 ExFlags;
+} CONTROLLER_INFO_V2, *PCONTROLLER_INFO_V2;
+
+
+#define CEXF_IOPModel            1
+#define CEXF_SDRAMSize           2
+#define CEXF_BatteryInstalled    4
+#define CEXF_BatteryStatus       8
+#define CEXF_BatteryVoltage      0x10
+#define CEXF_BatteryBackupTime   0x20
+#define CEXF_FirmwareVersion     0x40
+#define CEXF_SerialNumber        0x80
+#define CEXF_BatteryTemperature  0x100
+#define CEXF_Power12v            0x200
+#define CEXF_Power5v             0x400
+#define CEXF_Power3p3v           0x800
+#define CEXF_Power2p5v           0x1000
+#define CEXF_Power1p8v           0x2000
+#define CEXF_Core1p8v            0x4000
+#define CEXF_Core1p2v            0x8000
+#define CEXF_DDR1p8v             0x10000
+#define CEXF_DDR1p8vRef          0x20000
+#define CEXF_CPUTemperature      0x40000
+#define CEXF_BoardTemperature    0x80000
+#define CEXF_FanSpeed            0x100000
+#define CEXF_Core1p0v            0x200000
+#define CEXF_Fan2Speed           0x400000
+
+typedef struct _CONTROLLER_INFO_V3 {
+       HPT_U8 ChipType;
+       HPT_U8 InterruptLevel;
+       HPT_U8 NumBuses;
+       HPT_U8 ChipFlags;
+       HPT_U8 szProductID[MAX_NAME_LENGTH];
+       HPT_U8 szVendorID[MAX_NAME_LENGTH];
+       HPT_U32 GroupId;
+       HPT_U8  pci_tree;
+       HPT_U8  pci_bus;
+       HPT_U8  pci_device;
+       HPT_U8  pci_function;
+       HPT_U32 ExFlags;
+       HPT_U8  IOPModel[32];
+       HPT_U32 SDRAMSize;
+       HPT_U8  BatteryInstalled;
+       HPT_U8  BatteryStatus;
+       HPT_U16 BatteryVoltage;
+       HPT_U32 BatteryBackupTime;
+       HPT_U32 FirmwareVersion;
+       HPT_U8  SerialNumber[32];
+       HPT_U8  BatteryMBInstalled;
+       HPT_U8  BatteryTemperature;
+       signed char CPUTemperature;
+       signed char BoardTemperature;
+       HPT_U16 FanSpeed;
+       HPT_U16 Power12v;
+       HPT_U16 Power5v;
+       HPT_U16 Power3p3v;
+       HPT_U16 Power2p5v;
+       HPT_U16 Power1p8v;
+       HPT_U16 Core1p8v;
+       HPT_U16 Core1p2v;
+       HPT_U16 DDR1p8v;
+       HPT_U16 DDR1p8vRef;
+       HPT_U16 Core1p0v;
+       HPT_U16 Fan2Speed;
+       HPT_U8  reserve[60];
+}
+CONTROLLER_INFO_V3, *PCONTROLLER_INFO_V3;
+typedef char check_CONTROLLER_INFO_V3[sizeof(CONTROLLER_INFO_V3)==256? 1:-1];
+#endif
+/*
+ * Channel information.
+ */
+typedef struct _CHANNEL_INFO {
+       HPT_U32         IoPort;         /* IDE Base Port Address */
+       HPT_U32         ControlPort;    /* IDE Control Port Address */
+
+       DEVICEID    Devices[2];         /* device connected to this channel */
+
+} CHANNEL_INFO, *PCHANNEL_INFO;
+
+typedef struct _CHANNEL_INFO_V2 {
+       HPT_U32         IoPort;         /* IDE Base Port Address */
+       HPT_U32         ControlPort;    /* IDE Control Port Address */
+
+       DEVICEID        Devices[2+13];    /* device connected to this channel, PMPort max=15 */
+} CHANNEL_INFO_V2, *PCHANNEL_INFO_V2;
+
+typedef struct _ENCLOSURE_INFO {
+       HPT_U8  EnclosureType;
+       HPT_U8  NumberOfPhys;
+       HPT_U8  AttachedTo;
+       HPT_U8  Status;
+       HPT_U8  VendorId[8];
+       HPT_U8  ProductId[16];
+       HPT_U8  ProductRevisionLevel[4];
+       HPT_U32 PortPhyMap;
+       HPT_U32 reserve[55];
+} ENCLOSURE_INFO, *PENCLOSURE_INFO;
+
+
+typedef struct _SES_ELEMENT_STATUS {
+       HPT_U8   ElementType;
+       HPT_U8   ElementOverallIndex;
+       HPT_U8   ElementStatus;
+       HPT_U8   Reserved;
+       HPT_U32 ElementValue;
+       HPT_U8   ElementDescriptor[32];
+}SES_ELEMENT_STATUS,*PSES_ELEMENT_STATUS;
+
+#define MAX_ELEMENT_COUNT  80
+/* Element Type */
+#define SES_TYPE_UNSPECIFIED         0x00
+#define SES_TYPE_DEVICE              0x01
+#define SES_TYPE_POWER_SUPPLY        0x02
+#define SES_TYPE_FAN                 0x03
+#define SES_TYPE_TEMPERATURE_SENSOR  0x04
+#define SES_TYPE_DOOR_LOCK           0x05
+#define SES_TYPE_SPEAKER             0x06
+#define SES_TYPE_ES_CONTROLLER       0x07
+#define SES_TYPE_SCC_CONTROLLER      0x08
+#define SES_TYPE_NONVOLATILE_CACHE   0x09
+#define SES_TYPE_UPS                 0x0B
+#define SES_TYPE_DISPLAY             0x0C
+#define SES_TYPE_KEYPAD              0x0D
+#define SES_TYPE_ENCLOSURE           0x0E
+#define SES_TYPE_SCSI_TRANSCEIVER    0x0F
+#define SES_TYPE_LANGUAGE            0x10
+#define SES_TYPE_COMM_PORT           0x11
+#define SES_TYPE_VOLTAGE_SENSOR      0x12
+#define SES_TYPE_CURRENT_SENSOR      0x13
+#define SES_TYPE_SCSI_TARGET_PORT    0x14
+#define SES_TYPE_SCSI_INITIATOR_PORT 0x15
+#define SES_TYPE_SIMPLE_SUBENCLOSURE 0x16
+#define SES_TYPE_ARRAY_DEVICE        0x17
+#define SES_TYPE_VENDOR_SPECIFIC     0x80
+
+/* Element Status */
+
+#define        SES_STATUS_UNSUPPORTED                  0x00
+#define        SES_STATUS_OK                                   0x01
+#define        SES_STATUS_CRITICAL                     0x02
+#define        SES_STATUS_NONCRITICAL          0x03
+#define        SES_STATUS_UNRECOVERABLE        0x04
+#define        SES_STATUS_NOTINSTALLED         0x05
+#define        SES_STATUS_UNKNOWN                      0x06
+#define        SES_STATUS_NOTAVAILABLE         0x06
+#define        SES_STATUS_RESERVED                     0x07
+
+
+typedef struct _ENCLOSURE_INFO_V2 {
+       HPT_U8  EnclosureType;
+       HPT_U8  NumberOfPhys;
+       HPT_U8  AttachedTo;
+       HPT_U8  Status;
+       HPT_U8  VendorId[8];
+       HPT_U8  ProductId[16];
+       HPT_U8  ProductRevisionLevel[4];
+       HPT_U32 PortPhyMap;
+       SES_ELEMENT_STATUS ElementStatus[MAX_ELEMENT_COUNT];
+} ENCLOSURE_INFO_V2, *PENCLOSURE_INFO_V2;
+
+typedef struct _ENCLOSURE_INFO_V3 {
+       HPT_U8  EnclosureType;
+       HPT_U8  NumberOfPhys;
+       HPT_U8  AttachedTo;
+       HPT_U8  Status;
+       HPT_U8  VendorId[8];
+       HPT_U8  ProductId[16];
+       HPT_U8  ProductRevisionLevel[4];
+       HPT_U32 PortPhyMap;
+       HPT_U32 UnitId; /*272x card has two Cores, unitId is used to distinguish them */
+       HPT_U32 reserved[32];
+       SES_ELEMENT_STATUS ElementStatus[MAX_ELEMENT_COUNT];
+} ENCLOSURE_INFO_V3, *PENCLOSURE_INFO_V3;
+
+#define ENCLOSURE_STATUS_OFFLINE 1
+
+#define ENCLOSURE_TYPE_INTERNAL 0
+#define ENCLOSURE_TYPE_SMP      1
+#define ENCLOSURE_TYPE_PM       2
+
+#ifndef __KERNEL__
+/*
+ * time represented in HPT_U32 format
+ */
+typedef struct _TIME_RECORD {
+   HPT_U32        seconds:6;      /* 0 - 59 */
+   HPT_U32        minutes:6;      /* 0 - 59 */
+   HPT_U32        month:4;        /* 1 - 12 */
+   HPT_U32        hours:6;        /* 0 - 59 */
+   HPT_U32        day:5;          /* 1 - 31 */
+   HPT_U32        year:5;         /* 0=2000, 31=2031 */
+} TIME_RECORD;
+#endif
+
+/*
+ * Array information.
+ */
+typedef struct _HPT_ARRAY_INFO {
+       HPT_U8      Name[MAX_ARRAYNAME_LEN];/* array name */
+       HPT_U8      Description[64];        /* array description */
+       HPT_U8      CreateManager[16];      /* who created it */
+       TIME_RECORD CreateTime;             /* when created it */
+
+       HPT_U8      ArrayType;              /* array type */
+       HPT_U8      BlockSizeShift;         /* stripe size */
+       HPT_U8      nDisk;                  /* member count: Number of ID in Members[] */
+       HPT_U8      SubArrayType;
+
+       HPT_U32     Flags;                  /* working flags, see ARRAY_FLAG_XXX */
+       HPT_U32     Members[MAX_ARRAY_MEMBERS_V1];  /* member array/disks */
+
+       /*
+        * rebuilding progress, xx.xx% = sprintf(s, "%.2f%%", RebuildingProgress/100.0);
+        * only valid if rebuilding is done by driver code.
+        * Member Flags will have ARRAY_FLAG_REBUILDING set at this case.
+        * Verify operation use same fields below, the only difference is
+        * ARRAY_FLAG_VERIFYING is set.
+        */
+       HPT_U32     RebuildingProgress;
+       HPT_U32     RebuiltSectors; /* rebuilding point (LBA) for single member */
+
+} HPT_ARRAY_INFO, *PHPT_ARRAY_INFO;
+
+#if HPT_INTERFACE_VERSION>=0x01010000
+typedef struct _HPT_ARRAY_INFO_V2 {
+       HPT_U8      Name[MAX_ARRAYNAME_LEN];/* array name */
+       HPT_U8      Description[64];        /* array description */
+       HPT_U8      CreateManager[16];      /* who created it */
+       TIME_RECORD CreateTime;             /* when created it */
+
+       HPT_U8      ArrayType;              /* array type */
+       HPT_U8      BlockSizeShift;         /* stripe size */
+       HPT_U8      nDisk;                  /* member count: Number of ID in Members[] */
+       HPT_U8      SubArrayType;
+
+       HPT_U32     Flags;                  /* working flags, see ARRAY_FLAG_XXX */
+       HPT_U32     Members[MAX_ARRAY_MEMBERS_V2];  /* member array/disks */
+
+       HPT_U32     RebuildingProgress;
+       HPT_U64     RebuiltSectors; /* rebuilding point (LBA) for single member */
+
+       HPT_U32     reserve4[4];
+} HPT_ARRAY_INFO_V2, *PHPT_ARRAY_INFO_V2;
+#endif
+
+#if HPT_INTERFACE_VERSION>=0x01020000
+typedef struct _HPT_ARRAY_INFO_V3 {
+       HPT_U8      Name[MAX_ARRAYNAME_LEN];/* array name */
+       HPT_U8      Description[64];        /* array description */
+       HPT_U8      CreateManager[16];      /* who created it */
+       TIME_RECORD CreateTime;             /* when created it */
+
+       HPT_U8      ArrayType;              /* array type */
+       HPT_U8      BlockSizeShift;         /* stripe size */
+       HPT_U8      nDisk;                  /* member count: Number of ID in Members[] */
+       HPT_U8      SubArrayType;
+
+       HPT_U32     Flags;                  /* working flags, see ARRAY_FLAG_XXX */
+       HPT_U32     Members[MAX_ARRAY_MEMBERS_V2];  /* member array/disks */
+
+       HPT_U32     RebuildingProgress;
+       HPT_U64     RebuiltSectors;         /* rebuilding point (LBA) for single member */
+
+       DEVICEID    TransformSource;
+       DEVICEID    TransformTarget;        /* destination device ID */
+       HPT_U32     TransformingProgress;
+       HPT_U32     Signature;              /* persistent identification*/
+#if MAX_ARRAY_MEMBERS_V2==16
+       HPT_U16     Critical_Members;       /* bit mask of critical members */
+       HPT_U16     reserve2;
+       HPT_U32     reserve;
+#else
+       HPT_U32     Critical_Members;
+       HPT_U32     reserve;
+#endif
+} HPT_ARRAY_INFO_V3, *PHPT_ARRAY_INFO_V3;
+#endif
+
+#if HPT_INTERFACE_VERSION>=0x02000001
+typedef struct _HPT_ARRAY_INFO_V4 {
+       HPT_U8      Name[MAX_ARRAYNAME_LEN];/* array name */
+       HPT_U8      Description[64];        /* array description */
+       HPT_U8      CreateManager[16];      /* who created it */
+       TIME_RECORD CreateTime;             /* when created it */
+
+       HPT_U8      ArrayType;              /* array type */
+       HPT_U8      BlockSizeShift;         /* stripe size */
+       HPT_U8      nDisk;                  /* member count: Number of ID in Members[] */
+       HPT_U8      SubArrayType;
+
+       HPT_U32     Flags;                  /* working flags, see ARRAY_FLAG_XXX */
+
+       HPT_U32     RebuildingProgress;
+       HPT_U64     RebuiltSectors; /* rebuilding point (LBA) for single member */
+
+       DEVICEID    TransformSource;
+       DEVICEID    TransformTarget;   /* destination device ID */
+       HPT_U32     TransformingProgress;
+       HPT_U32     Signature;          /* persistent identification*/
+       HPT_U8       SectorSizeShift; /*sector size = 512B<<SectorSizeShift*/
+       HPT_U8       reserved2[7];
+       HPT_U64     Critical_Members;
+       HPT_U32     Members[MAX_ARRAY_MEMBERS_V3];  /* member array/disks */
+} HPT_ARRAY_INFO_V4, *PHPT_ARRAY_INFO_V4;
+#endif
+
+
+/*
+ * ATA/ATAPI Device identify data without the Reserved4.
+ */
+typedef struct _IDENTIFY_DATA2 {
+       HPT_U16 GeneralConfiguration;
+       HPT_U16 NumberOfCylinders;
+       HPT_U16 Reserved1;
+       HPT_U16 NumberOfHeads;
+       HPT_U16 UnformattedBytesPerTrack;
+       HPT_U16 UnformattedBytesPerSector;
+       HPT_U8  SasAddress[8];
+       HPT_U16 SerialNumber[10];
+       HPT_U16 BufferType;
+       HPT_U16 BufferSectorSize;
+       HPT_U16 NumberOfEccBytes;
+       HPT_U16 FirmwareRevision[4];
+       HPT_U16 ModelNumber[20];
+       HPT_U8  MaximumBlockTransfer;
+       HPT_U8  VendorUnique2;
+       HPT_U16 DoubleWordIo;
+       HPT_U16 Capabilities;
+       HPT_U16 Reserved2;
+       HPT_U8  VendorUnique3;
+       HPT_U8  PioCycleTimingMode;
+       HPT_U8  VendorUnique4;
+       HPT_U8  DmaCycleTimingMode;
+       HPT_U16 TranslationFieldsValid;
+       HPT_U16 NumberOfCurrentCylinders;
+       HPT_U16 NumberOfCurrentHeads;
+       HPT_U16 CurrentSectorsPerTrack;
+       HPT_U32 CurrentSectorCapacity;
+       HPT_U16 CurrentMultiSectorSetting;
+       HPT_U32 UserAddressableSectors;
+       HPT_U8  SingleWordDMASupport;
+       HPT_U8  SingleWordDMAActive;
+       HPT_U8  MultiWordDMASupport;
+       HPT_U8  MultiWordDMAActive;
+       HPT_U8  AdvancedPIOModes;
+       HPT_U8  Reserved4;
+       HPT_U16 MinimumMWXferCycleTime;
+       HPT_U16 RecommendedMWXferCycleTime;
+       HPT_U16 MinimumPIOCycleTime;
+       HPT_U16 MinimumPIOCycleTimeIORDY;
+       HPT_U16 Reserved5[2];
+       HPT_U16 ReleaseTimeOverlapped;
+       HPT_U16 ReleaseTimeServiceCommand;
+       HPT_U16 MajorRevision;
+       HPT_U16 MinorRevision;
+} __attribute__((packed)) IDENTIFY_DATA2, *PIDENTIFY_DATA2;
+
+/*
+ * physical device information.
+ * IdentifyData.ModelNumber[] is HPT_U8-swapped from the original identify data.
+ */
+typedef struct _DEVICE_INFO {
+       HPT_U8   ControllerId;          /* controller id */
+       HPT_U8   PathId;                /* bus */
+       HPT_U8   TargetId;              /* id */
+       HPT_U8   DeviceModeSetting;     /* Current Data Transfer mode: 0-4 PIO 0-4 */
+                                                                       /* 5-7 MW DMA0-2, 8-13 UDMA0-5             */
+       HPT_U8   DeviceType;            /* device type */
+       HPT_U8   UsableMode;            /* highest usable mode */
+
+#ifdef __BIG_ENDIAN_BITFIELD
+       HPT_U8   NCQEnabled: 1;
+       HPT_U8   NCQSupported: 1;
+       HPT_U8   TCQEnabled: 1;
+       HPT_U8   TCQSupported: 1;
+       HPT_U8   WriteCacheEnabled: 1;
+       HPT_U8   WriteCacheSupported: 1;
+       HPT_U8   ReadAheadEnabled: 1;
+       HPT_U8   ReadAheadSupported: 1;
+       HPT_U8   reserved6: 6;
+       HPT_U8   SpinUpMode: 2;
+#else
+       HPT_U8   ReadAheadSupported: 1;
+       HPT_U8   ReadAheadEnabled: 1;
+       HPT_U8   WriteCacheSupported: 1;
+       HPT_U8   WriteCacheEnabled: 1;
+       HPT_U8   TCQSupported: 1;
+       HPT_U8   TCQEnabled: 1;
+       HPT_U8   NCQSupported: 1;
+       HPT_U8   NCQEnabled: 1;
+       HPT_U8   SpinUpMode: 2;
+       HPT_U8   reserved6: 6;
+#endif
+
+       HPT_U32     Flags;              /* working flags, see DEVICE_FLAG_XXX */
+
+       IDENTIFY_DATA2 IdentifyData;    /* Identify Data of this device */
+
+}
+__attribute__((packed)) DEVICE_INFO, *PDEVICE_INFO;
+
+#if HPT_INTERFACE_VERSION>=0x01020000
+#define MAX_PARENTS_PER_DISK    8
+/*
+ * physical device information.
+ * IdentifyData.ModelNumber[] is HPT_U8-swapped from the original identify data.
+ */
+typedef struct _DEVICE_INFO_V2 {
+       HPT_U8   ControllerId;          /* controller id */
+       HPT_U8   PathId;                /* bus */
+       HPT_U8   TargetId;              /* id */
+       HPT_U8   DeviceModeSetting;     /* Current Data Transfer mode: 0-4 PIO 0-4 */
+                                                                       /* 5-7 MW DMA0-2, 8-13 UDMA0-5             */
+       HPT_U8   DeviceType;            /* device type */
+       HPT_U8   UsableMode;            /* highest usable mode */
+
+#ifdef __BIG_ENDIAN_BITFIELD
+       HPT_U8   NCQEnabled: 1;
+       HPT_U8   NCQSupported: 1;
+       HPT_U8   TCQEnabled: 1;
+       HPT_U8   TCQSupported: 1;
+       HPT_U8   WriteCacheEnabled: 1;
+       HPT_U8   WriteCacheSupported: 1;
+       HPT_U8   ReadAheadEnabled: 1;
+       HPT_U8   ReadAheadSupported: 1;
+       HPT_U8   reserved6: 6;
+       HPT_U8   SpinUpMode: 2;
+#else
+       HPT_U8   ReadAheadSupported: 1;
+       HPT_U8   ReadAheadEnabled: 1;
+       HPT_U8   WriteCacheSupported: 1;
+       HPT_U8   WriteCacheEnabled: 1;
+       HPT_U8   TCQSupported: 1;
+       HPT_U8   TCQEnabled: 1;
+       HPT_U8   NCQSupported: 1;
+       HPT_U8   NCQEnabled: 1;
+       HPT_U8   SpinUpMode: 2;
+       HPT_U8   reserved6: 6;
+#endif
+
+       HPT_U32     Flags;              /* working flags, see DEVICE_FLAG_XXX */
+
+       IDENTIFY_DATA2 IdentifyData;    /* Identify Data of this device */
+
+       HPT_U64 TotalFree;
+       HPT_U64 MaxFree;
+       HPT_U64 BadSectors;
+       DEVICEID ParentArrays[MAX_PARENTS_PER_DISK];
+
+}
+__attribute__((packed)) DEVICE_INFO_V2, *PDEVICE_INFO_V2, DEVICE_INFO_V3, *PDEVICE_INFO_V3;
+
+/*
+ * HPT601 information
+ */
+#endif
+/*
+ * HPT601 information
+ */
+#define HPT601_INFO_DEVICEID      1
+#define HPT601_INFO_TEMPERATURE   2
+#define HPT601_INFO_FANSTATUS     4
+#define HPT601_INFO_BEEPERCONTROL 8
+#define HPT601_INFO_LED1CONTROL   0x10
+#define HPT601_INFO_LED2CONTROL   0x20
+#define HPT601_INFO_POWERSTATUS   0x40
+
+typedef struct _HPT601_INFO_ {
+       HPT_U16 ValidFields;        /* mark valid fields below */
+       HPT_U16 DeviceId;           /* 0x5A3E */
+       HPT_U16 Temperature;        /* Read: temperature sensor value. Write: temperature limit */
+       HPT_U16 FanStatus;          /* Fan status */
+       HPT_U16 BeeperControl;      /* bit4: beeper control bit. bit0-3: frequency bits */
+       HPT_U16 LED1Control;        /* bit4: twinkling control bit. bit0-3: frequency bits */
+       HPT_U16 LED2Control;        /* bit4: twinkling control bit. bit0-3: frequency bits */
+       HPT_U16 PowerStatus;        /* 1: has power 2: no power */
+} HPT601_INFO, *PHPT601_INFO;
+
+#if HPT_INTERFACE_VERSION>=0x01010000
+#ifndef __KERNEL__
+/* cache policy for each vdev, copied from ldm.h */
+#define CACHE_POLICY_NONE 0
+#define CACHE_POLICY_WRITE_THROUGH 1
+#define CACHE_POLICY_WRITE_BACK 2
+
+#endif
+#endif
+/*
+ * Logical device information.
+ * Union of ArrayInfo and DeviceInfo.
+ * Common properties will be put in logical device information.
+ */
+typedef struct _LOGICAL_DEVICE_INFO {
+       HPT_U8      Type;                   /* LDT_ARRAY or LDT_DEVICE */
+       HPT_U8      reserved[3];
+
+       HPT_U32     Capacity;               /* array capacity */
+       DEVICEID    ParentArray;
+
+       union {
+               HPT_ARRAY_INFO array;
+               DEVICE_INFO device;
+       } __attribute__((packed)) u;
+
+} __attribute__((packed)) LOGICAL_DEVICE_INFO, *PLOGICAL_DEVICE_INFO;
+
+#if HPT_INTERFACE_VERSION>=0x01010000
+typedef struct _LOGICAL_DEVICE_INFO_V2 {
+       HPT_U8      Type;                   /* LDT_ARRAY or LDT_DEVICE */
+       HPT_U8      reserved[3];
+
+       HPT_U64     Capacity;               /* array capacity */
+       DEVICEID    ParentArray;            /* for physical device, Please don't use this field.
+                                                                                * use ParentArrays field in DEVICE_INFO_V2
+                                                                                */
+
+       union {
+               HPT_ARRAY_INFO_V2 array;
+               DEVICE_INFO device;
+       } __attribute__((packed)) u;
+
+} __attribute__((packed)) LOGICAL_DEVICE_INFO_V2, *PLOGICAL_DEVICE_INFO_V2;
+#endif
+
+#if HPT_INTERFACE_VERSION>=0x01020000
+#define INVALID_TARGET_ID   0xFF
+#define INVALID_BUS_ID      0xFF
+typedef struct _LOGICAL_DEVICE_INFO_V3 {
+       HPT_U8      Type;                   /* LDT_ARRAY or LDT_DEVICE */
+       HPT_U8      CachePolicy;            /* refer to CACHE_POLICY_xxx */
+       HPT_U8      VBusId;                 /* vbus sequence in vbus_list */
+       HPT_U8      TargetId;               /* OS target id. Value 0xFF is invalid */
+                                                                               /* OS disk name: HPT DISK $VBusId_$TargetId */
+       HPT_U64     Capacity;               /* array capacity */
+       DEVICEID    ParentArray;            /* for physical device, don't use this field.
+                                                                                * use ParentArrays field in DEVICE_INFO_V2 instead.
+                                                                                */
+       HPT_U32     TotalIOs;
+       HPT_U32     TobalMBs;
+       HPT_U32     IOPerSec;
+       HPT_U32     MBPerSec;
+
+       union {
+               HPT_ARRAY_INFO_V3 array;
+               DEVICE_INFO_V2 device;
+       } __attribute__((packed)) u;
+
+}
+__attribute__((packed)) LOGICAL_DEVICE_INFO_V3, *PLOGICAL_DEVICE_INFO_V3;
+#endif
+
+#if HPT_INTERFACE_VERSION>=0x02000001
+typedef struct _LOGICAL_DEVICE_INFO_V4 {
+       HPT_U32    dwSize;
+       HPT_U8      revision;
+       HPT_U8      reserved[7];
+
+       HPT_U8      Type;                   /* LDT_ARRAY or LDT_DEVICE */
+       HPT_U8      CachePolicy;            /* refer to CACHE_POLICY_xxx */
+       HPT_U8      VBusId;                 /* vbus sequence in vbus_list */
+       HPT_U8      TargetId;               /* OS target id. Value 0xFF is invalid */
+                                                                               /* OS disk name: HPT DISK $VBusId_$TargetId */
+       HPT_U64     Capacity;               /* array capacity */
+       DEVICEID    ParentArray;            /* for physical device, don't use this field.
+                                                                                * use ParentArrays field in DEVICE_INFO_V2 instead.
+                                                                                */
+       HPT_U32     TotalIOs;
+       HPT_U32     TobalMBs;
+       HPT_U32     IOPerSec;
+       HPT_U32     MBPerSec;
+
+       union {
+               HPT_ARRAY_INFO_V4 array;
+               DEVICE_INFO_V3 device;
+       } __attribute__((packed)) u;
+}
+__attribute__((packed)) LOGICAL_DEVICE_INFO_V4, *PLOGICAL_DEVICE_INFO_V4;
+
+/*LOGICAL_DEVICE_INFO_V4 max revision number*/
+#define LOGICAL_DEVICE_INFO_V4_REVISION 0
+/*If new revision was defined please check evey revision size*/
+#define LOGICAL_DEVICE_INFO_V4_R0_SIZE (sizeof(LOGICAL_DEVICE_INFO_V4))
+#endif
+
+/*
+ * ALTERABLE_ARRAY_INFO and ALTERABLE_DEVICE_INFO, used in set_array_info()
+ * and set_device_info().
+ * When set_xxx_info() is called, the ValidFields member indicates which
+ * fields in the structure are valid.
+ */
+/* field masks */
+#define AAIF_NAME           1
+#define AAIF_DESCRIPTION    2
+
+#define ADIF_MODE           1
+#define ADIF_TCQ            2
+#define ADIF_NCQ            4
+#define ADIF_WRITE_CACHE    8
+#define ADIF_READ_AHEAD     0x10
+#define ADIF_SPIN_UP_MODE   0x20
+
+typedef struct _ALTERABLE_ARRAY_INFO {
+       HPT_U32   ValidFields;              /* mark valid fields below */
+       HPT_U8  Name[MAX_ARRAYNAME_LEN];    /* array name */
+       HPT_U8  Description[64];            /* array description */
+}__attribute__((packed))ALTERABLE_ARRAY_INFO, *PALTERABLE_ARRAY_INFO;
+
+typedef struct _ALTERABLE_DEVICE_INFO {
+       HPT_U32   ValidFields;              /* mark valid fields below */
+       HPT_U8   DeviceModeSetting;         /* 0-4 PIO 0-4, 5-7 MW DMA0-2, 8-13 UDMA0-5 */
+}__attribute__((packed))ALTERABLE_DEVICE_INFO, *PALTERABLE_DEVICE_INFO;
+
+typedef struct _ALTERABLE_DEVICE_INFO_V2 {
+       HPT_U32   ValidFields;              /* mark valid fields below */
+       HPT_U8   DeviceModeSetting;         /* 0-4 PIO 0-4, 5-7 MW DMA0-2, 8-13 UDMA0-5 */
+       HPT_U8   TCQEnabled;
+       HPT_U8   NCQEnabled;
+       HPT_U8   WriteCacheEnabled;
+       HPT_U8   ReadAheadEnabled;
+       HPT_U8   SpinUpMode;
+       HPT_U8   reserve[2];
+       HPT_U32  reserve2[13]; /* pad to 64 bytes */
+}__attribute__((packed))ALTERABLE_DEVICE_INFO_V2, *PALTERABLE_DEVICE_INFO_V2;
+
+#if HPT_INTERFACE_VERSION>=0x01020000
+
+#define TARGET_TYPE_DEVICE  0
+#define TARGET_TYPE_ARRAY   1
+
+
+#define AIT_NAME            0
+#define AIT_DESCRIPTION     1
+#define AIT_CACHE_POLICY    2
+
+
+#define DIT_MODE        0
+#define DIT_READ_AHEAD  1
+#define DIT_WRITE_CACHE 2
+#define DIT_TCQ         3
+#define DIT_NCQ         4
+#define DIT_IDENTIFY    5
+
+/* param type is determined by target_type and info_type*/
+typedef struct _SET_DEV_INFO
+{
+       HPT_U8 target_type;
+       HPT_U8 infor_type;
+       HPT_U16 param_length;
+       #define SET_VDEV_INFO_param(p) ((HPT_U8 *)(p)+sizeof(SET_VDEV_INFO))
+       /* HPT_U8 param[0]; */
+} SET_VDEV_INFO, * PSET_VDEV_INFO;
+
+typedef HPT_U8 PARAM_ARRAY_NAME[MAX_ARRAYNAME_LEN] ;
+typedef HPT_U8 PARAM_ARRAY_DES[64];
+typedef HPT_U8 PARAM_DEVICE_MODE, PARAM_TCQ, PARAM_NCQ, PARAM_READ_AHEAD, PARAM_WRITE_CACHE, PARAM_CACHE_POLICY;
+
+#endif
+
+/*
+ * CREATE_ARRAY_PARAMS
+ *  Param structure used to create an array.
+ */
+typedef struct _CREATE_ARRAY_PARAMS {
+       HPT_U8 ArrayType;                   /* 1-level array type */
+       HPT_U8 nDisk;                       /* number of elements in Members[] array */
+       HPT_U8 BlockSizeShift;              /* Stripe size if ArrayType==AT_RAID0 / AT_RAID5 */
+       HPT_U8 CreateFlags;                 /* See CAF_xxx */
+
+       HPT_U8 ArrayName[MAX_ARRAYNAME_LEN];/* Array name */
+       HPT_U8      Description[64];        /* array description */
+       HPT_U8      CreateManager[16];      /* who created it */
+       TIME_RECORD CreateTime;             /* when created it */
+
+       HPT_U32 Members[MAX_ARRAY_MEMBERS_V1];/* ID of array members, a member can be an array */
+
+} CREATE_ARRAY_PARAMS, *PCREATE_ARRAY_PARAMS;
+
+#if HPT_INTERFACE_VERSION>=0x01010000
+typedef struct _CREATE_ARRAY_PARAMS_V2 {
+       HPT_U8 ArrayType;                   /* 1-level array type */
+       HPT_U8 nDisk;                       /* number of elements in Members[] array */
+       HPT_U8 BlockSizeShift;              /* Stripe size if ArrayType==AT_RAID0 / AT_RAID5 */
+       HPT_U8 CreateFlags;                 /* See CAF_xxx */
+
+       HPT_U8 ArrayName[MAX_ARRAYNAME_LEN];/* Array name */
+       HPT_U8 Description[64];             /* array description */
+       HPT_U8 CreateManager[16];           /* who created it */
+       TIME_RECORD CreateTime;             /* when created it */
+       HPT_U64 Capacity;
+
+       HPT_U32 Members[MAX_ARRAY_MEMBERS_V2];/* ID of array members, a member can be an array */
+
+} CREATE_ARRAY_PARAMS_V2, *PCREATE_ARRAY_PARAMS_V2;
+#endif
+
+#if HPT_INTERFACE_VERSION>=0x02000001
+typedef struct _CREATE_ARRAY_PARAMS_V3 {
+       HPT_U32  dwSize;
+       HPT_U8 revision;                        /*CREATE_ARRAY_PARAMS_V3_REVISION*/
+       HPT_U8 reserved[5];
+       HPT_U8 subDisks;            /* RAIDn0 sub array */
+       HPT_U8 SectorSizeShift;     /*sector size = 512B<<SectorSizeShift*/
+       HPT_U8 ArrayType;                   /* 1-level array type */
+       HPT_U8 nDisk;                       /* number of elements in Members[] array */
+       HPT_U8 BlockSizeShift;              /* Stripe size if ArrayType==AT_RAID0 / AT_RAID5 */
+       HPT_U8 CreateFlags;                 /* See CAF_xxx */
+
+       HPT_U8 ArrayName[MAX_ARRAYNAME_LEN];/* Array name */
+       HPT_U8 Description[64];     /* array description */
+       HPT_U8 CreateManager[16];       /* who created it */
+       TIME_RECORD CreateTime;             /* when created it */
+       HPT_U64 Capacity;
+
+       HPT_U32 Members[MAX_ARRAY_MEMBERS_V3];/* ID of array members, a member can be an array */
+} CREATE_ARRAY_PARAMS_V3, *PCREATE_ARRAY_PARAMS_V3;
+
+/*CREATE_ARRAY_PARAMS_V3 current max revision*/
+#define CREATE_ARRAY_PARAMS_V3_REVISION 0
+/*If new revision defined please check evey revision size*/
+#define CREATE_ARRAY_PARAMS_V3_R0_SIZE (sizeof(CREATE_ARRAY_PARAMS_V3))
+#endif
+
+#if HPT_INTERFACE_VERSION < 0x01020000
+/*
+ * Flags used for creating an RAID 1 array
+ *
+ * CAF_CREATE_AND_DUPLICATE
+ *    Copy source disk contents to target for RAID 1. If user choose "create and duplicate"
+ *    to create an array, GUI will call CreateArray() with this flag set. Then GUI should
+ *    call hpt_get_device_info() with the returned array ID and check returned flags to
+ *    see if ARRAY_FLAG_REBUILDING is set. If not set, driver does not support rebuilding
+ *    and GUI must do duplication itself.
+ * CAF_DUPLICATE_MUST_DONE
+ *    If the duplication is aborted or fails, do not create the array.
+ */
+#define CAF_CREATE_AND_DUPLICATE 1
+#define CAF_DUPLICATE_MUST_DONE  2
+#define CAF_CREATE_AS_RAID15     4
+/*
+ * Flags used for creating an RAID 5 array
+ */
+#define CAF_CREATE_R5_NO_BUILD     1
+#define CAF_CREATE_R5_ZERO_INIT    2
+#define CAF_CREATE_R5_BUILD_PARITY 4
+
+#else
+/*
+ * Flags used for creating
+ */
+#define CAF_FOREGROUND_INITIALIZE   1
+#define CAF_BACKGROUND_INITIALIZE   2
+#define CAF_CREATE_R5_WRITE_BACK    (CACHE_POLICY_WRITE_BACK<<CAF_CACHE_POLICY_SHIFT)
+
+
+#define CAF_CACHE_POLICY_MASK       0x1C
+#define CAF_CACHE_POLICY_SHIFT      2
+
+#endif
+
+#define CAF_KEEP_DATA_ALWAYS     0x80
+
+/* Flags used for deleting an array
+ *
+ * DAF_KEEP_DATA_IF_POSSIBLE
+ *    If this flag is set, deleting a RAID 1 array will not destroy the data on both disks.
+ *    Deleting a JBOD should keep partitions on first disk ( not implement now ).
+ *    Deleting a RAID 0/1 should result as two RAID 0 array ( not implement now ).
+ */
+#define DAF_KEEP_DATA_IF_POSSIBLE 1
+#define DAF_KEEP_DATA_ALWAYS      2
+
+/*
+ * event types
+ */
+#define ET_DEVICE_REMOVED   1   /* device removed */
+#define ET_DEVICE_PLUGGED   2   /* device plugged */
+#define ET_DEVICE_ERROR     3   /* device I/O error */
+#define ET_REBUILD_STARTED  4
+#define ET_REBUILD_ABORTED  5
+#define ET_REBUILD_FINISHED 6
+#define ET_SPARE_TOOK_OVER  7
+#define ET_REBUILD_FAILED   8
+#define ET_VERIFY_STARTED   9
+#define ET_VERIFY_ABORTED   10
+#define ET_VERIFY_FAILED    11
+#define ET_VERIFY_FINISHED  12
+#define ET_INITIALIZE_STARTED   13
+#define ET_INITIALIZE_ABORTED   14
+#define ET_INITIALIZE_FAILED    15
+#define ET_INITIALIZE_FINISHED  16
+#define ET_VERIFY_DATA_ERROR    17
+#define ET_TRANSFORM_STARTED    18
+#define ET_TRANSFORM_ABORTED    19
+#define ET_TRANSFORM_FAILED     20
+#define ET_TRANSFORM_FINISHED   21
+#define ET_SMART_FAILED         22
+#define ET_SMART_PASSED         23
+#define ET_SECTOR_REPAIR_FAIL     24
+#define ET_SECTOR_REPAIR_SUCCESS  25
+#define ET_ERASE_FAIL          26
+#define ET_ERASE_SUCCESS       27
+#define ET_CONTINUE_REBUILD_ON_ERROR 28
+
+
+/*
+ * event structure
+ */
+typedef struct _HPT_EVENT {
+       TIME_RECORD Time;
+       DEVICEID    DeviceID;
+       HPT_U8       EventType;
+       HPT_U8      reserved[3];
+
+       HPT_U8      Data[32]; /* various data depend on EventType */
+} HPT_EVENT, *PHPT_EVENT;
+
+/*
+ * IDE pass-through command. Use it at your own risk!
+ */
+typedef struct _IDE_PASS_THROUGH_HEADER {
+       DEVICEID idDisk;             /* disk ID */
+       HPT_U8     bFeaturesReg;     /* feature register */
+       HPT_U8     bSectorCountReg;  /* IDE sector count register. */
+       HPT_U8     bLbaLowReg;       /* IDE LBA low value. */
+       HPT_U8     bLbaMidReg;       /* IDE LBA mid register. */
+       HPT_U8     bLbaHighReg;      /* IDE LBA high value. */
+       HPT_U8     bDriveHeadReg;    /* IDE drive/head register. */
+       HPT_U8     bCommandReg;      /* Actual IDE command. Checked for validity by driver. */
+       HPT_U8     nSectors;         /* data size in sectors, if the command has data transfer */
+       HPT_U8     protocol;         /* IO_COMMAND_(READ,WRITE) or zero for non-DATA */
+       HPT_U8     reserve[3];
+       #define IDE_PASS_THROUGH_buffer(p) ((HPT_U8 *)(p) + sizeof(IDE_PASS_THROUGH_HEADER))
+       /* HPT_U8     DataBuffer[0]; */
+}
+IDE_PASS_THROUGH_HEADER, *PIDE_PASS_THROUGH_HEADER;
+
+typedef struct _IDE_PASS_THROUGH_HEADER_V2 {
+       DEVICEID idDisk;             /* disk ID */
+       HPT_U16    bFeaturesReg;     /* feature register */
+       HPT_U16    bSectorCountReg;  /* IDE sector count register. */
+       HPT_U16    bLbaLowReg;       /* IDE LBA low value. */
+       HPT_U16    bLbaMidReg;       /* IDE LBA mid register. */
+       HPT_U16    bLbaHighReg;      /* IDE LBA high value. */
+       HPT_U8     bDriveHeadReg;    /* IDE drive/head register. */
+       HPT_U8     bCommandReg;      /* Actual IDE command. Checked for validity by driver. */
+       HPT_U16    nSectors;         /* data size in sectors, if the command has data transfer */
+       HPT_U8     protocol;         /* IO_COMMAND_(READ,WRITE) or zero for non-DATA */
+       HPT_U8     reserve;
+       #define IDE_PASS_THROUGH_V2_buffer(p) ((HPT_U8 *)(p) + sizeof(IDE_PASS_THROUGH_HEADER_V2))
+       /* HPT_U8     DataBuffer[0]; */
+}
+IDE_PASS_THROUGH_HEADER_V2, *PIDE_PASS_THROUGH_HEADER_V2;
+
+typedef struct _HPT_SCSI_PASSTHROUGH_IN {
+       DEVICEID idDisk;
+       HPT_U8   protocol;
+       HPT_U8   reserve1;
+       HPT_U8   reserve2;
+       HPT_U8   cdbLength;
+       HPT_U8   cdb[16];
+       HPT_U32  dataLength;
+       /* data follows, if any */
+}
+HPT_SCSI_PASSTHROUGH_IN, *PHPT_SCSI_PASSTHROUGH_IN;
+
+typedef struct _HPT_SCSI_PASSTHROUGH_OUT {
+       HPT_U8   scsiStatus;
+       HPT_U8   reserve1;
+       HPT_U8   reserve2;
+       HPT_U8   reserve3;
+       HPT_U32  dataLength;
+       /* data/sense follows if any */
+}
+HPT_SCSI_PASSTHROUGH_OUT, *PHPT_SCSI_PASSTHROUGH_OUT;
+
+/*
+ * device io packet format
+ */
+typedef struct _DEVICE_IO_EX_PARAMS {
+       DEVICEID idDisk;
+       HPT_U32    Lba;
+       HPT_U16   nSectors;
+       HPT_U8    Command;    /* IO_COMMAD_xxx */
+       HPT_U8    BufferType; /* BUFFER_TYPE_xxx, see below */
+       HPT_U32    BufferPtr;
+}
+DEVICE_IO_EX_PARAMS, *PDEVICE_IO_EX_PARAMS;
+
+#define BUFFER_TYPE_LOGICAL              1 /* logical pointer to buffer */
+#define BUFFER_TYPE_PHYSICAL             2 /* physical address of buffer */
+#define BUFFER_TYPE_LOGICAL_LOGICAL_SG   3 /* logical pointer to logical S/G table */
+#define BUFFER_TYPE_LOGICAL_PHYSICAL_SG  4 /* logical pointer to physical S/G table */
+#define BUFFER_TYPE_PHYSICAL_LOGICAL_SG  5 /* physical address to logical S/G table */
+#define BUFFER_TYPE_PHYSICAL_PHYSICAL_SG 6 /* physical address of physical S/G table */
+#define BUFFER_TYPE_PHYSICAL_PHYSICAL_SG_PIO 7 /* non DMA capable physical address of physical S/G table */
+
+typedef struct _HPT_DRIVER_PARAMETER {
+       char    name[32];
+       HPT_U8  value[32];
+       HPT_U8  type;        /* HPT_DRIVER_PARAMETER_TYPE_* */
+       HPT_U8  persistent;
+       HPT_U8  reserve2[2];
+       HPT_U8  location;    /* 0 - system */
+       HPT_U8  controller;
+       HPT_U8  bus;
+       HPT_U8  reserve1;
+       char    desc[128];
+}
+HPT_DRIVER_PARAMETER, *PHPT_DRIVER_PARAMETER;
+
+#define HPT_DRIVER_PARAMETER_TYPE_INT 1
+#define HPT_DRIVER_PARAMETER_TYPE_BOOL 2
+
+typedef struct _HPT_PM_CMDSTAT {
+       HPT_U64 timeStamp;
+       HPT_U64 lba;
+       HPT_U16 sectors;
+       HPT_U16 reserved;
+       HPT_U32 rspTime;
+}
+HPT_PM_CMDSTAT, *PHPT_PM_CMDSTAT;
+
+#define HIGHEST_RSPTIME_CMD_SAVE 10
+#define RSPTIME_HISTOGRAM_SEGMENT_COUNT 38
+
+typedef struct _HPT_PM_IOSTAT {
+       HPT_PM_CMDSTAT highestRspCmdStatData[HIGHEST_RSPTIME_CMD_SAVE];
+       HPT_U32 rspTimeHistogram[RSPTIME_HISTOGRAM_SEGMENT_COUNT];
+       HPT_U16 pendingIo;
+       HPT_U16 activeIo;
+       HPT_U32 instantKBPs;
+       HPT_U32 averageKBPs;
+       HPT_U32 instantIOPs;
+       HPT_U32 averageIOPs;
+}
+HPT_PM_IOSTAT, *PHPT_PM_IOSTAT;
+
+
+
+/*
+ * ioctl structure
+ */
+#define HPT_IOCTL_MAGIC32 0x1A2B3C4D
+#define HPT_IOCTL_MAGIC   0xA1B2C3D4
+
+typedef struct _HPT_IOCTL_PARAM {
+       HPT_U32   Magic;                 /* used to check if it's a valid ioctl packet */
+       HPT_U32   dwIoControlCode;       /* operation control code */
+       HPT_PTR   lpInBuffer;            /* input data buffer */
+       HPT_U32   nInBufferSize;         /* size of input data buffer */
+       HPT_PTR   lpOutBuffer;           /* output data buffer */
+       HPT_U32   nOutBufferSize;        /* size of output data buffer */
+       HPT_PTR   lpBytesReturned;       /* count of HPT_U8s returned */
+}
+HPT_IOCTL_PARAM, *PHPT_IOCTL_PARAM;
+
+/* for 32-bit app running on 64-bit system */
+typedef struct _HPT_IOCTL_PARAM32 {
+       HPT_U32   Magic;
+       HPT_U32   dwIoControlCode;
+       HPT_U32   lpInBuffer;
+       HPT_U32   nInBufferSize;
+       HPT_U32   lpOutBuffer;
+       HPT_U32   nOutBufferSize;
+       HPT_U32   lpBytesReturned;
+}
+HPT_IOCTL_PARAM32, *PHPT_IOCTL_PARAM32;
+
+#if !defined(__KERNEL__) || defined(SIMULATE)
+/*
+ * User-mode ioctl parameter passing conventions:
+ *   The ioctl function implementation is platform specific, so we don't
+ * have forced rules for it. However, it's suggested to use a parameter
+ * passing method as below
+ *   1) Put all input data continuously in an input buffer.
+ *   2) Prepare an output buffer with enough size if needed.
+ *   3) Fill a HPT_IOCTL_PARAM structure.
+ *   4) Pass the structure to driver through a platform-specific method.
+ * This is implemented in the mid-layer user-mode library. The UI
+ * programmer needn't care about it.
+ */
+
+/************************************************************************
+ * User mode functions
+ ************************************************************************/
+/*
+ * hpt_get_version
+ * Version compatibility: all versions
+ * Parameters:
+ *  None
+ * Returns:
+ *  interface version. 0 when fail.
+ */
+HPT_U32 hpt_get_version(void);
+
+/*
+ * hpt_get_driver_capabilities
+ * Version compatibility: v1.0.0.2 or later
+ * Parameters:
+ *  Pointer to receive a DRIVE_CAPABILITIES structure. The caller must set
+ *  dwSize member to sizeof(DRIVER_CAPABILITIES). The callee must check this
+ *  member to see if it's correct.
+ * Returns:
+ *  0 - Success
+ */
+int hpt_get_driver_capabilities(PDRIVER_CAPABILITIES cap);
+int hpt_get_driver_capabilities_v2(PDRIVER_CAPABILITIES_V2 cap);
+
+/*
+ * hpt_get_controller_count
+ * Version compatibility: v1.0.0.1 or later
+ * Parameters:
+ *  None
+ * Returns:
+ *  number of controllers
+ */
+int hpt_get_controller_count(void);
+
+/* hpt_get_controller_info
+ * Version compatibility: v1.0.0.1 or later
+ * Parameters:
+ *  id      Controller id
+ *  pInfo   pointer to CONTROLLER_INFO buffer
+ * Returns:
+ *  0       Success, controller info is put into (*pInfo ).
+ */
+int hpt_get_controller_info(int id, PCONTROLLER_INFO pInfo);
+
+#if HPT_INTERFACE_VERSION>=0x01020000
+/* hpt_get_controller_info_v2
+ * Version compatibility: v2.0.0.0 or later
+ * Parameters:
+ *  id      Controller id
+ *  pInfo   pointer to CONTROLLER_INFO_V2 buffer
+ * Returns:
+ *  0       Success, controller info is put into (*pInfo ).
+ */
+int hpt_get_controller_info_v2(int id, PCONTROLLER_INFO_V2 pInfo);
+
+/* hpt_get_controller_info_v3
+ * Version compatibility: v2.0.0.0 or later
+ * Parameters:
+ *  id      Controller id
+ *  pInfo   pointer to CONTROLLER_INFO_V3 buffer
+ * Returns:
+ *  0       Success, controller info is put into (*pInfo ).
+ */
+int hpt_get_controller_info_v3(int id, PCONTROLLER_INFO_V3 pInfo);
+#endif
+
+/* hpt_get_channel_info
+ * Version compatibility: v1.0.0.1 or later
+ * Parameters:
+ *  id      Controller id
+ *  bus     bus number
+ *  pInfo   pointer to CHANNEL_INFO buffer
+ * Returns:
+ *  0       Success, channel info is put into (*pInfo ).
+ */
+int hpt_get_channel_info(int id, int bus, PCHANNEL_INFO pInfo);
+
+/* hpt_get_channel_info_v2
+ * Version compatibility: v1.0.0.1 or later
+ * Parameters:
+ *  id      Controller id
+ *  bus     bus number
+ *  pInfo   pointer to CHANNEL_INFO buffer
+ * Returns:
+ *  0       Success, channel info is put into (*pInfo ).
+ */
+int hpt_get_channel_info_v2(int id, int bus, PCHANNEL_INFO_V2 pInfo);
+
+/* hpt_get_logical_devices
+ * Version compatibility: v1.0.0.1 or later
+ * Parameters:
+ *  pIds        pointer to a DEVICEID array
+ *  nMaxCount   array size
+ * Returns:
+ *  Number of ID returned. All logical device IDs are put into pIds array.
+ *  Note: A spare disk is not a logical device.
+ */
+int hpt_get_logical_devices(DEVICEID * pIds, int nMaxCount);
+
+/* hpt_get_physical_devices
+ * Version compatibility: v2.1.0.0 or later
+ * Parameters:
+ *  pIds        pointer to a DEVICEID array
+ *  nMaxCount   array size
+ * Returns:
+ *  Number of ID returned. All physical device IDs are put into pIds array.
+ */
+int hpt_get_physical_devices(DEVICEID * pIds, int nMaxCount);
+
+/* hpt_get_device_info
+ * Version compatibility: v1.0.0.1 or later
+ * Parameters:
+ *  id      logical device id
+ *  pInfo   pointer to LOGICAL_DEVICE_INFO structure
+ * Returns:
+ *  0 - Success
+ */
+int hpt_get_device_info(DEVICEID id, PLOGICAL_DEVICE_INFO pInfo);
+
+/* hpt_create_array
+ * Version compatibility: v1.0.0.1 or later
+ * Parameters:
+ *  pParam      pointer to CREATE_ARRAY_PARAMS structure
+ * Returns:
+ *  0   failed
+ *  else return array id
+ */
+DEVICEID hpt_create_array(PCREATE_ARRAY_PARAMS pParam);
+
+/* hpt_delete_array
+ * Version compatibility: v1.0.0.1 or later
+ * Parameters:
+ *  id      array id
+ * Returns:
+ *  0   Success
+ */
+int hpt_delete_array(DEVICEID id, HPT_U32 options);
+
+/* hpt_device_io
+ *  Read/write data on array and physcal device.
+ * Version compatibility: v1.0.0.1 or later
+ * Parameters:
+ *  id      device id. If it's an array ID, IO will be performed on the array.
+ *          If it's a physical device ID, IO will be performed on the device.
+ *  cmd     IO_COMMAND_READ or IO_COMMAND_WRITE
+ *  buffer  data buffer
+ *  length  data size
+ * Returns:
+ *  0   Success
+ */
+int hpt_device_io(DEVICEID id, int cmd, HPT_U32 lba, HPT_U32 nSector, void * buffer);
+
+/* hpt_add_disk_to_array
+ *   Used to dynamicly add a disk to an RAID1, RAID0/1, RAID1/0 or RAID5 array.
+ *   Auto-rebuild will start.
+ * Version compatibility: v1.0.0.1 or later
+ * Parameters:
+ *  idArray     array id
+ *  idDisk      disk id
+ * Returns:
+ *  0   Success
+ */
+int hpt_add_disk_to_array(DEVICEID idArray, DEVICEID idDisk);
+
+/* hpt_add_spare_disk
+ * Version compatibility: v1.0.0.1 or later
+ *   Add a disk to spare pool.
+ * Parameters:
+ *  idDisk      disk id
+ * Returns:
+ *  0   Success
+ */
+int hpt_add_spare_disk(DEVICEID idDisk);
+
+/* hpt_add_dedicated_spare
+ * Version compatibility: v1.0.0.3 or later
+ *   Add a spare disk to an array
+ * Parameters:
+ *  idDisk      disk id
+ *  idArray     array id
+ * Returns:
+ *  0   Success
+ */
+int hpt_add_dedicated_spare(DEVICEID idDisk, DEVICEID idArray);
+
+/* hpt_remove_spare_disk
+ *   remove a disk from spare pool.
+ * Version compatibility: v1.0.0.1 or later
+ * Parameters:
+ *  idDisk      disk id
+ * Returns:
+ *  0   Success
+ */
+int hpt_remove_spare_disk(DEVICEID idDisk);
+
+/* hpt_get_event
+ *   Used to poll events from driver.
+ * Version compatibility: v1.0.0.1 or later
+ * Parameters:
+ *   pEvent    pointer to HPT_EVENT structure
+ * Returns:
+ *  0   Success, event info is filled in *pEvent
+ */
+int hpt_get_event(PHPT_EVENT pEvent);
+
+/* hpt_rebuild_data_block
+ *   Used to copy data from source disk and mirror disk.
+ * Version compatibility: v1.0.0.1 or later
+ * Parameters:
+ *   idArray        Array ID (RAID1, 0/1 or RAID5)
+ *   Lba            Start LBA for each array member
+ *   nSector        Number of sectors for each array member (RAID 5 will ignore this parameter)
+ *
+ * Returns:
+ *  0   Success, event info is filled in *pEvent
+ */
+int hpt_rebuild_data_block(DEVICEID idMirror, HPT_U32 Lba, HPT_U8 nSector);
+#define hpt_rebuild_mirror(p1, p2, p3) hpt_rebuild_data_block(p1, p2, p3)
+
+/* hpt_set_array_state
+ *   set array state.
+ * Version compatibility: v1.0.0.1 or later
+ * Parameters:
+ *   idArray        Array ID
+ *   state          See above 'array states' constants, possible values are:
+ *     MIRROR_REBUILD_START
+ *        Indicate that GUI wants to rebuild a mirror array
+ *     MIRROR_REBUILD_ABORT
+ *        GUI wants to abort rebuilding an array
+ *     MIRROR_REBUILD_COMPLETE
+ *        GUI finished to rebuild an array. If rebuild is done by driver this
+ *        state has no use
+ *
+ * Returns:
+ *  0   Success
+ */
+int hpt_set_array_state(DEVICEID idArray, HPT_U32 state);
+
+/* hpt_set_array_info
+ *   set array info.
+ * Version compatibility: v1.0.0.1 or later
+ * Parameters:
+ *   idArray        Array ID
+ *   pInfo          pointer to new info
+ *
+ * Returns:
+ *  0   Success
+ */
+int hpt_set_array_info(DEVICEID idArray, PALTERABLE_ARRAY_INFO pInfo);
+
+/* hpt_set_device_info
+ *   set device info.
+ * Version compatibility: v1.0.0.1 or later
+ * Parameters:
+ *   idDisk         device ID
+ *   pInfo          pointer to new info
+ *
+ * Returns:
+ *  0   Success
+ * Additional notes:
+ *  If idDisk==0, call to this function will stop buzzer on the adapter
+ *  (if supported by driver).
+ */
+int hpt_set_device_info(DEVICEID idDisk, PALTERABLE_DEVICE_INFO pInfo);
+
+#if HPT_INTERFACE_VERSION >= 0x01000004
+int hpt_set_device_info_v2(DEVICEID idDisk, PALTERABLE_DEVICE_INFO_V2 pInfo);
+#endif
+
+/* hpt_rescan_devices
+ *   rescan devices
+ * Version compatibility: v1.0.0.1 or later
+ * Parameters:
+ *   None
+ * Returns:
+ *   0  Success
+ */
+int hpt_rescan_devices(void);
+
+/* hpt_get_601_info
+ *   Get HPT601 status
+ * Version compatibiilty: v1.0.0.3 or later
+ * Parameters:
+ *   idDisk - Disk handle
+ *   PHPT601_INFO - pointer to HPT601 info buffer
+ * Returns:
+ *   0  Success
+ */
+int hpt_get_601_info(DEVICEID idDisk, PHPT601_INFO pInfo);
+
+/* hpt_set_601_info
+ *   HPT601 function control
+ * Version compatibiilty: v1.0.0.3 or later
+ * Parameters:
+ *   idDisk - Disk handle
+ *   PHPT601_INFO - pointer to HPT601 info buffer
+ * Returns:
+ *   0  Success
+ */
+int hpt_set_601_info(DEVICEID idDisk, PHPT601_INFO pInfo);
+
+/* hpt_lock_device
+ *   Lock a block on a device (prevent OS accessing it)
+ * Version compatibiilty: v1.0.0.3 or later
+ * Parameters:
+ *   idDisk - Disk handle
+ *   Lba - Start LBA
+ *   nSectors - number of sectors
+ * Returns:
+ *   0  Success
+ */
+int hpt_lock_device(DEVICEID idDisk, HPT_U32 Lba, HPT_U8 nSectors);
+
+/* hpt_lock_device
+ *   Unlock a device
+ * Version compatibiilty: v1.0.0.3 or later
+ * Parameters:
+ *   idDisk - Disk handle
+ * Returns:
+ *   0  Success
+ */
+int hpt_unlock_device(DEVICEID idDisk);
+
+/* hpt_ide_pass_through
+ *  send a ATA passthrough command to a device.
+ * Version compatibility: v1.0.0.3 or later
+ * Parameters:
+ *   p - IDE_PASS_THROUGH header pointer
+ * Returns:
+ *   0  Success
+ */
+int hpt_ide_pass_through(PIDE_PASS_THROUGH_HEADER p);
+int hpt_ide_pass_through_v2(PIDE_PASS_THROUGH_HEADER_V2 p);
+
+/* hpt_scsi_passthrough
+ *  send a SCSI passthrough command to a device.
+ * Version compatibility: v2.0.0.0 or later
+ * Parameters:
+ *   in  - HPT_SCSI_PASSTHROUGH_IN header pointer
+ *   out - PHPT_SCSI_PASSTHROUGH_OUT header pointer
+ *   insize, outsize - in/out buffer size
+ * Returns:
+ *   0  Success
+ */
+int hpt_scsi_passthrough(PHPT_SCSI_PASSTHROUGH_IN in, HPT_U32 insize,
+                               PHPT_SCSI_PASSTHROUGH_OUT out, HPT_U32 outsize);
+
+/* hpt_verify_data_block
+ *   verify data block on RAID1 or RAID5.
+ * Version compatibility: v1.0.0.3 or later
+ * Parameters:
+ *   idArray - Array ID
+ *   Lba - block number (on each array member, not logical block!)
+ *   nSectors - Sectors for each member (RAID 5 will ignore this parameter)
+ * Returns:
+ *   0  Success
+ *   1  Data compare error
+ *   2  I/O error
+ */
+int hpt_verify_data_block(DEVICEID idArray, HPT_U32 Lba, HPT_U8 nSectors);
+
+/* hpt_initialize_data_block
+ *   initialize data block (fill with zero) on RAID5
+ * Version compatibility: v1.0.0.3 or later
+ * Parameters:
+ *   idArray - Array ID
+ *   Lba - block number (on each array member, not logical block!)
+ *   nSectors - Sectors for each member (RAID 5 will ignore this parameter)
+ * Returns:
+ *   0  Success
+ */
+int hpt_initialize_data_block(DEVICEID idArray, HPT_U32 Lba, HPT_U8 nSectors);
+
+/* hpt_device_io_ex
+ *   extended device I/O function
+ * Version compatibility: v1.0.0.3 or later
+ * Parameters:
+ *   idArray - Array ID
+ *   Lba - block number (on each array member, not logical block!)
+ *   nSectors - Sectors for each member
+ *   buffer - I/O buffer or s/g address
+ * Returns:
+ *   0  Success
+ */
+int hpt_device_io_ex(PDEVICE_IO_EX_PARAMS param);
+
+/* hpt_set_boot_mark
+ *   select boot device
+ * Version compatibility: v1.0.0.3 or later
+ * Parameters:
+ *   id - logical device ID. If id is 0 the boot mark will be removed.
+ * Returns:
+ *   0  Success
+ */
+int hpt_set_boot_mark(DEVICEID id);
+
+/* hpt_query_remove
+ *  check if device can be removed safely
+ * Version compatibility: v1.0.0.4 or later
+ * Parameters:
+ *  ndev - number of devices
+ *  pIds - device ID list
+ * Returns:
+ *  0  - Success
+ *  -1 - unknown error
+ *  n  - the n-th device that can't be removed
+ */
+int hpt_query_remove(HPT_U32 ndev, DEVICEID *pIds);
+
+/* hpt_remove_devices
+ *  remove a list of devices
+ * Version compatibility: v1.0.0.4 or later
+ * Parameters:
+ *  ndev - number of devices
+ *  pIds - device ID list
+ * Returns:
+ *  0  - Success
+ *  -1 - unknown error
+ *  n  - the n-th device that can't be removed
+ */
+int hpt_remove_devices(HPT_U32 ndev, DEVICEID *pIds);
+
+/* hpt_create_array_v2
+ * Version compatibility: v1.1.0.0 or later
+ * Parameters:
+ *  pParam      pointer to CREATE_ARRAY_PARAMS_V2 structure
+ * Returns:
+ *  0   failed
+ *  else return array id
+ */
+#if HPT_INTERFACE_VERSION>=0x01010000
+DEVICEID hpt_create_array_v2(PCREATE_ARRAY_PARAMS_V2 pParam);
+#endif
+
+/* hpt_create_array_v3
+ * Version compatibility: v2.0.0.1 or later
+ * Parameters:
+ *  pParam      pointer to CREATE_ARRAY_PARAMS_V3 structure
+ * Returns:
+ *  0   failed
+ *  else return array id
+ */
+#if HPT_INTERFACE_VERSION>=0x02000001
+DEVICEID hpt_create_array_v3(PCREATE_ARRAY_PARAMS_V3 pParam);
+#endif
+
+/* hpt_get_device_info_v2
+ * Version compatibility: v1.1.0.0 or later
+ * Parameters:
+ *  id      logical device id
+ *  pInfo   pointer to LOGICAL_DEVICE_INFO_V2 structure
+ * Returns:
+ *  0 - Success
+ */
+#if HPT_INTERFACE_VERSION>=0x01010000
+int hpt_get_device_info_v2(DEVICEID id, PLOGICAL_DEVICE_INFO_V2 pInfo);
+#endif
+
+/* hpt_get_device_info_v3
+ * Version compatibility: v1.2.0.0 or later
+ * Parameters:
+ *  id      logical device id
+ *  pInfo   pointer to LOGICAL_DEVICE_INFO_V3 structure
+ * Returns:
+ *  0 - Success
+ */
+#if HPT_INTERFACE_VERSION>=0x01020000
+int hpt_get_device_info_v3(DEVICEID id, PLOGICAL_DEVICE_INFO_V3 pInfo);
+#endif
+
+/* hpt_get_device_info_v4
+ * Version compatibility: v2.0.0.1 or later
+ * Parameters:
+ *  id      logical device id
+ *  pInfo   pointer to LOGICAL_DEVICE_INFO_V4 structure
+ * Returns:
+ *  0 - Success
+ */
+#if HPT_INTERFACE_VERSION>=0x02000001
+int hpt_get_device_info_v4(DEVICEID id, PLOGICAL_DEVICE_INFO_V4 pInfo);
+#endif
+
+/* hpt_create_transform
+ *  create a transform instance.
+ * Version compatibility: v2.0.0.0 or later
+ * Parameters:
+ *  idArray - source array
+ *  destInfo - destination array info
+ * Returns:
+ *  destination array id
+ */
+#if HPT_INTERFACE_VERSION>=0x02000000
+DEVICEID hpt_create_transform(DEVICEID idArray, PCREATE_ARRAY_PARAMS_V2 destInfo);
+#endif
+
+/* hpt_create_transform_v2
+ *  create a transform instance.
+ * Version compatibility: v2.0.0.1 or later
+ * Parameters:
+ *  idArray - source array
+ *  destInfo - destination array info
+ * Returns:
+ *  destination array id
+ */
+#if HPT_INTERFACE_VERSION>=0x02000001
+DEVICEID hpt_create_transform_v2(DEVICEID idArray, PCREATE_ARRAY_PARAMS_V3 destInfo);
+#endif
+
+/* hpt_step_transform
+ *  move a block in a tranform progress.
+ *  This function is called by mid-layer, not GUI (which uses set_array_state instead).
+ * Version compatibility: v2.0.0.0 or later
+ * Parameters:
+ *  idArray - destination array ID
+ *            the source ID will be invalid when transform complete.
+ * Returns:
+ *  0 - Success
+ */
+#if HPT_INTERFACE_VERSION>=0x02000000
+int hpt_step_transform(DEVICEID idArray);
+#endif
+
+/* hpt_set_vdev_info
+ *  set information for disk or array
+ * Version compatibility: v1.2.0.0 or later
+ * Parameters:
+ *  dev - destination device
+ *
+ * Returns:
+ *  0 - Success
+ */
+#if HPT_INTERFACE_VERSION>=0x01020000
+int hpt_set_vdev_info(DEVICEID dev, PSET_VDEV_INFO pInfo);
+#endif
+
+/* hpt_init_disks
+ *  initialize disks for use
+ * Version compatibility: v2.0.0.0 or later
+ * Parameters:
+ *  ndev - number of disks to initialize
+ *  pIds - array of DEVICEID
+ *
+ * Returns:
+ *  0 - Success
+ */
+#if HPT_INTERFACE_VERSION>=0x02000000
+int hpt_init_disks(HPT_U32 ndev, DEVICEID * pIds);
+#endif
+
+/* hpt_calc_max_array_capacity
+ *  cap max capacity of the array user want to create or transform
+ * Version compatibility: v1.2.0.0 or later
+ * Parameters:
+ *  source - if transform, this is the source array, otherwise, it should be zero
+ *  destInfo - target array params
+ * Returns:
+ *  0 - Success
+ *  cap - max capacity of the target array
+ */
+#if HPT_INTERFACE_VERSION>=0x01020000
+int hpt_calc_max_array_capacity(DEVICEID source, PCREATE_ARRAY_PARAMS_V2 destInfo, HPT_U64 * cap);
+#endif
+
+/* hpt_calc_max_array_capacity_v2
+ *  cap max capacity of the array user want to create or transform
+ * Version compatibility: v2.0.0.1 or later
+ * Parameters:
+ *  source - if transform, this is the source array, otherwise, it should be zero
+ *  destInfo - target array params
+ * Returns:
+ *  0 - Success
+ *  cap - max capacity of the target array
+ */
+#if HPT_INTERFACE_VERSION>=0x02000001
+int hpt_calc_max_array_capacity_v2(DEVICEID source, PCREATE_ARRAY_PARAMS_V3 destInfo, HPT_U64 * cap);
+#endif
+
+/* hpt_rebuild_data_block2
+ *   Used to copy data from source disk and mirror disk.
+ * Version compatibility: v1.1.0.0 or later
+ * Parameters:
+ *   idArray        Array ID (RAID1, 0/1 or RAID5)
+ *   Lba            Start LBA for each array member
+ *   nSector        Number of sectors for each array member (RAID 5 will ignore this parameter)
+ *
+ * Returns:
+ *  0   Success, event info is filled in *pEvent
+ */
+#if HPT_INTERFACE_VERSION>=0x01010000
+int hpt_rebuild_data_block_v2(DEVICEID idMirror, HPT_U64 Lba, HPT_U16 nSector);
+#endif
+
+/* hpt_verify_data_block2
+ *   verify data block on RAID1 or RAID5.
+ * Version compatibility: v1.1.0.0 or later
+ * Parameters:
+ *   idArray - Array ID
+ *   Lba - block number (on each array member, not logical block!)
+ *   nSectors - Sectors for each member (RAID 5 will ignore this parameter)
+ * Returns:
+ *   0  Success
+ *   1  Data compare error
+ *   2  I/O error
+ */
+#if HPT_INTERFACE_VERSION>=0x01010000
+int hpt_verify_data_block_v2(DEVICEID idArray, HPT_U64 Lba, HPT_U16 nSectors);
+#endif
+
+/* hpt_initialize_data_block2
+ *   initialize data block (fill with zero) on RAID5
+ * Version compatibility: v1.1.0.0 or later
+ * Parameters:
+ *   idArray - Array ID
+ *   Lba - block number (on each array member, not logical block!)
+ *   nSectors - Sectors for each member (RAID 5 will ignore this parameter)
+ * Returns:
+ *   0  Success
+ */
+#if HPT_INTERFACE_VERSION>=0x01010000
+int hpt_initialize_data_block_v2(DEVICEID idArray, HPT_U64 Lba, HPT_U16 nSectors);
+#endif
+
+/* hpt_i2c_transaction
+ *   perform an transaction on i2c bus
+ * Version compatibility: v2.0.0.0 or later
+ * Parameters:
+ *   indata[0] - controller ID
+ * Returns:
+ *   0  Success
+ */
+#if HPT_INTERFACE_VERSION>=0x01020000
+int hpt_i2c_transaction(HPT_U8 *indata, HPT_U32 inlen, HPT_U8 *outdata, HPT_U32 outlen, HPT_U32 *poutlen);
+#endif
+
+/* hpt_get_parameter_list
+ *   get a list of driver parameters.
+ * Version compatibility: v1.0.0.0 or later
+ * Parameters:
+ *   location - parameter location
+ *   outBuffer - a buffer to hold the output
+ *   outBufferSize - size of outBuffer
+ * Returns:
+ *   0  Success
+ *      put in outBuffer a list of zero terminated parameter names. the whole list
+ *      is terminated with an additional zero byte.
+ */
+int hpt_get_parameter_list(HPT_U32 location, char *outBuffer, HPT_U32 outBufferSize);
+
+/* hpt_{get,set}_parameter
+ *   get/set a parameter value.
+ * Version compatibility: v1.0.0.0 or later
+ * Parameters:
+ *   pParam - a pointer to HPT_DRIVER_PARAMETER.
+ * Returns:
+ *   0  Success
+ */
+int hpt_get_parameter(PHPT_DRIVER_PARAMETER pParam);
+int hpt_set_parameter(PHPT_DRIVER_PARAMETER pParam);
+int hpt_reenumerate_device(DEVICEID id);
+
+/*
+ * hpt_get_enclosure_count
+ * Version compatibility: v2.1.0.0 or later
+ * Parameters:
+ *  controller_id
+ * Returns:
+ *  number of enclosurers
+ */
+int hpt_get_enclosure_count(int ctlr_id);
+
+/* hpt_get_enclosure_info
+ * Version compatibility: v2.1.0.0 or later
+ * Parameters:
+ *  id      enclosure id
+ *  pInfo   pointer to ENCLOSURE_INFO buffer
+ * Returns:
+ *  0       Success, enclosure info is put into (*pInfo ).
+ */
+int hpt_get_enclosure_info(int ctlr_id, int enc_id, PENCLOSURE_INFO pInfo);
+
+int hpt_get_enclosure_info_v2(int ctlr_id, int enc_id, PENCLOSURE_INFO_V2 pInfo);
+
+int hpt_get_enclosure_info_v3(int ctlr_id, int enc_id, PENCLOSURE_INFO_V3 pInfo);
+
+/* performance monitor interface
+ * Version compatibility: v2.1.0.0 or later
+ */
+int hpt_get_perfmon_status(int ctlr_id, int *p_status);
+int hpt_set_perfmon_status(int ctlr_id, int enable);
+int hpt_get_perfmon_data(DEVICEID id, PHPT_PM_IOSTAT iostat);
+
+/* hpt_get_controller_venid
+ * Version compatibility: v1.0.0.0 or later
+ */
+int hpt_get_controller_venid(int ctlr_id, HPT_U32 *venid);
+
+#endif
+
+#pragma pack()
+
+#ifdef __cplusplus
+}
+#endif
+#endif

diff --git a/sys/dev/raid/hpt27xx/i386-elf.hpt27xx_lib.o.uu b/sys/dev/raid/hpt27xx/i386-elf.hpt27xx_lib.o.uu
new file mode 100644 (file)
index 0000000..ce5aafe
--- /dev/null
+++ b/sys/dev/raid/hpt27xx/i386-elf.hpt27xx_lib.o.uu
@@ -0,0 +1,15583 @@
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