drm/i915: Add more Coffeelake PCI IDs
authorFrançois Tigeot <ftigeot@wolfpond.org>
Tue, 4 Dec 2018 20:57:46 +0000 (21:57 +0100)
committerFrançois Tigeot <ftigeot@wolfpond.org>
Tue, 4 Dec 2018 20:57:46 +0000 (21:57 +0100)
Obtained-from: Linux 4.19

sys/dev/drm/i915/i915_drv.c
sys/dev/drm/include/drm/i915_pciids.h

index c33edd6..4eadca9 100644 (file)
@@ -367,7 +367,13 @@ static const struct intel_device_info intel_kabylake_gt3_info = {
        .ring_mask = RENDER_RING | BSD_RING | BLT_RING | VEBOX_RING | BSD2_RING,
 };
 
-static const struct intel_device_info intel_coffeelake_info = {
+static const struct intel_device_info intel_coffeelake_gt1_info = {
+       BDW_FEATURES, \
+       .is_kabylake = 1,
+       .gen = 9,
+};
+
+static const struct intel_device_info intel_coffeelake_gt2_info = {
        BDW_FEATURES, \
        .is_kabylake = 1,
        .gen = 9,
@@ -427,9 +433,11 @@ static const struct pci_device_id pciidlist[] = {
        INTEL_KBL_GT2_IDS(&intel_kabylake_info),
        INTEL_KBL_GT3_IDS(&intel_kabylake_gt3_info),
        INTEL_KBL_GT4_IDS(&intel_kabylake_gt3_info),
-       INTEL_CFL_S_IDS(&intel_coffeelake_info),
-       INTEL_CFL_H_IDS(&intel_coffeelake_info),
-       INTEL_CFL_U_IDS(&intel_coffeelake_gt3_info),
+       INTEL_CFL_S_GT1_IDS(&intel_coffeelake_gt1_info),
+       INTEL_CFL_S_GT2_IDS(&intel_coffeelake_gt2_info),
+       INTEL_CFL_H_GT2_IDS(&intel_coffeelake_gt2_info),
+       INTEL_CFL_U_GT2_IDS(&intel_coffeelake_gt2_info),
+       INTEL_CFL_U_GT3_IDS(&intel_coffeelake_gt3_info),
        {0, 0, 0}
 };
 
index cc12f34..8006cab 100644 (file)
        INTEL_KBL_GT4_IDS(info)
 
 /* CFL S */
-#define INTEL_CFL_S_IDS(info) \
+#define INTEL_CFL_S_GT1_IDS(info) \
        INTEL_VGA_DEVICE(0x3E90, info), /* SRV GT1 */ \
        INTEL_VGA_DEVICE(0x3E93, info), /* SRV GT1 */ \
+       INTEL_VGA_DEVICE(0x3E99, info)  /* SRV GT1 */
+
+#define INTEL_CFL_S_GT2_IDS(info) \
        INTEL_VGA_DEVICE(0x3E91, info), /* SRV GT2 */ \
        INTEL_VGA_DEVICE(0x3E92, info), /* SRV GT2 */ \
-       INTEL_VGA_DEVICE(0x3E96, info)  /* SRV GT2 */
+       INTEL_VGA_DEVICE(0x3E96, info), /* SRV GT2 */ \
+       INTEL_VGA_DEVICE(0x3E9A, info)  /* SRV GT2 */
 
 /* CFL H */
-#define INTEL_CFL_H_IDS(info) \
+#define INTEL_CFL_H_GT2_IDS(info) \
        INTEL_VGA_DEVICE(0x3E9B, info), /* Halo GT2 */ \
        INTEL_VGA_DEVICE(0x3E94, info)  /* Halo GT2 */
 
-/* CFL U */
-#define INTEL_CFL_U_IDS(info) \
+/* CFL U GT2 */
+#define INTEL_CFL_U_GT2_IDS(info) \
+       INTEL_VGA_DEVICE(0x3EA9, info)
+
+/* CFL U GT3 */
+#define INTEL_CFL_U_GT3_IDS(info) \
+       INTEL_VGA_DEVICE(0x3EA5, info), /* ULT GT3 */ \
        INTEL_VGA_DEVICE(0x3EA6, info), /* ULT GT3 */ \
        INTEL_VGA_DEVICE(0x3EA7, info), /* ULT GT3 */ \
-       INTEL_VGA_DEVICE(0x3EA8, info), /* ULT GT3 */ \
-       INTEL_VGA_DEVICE(0x3EA5, info)  /* ULT GT3 */
+       INTEL_VGA_DEVICE(0x3EA8, info)  /* ULT GT3 */
 
 #endif /* _I915_PCIIDS_H */