The RX max coalesce BDs is limited to 255, which means that the chip will
generate ~5800 interrupts/s when it sinks 1.48Mpps tiny packets. However,
interrupt rate at 4000Hz is already enough for the chip to sink 1.48Mpps
tiny packets, so ticks based RX interrupt moderation should be prefered.
sc->bnx_tx_coal_ticks = BNX_TX_COAL_TICKS_DEF;
sc->bnx_rx_coal_bds = BNX_RX_COAL_BDS_DEF;
sc->bnx_tx_coal_bds = BNX_TX_COAL_BDS_DEF;
sc->bnx_tx_coal_ticks = BNX_TX_COAL_TICKS_DEF;
sc->bnx_rx_coal_bds = BNX_RX_COAL_BDS_DEF;
sc->bnx_tx_coal_bds = BNX_TX_COAL_BDS_DEF;
- sc->bnx_rx_coal_bds_int = BNX_RX_COAL_BDS_DEF;
- sc->bnx_tx_coal_bds_int = BNX_TX_COAL_BDS_DEF;
+ sc->bnx_rx_coal_bds_int = BNX_RX_COAL_BDS_INT_DEF;
+ sc->bnx_tx_coal_bds_int = BNX_TX_COAL_BDS_INT_DEF;
/* Set up ifnet structure */
ifp->if_softc = sc;
/* Set up ifnet structure */
ifp->if_softc = sc;
/* RX coalesce BDs */
#define BNX_RX_COAL_BDS_MIN 0
/* RX coalesce BDs */
#define BNX_RX_COAL_BDS_MIN 0
-#define BNX_RX_COAL_BDS_DEF 80
+#define BNX_RX_COAL_BDS_DEF 0
+#define BNX_RX_COAL_BDS_INT_DEF 80
#define BNX_RX_COAL_BDS_MAX 255
/* TX coalesce BDs */
#define BNX_TX_COAL_BDS_MIN 0
#define BNX_TX_COAL_BDS_DEF 128
#define BNX_RX_COAL_BDS_MAX 255
/* TX coalesce BDs */
#define BNX_TX_COAL_BDS_MIN 0
#define BNX_TX_COAL_BDS_DEF 128
+#define BNX_TX_COAL_BDS_INT_DEF 128
#define BNX_TX_COAL_BDS_MAX 255
#endif /* !_IF_BNXVAR_H_ */
#define BNX_TX_COAL_BDS_MAX 255
#endif /* !_IF_BNXVAR_H_ */