/*
* Setup the machine level interrupt vector
+ *
+ * XXX temporary workaround for some ACPI brokedness. ACPI installs
+ * its interrupt too early, before the IOAPICs have been configured,
+ * which means the IOAPIC is not enabled by the registration of the
+ * ACPI interrupt. Anything else sharing that IRQ will wind up not
+ * being enabled. Temporarily work around the problem by always
+ * installing and enabling on every new interrupt handler, even
+ * if one has already been setup on that irq.
*/
- if (intr < FIRST_SOFTINT && info->i_slow + info->i_fast == 1) {
+ if (intr < FIRST_SOFTINT /* && info->i_slow + info->i_fast == 1*/) {
if (machintr_vector_setup(intr, intr_flags))
kprintf("machintr_vector_setup: failed on irq %d\n", intr);
}
* clear the IRR bit.
*/
if (int_to_apicintpin[intr].ioapic >= 0) {
- if (bootverbose)
- kprintf("IOAPIC: try clearing IRR for irq %d\n", intr);
imen_lock();
select = int_to_apicintpin[intr].redirindex;
value = io_apic_read(int_to_apicintpin[intr].ioapic, select);
intpin = io_apic_ints[intr].dst_apic_int;
assign_apic_irq(apic, intpin, irq);
+ io_apic_setup_intpin(apic, intpin);
}
break;
}
}
-
- /* Assign PCI interrupts */
- for (x = 0; x < nintrs; ++x) {
- if (io_apic_ints[x].int_type == 0 &&
- io_apic_ints[x].int_vector == 0xff &&
- apic_int_is_bus_type(x, PCI))
- allocate_apic_irq(x);
- }
+ /* PCI interrupt assignment is deferred */
}
#endif
&& (SRCBUSDEVICE(intr) == pciDevice)
&& (SRCBUSLINE(intr) == pciInt)) { /* a candidate IRQ */
if (apic_int_is_bus_type(intr, PCI)) {
- if (INTIRQ(intr) == 0xff) {
- kprintf("IOAPIC: pci_apic_irq() "
- "failed\n");
+ if (INTIRQ(intr) == 0xff)
+ allocate_apic_irq(intr);
+ if (INTIRQ(intr) == 0xff)
return -1; /* unassigned */
- }
return INTIRQ(intr); /* exact match */
}
}