This function will properly setup rid and flags for "legacy" interrupt.
If MSI is enabled, then this function will try allocate 1 MSI message
and setup rid and flags properly for MSI based interrupt resource.
}
#endif /* COMPAT_OLDPCI */
+
+int
+pci_alloc_1intr(device_t dev, int msi_enable, int *rid0, u_int *flags0)
+{
+ int rid, type;
+ u_int flags;
+ char env[64];
+
+ rid = 0;
+ type = PCI_INTR_TYPE_LEGACY;
+ flags = RF_SHAREABLE | RF_ACTIVE;
+
+ ksnprintf(env, sizeof(env), "hw.%s.msi.enable",
+ device_get_nameunit(dev));
+ kgetenv_int(env, &msi_enable);
+
+ if (msi_enable) {
+ int cpu = -1;
+
+ ksnprintf(env, sizeof(env), "hw.%s.msi.cpu",
+ device_get_nameunit(dev));
+ kgetenv_int(env, &cpu);
+ if (cpu >= ncpus)
+ cpu = ncpus - 1;
+
+ if (pci_alloc_msi(dev, &rid, 1, cpu) == 0) {
+ flags &= ~RF_SHAREABLE;
+ type = PCI_INTR_TYPE_MSI;
+ }
+ }
+
+ *rid0 = rid;
+ *flags0 = flags;
+
+ return type;
+}
void pci_ht_map_msi(device_t dev, uint64_t addr);
+/* Returns PCI_INTR_TYPE_ */
+int pci_alloc_1intr(device_t dev, int msi_enable, int *rid, u_int *flags);
+
+#define PCI_INTR_TYPE_LEGACY 0
+#define PCI_INTR_TYPE_MSI 1
+#define PCI_INTR_TYPE_MSIX 2 /* not yet */
+
#endif /* _SYS_BUS_H_ */
/*
};
#define DEVNAME(_s) ((_s)->sc_dev.dv_xname)
-#define AHCI_IRQ_TYPE_LEGACY 0
-#define AHCI_IRQ_TYPE_MSI 1
-
struct ahci_device {
pci_vendor_id_t ad_vendor;
pci_product_id_t ad_product;
u_int32_t cap, pi, reg;
u_int irq_flags;
bus_addr_t addr;
- int i, error, msi_enable;
+ int i, error;
const char *revision;
- char env[64];
if (pci_read_config(dev, PCIR_COMMAND, 2) & 0x0400) {
device_printf(dev, "BIOS disabled PCI interrupt, "
/*
* Map the AHCI controller's IRQ and BAR(5) (hardware registers)
*/
- msi_enable = ahci_msi_enable;
- ksnprintf(env, sizeof(env), "hw.%s.msi.enable",
- device_get_nameunit(dev));
- kgetenv_int(env, &msi_enable);
-
- sc->sc_rid_irq = AHCI_IRQ_RID;
- sc->sc_irq_type = AHCI_IRQ_TYPE_LEGACY;
- irq_flags = RF_SHAREABLE | RF_ACTIVE;
-
- if (msi_enable) {
- int cpu = -1;
-
- ksnprintf(env, sizeof(env), "hw.%s.msi.cpu",
- device_get_nameunit(dev));
- kgetenv_int(env, &cpu);
- if (cpu >= ncpus)
- cpu = ncpus - 1;
-
- if (pci_alloc_msi(dev, &sc->sc_rid_irq, 1, cpu) == 0) {
- irq_flags &= ~RF_SHAREABLE;
- sc->sc_irq_type = AHCI_IRQ_TYPE_MSI;
- }
- }
+ sc->sc_irq_type = pci_alloc_1intr(dev, ahci_msi_enable,
+ &sc->sc_rid_irq, &irq_flags);
sc->sc_irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, &sc->sc_rid_irq,
irq_flags);
sc->sc_irq = NULL;
}
- if (sc->sc_irq_type == AHCI_IRQ_TYPE_MSI)
+ if (sc->sc_irq_type == PCI_INTR_TYPE_MSI)
pci_release_msi(dev);
if (sc->sc_regs) {
struct ifnet *ifp = &sc->arpcom.ac_if;
uint32_t val;
u_int irq_flags;
- int rid, rc = 0, msi_enable;
+ int rid, rc = 0;
int i, j;
- char env[64];
sc->bce_dev = dev;
if_initname(ifp, device_get_name(dev), device_get_unit(dev));
sc->bce_bhandle = rman_get_bushandle(sc->bce_res_mem);
/* Allocate PCI IRQ resources. */
- msi_enable = bce_msi_enable;
- ksnprintf(env, sizeof(env), "hw.%s.msi.enable",
- device_get_nameunit(dev));
- kgetenv_int(env, &msi_enable);
-
- sc->bce_irq_rid = 0;
- sc->bce_irq_type = BCE_IRQ_TYPE_LEGACY;
- irq_flags = RF_SHAREABLE | RF_ACTIVE;
-
- if (msi_enable) {
- int cpu = -1;
-
- ksnprintf(env, sizeof(env), "hw.%s.msi.cpu",
- device_get_nameunit(dev));
- kgetenv_int(env, &cpu);
- if (cpu >= ncpus)
- cpu = ncpus - 1;
-
- if (pci_alloc_msi(dev, &sc->bce_irq_rid, 1, cpu) == 0) {
- irq_flags &= ~RF_SHAREABLE;
- sc->bce_irq_type = BCE_IRQ_TYPE_MSI;
- }
- }
+ sc->bce_irq_type = pci_alloc_1intr(dev, bce_msi_enable,
+ &sc->bce_irq_rid, &irq_flags);
sc->bce_res_irq = bus_alloc_resource_any(dev, SYS_RES_IRQ,
&sc->bce_irq_rid, irq_flags);
sc->bce_res_irq);
}
- if (sc->bce_irq_type == BCE_IRQ_TYPE_MSI)
+ if (sc->bce_irq_type == PCI_INTR_TYPE_MSI)
pci_release_msi(dev);
if (sc->bce_res_mem != NULL) {
#define BCE_COALMASK_RX_TICKS_INT 0x40
#define BCE_COALMASK_RX_TICKS 0x80
-#define BCE_IRQ_TYPE_LEGACY 0
-#define BCE_IRQ_TYPE_MSI 1
-
#endif /* #ifndef _BCE_H_DEFINED */
{
struct emx_softc *sc = device_get_softc(dev);
struct ifnet *ifp = &sc->arpcom.ac_if;
- int error = 0, i, msi_enable;
+ int error = 0, i;
u_int intr_flags;
uint16_t eeprom_data, device_id, apme_mask;
- char env[64];
lwkt_serialize_init(&sc->main_serialize);
lwkt_serialize_init(&sc->tx_serialize);
/*
* Allocate interrupt
*/
- msi_enable = emx_msi_enable;
- ksnprintf(env, sizeof(env), "hw.%s.msi.enable",
- device_get_nameunit(dev));
- kgetenv_int(env, &msi_enable);
-
- sc->intr_rid = 0;
- sc->intr_type = EMX_INTR_TYPE_LEGACY;
- intr_flags = RF_SHAREABLE | RF_ACTIVE;
-
- if (msi_enable) {
- int cpu = -1;
-
- ksnprintf(env, sizeof(env), "hw.%s.msi.cpu",
- device_get_nameunit(dev));
- kgetenv_int(env, &cpu);
- if (cpu >= ncpus)
- cpu = ncpus - 1;
-
- if (pci_alloc_msi(dev, &sc->intr_rid, 1, cpu) == 0) {
- intr_flags &= ~RF_SHAREABLE;
- sc->intr_type = EMX_INTR_TYPE_MSI;
- }
- }
+ sc->intr_type = pci_alloc_1intr(dev, emx_msi_enable,
+ &sc->intr_rid, &intr_flags);
sc->intr_res = bus_alloc_resource_any(dev, SYS_RES_IRQ, &sc->intr_rid,
intr_flags);
sc->intr_res);
}
- if (sc->intr_type == EMX_INTR_TYPE_MSI)
+ if (sc->intr_type == PCI_INTR_TYPE_MSI)
pci_release_msi(dev);
if (sc->memory != NULL) {
struct e1000_hw_stats stats;
};
-#define EMX_INTR_TYPE_LEGACY 0
-#define EMX_INTR_TYPE_MSI 1
-
struct emx_txbuf {
struct mbuf *m_head;
bus_dmamap_t map;