altq: Don't use poll cache

The poll/dequeue model is no longer applicable to SMP system, e.g.

   CPU-A            CPU-B
     :                :
   poll               :
     :              poll
   dequeue (+)        :

The dequeue at (+) will hit the poll cache set by CPU-B.

Reported-by: pavalos@

diff --git a/sys/net/altq/altq_fairq.c b/sys/net/altq/altq_fairq.c
index 951ca52..c8efaa4 100644 (file)
--- a/sys/net/altq/altq_fairq.c
+++ b/sys/net/altq/altq_fairq.c
@@ -671,7 +671,22 @@ fairq_dequeue(struct ifaltq_subque *ifsq, struct mbuf *mpolled, int op)
                }
 
                if (op == ALTDQ_POLL) {
+#ifdef foo
+                       /*
+                        * Don't use poll cache; the poll/dequeue
+                        * model is no longer applicable to SMP
+                        * system.  e.g.
+                        *    CPU-A            CPU-B
+                        *      :                :
+                        *    poll               :
+                        *      :              poll
+                        *    dequeue (+)        :
+                        *
+                        * The dequeue at (+) will hit the poll
+                        * cache set by CPU-B.
+                        */
                        pif->pif_poll_cache = best_cl;
+#endif
                        m = best_m;
                } else if (best_cl) {
                        m = fairq_getq(best_cl, cur_time);

diff --git a/sys/net/altq/altq_hfsc.c b/sys/net/altq/altq_hfsc.c
index 528440b..0162574 100644 (file)
--- a/sys/net/altq/altq_hfsc.c
+++ b/sys/net/altq/altq_hfsc.c
@@ -795,7 +795,22 @@ hfsc_dequeue(struct ifaltq_subque *ifsq, struct mbuf *mpolled, int op)
                }
 
                if (op == ALTDQ_POLL) {
+#ifdef foo
+                       /*
+                        * Don't use poll cache; the poll/dequeue
+                        * model is no longer applicable to SMP
+                        * system.  e.g.
+                        *    CPU-A            CPU-B
+                        *      :                :
+                        *    poll               :
+                        *      :              poll
+                        *    dequeue (+)        :
+                        *
+                        * The dequeue at (+) will hit the poll
+                        * cache set by CPU-B.
+                        */
                        hif->hif_pollcache = cl;
+#endif
                        m = hfsc_pollq(cl);
                        goto done;
                }

diff --git a/sys/net/altq/altq_rmclass.c b/sys/net/altq/altq_rmclass.c
index 221d46c..6f2d8e9 100644 (file)
--- a/sys/net/altq/altq_rmclass.c
+++ b/sys/net/altq/altq_rmclass.c
@@ -1073,7 +1073,22 @@ _rmc_wrr_dequeue_next(struct rm_ifdat *ifd, int op)
        } else {
                /* mode == ALTDQ_PPOLL */
                m = _rmc_pollq(cl);
+#ifdef foo
+               /*
+                * Don't use poll cache; the poll/dequeue
+                * model is no longer applicable to SMP
+                * system.  e.g.
+                *    CPU-A            CPU-B
+                *      :                :
+                *    poll               :
+                *      :              poll
+                *    dequeue (+)        :
+                *
+                * The dequeue at (+) will hit the poll
+                * cache set by CPU-B.
+                */
                ifd->pollcache_ = cl;
+#endif
        }
        return (m);
 }
@@ -1179,7 +1194,22 @@ _rmc_prr_dequeue_next(struct rm_ifdat *ifd, int op)
        } else {
                /* mode == ALTDQ_POLL */
                m = _rmc_pollq(cl);
+#ifdef foo
+               /*
+                * Don't use poll cache; the poll/dequeue
+                * model is no longer applicable to SMP
+                * system.  e.g.
+                *    CPU-A            CPU-B
+                *      :                :
+                *    poll               :
+                *      :              poll
+                *    dequeue (+)        :
+                *
+                * The dequeue at (+) will hit the poll
+                * cache set by CPU-B.
+                */
                ifd->pollcache_ = cl;
+#endif
        }
        return (m);
 }