** History
**
** REV# DATE NAME DESCRIPTION
-** 1.00.00.00 3/31/2004 Erich Chen First release
+** 1.00.00.00 3/31/2004 Erich Chen First release
** 1.20.00.02 11/29/2004 Erich Chen bug fix with arcmsr_bus_reset when PHY error
** 1.20.00.03 4/19/2005 Erich Chen add SATA 24 Ports adapter type support
** clean unused function
** report CAM_DEV_NOT_THERE instead of CAM_SEL_TIMEOUT when device failed,
** prevent cam_periph_error removing all LUN devices of one Target id
** for any one LUN device failed
+** 1.20.00.18 10/14/2010 Ching Huang Fixed "inquiry data fails comparion at DV1 step"
+** 10/25/2010 Ching Huang Fixed bad range input in bus_alloc_resource for ADAPTER_TYPE_B
+** 1.20.00.19 11/11/2010 Ching Huang Fixed arcmsr driver prevent arcsas support for Areca SAS HBA ARC13x0
******************************************************************************************
-* $FreeBSD: src/sys/dev/arcmsr/arcmsr.c,v 1.34 2010/07/21 18:50:24 delphij Exp $
+* $FreeBSD: src/sys/dev/arcmsr/arcmsr.c,v 1.35 2010/11/13 08:58:36 delphij Exp $
*/
#include <sys/param.h>
#include <sys/systm.h>
#define CAM_NEW_TRAN_CODE 1
#endif
+#define ARCMSR_DRIVER_VERSION "Driver Version 1.20.00.19 2010-11-11"
#include <dev/raid/arcmsr/arcmsr.h>
#define ARCMSR_SRBS_POOL_SIZE ((sizeof(struct CommandControlBlock) * ARCMSR_MAX_FREESRB_NUM))
/*
**************************************************************************
**************************************************************************
*/
-static bus_dmamap_callback_t arcmsr_map_freesrb;
-static bus_dmamap_callback_t arcmsr_executesrb;
+static bus_dmamap_callback_t arcmsr_map_free_srb;
+static bus_dmamap_callback_t arcmsr_execute_srb;
/*
**************************************************************************
**************************************************************************
{
CHIP_REG_WRITE32(HBC_MessageUnit,0,inbound_queueport_low, ccb_post_stamp);
}
- }
- break;
+ }
+ break;
}
return;
}
*********************************************************************
*********************************************************************
*/
-static void arcmsr_executesrb(void *arg, bus_dma_segment_t *dm_segs, int nseg, int error)
+static void arcmsr_execute_srb(void *arg, bus_dma_segment_t *dm_segs, int nseg, int error)
{
struct CommandControlBlock *srb=(struct CommandControlBlock *)arg;
struct AdapterControlBlock *acb=(struct AdapterControlBlock *)srb->acb;
xpt_done(pccb);
return;
}
- inqdata[0] = T_PROCESSOR;
- /* Periph Qualifier & Periph Dev Type */
- inqdata[1] = 0;
- /* rem media bit & Dev Type Modifier */
- inqdata[2] = 0;
- /* ISO, ECMA, & ANSI versions */
- inqdata[4] = 31;
- /* length of additional data */
- strncpy(&inqdata[8], "Areca ", 8);
- /* Vendor Identification */
- strncpy(&inqdata[16], "RAID controller ", 16);
- /* Product Identification */
+ inqdata[0] = T_PROCESSOR; /* Periph Qualifier & Periph Dev Type */
+ inqdata[1] = 0; /* rem media bit & Dev Type Modifier */
+ inqdata[2] = 0; /* ISO, ECMA, & ANSI versions */
+ inqdata[3] = 0;
+ inqdata[4] = 31; /* length of additional data */
+ inqdata[5] = 0;
+ inqdata[6] = 0;
+ inqdata[7] = 0;
+ strncpy(&inqdata[8], "Areca ", 8); /* Vendor Identification */
+ strncpy(&inqdata[16], "RAID controller ", 16); /* Product Identification */
strncpy(&inqdata[32], "R001", 4); /* Product Revision */
memcpy(buffer, inqdata, sizeof(inqdata));
xpt_done(pccb);
, srb->dm_segs_dmamap
, pccb->csio.data_ptr
, pccb->csio.dxfer_len
- , arcmsr_executesrb, srb, /*flags*/0);
+ , arcmsr_execute_srb, srb, /*flags*/0);
if(error == EINPROGRESS) {
xpt_freeze_simq(acb->psim, 1);
pccb->ccb_h.status |= CAM_RELEASE_SIMQ;
}
crit_exit();
- } else {
- /* Buffer is physical */
- panic("arcmsr: CAM_DATA_PHYS not supported");
+ }
+ else { /* Buffer is physical */
+ struct bus_dma_segment seg;
+
+ seg.ds_addr = (bus_addr_t)pccb->csio.data_ptr;
+ seg.ds_len = pccb->csio.dxfer_len;
+ arcmsr_execute_srb(srb, &seg, 1, 0);
}
} else {
/* Scatter/gather list */
return;
}
segs=(struct bus_dma_segment *)pccb->csio.data_ptr;
- arcmsr_executesrb(srb, segs, pccb->csio.sglist_cnt, 0);
+ arcmsr_execute_srb(srb, segs, pccb->csio.sglist_cnt, 0);
}
} else {
- arcmsr_executesrb(srb, NULL, 0, 0);
+ arcmsr_execute_srb(srb, NULL, 0, 0);
}
break;
}
**********************************************************************
**********************************************************************
*/
-static void arcmsr_map_freesrb(void *arg, bus_dma_segment_t *segs, int nseg, int error)
+static void arcmsr_map_free_srb(void *arg, bus_dma_segment_t *segs, int nseg, int error)
{
struct AdapterControlBlock *acb=arg;
struct CommandControlBlock *srb_tmp;
max_coherent_size=ARCMSR_SRBS_POOL_SIZE;
}
break;
+ case PCIDevVenIDARC1200:
case PCIDevVenIDARC1201: {
acb->adapter_type=ACB_ADAPTER_TYPE_B;
max_coherent_size=ARCMSR_SRBS_POOL_SIZE+(sizeof(struct HBB_MessageUnit));
case PCIDevVenIDARC1210:
case PCIDevVenIDARC1220:
case PCIDevVenIDARC1230:
+ case PCIDevVenIDARC1231:
case PCIDevVenIDARC1260:
+ case PCIDevVenIDARC1261:
case PCIDevVenIDARC1270:
case PCIDevVenIDARC1280:
case PCIDevVenIDARC1212:
/*highaddr*/ BUS_SPACE_MAXADDR,
/*filter*/ NULL,
/*filterarg*/ NULL,
- /*maxsize*/ MAXBSIZE,
+ /*maxsize*/ ARCMSR_MAX_SG_ENTRIES * PAGE_SIZE * ARCMSR_MAX_FREESRB_NUM,
/*nsegments*/ ARCMSR_MAX_SG_ENTRIES,
/*maxsegsz*/ BUS_SPACE_MAXSIZE_32BIT,
/*flags*/ 0,
return ENXIO;
}
/* And permanently map them */
- if(bus_dmamap_load(acb->srb_dmat, acb->srb_dmamap, acb->uncacheptr, max_coherent_size, arcmsr_map_freesrb, acb, /*flags*/0)) {
+ if(bus_dmamap_load(acb->srb_dmat, acb->srb_dmamap, acb->uncacheptr, max_coherent_size, arcmsr_map_free_srb, acb, /*flags*/0)) {
bus_dma_tag_destroy(acb->srb_dmat);
bus_dma_tag_destroy(acb->dm_segs_dmat);
bus_dma_tag_destroy(acb->parent_dmat);
for(i=0; i<2; i++) {
if(i==0) {
acb->sys_res_arcmsr[i]=bus_alloc_resource(dev,SYS_RES_MEMORY, &rid[i],
- 0x20400, 0x20400+sizeof(struct HBB_DOORBELL), sizeof(struct HBB_DOORBELL), RF_ACTIVE);
+ 0ul, ~0ul, sizeof(struct HBB_DOORBELL), RF_ACTIVE);
} else {
acb->sys_res_arcmsr[i]=bus_alloc_resource(dev, SYS_RES_MEMORY, &rid[i],
- 0x0fa00, 0x0fa00+sizeof(struct HBB_RWBUFFER), sizeof(struct HBB_RWBUFFER), RF_ACTIVE);
+ 0ul, ~0ul, sizeof(struct HBB_RWBUFFER), RF_ACTIVE);
}
if(acb->sys_res_arcmsr[i] == NULL) {
arcmsr_free_resource(acb);
{
u_int32_t id;
static char buf[256];
+ char x_type[]={"X-TYPE"};
char *type;
int raid6 = 1;
}
switch(id=pci_get_devid(dev)) {
case PCIDevVenIDARC1110:
- case PCIDevVenIDARC1210:
+ case PCIDevVenIDARC1200:
case PCIDevVenIDARC1201:
+ case PCIDevVenIDARC1210:
raid6 = 0;
/*FALLTHRU*/
case PCIDevVenIDARC1120:
case PCIDevVenIDARC1170:
case PCIDevVenIDARC1220:
case PCIDevVenIDARC1230:
+ case PCIDevVenIDARC1231:
case PCIDevVenIDARC1260:
+ case PCIDevVenIDARC1261:
case PCIDevVenIDARC1270:
case PCIDevVenIDARC1280:
type = "SATA";
type = "SAS 6G";
break;
default:
- type = "X-TYPE";
+ type = x_type;
break;
}
+ if(type == x_type)
+ return(ENXIO);
ksprintf(buf, "Areca %s Host Adapter RAID Controller%s", type, raid6 ? " (RAID6 capable)" : "");
device_set_desc_copy(dev, buf);
return 0;
**(INCLUDING NEGLIGENCE OR OTHERWISE)ARISING IN ANY WAY OUT OF THE USE OF
** THIS SOFTWARE,EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
**************************************************************************
-* $FreeBSD: src/sys/dev/arcmsr/arcmsr.h,v 1.7 2010/07/21 18:50:24 delphij Exp $
+* $FreeBSD: src/sys/dev/arcmsr/arcmsr.h,v 1.8 2010/11/13 08:58:36 delphij Exp $
*/
-#define ARCMSR_DRIVER_VERSION "Driver Version 1.20.00.17 2010-07-15"
#define ARCMSR_SCSI_INITIATOR_ID 255
#define ARCMSR_DEV_SECTOR_SIZE 512
#define ARCMSR_MAX_XFER_SECTORS 4096
#define PCI_DEVICE_ID_ARECA_1130 0x1130 /* Device ID */
#define PCI_DEVICE_ID_ARECA_1160 0x1160 /* Device ID */
#define PCI_DEVICE_ID_ARECA_1170 0x1170 /* Device ID */
+#define PCI_DEVICE_ID_ARECA_1200 0x1200 /* Device ID */
+#define PCI_DEVICE_ID_ARECA_1201 0x1201 /* Device ID */
#define PCI_DEVICE_ID_ARECA_1210 0x1210 /* Device ID */
+#define PCI_DEVICE_ID_ARECA_1212 0x1212 /* Device ID */
#define PCI_DEVICE_ID_ARECA_1220 0x1220 /* Device ID */
+#define PCI_DEVICE_ID_ARECA_1222 0x1222 /* Device ID */
#define PCI_DEVICE_ID_ARECA_1230 0x1230 /* Device ID */
+#define PCI_DEVICE_ID_ARECA_1231 0x1231 /* Device ID */
#define PCI_DEVICE_ID_ARECA_1260 0x1260 /* Device ID */
+#define PCI_DEVICE_ID_ARECA_1261 0x1261 /* Device ID */
#define PCI_DEVICE_ID_ARECA_1270 0x1270 /* Device ID */
#define PCI_DEVICE_ID_ARECA_1280 0x1280 /* Device ID */
-#define PCI_DEVICE_ID_ARECA_1212 0x1212 /* Device ID */
-#define PCI_DEVICE_ID_ARECA_1222 0x1222 /* Device ID */
#define PCI_DEVICE_ID_ARECA_1380 0x1380 /* Device ID */
#define PCI_DEVICE_ID_ARECA_1381 0x1381 /* Device ID */
#define PCI_DEVICE_ID_ARECA_1680 0x1680 /* Device ID */
#define PCI_DEVICE_ID_ARECA_1681 0x1681 /* Device ID */
-#define PCI_DEVICE_ID_ARECA_1201 0x1201 /* Device ID */
#define PCI_DEVICE_ID_ARECA_1880 0x1880 /* Device ID */
#define PCIDevVenIDARC1110 0x111017D3 /* Vendor Device ID */
#define PCIDevVenIDARC1130 0x113017D3 /* Vendor Device ID */
#define PCIDevVenIDARC1160 0x116017D3 /* Vendor Device ID */
#define PCIDevVenIDARC1170 0x117017D3 /* Vendor Device ID */
+#define PCIDevVenIDARC1200 0x120017D3 /* Vendor Device ID */
+#define PCIDevVenIDARC1201 0x120117D3 /* Vendor Device ID */
#define PCIDevVenIDARC1210 0x121017D3 /* Vendor Device ID */
+#define PCIDevVenIDARC1212 0x121217D3 /* Vendor Device ID */
#define PCIDevVenIDARC1220 0x122017D3 /* Vendor Device ID */
+#define PCIDevVenIDARC1222 0x122217D3 /* Vendor Device ID */
#define PCIDevVenIDARC1230 0x123017D3 /* Vendor Device ID */
+#define PCIDevVenIDARC1231 0x123117D3 /* Vendor Device ID */
#define PCIDevVenIDARC1260 0x126017D3 /* Vendor Device ID */
+#define PCIDevVenIDARC1261 0x126117D3 /* Vendor Device ID */
#define PCIDevVenIDARC1270 0x127017D3 /* Vendor Device ID */
#define PCIDevVenIDARC1280 0x128017D3 /* Vendor Device ID */
-#define PCIDevVenIDARC1212 0x121217D3 /* Vendor Device ID */
-#define PCIDevVenIDARC1222 0x122217D3 /* Vendor Device ID */
#define PCIDevVenIDARC1380 0x138017D3 /* Vendor Device ID */
#define PCIDevVenIDARC1381 0x138117D3 /* Vendor Device ID */
#define PCIDevVenIDARC1680 0x168017D3 /* Vendor Device ID */
#define PCIDevVenIDARC1681 0x168117D3 /* Vendor Device ID */
-#define PCIDevVenIDARC1201 0x120117D3 /* Vendor Device ID */
#define PCIDevVenIDARC1880 0x188017D3 /* Vendor Device ID */
#ifndef PCIR_BARS
*/
struct HBB_DOORBELL
{
- u_int8_t doorbell_reserved[132096]; /*reserved */
+ u_int8_t doorbell_reserved[ARCMSR_DRV2IOP_DOORBELL]; /*reserved */
u_int32_t drv2iop_doorbell; /*offset 0x00020400:00,01,02,03: window of "instruction flags" from driver to iop */
u_int32_t drv2iop_doorbell_mask; /* 04,05,06,07: doorbell mask */
u_int32_t iop2drv_doorbell; /* 08,09,10,11: window of "instruction flags" from iop to driver */
*/
struct HBB_RWBUFFER
{
- u_int8_t message_reserved0[64000]; /*reserved */
+ u_int8_t message_reserved0[ARCMSR_MSGCODE_RWBUFFER]; /*reserved */
u_int32_t msgcode_rwbuffer[256]; /*offset 0x0000fa00: 0, 1, 2, 3,...,1023: message code read write 1024bytes */
u_int32_t message_wbuffer[32]; /*offset 0x0000fe00:1024,1025,1026,1027,...,1151: user space data to iop 128bytes */
u_int32_t message_reserved1[32]; /* 1152,1153,1154,1155,...,1279: message reserved*/
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