bge: Enable fix for read DMA FIFO overruns on certain controllers
authorSepherosa Ziehau <sephe@dragonflybsd.org>
Mon, 2 Jul 2012 01:49:15 +0000 (09:49 +0800)
committerSepherosa Ziehau <sephe@dragonflybsd.org>
Mon, 2 Jul 2012 01:49:15 +0000 (09:49 +0800)
Obtained-from: FreeBSD 213411

sys/dev/netif/bge/if_bge.c
sys/dev/netif/bge/if_bgereg.h

index 8b2f787..452e45f 100644 (file)
@@ -1696,6 +1696,20 @@ bge_blockinit(struct bge_softc *sc)
        CSR_WRITE_4(sc, BGE_WDMA_MODE, val);
        DELAY(40);
 
+       if (sc->bge_asicrev == BGE_ASICREV_BCM5761 ||
+           sc->bge_asicrev == BGE_ASICREV_BCM5784 ||
+           sc->bge_asicrev == BGE_ASICREV_BCM5785 ||
+           sc->bge_asicrev == BGE_ASICREV_BCM57780) {
+               /*
+                * Enable fix for read DMA FIFO overruns.
+                * The fix is to limit the number of RX BDs
+                * the hardware would fetch at a fime.
+                */
+               val = CSR_READ_4(sc, BGE_RDMA_RSRVCTRL);
+               CSR_WRITE_4(sc, BGE_RDMA_RSRVCTRL,
+                   val| BGE_RDMA_RSRVCTRL_FIFO_OFLW_FIX);
+       }
+
        /* Turn on read DMA state machine */
        val = BGE_RDMAMODE_ENABLE | BGE_RDMAMODE_ALL_ATTNS;
         if (sc->bge_asicrev == BGE_ASICREV_BCM5784 ||
index 86d5890..ec4c5d2 100644 (file)
  */
 #define BGE_RDMA_MODE                  0x4800
 #define BGE_RDMA_STATUS                        0x4804
+#define BGE_RDMA_RSRVCTRL              0x4900
 
 /* Read DMA mode register */
 #define BGE_RDMAMODE_RESET             0x00000001
 #define BGE_RDMASTAT_PCI_FIFOOREAD_ATTN        0x00000100
 #define BGE_RDMASTAT_LOCWRITE_TOOBIG   0x00000200
 
+/* Read DMA Reserved Control register */
+#define BGE_RDMA_RSRVCTRL_FIFO_OFLW_FIX        0x00000004
+
 /*
  * Write DMA control registers
  */