return(EINVAL);
}
if (ccb->cdm.pattern_buf_len > 0) {
- data_ptrs[0] = (u_int8_t **)&ccb->cdm.patterns;
+ data_ptrs[0] = (void *)&ccb->cdm.patterns;
lengths[0] = ccb->cdm.pattern_buf_len;
mapinfo->dirs[0] = CAM_DIR_OUT;
- data_ptrs[1] = (u_int8_t **)&ccb->cdm.matches;
+ data_ptrs[1] = (void *)&ccb->cdm.matches;
lengths[1] = ccb->cdm.match_buf_len;
mapinfo->dirs[1] = CAM_DIR_IN;
numbufs = 2;
} else {
- data_ptrs[0] = (u_int8_t **)&ccb->cdm.matches;
+ data_ptrs[0] = (void *)&ccb->cdm.matches;
lengths[0] = ccb->cdm.match_buf_len;
mapinfo->dirs[0] = CAM_DIR_IN;
numbufs = 1;
numbufs = min(mapinfo->num_bufs_used, 2);
if (numbufs == 1) {
- data_ptrs[0] = (u_int8_t **)&ccb->cdm.matches;
+ data_ptrs[0] = (void *)&ccb->cdm.matches;
} else {
- data_ptrs[0] = (u_int8_t **)&ccb->cdm.patterns;
- data_ptrs[1] = (u_int8_t **)&ccb->cdm.matches;
+ data_ptrs[0] = (void *)&ccb->cdm.patterns;
+ data_ptrs[1] = (void *)&ccb->cdm.matches;
}
break;
case XPT_SCSI_IO:
* and ask the drive again what it's set to.
*/
if (!SA_IS_CTRL(dev) && !softc->open_pending_mount) {
- u_int8_t write_protect;
- int comp_enabled, comp_supported;
+ u_int8_t write_protect = 0; /* silence gcc */
+ int comp_enabled = 0; /* silence gcc */
+ int comp_supported = 0; /* silence gcc */
+
error = sagetparams(periph, SA_PARAM_ALL,
&softc->media_blksize, &softc->media_density,
&softc->media_numblks, &softc->buffer_mode,
if ((softc->flags & SA_FLAG_TAPE_MOUNTED) == 0) {
struct scsi_read_block_limits_data *rblim = NULL;
- int comp_enabled, comp_supported;
- u_int8_t write_protect, guessing = 0;
+ int comp_enabled = 0; /* silence gcc */
+ int comp_supported = 0; /* silence gcc */
+ u_int8_t write_protect = 0; /* silence gcc */
+ u_int8_t guessing = 0;
/*
* Clear out old state.
u_int32_t sense_flags)
{
struct sa_softc *softc;
- u_int32_t current_blocksize;
+ u_int32_t current_blocksize = 0;/* silence gcc */
u_int32_t current_calg;
- u_int8_t current_density;
- u_int8_t current_speed;
+ u_int8_t current_density = 0; /* silence gcc */
+ u_int8_t current_speed = 0; /* silence gcc */
int comp_enabled, comp_supported;
void *mode_buffer;
int mode_buffer_len;
if(fc->ongodev == NULL){
if(sfp->mode.rreqq.dest_lo == (0xf0000000 | CSRROMOFF)){
rfp->mode.rresq.data = ntohl(rfp->mode.rresq.data);
- chdr = (struct csrhdr *)(&rfp->mode.rresq.data);
+ chdr = (struct csrhdr *)(void *)(&rfp->mode.rresq.data);
/* If CSR is minimal confinguration, more investgation is not needed. */
if(chdr->info_len == 1){
if (firewire_debug)
struct csrreg *reg;
u_int32_t i;
- reg = (struct csrreg *)&i;
+ reg = (struct csrreg *)(void *)&i;
reg->key = key;
reg->val = val;
return(crom_add_quad(chunk, (u_int32_t) i));
len = MAX_TEXT;
}
- tl = (struct csrtext *) &chunk->data;
+ tl = (struct csrtext *)(void *)&chunk->data;
tl->crc_len = howmany(sizeof(struct csrtext) + len, sizeof(u_int32_t));
tl->spec_id = 0;
tl->spec_type = 0;
/* Calculate CRC and dump to the buffer */
len = 1 + src->hdr.info_len;
count = 0;
- if (crom_copy((u_int32_t *)&src->hdr, buf, &count, len, maxlen) < 0)
+ if (crom_copy((u_int32_t *)(void *)&src->hdr, buf, &count, len, maxlen) < 0)
return(-1);
STAILQ_FOREACH(chunk, &src->chunk_list, link) {
chunk->data.crc =
db_expr_t lhs, rhs;
int t;
+ *valuep = 0; /* silence gcc */
+
if (!db_unary(&lhs))
return (FALSE);
db_expr_t lhs, rhs;
int t;
+ *valuep = 0; /* silence gcc */
+
if (!db_mult_expr(&lhs))
return (FALSE);
goto bad;
}
if (bus_dmamem_alloc(overrun_dmat,
- (void **)&overrun_buf,
+ (void *)&overrun_buf,
BUS_DMA_NOWAIT,
&overrun_dmamap) != 0) {
bus_dma_tag_destroy(overrun_dmat);
return ENXIO;
}
if (bus_dmamem_alloc(overrun_dmat,
- (void **)&overrun_buf,
+ (void *)&overrun_buf,
BUS_DMA_NOWAIT,
&overrun_dmamap) != 0) {
bus_dma_tag_destroy(overrun_dmat);
adv->init_level++;
/* Allocation for our sense buffers */
- if (bus_dmamem_alloc(adv->sense_dmat, (void **)&adv->sense_buffers,
+ if (bus_dmamem_alloc(adv->sense_dmat, (void *)&adv->sense_buffers,
BUS_DMA_NOWAIT, &adv->sense_dmamap) != 0) {
return (ENOMEM);
}
sg_map = kmalloc(sizeof(*sg_map), M_DEVBUF, M_INTWAIT);
/* Allocate S/G space for the next batch of ACBS */
- if (bus_dmamem_alloc(adw->sg_dmat, (void **)&sg_map->sg_vaddr,
+ if (bus_dmamem_alloc(adw->sg_dmat, (void *)&sg_map->sg_vaddr,
BUS_DMA_NOWAIT, &sg_map->sg_dmamap) != 0) {
kfree(sg_map, M_DEVBUF);
return (NULL);
adw->init_level++;
/* Allocation for our ccb carrier structures */
- if (bus_dmamem_alloc(adw->carrier_dmat, (void **)&adw->carriers,
+ if (bus_dmamem_alloc(adw->carrier_dmat, (void *)&adw->carriers,
BUS_DMA_NOWAIT, &adw->carrier_dmamap) != 0) {
return (ENOMEM);
}
adw->init_level++;
/* Allocation for our ccbs */
- if (bus_dmamem_alloc(adw->acb_dmat, (void **)&adw->acbs,
+ if (bus_dmamem_alloc(adw->acb_dmat, (void *)&adw->acbs,
BUS_DMA_NOWAIT, &adw->acb_dmamap) != 0)
return (ENOMEM);
aha->init_level++;
/* Allocation for our mailboxes */
- if (bus_dmamem_alloc(aha->mailbox_dmat, (void **)&aha->out_boxes,
+ if (bus_dmamem_alloc(aha->mailbox_dmat, (void *)&aha->out_boxes,
BUS_DMA_NOWAIT, &aha->mailbox_dmamap) != 0) {
goto error_exit;
}
aha->init_level++;
/* Allocation for our ccbs */
- if (bus_dmamem_alloc(aha->ccb_dmat, (void **)&aha->aha_ccb_array,
+ if (bus_dmamem_alloc(aha->ccb_dmat, (void *)&aha->aha_ccb_array,
BUS_DMA_NOWAIT, &aha->ccb_dmamap) != 0) {
goto error_exit;
}
sg_map = kmalloc(sizeof(*sg_map), M_DEVBUF, M_INTWAIT);
/* Allocate S/G space for the next batch of CCBS */
- if (bus_dmamem_alloc(aha->sg_dmat, (void **)&sg_map->sg_vaddr,
+ if (bus_dmamem_alloc(aha->sg_dmat, (void *)&sg_map->sg_vaddr,
BUS_DMA_NOWAIT, &sg_map->sg_dmamap) != 0) {
kfree(sg_map, M_DEVBUF);
return;
ahb->init_level++;
/* Allocation for our ccbs */
- if (bus_dmamem_alloc(ahb->ecb_dmat, (void **)&ahb->ecb_array,
+ if (bus_dmamem_alloc(ahb->ecb_dmat, (void *)&ahb->ecb_array,
BUS_DMA_NOWAIT, &ahb->ecb_dmamap) != 0)
goto error_exit;
/* Allocate the next batch of hardware SCBs */
if (aic_dmamem_alloc(ahd, scb_data->hscb_dmat,
- (void **)&hscb_map->vaddr,
+ (void *)&hscb_map->vaddr,
BUS_DMA_NOWAIT, &hscb_map->dmamap) != 0) {
kfree(hscb_map, M_DEVBUF);
return (0);
/* Allocate the next batch of S/G lists */
if (aic_dmamem_alloc(ahd, scb_data->sg_dmat,
- (void **)&sg_map->vaddr,
+ (void *)&sg_map->vaddr,
BUS_DMA_NOWAIT, &sg_map->dmamap) != 0) {
kfree(sg_map, M_DEVBUF);
return (0);
/* Allocate the next batch of sense buffers */
if (aic_dmamem_alloc(ahd, scb_data->sense_dmat,
- (void **)&sense_map->vaddr,
+ (void *)&sense_map->vaddr,
BUS_DMA_NOWAIT, &sense_map->dmamap) != 0) {
kfree(sense_map, M_DEVBUF);
return (0);
/* Allocation of driver data */
if (aic_dmamem_alloc(ahd, ahd->shared_data_dmat,
- (void **)&ahd->shared_data_map.vaddr,
+ (void *)&ahd->shared_data_map.vaddr,
BUS_DMA_NOWAIT,
&ahd->shared_data_map.dmamap) != 0) {
return (ENOMEM);
uint32_t *dataptr_words;
sg = (struct ahd_dma_seg *)scb->sg_list;
- dataptr_words = (uint32_t*)&scb->hscb->dataptr;
+ dataptr_words = (uint32_t*)(void *)&scb->hscb->dataptr;
dataptr_words[0] = sg->addr;
dataptr_words[1] = 0;
if ((ahd->flags & AHD_39BIT_ADDRESSING) != 0) {
/* Allocation for our hscbs */
if (aic_dmamem_alloc(ahc, scb_data->hscb_dmat,
- (void **)&scb_data->hscbs,
+ (void *)&scb_data->hscbs,
BUS_DMA_NOWAIT, &scb_data->hscb_dmamap) != 0) {
goto error_exit;
}
/* Allocate them */
if (aic_dmamem_alloc(ahc, scb_data->sense_dmat,
- (void **)&scb_data->sense,
+ (void *)&scb_data->sense,
BUS_DMA_NOWAIT, &scb_data->sense_dmamap) != 0) {
goto error_exit;
}
/* Allocate S/G space for the next batch of SCBS */
if (aic_dmamem_alloc(ahc, scb_data->sg_dmat,
- (void **)&sg_map->sg_vaddr,
+ (void *)&sg_map->sg_vaddr,
BUS_DMA_NOWAIT, &sg_map->sg_dmamap) != 0) {
kfree(sg_map, M_DEVBUF);
return (0);
/* Allocation of driver data */
if (aic_dmamem_alloc(ahc, ahc->shared_data_dmat,
- (void **)&ahc->qoutfifo,
+ (void *)&ahc->qoutfifo,
BUS_DMA_NOWAIT, &ahc->shared_data_dmamap) != 0) {
return (ENOMEM);
}
bt->init_level++;
/* Allocation for our mailboxes */
- if (bus_dmamem_alloc(bt->mailbox_dmat, (void **)&bt->out_boxes,
+ if (bus_dmamem_alloc(bt->mailbox_dmat, (void *)&bt->out_boxes,
BUS_DMA_NOWAIT, &bt->mailbox_dmamap) != 0) {
goto error_exit;
}
bt->init_level++;
/* Allocation for our ccbs */
- if (bus_dmamem_alloc(bt->ccb_dmat, (void **)&bt->bt_ccb_array,
+ if (bus_dmamem_alloc(bt->ccb_dmat, (void *)&bt->bt_ccb_array,
BUS_DMA_NOWAIT, &bt->ccb_dmamap) != 0) {
goto error_exit;
}
sg_map = kmalloc(sizeof(*sg_map), M_DEVBUF, M_WAITOK);
/* Allocate S/G space for the next batch of CCBS */
- if (bus_dmamem_alloc(bt->sg_dmat, (void **)&sg_map->sg_vaddr,
+ if (bus_dmamem_alloc(bt->sg_dmat, (void *)&sg_map->sg_vaddr,
BUS_DMA_NOWAIT, &sg_map->sg_dmamap) != 0) {
kfree(sg_map, M_DEVBUF);
goto error_exit;
/* Allocation of sense buffers */
if (bus_dmamem_alloc(bt->sense_dmat,
- (void **)&bt->sense_buffers,
+ (void *)&bt->sense_buffers,
BUS_DMA_NOWAIT, &bt->sense_dmamap) != 0) {
bt_isa_release_resources(dev);
return (ENOMEM);
isp_update(isp);
}
- if (isp_getrqentry(isp, &nxti, &optr, (void **)&qep)) {
+ if (isp_getrqentry(isp, &nxti, &optr, (void *)&qep)) {
isp_prt(isp, ISP_LOGDEBUG0, "Request Queue Overflow");
XS_SETERR(xs, HBA_BOTCH);
return (CMD_EAGAIN);
isp_put_request(isp, reqp, qep);
ISP_ADD_REQUEST(isp, nxti);
isp->isp_sendmarker &= ~(1 << i);
- if (isp_getrqentry(isp, &nxti, &optr, (void **) &qep)) {
+ if (isp_getrqentry(isp, &nxti, &optr, (void *) &qep)) {
isp_prt(isp, ISP_LOGDEBUG0,
"Request Queue Overflow+");
XS_SETERR(xs, HBA_BOTCH);
XS_CMD_C_WDOG(xs);
callout_reset(&xs->ccb_h.timeout_ch, hz,
isp_watchdog, xs);
- if (isp_getrqentry(isp, &nxti, &optr, (void **) &qe)) {
+ if (isp_getrqentry(isp, &nxti, &optr, (void *) &qe)) {
ISP_UNLOCK(isp);
return;
}
return (1);
}
- if (bus_dmamem_alloc(isp->isp_cdmat, (void **)&base, BUS_DMA_NOWAIT,
+ if (bus_dmamem_alloc(isp->isp_cdmat, (void *)&base, BUS_DMA_NOWAIT,
&isp->isp_cdmap) != 0) {
isp_prt(isp, ISP_LOGERR,
"cannot allocate %d bytes of CCB memory", len);
0, &ch->dma->work_tag))
goto error;
- if (bus_dmamem_alloc(ch->dma->work_tag, (void **)&ch->dma->work, 0,
- &ch->dma->work_map))
+ if (bus_dmamem_alloc(ch->dma->work_tag, (void *)&ch->dma->work, 0,
+ (void *)&ch->dma->work_map))
goto error;
if (bus_dmamap_load(ch->dma->work_tag, ch->dma->work_map,ch->dma->work,
device_t subdisk;
int array, disk;
int ctlr = 0, disk_size = 0, total_disks = 0;
+ device_t gpdev;
for (array = 0; array < MAX_ARRAYS; array++) {
if (!ata_raid_arrays[array])
}
rdp->disks[disk].dev = device_get_parent(subdisk);
- switch (pci_get_vendor(GRANDPARENT(rdp->disks[disk].dev))) {
+ gpdev = GRANDPARENT(rdp->disks[disk].dev);
+
+ switch (pci_get_vendor(gpdev)) {
case ATA_HIGHPOINT_ID:
/*
* we need some way to decide if it should be v2 or v3
{
devclass_t pci_devclass = devclass_find("pci");
devclass_t devclass=device_get_devclass(GRANDPARENT(GRANDPARENT(subdisk)));
+ device_t gpdev;
+ uint16_t vendor;
/* prioritize vendor native metadata layout if possible */
if (devclass == pci_devclass) {
- switch (pci_get_vendor(GRANDPARENT(device_get_parent(subdisk)))) {
+ gpdev = device_get_parent(subdisk);
+ gpdev = GRANDPARENT(gpdev);
+ vendor = pci_get_vendor(gpdev);
+
+ switch (vendor) {
case ATA_HIGHPOINT_ID:
if (ata_raid_hptv3_read_meta(subdisk, ata_raid_arrays))
return 0;
if (r != 0)
goto fail_0;
- r = bus_dmamem_alloc(sc->an_dtag, (void**) &dma->an_dma_vaddr,
+ r = bus_dmamem_alloc(sc->an_dtag, (void*)&dma->an_dma_vaddr,
BUS_DMA_WAITOK, &dma->an_dma_map);
if (r != 0)
goto fail_1;
an_rx_desc.an_phys = sc->an_rx_buffer[desc].an_dma_paddr;
for (i = 0; i < sizeof(an_rx_desc) / 4; i++)
- CSR_MEM_AUX_WRITE_4(sc, AN_RX_DESC_OFFSET
+ CSR_MEM_AUX_WRITE_4(sc, AN_RX_DESC_OFFSET
+ (desc * sizeof(an_rx_desc))
+ (i * 4),
- ((u_int32_t*)&an_rx_desc)[i]);
+ ((u_int32_t*)(void *)&an_rx_desc)[i]);
}
/*
CSR_MEM_AUX_WRITE_4(sc, AN_TX_DESC_OFFSET
+ (desc * sizeof(an_tx_desc))
+ (i * 4),
- ((u_int32_t*)&an_tx_desc)[i]);
+ ((u_int32_t*)(void *)&an_tx_desc)[i]);
}
/*
for (i = 0; i < sizeof(an_rid_desc) / 4; i++)
CSR_MEM_AUX_WRITE_4(sc, AN_HOST_DESC_OFFSET + i * 4,
- ((u_int32_t*)&an_rid_desc)[i]);
+ ((u_int32_t*)(void *)&an_rid_desc)[i]);
return(0);
}
} else { /* MPI-350 */
for (count = 0; count < AN_MAX_RX_DESC; count++){
for (i = 0; i < sizeof(an_rx_desc) / 4; i++)
- ((u_int32_t*)&an_rx_desc)[i]
+ ((u_int32_t*)(void *)&an_rx_desc)[i]
= CSR_MEM_AUX_READ_4(sc,
AN_RX_DESC_OFFSET
+ (count * sizeof(an_rx_desc))
AN_RX_DESC_OFFSET
+ (count * sizeof(an_rx_desc))
+ (i * 4),
- ((u_int32_t*)&an_rx_desc)[i]);
+ ((u_int32_t*)(void *)&an_rx_desc)[i]);
} else {
if_printf(ifp, "Didn't get valid RX packet "
for (i = 0; i < sizeof(an_rid_desc) / 4; i++)
CSR_MEM_AUX_WRITE_4(sc, AN_HOST_DESC_OFFSET + i * 4,
- ((u_int32_t*)&an_rid_desc)[i]);
+ ((u_int32_t *)(void *)&an_rid_desc)[i]);
if (an_cmd_struct(sc, &cmd, &reply)
|| reply.an_status & AN_CMD_QUAL_MASK) {
for (i = 0; i < sizeof(an_rid_desc) / 4; i++)
CSR_MEM_AUX_WRITE_4(sc, AN_HOST_DESC_OFFSET + i * 4,
- ((u_int32_t*)&an_rid_desc)[i]);
+ ((u_int32_t *)(void *)&an_rid_desc)[i]);
if ((i = an_cmd_struct(sc, &cmd, &reply))) {
if_printf(&sc->arpcom.ac_if,
sc->an_sigitems) / 2) + 1;
} else
#endif
- if (an_read_record(sc, (struct an_ltv_gen *)&sc->areq)) {
+ if (an_read_record(sc, (struct an_ltv_gen *)(void *)&sc->areq)) {
error = EINVAL;
break;
}
if (ireq->i_val == -1) {
sc->areq.an_type = AN_RID_STATUS;
if (an_read_record(sc,
- (struct an_ltv_gen *)&sc->areq)) {
+ (struct an_ltv_gen *)(void *)&sc->areq)) {
error = EINVAL;
break;
}
} else if (ireq->i_val >= 0) {
sc->areq.an_type = AN_RID_SSIDLIST;
if (an_read_record(sc,
- (struct an_ltv_gen *)&sc->areq)) {
+ (struct an_ltv_gen *)(void *)&sc->areq)) {
error = EINVAL;
break;
}
sc->areq.an_len = sizeof(sc->areq);
sc->areq.an_type = AN_RID_SSIDLIST;
if (an_read_record(sc,
- (struct an_ltv_gen *)&sc->areq)) {
+ (struct an_ltv_gen *)(void *)&sc->areq)) {
error = EINVAL;
break;
}
case IEEE80211_IOC_WEP:
sc->areq.an_type = AN_RID_ACTUALCFG;
if (an_read_record(sc,
- (struct an_ltv_gen *)&sc->areq)) {
+ (struct an_ltv_gen *)(void *)&sc->areq)) {
error = EINVAL;
break;
}
sc->areq.an_type = AN_RID_WEP_TEMP;
for (i = 0; i < 5; i++) {
if (an_read_record(sc,
- (struct an_ltv_gen *)&sc->areq)) {
+ (struct an_ltv_gen *)(void *)&sc->areq)) {
error = EINVAL;
break;
}
sc->areq.an_type = AN_RID_WEP_TEMP;
for (i = 0; i < 5; i++) {
if (an_read_record(sc,
- (struct an_ltv_gen *) &sc->areq)) {
+ (struct an_ltv_gen *)(void *)&sc->areq)) {
error = EINVAL;
break;
}
sc->areq.an_type = AN_RID_WEP_PERM;
key->kindex = 0xffff;
if (an_read_record(sc,
- (struct an_ltv_gen *)&sc->areq)) {
+ (struct an_ltv_gen *)(void *)&sc->areq)) {
error = EINVAL;
break;
}
sc->areq.an_len = sizeof(struct an_ltv_genconfig);
sc->areq.an_type = AN_RID_GENCONFIG;
if (an_read_record(sc,
- (struct an_ltv_gen *)&sc->areq)) {
+ (struct an_ltv_gen *)(void *)&sc->areq)) {
error = EINVAL;
break;
}
case IEEE80211_IOC_AUTHMODE:
sc->areq.an_type = AN_RID_ACTUALCFG;
if (an_read_record(sc,
- (struct an_ltv_gen *)&sc->areq)) {
+ (struct an_ltv_gen *)(void *)&sc->areq)) {
error = EINVAL;
break;
}
case IEEE80211_IOC_STATIONNAME:
sc->areq.an_type = AN_RID_ACTUALCFG;
if (an_read_record(sc,
- (struct an_ltv_gen *)&sc->areq)) {
+ (struct an_ltv_gen *)(void *)&sc->areq)) {
error = EINVAL;
break;
}
case IEEE80211_IOC_CHANNEL:
sc->areq.an_type = AN_RID_STATUS;
if (an_read_record(sc,
- (struct an_ltv_gen *)&sc->areq)) {
+ (struct an_ltv_gen *)(void *)&sc->areq)) {
error = EINVAL;
break;
}
case IEEE80211_IOC_POWERSAVE:
sc->areq.an_type = AN_RID_ACTUALCFG;
if (an_read_record(sc,
- (struct an_ltv_gen *)&sc->areq)) {
+ (struct an_ltv_gen *)(void *)&sc->areq)) {
error = EINVAL;
break;
}
case IEEE80211_IOC_POWERSAVESLEEP:
sc->areq.an_type = AN_RID_ACTUALCFG;
if (an_read_record(sc,
- (struct an_ltv_gen *)&sc->areq)) {
+ (struct an_ltv_gen *)(void *)&sc->areq)) {
error = EINVAL;
break;
}
ireq->i_type != IEEE80211_IOC_WEPTXKEY) {
sc->areq.an_type = AN_RID_GENCONFIG;
if (an_read_record(sc,
- (struct an_ltv_gen *)&sc->areq)) {
+ (struct an_ltv_gen *)(void *)&sc->areq)) {
error = EINVAL;
break;
}
sc->areq.an_len = sizeof(sc->areq);
sc->areq.an_type = AN_RID_SSIDLIST;
if (an_read_record(sc,
- (struct an_ltv_gen *)&sc->areq)) {
+ (struct an_ltv_gen *)(void *)&sc->areq)) {
error = EINVAL;
break;
}
sc->areq.an_len = sizeof(struct an_ltv_genconfig);
sc->areq.an_type = AN_RID_ACTUALCFG;
if (an_read_record(sc,
- (struct an_ltv_gen *)&sc->areq)) {
+ (struct an_ltv_gen *)(void *)&sc->areq)) {
error = EINVAL;
break;
}
/* zero for now */
+ (0 * sizeof(an_tx_desc))
+ (i * 4),
- ((u_int32_t*)&an_tx_desc)[i]);
+ ((u_int32_t*)(void *)&an_tx_desc)[i]);
}
BPF_MTAP(ifp, m0);
sc->areq.an_len = AN_MAX_DATALEN;
sc->areq.an_type = rid;
- an_read_record(sc, (struct an_ltv_gen *)&sc->areq);
+ an_read_record(sc, (struct an_ltv_gen *)(void *)&sc->areq);
l_ioctl->len = sc->areq.an_len - 4; /* just data */
sc->areq.an_len = AN_MAX_DATALEN;
sc->areq.an_type = rid;
- an_read_record(sc, (struct an_ltv_gen *)&sc->areq);
+ an_read_record(sc, (struct an_ltv_gen *)(void *)&sc->areq);
l_ioctl->len = sc->areq.an_len - 4; /* just data */
/* the data contains the length at first */
l_ioctl->len);
an_cmd(sc, AN_CMD_DISABLE, 0);
- an_write_record(sc, (struct an_ltv_gen *)&sc->areq);
+ an_write_record(sc, (struct an_ltv_gen *)(void *)&sc->areq);
an_cmd(sc, AN_CMD_ENABLE, 0);
return 0;
}
CSR_WRITE_2(sc, AN_AUX_OFFSET, 0);
for (nwords = 0; nwords != FLASH_SIZE / 2; nwords++) {
- CSR_WRITE_2(sc, AN_AUX_DATA, bufp[nwords] & 0xffff);
+ CSR_WRITE_2(sc, AN_AUX_DATA,
+ ((u_int16_t *)(void *)bufp)[nwords] & 0xffff);
}
} else {
for (nwords = 0; nwords != FLASH_SIZE / 4; nwords++) {
CSR_MEM_AUX_WRITE_4(sc, 0x8000,
- ((u_int32_t *)bufp)[nwords] & 0xffff);
+ ((u_int32_t *)(void *)bufp)[nwords] & 0xffff);
}
}
break;
case AIROFLSHGCHR: /* Get char from aux */
copyin(l_ioctl->data, &sc->areq, l_ioctl->len);
- z = *(int *)&sc->areq;
+ z = *(int *)(void *)&sc->areq;
if ((status = flashgchar(ifp, z, 8000)) == 1)
return 0;
else
break;
case AIROFLSHPCHR: /* Send char to card. */
copyin(l_ioctl->data, &sc->areq, l_ioctl->len);
- z = *(int *)&sc->areq;
+ z = *(int *)(void *)&sc->areq;
if ((status = flashpchar(ifp, z, 8000)) == -1)
return -EIO;
else
error = bge_dma_block_alloc(sc, BGE_JUMBO_RX_RING_SZ,
&sc->bge_cdata.bge_rx_jumbo_ring_tag,
&sc->bge_cdata.bge_rx_jumbo_ring_map,
- (void **)&sc->bge_ldata.bge_rx_jumbo_ring,
+ (void *)&sc->bge_ldata.bge_rx_jumbo_ring,
&sc->bge_ldata.bge_rx_jumbo_ring_paddr);
if (error) {
if_printf(ifp, "could not create jumbo RX ring\n");
error = bge_dma_block_alloc(sc, BGE_STD_RX_RING_SZ,
&sc->bge_cdata.bge_rx_std_ring_tag,
&sc->bge_cdata.bge_rx_std_ring_map,
- (void **)&sc->bge_ldata.bge_rx_std_ring,
+ (void *)&sc->bge_ldata.bge_rx_std_ring,
&sc->bge_ldata.bge_rx_std_ring_paddr);
if (error) {
if_printf(ifp, "could not create std RX ring\n");
error = bge_dma_block_alloc(sc, BGE_RX_RTN_RING_SZ(sc),
&sc->bge_cdata.bge_rx_return_ring_tag,
&sc->bge_cdata.bge_rx_return_ring_map,
- (void **)&sc->bge_ldata.bge_rx_return_ring,
+ (void *)&sc->bge_ldata.bge_rx_return_ring,
&sc->bge_ldata.bge_rx_return_ring_paddr);
if (error) {
if_printf(ifp, "could not create RX ret ring\n");
error = bge_dma_block_alloc(sc, BGE_TX_RING_SZ,
&sc->bge_cdata.bge_tx_ring_tag,
&sc->bge_cdata.bge_tx_ring_map,
- (void **)&sc->bge_ldata.bge_tx_ring,
+ (void *)&sc->bge_ldata.bge_tx_ring,
&sc->bge_ldata.bge_tx_ring_paddr);
if (error) {
if_printf(ifp, "could not create TX ring\n");
error = bge_dma_block_alloc(sc, BGE_STATUS_BLK_SZ,
&sc->bge_cdata.bge_status_tag,
&sc->bge_cdata.bge_status_map,
- (void **)&sc->bge_ldata.bge_status_block,
+ (void *)&sc->bge_ldata.bge_status_block,
&sc->bge_ldata.bge_status_block_paddr);
if (error) {
if_printf(ifp, "could not create status block\n");
error = bge_dma_block_alloc(sc, BGE_STATS_SZ,
&sc->bge_cdata.bge_stats_tag,
&sc->bge_cdata.bge_stats_map,
- (void **)&sc->bge_ldata.bge_stats,
+ (void *)&sc->bge_ldata.bge_stats,
&sc->bge_ldata.bge_stats_paddr);
if (error) {
if_printf(ifp, "could not create stats block\n");
/* Create DMA stuffs for Tx ring. */
error = msk_dmamem_create(sc_if->msk_if_dev, MSK_TX_RING_SZ,
&sc_if->msk_cdata.msk_tx_ring_tag,
- (void **)&sc_if->msk_rdata.msk_tx_ring,
+ (void *)&sc_if->msk_rdata.msk_tx_ring,
&sc_if->msk_rdata.msk_tx_ring_paddr,
&sc_if->msk_cdata.msk_tx_ring_map);
if (error) {
/* Create DMA stuffs for Rx ring. */
error = msk_dmamem_create(sc_if->msk_if_dev, MSK_RX_RING_SZ,
&sc_if->msk_cdata.msk_rx_ring_tag,
- (void **)&sc_if->msk_rdata.msk_rx_ring,
+ (void *)&sc_if->msk_rdata.msk_rx_ring,
&sc_if->msk_rdata.msk_rx_ring_paddr,
&sc_if->msk_cdata.msk_rx_ring_map);
if (error) {
void **desc;
if (sc->sc_caps & NFE_40BIT_ADDR) {
- desc = (void **)&ring->desc64;
+ desc = (void *)&ring->desc64;
descsize = sizeof(struct nfe_desc64);
} else {
- desc = (void **)&ring->desc32;
+ desc = (void *)&ring->desc32;
descsize = sizeof(struct nfe_desc32);
}
void **desc;
if (sc->sc_caps & NFE_40BIT_ADDR) {
- desc = (void **)&ring->desc64;
+ desc = (void *)&ring->desc64;
descsize = sizeof(struct nfe_desc64);
} else {
- desc = (void **)&ring->desc32;
+ desc = (void *)&ring->desc32;
descsize = sizeof(struct nfe_desc32);
}
/* There's no way to say TUNEABLE_LONG to get the right types */
u_long cbb_start_mem = CBB_START_MEM;
-TUNABLE_INT("hw.cbb.start_memory", (int *)&cbb_start_mem);
+TUNABLE_ULONG("hw.cbb.start_memory", &cbb_start_mem);
SYSCTL_ULONG(_hw_cbb, OID_AUTO, start_memory, CTLFLAG_RW,
&cbb_start_mem, CBB_START_MEM,
"Starting address for memory allocations");
u_long cbb_start_16_io = CBB_START_16_IO;
-TUNABLE_INT("hw.cbb.start_16_io", (int *)&cbb_start_16_io);
+TUNABLE_ULONG("hw.cbb.start_16_io", &cbb_start_16_io);
SYSCTL_ULONG(_hw_cbb, OID_AUTO, start_16_io, CTLFLAG_RW,
&cbb_start_16_io, CBB_START_16_IO,
"Starting ioport for 16-bit cards");
u_long cbb_start_32_io = CBB_START_32_IO;
-TUNABLE_INT("hw.cbb.start_32_io", (int *)&cbb_start_32_io);
+TUNABLE_ULONG("hw.cbb.start_32_io", &cbb_start_32_io);
SYSCTL_ULONG(_hw_cbb, OID_AUTO, start_32_io, CTLFLAG_RW,
&cbb_start_32_io, CBB_START_32_IO,
"Starting ioport for 32-bit cards");
* avoid this with the tag setup, but that does't seem to work.
*/
retry:
- error = bus_dmamem_alloc(sc->amr_sg_dmat, (void **)&sc->amr_sgtable, BUS_DMA_NOWAIT, &sc->amr_sg_dmamap);
+ error = bus_dmamem_alloc(sc->amr_sg_dmat, (void *)&sc->amr_sgtable, BUS_DMA_NOWAIT, &sc->amr_sg_dmamap);
if (error) {
device_printf(sc->amr_dev, "can't allocate s/g table\n");
return(ENOMEM);
* Allocate the mailbox structure and permanently map it into
* controller-visible space.
*/
- error = bus_dmamem_alloc(sc->amr_mailbox_dmat, (void **)&p, BUS_DMA_NOWAIT,
+ error = bus_dmamem_alloc(sc->amr_mailbox_dmat, (void *)&p, BUS_DMA_NOWAIT,
&sc->amr_mailbox_dmamap);
if (error) {
device_printf(sc->amr_dev, "can't allocate mailbox memory\n");
*/
cbfc = kmalloc(sizeof(*cbfc), CISS_MALLOC_CLASS, M_INTWAIT | M_ZERO);
if ((error = ciss_get_bmic_request(sc, &cr, CISS_BMIC_FLUSH_CACHE,
- (void **)&cbfc, sizeof(*cbfc))) != 0)
+ (void *)&cbfc, sizeof(*cbfc))) != 0)
goto out;
/*
* Get a request, allocate storage for the adapter data.
*/
if ((error = ciss_get_bmic_request(sc, &cr, CISS_BMIC_ID_CTLR,
- (void **)&sc->ciss_id,
+ (void *)&sc->ciss_id,
sizeof(*sc->ciss_id))) != 0)
goto out;
* Build a BMIC request to fetch the drive ID.
*/
if ((error = ciss_get_bmic_request(sc, &cr, CISS_BMIC_ID_LDRIVE,
- (void **)&ld->cl_ldrive,
+ (void *)&ld->cl_ldrive,
sizeof(*ld->cl_ldrive))) != 0)
goto out;
cc = CISS_FIND_COMMAND(cr);
* Build a CISS BMIC command to get the logical drive status.
*/
if ((error = ciss_get_bmic_request(sc, &cr, CISS_BMIC_ID_LSTATUS,
- (void **)&ld->cl_lstatus,
+ (void *)&ld->cl_lstatus,
sizeof(*ld->cl_lstatus))) != 0)
goto out;
cc = CISS_FIND_COMMAND(cr);
sg_map = kmalloc(sizeof(*sg_map), M_DEVBUF, M_INTWAIT);
/* Allocate S/G space for the next batch of CCBS */
- if (bus_dmamem_alloc(dpt->sg_dmat, (void **)&sg_map->sg_vaddr,
+ if (bus_dmamem_alloc(dpt->sg_dmat, (void *)&sg_map->sg_vaddr,
BUS_DMA_NOWAIT, &sg_map->sg_dmamap) != 0) {
kfree(sg_map, M_DEVBUF);
return (NULL);
dpt->init_level++;
/* Allocation for our ccbs and interrupt status packet */
- if (bus_dmamem_alloc(dpt->dccb_dmat, (void **)&dpt->dpt_dccbs,
+ if (bus_dmamem_alloc(dpt->dccb_dmat, (void *)&dpt->dpt_dccbs,
BUS_DMA_NOWAIT, &dpt->dccb_dmamap) != 0) {
kprintf("dpt: bus_dmamem_alloc(dpt->dccb_dmat,...) failed\n");
goto error_exit;
/* Allocation of hardware QCBs */
/* XXX allocation is rounded to hardware page size */
error = bus_dmamem_alloc(ida->hwqcb_dmat,
- (void **)&ida->hwqcbs, BUS_DMA_NOWAIT, &ida->hwqcb_dmamap);
+ (void *)&ida->hwqcbs, BUS_DMA_NOWAIT, &ida->hwqcb_dmamap);
if (error)
return (ENOMEM);
gdt->sc_init_level++;
/* Allocation for our ccb scratch area */
- if (bus_dmamem_alloc(gdt->sc_gcscratch_dmat, (void **)&gdt->sc_gcscratch,
+ if (bus_dmamem_alloc(gdt->sc_gcscratch_dmat, (void *)&gdt->sc_gcscratch,
BUS_DMA_NOWAIT, &gdt->sc_gcscratch_dmamap) != 0) {
kprintf("iir%d: bus_dmamem_alloc(...,&gdt->sc_gcscratch,...) failed\n",
gdt->sc_hanum);
* contiguous slab. We may need to switch to a more complex arrangement where
* we allocate in smaller chunks and keep a lookup table from slot to bus address.
*/
- error = bus_dmamem_alloc(sc->mlx_sg_dmat, (void **)&sc->mlx_sgtable, BUS_DMA_NOWAIT, &sc->mlx_sg_dmamap);
+ error = bus_dmamem_alloc(sc->mlx_sg_dmat, (void *)&sc->mlx_sgtable, BUS_DMA_NOWAIT, &sc->mlx_sg_dmamap);
if (error) {
device_printf(sc->mlx_dev, "can't allocate s/g table\n");
return(ENOMEM);
projects / dragonfly.git / commitdiff