While here, make it compilable into the kernel and add it to the LINTs.
.Nm ecc
.Nd ECC memory controller support
.Sh SYNOPSIS
-To load this driver as a module at boot time, place the following line in
+To compile this driver into the kernel,
+place the following lines in your
+kernel configuration file:
+.Bd -ragged -offset indent
+.Cd "device ecc"
+.Ed
+.Pp
+Alternatively, to load the driver as a
+module at boot time, place the following line in
.Xr loader.conf 5 :
.Bd -literal -offset indent
ecc_load="YES"
bus/isa/isa_common.c optional isa
bus/isa/isahint.c optional isa
bus/isa/pnpeat.c optional isa
+dev/misc/ecc/ecc_amd8000.c optional ecc
+dev/misc/ecc/ecc_e31200.c optional ecc
+dev/misc/ecc/ecc_x3400.c optional ecc
dev/misc/joy/joy.c optional joy
dev/misc/kbdmux/kbdmux.c optional kbdmux
dev/misc/orm/orm.c optional isa
# apm: Laptop Advanced Power Management (experimental)
# bktr: Brooktree bt848/848a/849a/878/879 video capture and TV Tuner board
# cy: Cyclades serial driver
+# ecc: ECC memory controller
# joy: joystick
# rp: Comtrol Rocketport(ISA) - single card
# si: Specialix SI/XIO 4-32 port terminal multiplexor
# For the PCI cards, "device stl" will suffice.
device apm0
+device ecc
device joy0 at isa? port IO_GAME
device cy0 at isa? irq 10 iomem 0xd4000 iosiz 0x2000
device nrp
# Miscellaneous hardware:
#
# bktr: Brooktree bt848/848a/849a/878/879 video capture and TV Tuner board
+# ecc: ECC memory controller
# joy: joystick
# rp: Comtrol Rocketport(ISA) - single card
# si: Specialix SI/XIO 4-32 port terminal multiplexor
# The Rev 2 host cards use a 32K chunk, on a 32K boundary.
# The cards can use an IRQ of 11, 12 or 15.
-# for the SoundBlaster 16 multicd - up to 4 devices
+device ecc
device joy0 at isa? port IO_GAME
device nrp
#device rp0 at isa? port 0x280
SUBDIR= \
acpica5 \
agp \
- bridge \
crypto \
disk \
drm \
+++ /dev/null
-# $DragonFly: src/sys/dev/bridge/Makefile,v 1.1 2006/10/10 18:31:02 dillon Exp $
-#
-
-SUBDIR= ecc
-
-.include <bsd.subdir.mk>
-SUBDIR=cmx dcons joy kbdmux lpbb pcfclock nmdm syscons snp tbridge
+SUBDIR=cmx dcons ecc joy kbdmux lpbb pcfclock nmdm syscons snp tbridge
.include <bsd.subdir.mk>
-# $DragonFly: src/sys/dev/bridge/ecc/Makefile,v 1.1 2006/10/10 18:31:03 dillon Exp $
-#
-
KMOD = ecc
SRCS = ecc_amd8000.c ecc_e31200.c ecc_x3400.c
SRCS += device_if.h bus_if.h pci_if.h pcib_if.h
/*
* Copyright (c) 2006 The DragonFly Project. All rights reserved.
- *
+ *
* This code is derived from software contributed to The DragonFly Project
* by Matthew Dillon <dillon@backplane.com>. AMD register addresses and
* values were pulled from MemTest-86 and Linux.
- *
+ *
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
- *
+ *
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* 3. Neither the name of The DragonFly Project nor the names of its
* contributors may be used to endorse or promote products derived
* from this software without specific, prior written permission.
- *
+ *
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
/*
* Copyright (c) 2011 The DragonFly Project. All rights reserved.
- *
+ *
* This code is derived from software contributed to The DragonFly Project
* by Sepherosa Ziehau <sepherosa@gmail.com>
- *
+ *
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
- *
+ *
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* 3. Neither the name of The DragonFly Project nor the names of its
* contributors may be used to endorse or promote products derived
* from this software without specific, prior written permission.
- *
+ *
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
#include "pcib_if.h"
-#include <dev/bridge/ecc/ecc_e31200_reg.h>
+#include <dev/misc/ecc/ecc_e31200_reg.h>
struct ecc_e31200_memctrl {
uint16_t vid;
/*
* Copyright (c) 2011 The DragonFly Project. All rights reserved.
- *
+ *
* This code is derived from software contributed to The DragonFly Project
* by Sepherosa Ziehau <sepherosa@gmail.com>
- *
+ *
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
- *
+ *
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* 3. Neither the name of The DragonFly Project nor the names of its
* contributors may be used to endorse or promote products derived
* from this software without specific, prior written permission.
- *
+ *
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
#include "pcib_if.h"
-#include <dev/bridge/ecc/ecc_x3400_reg.h>
+#include <dev/misc/ecc/ecc_x3400_reg.h>
#define MC_READ_2(ofs) \
pci_cfgregread(PCIBUS_X3400UC, PCISLOT_X3400UC_MC, \
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