Enable I/O APIC by default.
#include <bus/pci/pcib_private.h>
#include <machine/smp.h>
+#include <machine_base/apic/ioapic.h>
#include "legacyvar.h"
#include "pci_cfgreg.h"
#include <sys/bus.h>
#include <sys/rman.h>
#include <sys/sysctl.h>
-#include <machine/smp.h>
+#include <machine_base/apic/ioapic.h>
#include <bus/pci/pcivar.h>
#include <bus/pci/pcireg.h>
if ((pci_get_class(dev) == PCIC_BRIDGE) &&
(pci_get_subclass(dev) == PCIS_BRIDGE_PCI)) {
device_set_desc(dev, "PCI-PCI bridge");
+#if defined(__i386__) || defined(__x86_64__)
#ifdef SMP
/* PCIBIOS PCI-PCI bridge is -2000 */
if (ioapic_enable)
return (-1000);
#endif
+#endif
return (-10000);
}
return(ENXIO);
#include <bus/pci/pcib_private.h>
#include <machine/smp.h>
+#include <machine_base/apic/ioapic.h>
#include "legacyvar.h"
#include "pci_cfgreg.h"
#include <machine/apm_bios.h>
#include <machine/pc/bios.h>
#include <machine_base/apm/apm.h>
+#include <machine_base/apic/ioapic.h>
#include <machine/smp.h>
uint32_t acpi_reset_video = 1;
static TAILQ_HEAD(, ioapic_enumerator) ioapic_enumerators =
TAILQ_HEAD_INITIALIZER(ioapic_enumerators);
+int ioapic_enable = 1; /* I/O APIC is enabled by default */
+
int
ioapic_config(void)
{
int ioapic_gsi(int, int);
void *ioapic_map(vm_paddr_t);
+extern int ioapic_enable;
+
#endif /* !_ARCH_APIC_IOAPIC_H_ */
#include <machine/md_var.h>
#include <machine/pmap.h>
#include <machine_base/apic/lapic.h>
+#include <machine_base/apic/ioapic.h>
#include <machine_base/apic/ioapic_abi.h>
#include <machine/segments.h>
#include <sys/thread2.h>
#include <sys/machintr.h>
#include <machine_base/icu/icu_abi.h>
#include <machine_base/icu/elcr_var.h>
+#include <machine_base/apic/ioapic.h>
#include <machine_base/apic/ioapic_abi.h>
#define PHYSMAP_ENTRIES 10
avail_end = phys_avail[pa_indx];
}
-#ifdef SMP
-#ifdef APIC_IO
-int ioapic_enable = 1; /* Enabled by default for kernels compiled w/APIC_IO */
-#else
-int ioapic_enable = 0; /* Disabled by default for kernels compiled without */
-#endif
-#endif
-
struct machintr_abi MachIntrABI;
/*
#include <machine/nexusvar.h>
#include <machine/smp.h>
+#include <machine_base/apic/ioapic.h>
#include <bus/pci/pcivar.h>
#include <bus/pci/pcireg.h>
#include <machine/intr_machdep.h>
#include <machine_base/icu/icu.h>
#include <machine_base/icu/icu_var.h>
+#include <machine_base/apic/ioapic.h>
static void icu_init(void);
#include <machine_base/icu/icu.h>
#include <machine_base/icu/icu_ipl.h>
+#include <machine_base/apic/ioapic.h>
extern inthand_t
IDTVEC(icu_intr0), IDTVEC(icu_intr1),
int mptable_pci_int_route(int, int, int, int);
void mptable_pci_int_dump(void);
-extern int ioapic_enable;
-
#if defined(READY)
void clr_io_apic_mask24 (int, u_int32_t);
void set_io_apic_mask24 (int, u_int32_t);
#include <machine/specialreg.h>
#ifdef SMP
+#include <machine_base/apic/ioapic.h>
#include <machine_base/apic/ioapic_abi.h>
#endif
#include <machine_base/icu/icu.h>
#include <machine/apm_bios.h>
#include <machine/pc/bios.h>
#include <machine_base/apm/apm.h>
+#include <machine_base/apic/ioapic.h>
#include <machine/smp.h>
uint32_t acpi_reset_video = 1;
static TAILQ_HEAD(, ioapic_enumerator) ioapic_enumerators =
TAILQ_HEAD_INITIALIZER(ioapic_enumerators);
+int ioapic_enable = 1; /* I/O APIC is enabled by default */
+
int
ioapic_config(void)
{
int ioapic_gsi(int, int);
void *ioapic_map(vm_paddr_t);
+extern int ioapic_enable;
+
#endif /* !_ARCH_APIC_IOAPIC_H_ */
#include <machine/md_var.h>
#include <machine/pmap.h>
#include <machine_base/apic/lapic.h>
+#include <machine_base/apic/ioapic.h>
#include <machine_base/apic/ioapic_abi.h>
#include <machine/segments.h>
#include <machine/specialreg.h>
#include <machine/intr_machdep.h>
#include <machine_base/icu/icu.h>
#include <machine_base/icu/icu_var.h>
+#include <machine_base/apic/ioapic.h>
static void icu_init(void);
#include <machine_base/icu/icu.h>
#include <machine_base/icu/icu_ipl.h>
+#include <machine_base/apic/ioapic.h>
extern inthand_t
IDTVEC(icu_intr0), IDTVEC(icu_intr1),
/* global data in mp_machdep.c */
extern int imcr_present;
-extern int ioapic_enable;
extern int mp_naps;
#define APIC_INTMAPSIZE 192
#include <machine/intr_machdep.h>
#ifdef SMP
+#include <machine_base/apic/ioapic.h>
#include <machine_base/apic/ioapic_abi.h>
#endif
#include <machine_base/icu/icu.h>
#include <sys/machintr.h>
#include <machine_base/icu/icu_abi.h>
#include <machine_base/icu/elcr_var.h>
+#include <machine_base/apic/ioapic.h>
#include <machine_base/apic/ioapic_abi.h>
#define PHYSMAP_ENTRIES 10
}
}
-#ifdef SMP
-#ifdef APIC_IO
-int ioapic_enable = 1; /* Enabled by default for kernels compiled w/APIC_IO */
-#else
-int ioapic_enable = 0; /* Disabled by default for kernels compiled without */
-#endif
-#endif
-
struct machintr_abi MachIntrABI;
/*
#include <machine/nexusvar.h>
#include <machine/smp.h>
+#include <machine_base/apic/ioapic.h>
#define I386_BUS_SPACE_IO 0 /* space is i/o space */
#define I386_BUS_SPACE_MEM 1 /* space is mem space */