bge/bnx: Avoid using magic register name

diff --git a/sys/dev/netif/bge/if_bge.c b/sys/dev/netif/bge/if_bge.c
index c7655e3..83bf0e5 100644 (file)
--- a/sys/dev/netif/bge/if_bge.c
+++ b/sys/dev/netif/bge/if_bge.c
@@ -2825,8 +2825,8 @@ bge_reset(struct bge_softc *sc)
                uint32_t v;
 
                /* Enable Data FIFO protection. */
-               v = CSR_READ_4(sc, 0x7c00);
-               CSR_WRITE_4(sc, 0x7c00, v | (1<<25));
+               v = CSR_READ_4(sc, BGE_PCIE_TLDLPL_PORT);
+               CSR_WRITE_4(sc, BGE_PCIE_TLDLPL_PORT, v | (1 << 25));
        }
 
        DELAY(10000);

diff --git a/sys/dev/netif/bge/if_bgereg.h b/sys/dev/netif/bge/if_bgereg.h
index 86e6234..75b5755 100644 (file)
--- a/sys/dev/netif/bge/if_bgereg.h
+++ b/sys/dev/netif/bge/if_bgereg.h
@@ -1988,6 +1988,11 @@
 #define BGE_MEMWIN_END                 0x0000FFFF
 
 /*
+ * PCI-E Core Private Register Access to TL, DL & PL
+ */
+#define BGE_PCIE_TLDLPL_PORT           0x7c00
+
+/*
  * PCI-E transaction configure register.
  * Applies to BCM5906 and BCM5755+.  See 5722-PG101-R.
  *

diff --git a/sys/dev/netif/bnx/if_bnx.c b/sys/dev/netif/bnx/if_bnx.c
index e16c175..4988027 100644 (file)
--- a/sys/dev/netif/bnx/if_bnx.c
+++ b/sys/dev/netif/bnx/if_bnx.c
@@ -2366,8 +2366,8 @@ bnx_reset(struct bnx_softc *sc)
                uint32_t v;
 
                /* Enable Data FIFO protection. */
-               v = CSR_READ_4(sc, 0x7c00);
-               CSR_WRITE_4(sc, 0x7c00, v | (1<<25));
+               v = CSR_READ_4(sc, BGE_PCIE_TLDLPL_PORT);
+               CSR_WRITE_4(sc, BGE_PCIE_TLDLPL_PORT, v | (1 << 25));
        }
 
        DELAY(10000);