bge/bce: Use mii private data to pass various flags to brgphy
authorSepherosa Ziehau <sephe@dragonflybsd.org>
Sat, 7 Jul 2012 08:15:29 +0000 (16:15 +0800)
committerSepherosa Ziehau <sephe@dragonflybsd.org>
Sat, 7 Jul 2012 08:30:39 +0000 (16:30 +0800)
This unbreaks if_name support on bce(4) and bge(4).  And this mechanism
is cleaner and easier to extend than checking if_name and accessing
NIC drivers' softc.

sys/dev/netif/bce/if_bce.c
sys/dev/netif/bge/if_bge.c
sys/dev/netif/bge/if_bgereg.h
sys/dev/netif/mii_layer/brgphy.c
sys/dev/netif/mii_layer/brgphyreg.h

index f69acfd..235502d 100644 (file)
@@ -81,6 +81,7 @@
 
 #include <dev/netif/mii_layer/mii.h>
 #include <dev/netif/mii_layer/miivar.h>
+#include <dev/netif/mii_layer/brgphyreg.h>
 
 #include <bus/pci/pcireg.h>
 #include <bus/pci/pcivar.h>
@@ -679,6 +680,8 @@ bce_attach(device_t dev)
        void (*irq_handle)(void *);
        int rid, rc = 0;
        int i, j;
+       struct mii_probe_args mii_args;
+       uintptr_t mii_priv = 0;
 
        sc->bce_dev = dev;
        if_initname(ifp, device_get_name(dev), device_get_unit(dev));
@@ -742,6 +745,15 @@ bce_attach(device_t dev)
                goto fail;
        }
 
+       mii_priv |= BRGPHY_FLAG_WIRESPEED;
+       if (BCE_CHIP_NUM(sc) == BCE_CHIP_NUM_5709) {
+               if (BCE_CHIP_REV(sc) == BCE_CHIP_REV_Ax ||
+                   BCE_CHIP_REV(sc) == BCE_CHIP_REV_Bx)
+                       mii_priv |= BRGPHY_FLAG_NO_EARLYDAC;
+       } else {
+               mii_priv |= BRGPHY_FLAG_BER_BUG;
+       }
+
        if (sc->bce_irq_type == PCI_INTR_TYPE_LEGACY) {
                irq_handle = bce_intr_legacy;
        } else if (sc->bce_irq_type == PCI_INTR_TYPE_MSI) {
@@ -953,9 +965,15 @@ bce_attach(device_t dev)
        /* Assume a standard 1500 byte MTU size for mbuf allocations. */
        sc->mbuf_alloc_size  = MCLBYTES;
 
-       /* Look for our PHY. */
-       rc = mii_phy_probe(dev, &sc->bce_miibus,
-                          bce_ifmedia_upd, bce_ifmedia_sts);
+       /*
+        * Look for our PHY.
+        */
+       mii_probe_args_init(&mii_args, bce_ifmedia_upd, bce_ifmedia_sts);
+       mii_args.mii_probemask = 1 << sc->bce_phy_addr;
+       mii_args.mii_privtag = MII_PRIVTAG_BRGPHY;
+       mii_args.mii_priv = mii_priv;
+
+       rc = mii_probe(dev, &sc->bce_miibus, &mii_args);
        if (rc != 0) {
                device_printf(dev, "PHY probe failed!\n");
                goto fail;
@@ -1232,11 +1250,8 @@ bce_miibus_read_reg(device_t dev, int phy, int reg)
        int i;
 
        /* Make sure we are accessing the correct PHY address. */
-       if (phy != sc->bce_phy_addr) {
-               DBPRINT(sc, BCE_VERBOSE,
-                       "Invalid PHY address %d for PHY read!\n", phy);
-               return 0;
-       }
+       KASSERT(phy == sc->bce_phy_addr,
+           ("invalid phyno %d, should be %d\n", phy, sc->bce_phy_addr));
 
        if (sc->bce_phy_flags & BCE_PHY_INT_MODE_AUTO_POLLING_FLAG) {
                val = REG_RD(sc, BCE_EMAC_MDIO_MODE);
@@ -1308,11 +1323,8 @@ bce_miibus_write_reg(device_t dev, int phy, int reg, int val)
        int i;
 
        /* Make sure we are accessing the correct PHY address. */
-       if (phy != sc->bce_phy_addr) {
-               DBPRINT(sc, BCE_WARN,
-                       "Invalid PHY address %d for PHY write!\n", phy);
-               return(0);
-       }
+       KASSERT(phy == sc->bce_phy_addr,
+           ("invalid phyno %d, should be %d\n", phy, sc->bce_phy_addr));
 
        DBPRINT(sc, BCE_EXCESSIVE,
                "%s(): phy = %d, reg = 0x%04X, val = 0x%04X\n",
index 433be82..0e53bf2 100644 (file)
@@ -1963,6 +1963,7 @@ bge_attach(device_t dev)
        uint8_t ether_addr[ETHER_ADDR_LEN];
        uint16_t product, vendor;
        driver_intr_t *intr_func;
+       uintptr_t mii_priv = 0;
 
        sc = device_get_softc(dev);
        sc->bge_dev = dev;
@@ -2135,7 +2136,7 @@ bge_attach(device_t dev)
        if ((sc->bge_asicrev == BGE_ASICREV_BCM5700 ||
             sc->bge_asicrev == BGE_ASICREV_BCM5701) &&
            pci_get_subvendor(dev) == PCI_VENDOR_DELL)
-               sc->bge_phy_flags |= BGE_PHY_NO_3LED;
+               mii_priv |= BRGPHY_FLAG_NO_3LED;
 
        capmask = MII_CAPMASK_DEFAULT;
        if ((sc->bge_asicrev == BGE_ASICREV_BCM5703 &&
@@ -2155,24 +2156,27 @@ bge_attach(device_t dev)
                capmask &= ~BMSR_EXTSTAT;
        }
 
-       sc->bge_phy_flags |= BGE_PHY_WIRESPEED;
+       mii_priv |= BRGPHY_FLAG_WIRESPEED;
        if (sc->bge_asicrev == BGE_ASICREV_BCM5700 ||
            (sc->bge_asicrev == BGE_ASICREV_BCM5705 &&
             (sc->bge_chipid != BGE_CHIPID_BCM5705_A0 &&
              sc->bge_chipid != BGE_CHIPID_BCM5705_A1)) ||
            sc->bge_asicrev == BGE_ASICREV_BCM5906)
-               sc->bge_phy_flags &= ~BGE_PHY_WIRESPEED;
+               mii_priv &= ~BRGPHY_FLAG_WIRESPEED;
 
        if (sc->bge_chipid == BGE_CHIPID_BCM5701_A0 ||
            sc->bge_chipid == BGE_CHIPID_BCM5701_B0)
-               sc->bge_phy_flags |= BGE_PHY_CRC_BUG;
+               mii_priv |= BRGPHY_FLAG_CRC_BUG;
 
        if (sc->bge_chiprev == BGE_CHIPREV_5703_AX ||
            sc->bge_chiprev == BGE_CHIPREV_5704_AX)
-               sc->bge_phy_flags |= BGE_PHY_ADC_BUG;
+               mii_priv |= BRGPHY_FLAG_ADC_BUG;
 
        if (sc->bge_chipid == BGE_CHIPID_BCM5704_A0)
-               sc->bge_phy_flags |= BGE_PHY_5704_A0_BUG;
+               mii_priv |= BRGPHY_FLAG_5704_A0;
+
+       if (sc->bge_asicrev == BGE_ASICREV_BCM5906)
+               mii_priv |= BRGPHY_FLAG_5906;
 
        if (BGE_IS_5705_PLUS(sc) &&
            sc->bge_asicrev != BGE_ASICREV_BCM5906 &&
@@ -2186,11 +2190,11 @@ bge_attach(device_t dev)
                    sc->bge_asicrev == BGE_ASICREV_BCM5787) {
                        if (product != PCI_PRODUCT_BROADCOM_BCM5722 &&
                            product != PCI_PRODUCT_BROADCOM_BCM5756)
-                               sc->bge_phy_flags |= BGE_PHY_JITTER_BUG;
+                               mii_priv |= BRGPHY_FLAG_JITTER_BUG;
                        if (product == PCI_PRODUCT_BROADCOM_BCM5755M)
-                               sc->bge_phy_flags |= BGE_PHY_ADJUST_TRIM;
+                               mii_priv |= BRGPHY_FLAG_ADJUST_TRIM;
                } else {
-                       sc->bge_phy_flags |= BGE_PHY_BER_BUG;
+                       mii_priv |= BRGPHY_FLAG_BER_BUG;
                }
        }
 
@@ -2361,6 +2365,8 @@ bge_attach(device_t dev)
                mii_probe_args_init(&mii_args, bge_ifmedia_upd, bge_ifmedia_sts);
                mii_args.mii_probemask = 1 << sc->bge_phyno;
                mii_args.mii_capmask = capmask;
+               mii_args.mii_privtag = MII_PRIVTAG_BRGPHY;
+               mii_args.mii_priv = mii_priv;
 
                error = mii_probe(dev, &sc->bge_miibus, &mii_args);
                if (error) {
index de9534c..94d1bc4 100644 (file)
@@ -2576,16 +2576,6 @@ struct bge_softc {
        struct sysctl_ctx_list  bge_sysctl_ctx;
        struct sysctl_oid       *bge_sysctl_tree;
 
-       uint32_t                bge_phy_flags;
-#define BGE_PHY_NO_3LED                0x00200000
-#define BGE_PHY_ADC_BUG                0x00400000
-#define BGE_PHY_5704_A0_BUG    0x00800000
-#define BGE_PHY_JITTER_BUG     0x01000000
-#define BGE_PHY_BER_BUG                0x02000000
-#define BGE_PHY_ADJUST_TRIM    0x04000000
-#define BGE_PHY_CRC_BUG                0x08000000
-#define BGE_PHY_WIRESPEED      0x00000004
-
        int                     bge_phyno;
        uint32_t                bge_coal_chg;
 #define BGE_RX_COAL_TICKS_CHG          0x01
index aca151e..333bed1 100644 (file)
 #include "mii.h"
 #include "miivar.h"
 #include "miidevs.h"
-
 #include "brgphyreg.h"
-#include <dev/netif/bge/if_bgereg.h>
-#include <dev/netif/bce/if_bcereg.h>
 
 #include "miibus_if.h"
 
@@ -490,8 +487,6 @@ brgphy_loop(struct mii_softc *sc)
 static void
 brgphy_reset(struct mii_softc *sc)
 {
-       struct ifnet *ifp;
-
        mii_phy_reset(sc);
 
        switch (sc->mii_model) {
@@ -513,64 +508,53 @@ brgphy_reset(struct mii_softc *sc)
                break;
        }
 
-       ifp = sc->mii_pdata->mii_ifp;
-       if (strncmp(ifp->if_xname, "bge", 3) == 0) {
-               struct bge_softc *bge_sc = ifp->if_softc;
-
-               if (bge_sc->bge_phy_flags & BGE_PHY_ADC_BUG)
-                       brgphy_adc_bug(sc);
-               if (bge_sc->bge_phy_flags & BGE_PHY_5704_A0_BUG)
-                       brgphy_5704_a0_bug(sc);
-               if (bge_sc->bge_phy_flags & BGE_PHY_BER_BUG) {
-                       brgphy_ber_bug(sc);
-               } else if (bge_sc->bge_phy_flags & BGE_PHY_JITTER_BUG) {
-                       PHY_WRITE(sc, BRGPHY_MII_AUXCTL, 0x0c00);
-                       PHY_WRITE(sc, BRGPHY_MII_DSP_ADDR_REG, 0x000a);
-
-                       if (bge_sc->bge_phy_flags & BGE_PHY_ADJUST_TRIM) {
-                               PHY_WRITE(sc, BRGPHY_MII_DSP_RW_PORT, 0x110b);
-                               PHY_WRITE(sc, BRGPHY_TEST1,
-                                   BRGPHY_TEST1_TRIM_EN | 0x4);
-                       } else {
-                               PHY_WRITE(sc, BRGPHY_MII_DSP_RW_PORT, 0x010b);
-                       }
-
-                       PHY_WRITE(sc, BRGPHY_MII_AUXCTL, 0x0400);
+       if (sc->mii_privtag != MII_PRIVTAG_BRGPHY)
+               return;
+
+       device_printf(sc->mii_dev, "brgphy priv %ju\n",
+           (uintmax_t)sc->mii_priv);
+
+       if (sc->mii_priv & BRGPHY_FLAG_ADC_BUG)
+               brgphy_adc_bug(sc);
+       if (sc->mii_priv & BRGPHY_FLAG_5704_A0)
+               brgphy_5704_a0_bug(sc);
+       if (sc->mii_priv & BRGPHY_FLAG_BER_BUG) {
+               brgphy_ber_bug(sc);
+       } else if (sc->mii_priv & BRGPHY_FLAG_JITTER_BUG) {
+               PHY_WRITE(sc, BRGPHY_MII_AUXCTL, 0x0c00);
+               PHY_WRITE(sc, BRGPHY_MII_DSP_ADDR_REG, 0x000a);
+
+               if (sc->mii_priv & BRGPHY_FLAG_ADJUST_TRIM) {
+                       PHY_WRITE(sc, BRGPHY_MII_DSP_RW_PORT, 0x110b);
+                       PHY_WRITE(sc, BRGPHY_TEST1,
+                           BRGPHY_TEST1_TRIM_EN | 0x4);
+               } else {
+                       PHY_WRITE(sc, BRGPHY_MII_DSP_RW_PORT, 0x010b);
                }
-               if (bge_sc->bge_phy_flags & BGE_PHY_CRC_BUG)
-                       brgphy_crc_bug(sc);
 
-               /* Set Jumbo frame settings in the PHY. */
-               brgphy_jumbo_settings(sc, ifp->if_mtu);
+               PHY_WRITE(sc, BRGPHY_MII_AUXCTL, 0x0400);
+       }
+       if (sc->mii_priv & BRGPHY_FLAG_CRC_BUG)
+               brgphy_crc_bug(sc);
+       if (sc->mii_priv & BRGPHY_FLAG_NO_EARLYDAC)
+               brgphy_disable_early_dac(sc);
 
-               /* Adjust output voltage */
-               if (bge_sc->bge_asicrev == BGE_ASICREV_BCM5906)
-                       PHY_WRITE(sc, BRGPHY_MII_EPHY_PTEST, 0x12);
+       /* Set Jumbo frame settings in the PHY. */
+       brgphy_jumbo_settings(sc, sc->mii_pdata->mii_ifp->if_mtu);
 
-               /* Enable Ethernet@Wirespeed */
-               if (bge_sc->bge_phy_flags & BGE_PHY_WIRESPEED)
-                       brgphy_eth_wirespeed(sc);
+       /* Adjust output voltage */
+       if (sc->mii_priv & BRGPHY_FLAG_5906)
+               PHY_WRITE(sc, BRGPHY_MII_EPHY_PTEST, 0x12);
 
-               /* Enable Link LED on Dell boxes */
-               if (bge_sc->bge_phy_flags & BGE_PHY_NO_3LED) {
-                       PHY_WRITE(sc, BRGPHY_MII_PHY_EXTCTL, 
-                       PHY_READ(sc, BRGPHY_MII_PHY_EXTCTL)
-                               & ~BRGPHY_PHY_EXTCTL_3_LED);
-               }
-       } else if (strncmp(ifp->if_xname, "bce", 3) == 0) {
-               struct bce_softc *bce_sc = ifp->if_softc;
-
-               if (BCE_CHIP_NUM(bce_sc) == BCE_CHIP_NUM_5709) {
-                       if (BCE_CHIP_REV(bce_sc) == BCE_CHIP_REV_Ax ||
-                           BCE_CHIP_REV(bce_sc) == BCE_CHIP_REV_Bx)
-                               brgphy_disable_early_dac(sc);
-                       brgphy_jumbo_settings(sc, ifp->if_mtu);
-                       brgphy_eth_wirespeed(sc);
-               } else {
-                       brgphy_ber_bug(sc);
-                       brgphy_jumbo_settings(sc, ifp->if_mtu);
-                       brgphy_eth_wirespeed(sc);
-               }
+       /* Enable Ethernet@Wirespeed */
+       if (sc->mii_priv & BRGPHY_FLAG_WIRESPEED)
+               brgphy_eth_wirespeed(sc);
+
+       /* Enable Link LED on Dell boxes */
+       if (sc->mii_priv & BRGPHY_FLAG_NO_3LED) {
+               PHY_WRITE(sc, BRGPHY_MII_PHY_EXTCTL,
+                   PHY_READ(sc, BRGPHY_MII_PHY_EXTCTL) &
+                   ~BRGPHY_PHY_EXTCTL_3_LED);
        }
 }
 
index 0e7a472..4b45419 100644 (file)
 #define BRGPHY_INTRS   \
        ~(BRGPHY_IMR_LNK_CHG|BRGPHY_IMR_LSP_CHG|BRGPHY_IMR_DUP_CHG)
 
+/* MII_PRIVTAG_BRGPHY */
+#define BRGPHY_FLAG_ADC_BUG    0x001
+#define BRGPHY_FLAG_5704_A0    0x002
+#define BRGPHY_FLAG_BER_BUG    0x004
+#define BRGPHY_FLAG_JITTER_BUG 0x008
+#define BRGPHY_FLAG_ADJUST_TRIM        0x010
+#define BRGPHY_FLAG_CRC_BUG    0x020
+#define BRGPHY_FLAG_5906       0x040
+#define BRGPHY_FLAG_WIRESPEED  0x080
+#define BRGPHY_FLAG_NO_3LED    0x100
+#define BRGPHY_FLAG_NO_EARLYDAC        0x200
+
 #endif /* _DEV_BRGPHY_MIIREG_H_ */