i386 removal, part 12/x: Remove sys/platform/pc32.
authorSascha Wildner <saw@online.de>
Fri, 3 Jul 2015 23:16:34 +0000 (01:16 +0200)
committerSascha Wildner <saw@online.de>
Sat, 4 Jul 2015 08:23:50 +0000 (10:23 +0200)
135 files changed:
sys/platform/pc32/Makefile.inc [deleted file]
sys/platform/pc32/acpica/Makefile [deleted file]
sys/platform/pc32/acpica/OsdEnvironment.c [deleted file]
sys/platform/pc32/acpica/acpi_cpu_machdep.c [deleted file]
sys/platform/pc32/acpica/acpi_cstate_machdep.c [deleted file]
sys/platform/pc32/acpica/acpi_fadt.c [deleted file]
sys/platform/pc32/acpica/acpi_machdep.c [deleted file]
sys/platform/pc32/acpica/acpi_madt.c [deleted file]
sys/platform/pc32/acpica/acpi_pstate_machdep.c [deleted file]
sys/platform/pc32/acpica/acpi_sdt.c [deleted file]
sys/platform/pc32/acpica/acpi_sdt.h [deleted file]
sys/platform/pc32/acpica/acpi_sdt_var.h [deleted file]
sys/platform/pc32/acpica/acpi_wakecode.S [deleted file]
sys/platform/pc32/acpica/acpi_wakeup.c [deleted file]
sys/platform/pc32/acpica/genwakecode.sh [deleted file]
sys/platform/pc32/apic/apic_vector.s [deleted file]
sys/platform/pc32/apic/apicreg.h [deleted file]
sys/platform/pc32/apic/apicvar.h [deleted file]
sys/platform/pc32/apic/ioapic.c [deleted file]
sys/platform/pc32/apic/ioapic.h [deleted file]
sys/platform/pc32/apic/ioapic_abi.c [deleted file]
sys/platform/pc32/apic/ioapic_abi.h [deleted file]
sys/platform/pc32/apic/ioapic_ipl.h [deleted file]
sys/platform/pc32/apic/ioapic_ipl.s [deleted file]
sys/platform/pc32/apic/lapic.c [deleted file]
sys/platform/pc32/apic/lapic.h [deleted file]
sys/platform/pc32/conf/Makefile [deleted file]
sys/platform/pc32/conf/files [deleted file]
sys/platform/pc32/conf/kern.mk [deleted file]
sys/platform/pc32/conf/ldscript.i386 [deleted file]
sys/platform/pc32/conf/options [deleted file]
sys/platform/pc32/i386/autoconf.c [deleted file]
sys/platform/pc32/i386/bcopy.s [deleted file]
sys/platform/pc32/i386/bios.c [deleted file]
sys/platform/pc32/i386/bioscall.s [deleted file]
sys/platform/pc32/i386/busdma_machdep.c [deleted file]
sys/platform/pc32/i386/bzero.s [deleted file]
sys/platform/pc32/i386/cpufreq_machdep.c [deleted file]
sys/platform/pc32/i386/cs5536.c [deleted file]
sys/platform/pc32/i386/db_interface.c [deleted file]
sys/platform/pc32/i386/db_trace.c [deleted file]
sys/platform/pc32/i386/dump_machdep.c [deleted file]
sys/platform/pc32/i386/elan-mmcr.c [deleted file]
sys/platform/pc32/i386/exception.s [deleted file]
sys/platform/pc32/i386/genassym.c [deleted file]
sys/platform/pc32/i386/geode.c [deleted file]
sys/platform/pc32/i386/globals.s [deleted file]
sys/platform/pc32/i386/i686_mem.c [deleted file]
sys/platform/pc32/i386/identcpu.c [deleted file]
sys/platform/pc32/i386/initcpu.c [deleted file]
sys/platform/pc32/i386/ipl.s [deleted file]
sys/platform/pc32/i386/ipl_funcs.c [deleted file]
sys/platform/pc32/i386/k6_mem.c [deleted file]
sys/platform/pc32/i386/locore.s [deleted file]
sys/platform/pc32/i386/machdep.c [deleted file]
sys/platform/pc32/i386/math_emu.h [deleted file]
sys/platform/pc32/i386/math_emulate.c [deleted file]
sys/platform/pc32/i386/minidump_machdep.c [deleted file]
sys/platform/pc32/i386/mp_clock.c [deleted file]
sys/platform/pc32/i386/mp_machdep.c [deleted file]
sys/platform/pc32/i386/mpboot.s [deleted file]
sys/platform/pc32/i386/mptable.c [deleted file]
sys/platform/pc32/i386/msi.c [deleted file]
sys/platform/pc32/i386/msi_vector.s [deleted file]
sys/platform/pc32/i386/nexus.c [deleted file]
sys/platform/pc32/i386/perfmon.c [deleted file]
sys/platform/pc32/i386/pmap.c [deleted file]
sys/platform/pc32/i386/pmap_inval.c [deleted file]
sys/platform/pc32/i386/pnpbios.c [deleted file]
sys/platform/pc32/i386/procfs_machdep.c [deleted file]
sys/platform/pc32/i386/spinlock.s [deleted file]
sys/platform/pc32/i386/support.s [deleted file]
sys/platform/pc32/i386/swtch.s [deleted file]
sys/platform/pc32/i386/sys_machdep.c [deleted file]
sys/platform/pc32/i386/tls.c [deleted file]
sys/platform/pc32/i386/trap.c [deleted file]
sys/platform/pc32/i386/userconfig.c [deleted file]
sys/platform/pc32/i386/vm86.c [deleted file]
sys/platform/pc32/i386/vm86bios.s [deleted file]
sys/platform/pc32/i386/vm_machdep.c [deleted file]
sys/platform/pc32/icu/elcr.c [deleted file]
sys/platform/pc32/icu/elcr_var.h [deleted file]
sys/platform/pc32/icu/icu.c [deleted file]
sys/platform/pc32/icu/icu.h [deleted file]
sys/platform/pc32/icu/icu_abi.c [deleted file]
sys/platform/pc32/icu/icu_abi.h [deleted file]
sys/platform/pc32/icu/icu_ipl.h [deleted file]
sys/platform/pc32/icu/icu_ipl.s [deleted file]
sys/platform/pc32/icu/icu_var.h [deleted file]
sys/platform/pc32/icu/icu_vector.s [deleted file]
sys/platform/pc32/include/acpica_machdep.h [deleted file]
sys/platform/pc32/include/apm_bios.h [deleted file]
sys/platform/pc32/include/bootinfo.h [deleted file]
sys/platform/pc32/include/cdk.h [deleted file]
sys/platform/pc32/include/clock.h [deleted file]
sys/platform/pc32/include/comstats.h [deleted file]
sys/platform/pc32/include/console.h [deleted file]
sys/platform/pc32/include/cpu.h [deleted file]
sys/platform/pc32/include/cpufreq.h [deleted file]
sys/platform/pc32/include/globaldata.h [deleted file]
sys/platform/pc32/include/intr_machdep.h [deleted file]
sys/platform/pc32/include/ioctl_fd.h [deleted file]
sys/platform/pc32/include/ipl.h [deleted file]
sys/platform/pc32/include/lock.h [deleted file]
sys/platform/pc32/include/md_var.h [deleted file]
sys/platform/pc32/include/metadata.h [deleted file]
sys/platform/pc32/include/minidump.h [deleted file]
sys/platform/pc32/include/mptable.h [deleted file]
sys/platform/pc32/include/msi_machdep.h [deleted file]
sys/platform/pc32/include/msi_var.h [deleted file]
sys/platform/pc32/include/nexusvar.h [deleted file]
sys/platform/pc32/include/param.h [deleted file]
sys/platform/pc32/include/pc/bios.h [deleted file]
sys/platform/pc32/include/pc/display.h [deleted file]
sys/platform/pc32/include/pc/vesa.h [deleted file]
sys/platform/pc32/include/pcb.h [deleted file]
sys/platform/pc32/include/pcb_ext.h [deleted file]
sys/platform/pc32/include/pmap.h [deleted file]
sys/platform/pc32/include/pmap_inval.h [deleted file]
sys/platform/pc32/include/proc.h [deleted file]
sys/platform/pc32/include/ptrace.h [deleted file]
sys/platform/pc32/include/smp.h [deleted file]
sys/platform/pc32/include/thread.h [deleted file]
sys/platform/pc32/include/types.h [deleted file]
sys/platform/pc32/include/uc_device.h [deleted file]
sys/platform/pc32/include/vmm.h [deleted file]
sys/platform/pc32/include/vmparam.h [deleted file]
sys/platform/pc32/isa/clock.c [deleted file]
sys/platform/pc32/isa/ic/i8237.h [deleted file]
sys/platform/pc32/isa/isa_intr.c [deleted file]
sys/platform/pc32/isa/isa_intr.h [deleted file]
sys/platform/pc32/isa/npx.c [deleted file]
sys/platform/pc32/isa/pmtimer.c [deleted file]
sys/platform/pc32/isa/prof_machdep.c [deleted file]
sys/platform/pc32/isa/timerreg.h [deleted file]

diff --git a/sys/platform/pc32/Makefile.inc b/sys/platform/pc32/Makefile.inc
deleted file mode 100644 (file)
index d4c5779..0000000
+++ /dev/null
@@ -1,9 +0,0 @@
-# Used by the device build to check for device support
-#
-
-DEV_SUPPORT=   acpica agp bridge crypto disk drm misc netif \
-               pccard powermng raid serial sound smbus video \
-               virtual/virtio
-
-BOOT0CFG_SUPPORT=1
-
diff --git a/sys/platform/pc32/acpica/Makefile b/sys/platform/pc32/acpica/Makefile
deleted file mode 100644 (file)
index 60e6bbe..0000000
+++ /dev/null
@@ -1,26 +0,0 @@
-# $FreeBSD: src/sys/i386/acpica/Makefile,v 1.6 2004/04/13 13:43:11 des Exp $
-#
-
-# Correct path for kernel builds
-# Don't rely on the kernel's .depend file
-.ifdef MAKESRCPATH
-.PATH: ${MAKESRCPATH}
-DEPENDFILE=
-.else
-MAKESRCPATH= ${.CURDIR}
-CLEANFILES= acpi_wakecode.h acpi_wakecode.bin acpi_wakecode.o
-.endif
-CFLAGS+=       -I. -I@
-
-all: acpi_wakecode.h
-
-acpi_wakecode.o: acpi_wakecode.S
-
-acpi_wakecode.bin: acpi_wakecode.o
-       objcopy -S -O binary acpi_wakecode.o acpi_wakecode.bin
-
-acpi_wakecode.h: acpi_wakecode.bin acpi_wakecode.o
-       sh ${MAKESRCPATH}/genwakecode.sh > acpi_wakecode.h
-
-.include <bsd.prog.mk>
-
diff --git a/sys/platform/pc32/acpica/OsdEnvironment.c b/sys/platform/pc32/acpica/OsdEnvironment.c
deleted file mode 100644 (file)
index 307097e..0000000
+++ /dev/null
@@ -1,74 +0,0 @@
-/*-
- * Copyright (c) 2000,2001 Michael Smith
- * Copyright (c) 2000 BSDi
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * $FreeBSD: src/sys/i386/acpica/OsdEnvironment.c,v 1.10 2004/05/06 02:18:58 njl Exp $
- */
-
-/*
- * 6.1 : Environmental support
- */
-#include <sys/types.h>
-#include <sys/linker_set.h>
-#include <sys/sysctl.h>
-
-#include "acpi.h"
-
-static u_long i386_acpi_root;
-
-SYSCTL_ULONG(_machdep, OID_AUTO, acpi_root, CTLFLAG_RD, &i386_acpi_root, 0,
-            "The physical address of the RSDP");
-
-ACPI_STATUS
-AcpiOsInitialize(void)
-{
-       return (AE_OK);
-}
-
-ACPI_STATUS
-AcpiOsTerminate(void)
-{
-       return (AE_OK);
-}
-
-ACPI_PHYSICAL_ADDRESS
-AcpiOsGetRootPointer(void)
-{
-       ACPI_SIZE ptr;
-       ACPI_STATUS status;
-
-       if (i386_acpi_root == 0) {
-               /*
-                * The loader passes the physical address at which it found the
-                * RSDP in a hint.  We could recover this rather than searching
-                * manually here.
-                */
-               status = AcpiFindRootPointer(&ptr);
-               if (ACPI_SUCCESS(status))
-                       i386_acpi_root = ptr;
-       }
-
-       return (i386_acpi_root);
-}
diff --git a/sys/platform/pc32/acpica/acpi_cpu_machdep.c b/sys/platform/pc32/acpica/acpi_cpu_machdep.c
deleted file mode 100644 (file)
index 6647c54..0000000
+++ /dev/null
@@ -1,68 +0,0 @@
-/*-
- * Copyright (c) 2011 The DragonFly Project.  All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- *
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in
- *    the documentation and/or other materials provided with the
- *    distribution.
- * 3. Neither the name of The DragonFly Project nor the names of its
- *    contributors may be used to endorse or promote products derived
- *    from this software without specific, prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
- * COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
- * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
- * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
- * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- */
-
-#include <sys/param.h>
-#include <sys/bus.h>
-#include <sys/kernel.h>
-#include <sys/systm.h>
-#include <sys/sysctl.h>
-
-#include <machine/cpufunc.h>
-#include <machine/cputypes.h>
-#include <machine/md_var.h>
-#include <machine/specialreg.h>
-
-#include "acpi.h"
-#include "acpivar.h"
-#include "acpi_cpu.h"
-
-uint32_t
-acpi_cpu_md_features(void)
-{
-       if (cpu_vendor_id == CPU_VENDOR_INTEL) {
-               uint32_t regs[4];
-               static int reported;
-
-               if (!reported) {
-                       do_cpuid(0x6, regs);
-                       if (regs[0] & 0x2)
-                               kprintf("Turbo mode enabled in BIOS\n");
-                       reported = 1;
-               }
-
-               if (cpu_feature2 & CPUID2_EST) {
-                       return (ACPI_PDC_PX_MSR |
-                           ACPI_PDC_MP_PX_SWCOORD |
-                           ACPI_PDC_PX_HWCOORD);
-               }
-       }
-       return 0;
-}
diff --git a/sys/platform/pc32/acpica/acpi_cstate_machdep.c b/sys/platform/pc32/acpica/acpi_cstate_machdep.c
deleted file mode 100644 (file)
index 6151ef4..0000000
+++ /dev/null
@@ -1,105 +0,0 @@
-/*
- * Copyright (c) 2014 The DragonFly Project.  All rights reserved.
- *
- * This code is derived from software contributed to The DragonFly Project
- * by Sepherosa Ziehau <sepherosa@gmail.com>
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- *
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in
- *    the documentation and/or other materials provided with the
- *    distribution.
- * 3. Neither the name of The DragonFly Project nor the names of its
- *    contributors may be used to endorse or promote products derived
- *    from this software without specific, prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
- * COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
- * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
- * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
- * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- */
-
-#include <sys/param.h>
-#include <sys/kernel.h>
-#include <sys/systm.h>
-#include <sys/globaldata.h>
-
-#include <machine/md_var.h>
-#include <machine/cpufunc.h>
-#include <machine/cpufreq.h>
-#include <machine/cputypes.h>
-#include <machine/specialreg.h>
-
-#include "acpi.h"
-#include "acpi_cpu_cstate.h"
-
-int
-acpi_cst_md_cx_setup(struct acpi_cst_cx *cx)
-{
-       if (cpu_vendor_id != CPU_VENDOR_INTEL) {
-               /*
-                * No optimization for non-Intel CPUs so far.
-                *
-                * Hardware fixed resouce is not supported for
-                * C1+ state yet.
-                */
-               if (cx->type == ACPI_STATE_C1 &&
-                   cx->gas.SpaceId == ACPI_ADR_SPACE_FIXED_HARDWARE)
-                       return 0;
-               if (cx->gas.SpaceId != ACPI_ADR_SPACE_SYSTEM_IO &&
-                   cx->gas.SpaceId != ACPI_ADR_SPACE_SYSTEM_MEMORY) {
-                       kprintf("C%d: invalid SpaceId %d\n", cx->type,
-                           cx->gas.SpaceId);
-                       return EINVAL;
-               }
-               return 0;
-       }
-
-       if (cx->type == ACPI_STATE_C1 &&
-           cx->gas.SpaceId == ACPI_ADR_SPACE_FIXED_HARDWARE) {
-               /* TODO: filter C1 I/O then halt */
-               return 0;
-       }
-
-       /* TODO: We don't support fixed hardware yet */
-       if (cx->gas.SpaceId != ACPI_ADR_SPACE_SYSTEM_IO &&
-           cx->gas.SpaceId != ACPI_ADR_SPACE_SYSTEM_MEMORY) {
-               if (cx->gas.SpaceId != ACPI_ADR_SPACE_FIXED_HARDWARE) {
-                       kprintf("C%d: invalid SpaceId %d\n", cx->type,
-                           cx->gas.SpaceId);
-               }
-               return EINVAL;
-       }
-
-       if (cx->type >= ACPI_STATE_C3) {
-               if (CPUID_TO_FAMILY(cpu_id) > 0xf ||
-                   (CPUID_TO_FAMILY(cpu_id) == 0x6 &&
-                    CPUID_TO_MODEL(cpu_id) >= 0xf)) {
-                       /*
-                        * Pentium dual-core, Core 2 and beyond do not
-                        * need any additional activities to enter C3(+).
-                        */
-                       cx->preamble = ACPI_CST_CX_PREAMBLE_NONE;
-               } else if ((acpi_cst_quirks & ACPI_CST_QUIRK_NO_BM) == 0) {
-                       /*
-                        * Intel CPUs support bus master operation for
-                        * entering C3(+) even on MP system.
-                        */
-                       cx->preamble = ACPI_CST_CX_PREAMBLE_BM_ARB;
-               }
-       }
-       return 0;
-}
diff --git a/sys/platform/pc32/acpica/acpi_fadt.c b/sys/platform/pc32/acpica/acpi_fadt.c
deleted file mode 100644 (file)
index 7089381..0000000
+++ /dev/null
@@ -1,296 +0,0 @@
-/*
- * Copyright (c) 2009 The DragonFly Project.  All rights reserved.
- * 
- * This code is derived from software contributed to The DragonFly Project
- * by Sepherosa Ziehau <sepherosa@gmail.com>
- * 
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in
- *    the documentation and/or other materials provided with the
- *    distribution.
- * 3. Neither the name of The DragonFly Project nor the names of its
- *    contributors may be used to endorse or promote products derived
- *    from this software without specific, prior written permission.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
- * COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
- * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
- * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
- * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- */
-
-#include <sys/param.h>
-#include <sys/bus.h>
-#include <sys/interrupt.h>
-#include <sys/kernel.h>
-#include <sys/machintr.h>
-#include <sys/systm.h>
-#include <sys/thread2.h>
-
-#include "acpi_sdt.h"
-#include "acpi_sdt_var.h"
-#include "acpi_sci_var.h"
-
-#define FADT_VPRINTF(fmt, arg...) \
-do { \
-       if (bootverbose) \
-               kprintf("ACPI FADT: " fmt , ##arg); \
-} while (0)
-
-/* Fixed ACPI Description Table */
-struct acpi_fadt {
-       struct acpi_sdth        fadt_hdr;
-       uint32_t                fadt_fw_ctrl;
-       uint32_t                fadt_dsdt;
-       uint8_t                 fadt_rsvd1;
-       uint8_t                 fadt_pm_prof;
-       uint16_t                fadt_sci_int;
-       uint32_t                fadt_smi_cmd;
-       uint8_t                 fadt_acpi_en;
-       uint8_t                 fadt_acpi_dis;
-       uint8_t                 fadt_s4bios;
-       uint8_t                 fadt_pstate;
-       /* More ... */
-} __packed;
-
-struct acpi_sci_mode {
-       enum intr_trigger       sci_trig;
-       enum intr_polarity      sci_pola;
-};
-
-static int                     acpi_sci_irq = -1;
-static enum intr_trigger       acpi_sci_trig = INTR_TRIGGER_CONFORM;
-static enum intr_polarity      acpi_sci_pola = INTR_POLARITY_CONFORM;
-static const struct acpi_sci_mode *acpi_sci_mode1 = NULL;
-
-static const struct acpi_sci_mode acpi_sci_modes[] = {
-       /*
-        * NOTE: Order is critical
-        */
-       { INTR_TRIGGER_LEVEL,   INTR_POLARITY_LOW },
-       { INTR_TRIGGER_LEVEL,   INTR_POLARITY_HIGH },
-       { INTR_TRIGGER_EDGE,    INTR_POLARITY_HIGH },
-       { INTR_TRIGGER_EDGE,    INTR_POLARITY_LOW },
-
-       /* Required last entry */
-       { INTR_TRIGGER_CONFORM, INTR_POLARITY_CONFORM }
-};
-
-static void
-fadt_probe(void)
-{
-       struct acpi_fadt *fadt;
-       vm_paddr_t fadt_paddr;
-       enum intr_trigger trig;
-       enum intr_polarity pola;
-       int enabled = 1;
-       char *env;
-
-       fadt_paddr = sdt_search(ACPI_FADT_SIG);
-       if (fadt_paddr == 0) {
-               kprintf("fadt_probe: can't locate FADT\n");
-               return;
-       }
-
-       fadt = sdt_sdth_map(fadt_paddr);
-       KKASSERT(fadt != NULL);
-
-       /*
-        * FADT in ACPI specification 1.0 - 5.0
-        */
-       if (fadt->fadt_hdr.sdth_rev < 1 || fadt->fadt_hdr.sdth_rev > 5) {
-               kprintf("fadt_probe: unknown FADT revision %d\n",
-                       fadt->fadt_hdr.sdth_rev);
-       }
-
-       if (fadt->fadt_hdr.sdth_len < sizeof(*fadt)) {
-               kprintf("fadt_probe: invalid FADT length %u\n",
-                       fadt->fadt_hdr.sdth_len);
-               goto back;
-       }
-
-       kgetenv_int("hw.acpi.sci.enabled", &enabled);
-       if (!enabled)
-               goto back;
-
-       acpi_sci_irq = fadt->fadt_sci_int;
-
-       env = kgetenv("hw.acpi.sci.trigger");
-       if (env == NULL)
-               goto back;
-
-       trig = INTR_TRIGGER_CONFORM;
-       if (strcmp(env, "edge") == 0)
-               trig = INTR_TRIGGER_EDGE;
-       else if (strcmp(env, "level") == 0)
-               trig = INTR_TRIGGER_LEVEL;
-
-       kfreeenv(env);
-
-       if (trig == INTR_TRIGGER_CONFORM)
-               goto back;
-
-       env = kgetenv("hw.acpi.sci.polarity");
-       if (env == NULL)
-               goto back;
-
-       pola = INTR_POLARITY_CONFORM;
-       if (strcmp(env, "high") == 0)
-               pola = INTR_POLARITY_HIGH;
-       else if (strcmp(env, "low") == 0)
-               pola = INTR_POLARITY_LOW;
-
-       kfreeenv(env);
-
-       if (pola == INTR_POLARITY_CONFORM)
-               goto back;
-
-       acpi_sci_trig = trig;
-       acpi_sci_pola = pola;
-back:
-       if (acpi_sci_irq >= 0) {
-               FADT_VPRINTF("SCI irq %d, %s/%s\n", acpi_sci_irq,
-                            intr_str_trigger(acpi_sci_trig),
-                            intr_str_polarity(acpi_sci_pola));
-       } else {
-               FADT_VPRINTF("SCI is disabled\n");
-       }
-       sdt_sdth_unmap(&fadt->fadt_hdr);
-}
-SYSINIT(fadt_probe, SI_BOOT2_PRESMP, SI_ORDER_SECOND, fadt_probe, 0);
-
-static void
-acpi_sci_dummy_intr(void *dummy __unused, void *frame __unused)
-{
-}
-
-static boolean_t
-acpi_sci_test(const struct acpi_sci_mode *mode)
-{
-       void *sci_desc;
-       long last_cnt;
-
-       FADT_VPRINTF("SCI testing %s/%s\n",
-           intr_str_trigger(mode->sci_trig),
-           intr_str_polarity(mode->sci_pola));
-
-       last_cnt = get_interrupt_counter(acpi_sci_irq, 0);
-
-       machintr_legacy_intr_config(acpi_sci_irq,
-           mode->sci_trig, mode->sci_pola);
-
-       sci_desc = register_int(acpi_sci_irq,
-           acpi_sci_dummy_intr, NULL, "sci", NULL,
-           INTR_EXCL | INTR_CLOCK |
-           INTR_NOPOLL | INTR_MPSAFE | INTR_NOENTROPY, 0);
-
-       DELAY(100 * 1000);
-
-       unregister_int(sci_desc, 0);
-
-       if (get_interrupt_counter(acpi_sci_irq, 0) - last_cnt < 20) {
-               acpi_sci_trig = mode->sci_trig;
-               acpi_sci_pola = mode->sci_pola;
-
-               kprintf("ACPI FADT: SCI select %s/%s\n",
-                   intr_str_trigger(acpi_sci_trig),
-                   intr_str_polarity(acpi_sci_pola));
-               return TRUE;
-       }
-       return FALSE;
-}
-
-void
-acpi_sci_config(void)
-{
-       const struct acpi_sci_mode *mode;
-
-       KKASSERT(mycpuid == 0);
-
-       if (machintr_legacy_intr_find(acpi_sci_irq,
-           INTR_TRIGGER_CONFORM, INTR_POLARITY_CONFORM) < 0) {
-               kprintf("ACPI FADT: SCI irq %d is invalid, disable\n",
-                   acpi_sci_irq);
-               acpi_sci_irq = -1;
-               return;
-       }
-
-       if (acpi_sci_irq < 0)
-               return;
-
-       if (acpi_sci_trig != INTR_TRIGGER_CONFORM) {
-               KKASSERT(acpi_sci_pola != INTR_POLARITY_CONFORM);
-               machintr_legacy_intr_config(acpi_sci_irq,
-                   acpi_sci_trig, acpi_sci_pola);
-               return;
-       }
-
-       kprintf("ACPI FADT: SCI testing interrupt mode ...\n");
-       if (acpi_sci_mode1 != NULL) {
-               if (acpi_sci_test(acpi_sci_mode1))
-                       return;
-       }
-       for (mode = acpi_sci_modes; mode->sci_trig != INTR_TRIGGER_CONFORM;
-            ++mode) {
-               if (mode == acpi_sci_mode1)
-                       continue;
-               if (acpi_sci_test(mode))
-                       return;
-       }
-
-       kprintf("ACPI FADT: no suitable interrupt mode for SCI, disable\n");
-       acpi_sci_irq = -1;
-}
-
-int
-acpi_sci_enabled(void)
-{
-       if (acpi_sci_irq >= 0)
-               return 1;
-       else
-               return 0;
-}
-
-int
-acpi_sci_pci_shareable(void)
-{
-       if (acpi_sci_irq >= 0 &&
-           acpi_sci_trig == INTR_TRIGGER_LEVEL &&
-           acpi_sci_pola == INTR_POLARITY_LOW)
-               return 1;
-       else
-               return 0;
-}
-
-int
-acpi_sci_irqno(void)
-{
-       return acpi_sci_irq;
-}
-
-void
-acpi_sci_setmode1(enum intr_trigger trig, enum intr_polarity pola)
-{
-       const struct acpi_sci_mode *mode;
-
-       for (mode = acpi_sci_modes; mode->sci_trig != INTR_TRIGGER_CONFORM;
-            ++mode) {
-               if (mode->sci_trig == trig && mode->sci_pola == pola) {
-                       acpi_sci_mode1 = mode;
-                       return;
-               }
-       }
-}
diff --git a/sys/platform/pc32/acpica/acpi_machdep.c b/sys/platform/pc32/acpica/acpi_machdep.c
deleted file mode 100644 (file)
index 980ef74..0000000
+++ /dev/null
@@ -1,381 +0,0 @@
-/*-
- * Copyright (c) 2001 Mitsuru IWASAKI
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * $FreeBSD: src/sys/i386/acpica/acpi_machdep.c,v 1.20 2004/05/05 19:51:15 njl Exp $
- */
-
-#include <sys/param.h>
-#include <sys/bus.h>
-#include <sys/conf.h>
-#include <sys/device.h>
-#include <sys/fcntl.h>
-#include <sys/kernel.h>
-#include <sys/sysctl.h>
-#include <sys/uio.h>
-
-#include <machine/pmap.h>
-
-#include "acpi.h"
-#include <dev/acpica/acpivar.h>
-#include <dev/acpica/acpiio.h>
-
-static device_t        acpi_dev;
-
-/*
- * APM driver emulation 
- */
-
-#include <sys/event.h>
-
-#include <machine/apm_bios.h>
-#include <machine/pc/bios.h>
-#include <machine_base/apm/apm.h>
-#include <machine_base/apic/ioapic.h>
-#include <machine/smp.h>
-
-uint32_t acpi_reset_video = 1;
-TUNABLE_INT("hw.acpi.reset_video", &acpi_reset_video);
-
-static struct apm_softc        apm_softc;
-
-static d_open_t apmopen;
-static d_close_t apmclose;
-static d_write_t apmwrite;
-static d_ioctl_t apmioctl;
-static d_kqfilter_t apmkqfilter;
-
-static struct dev_ops apm_ops = {
-       { "apm", 0, 0 },
-        .d_open = apmopen,
-        .d_close = apmclose,
-       .d_write = apmwrite,
-        .d_ioctl = apmioctl,
-       .d_kqfilter = apmkqfilter
-};
-
-static int
-acpi_capm_convert_battstate(struct  acpi_battinfo *battp)
-{
-       int     state;
-
-       state = 0xff;   /* XXX unknown */
-
-       if (battp->state & ACPI_BATT_STAT_DISCHARG) {
-               if (battp->cap >= 50)
-                       state = 0;      /* high */
-               else
-                       state = 1;      /* low */
-       }
-       if (battp->state & ACPI_BATT_STAT_CRITICAL)
-               state = 2;              /* critical */
-       if (battp->state & ACPI_BATT_STAT_CHARGING)
-               state = 3;              /* charging */
-
-       /* If still unknown, determine it based on the battery capacity. */
-       if (state == 0xff) {
-               if (battp->cap >= 50)
-                       state = 0;      /* high */
-               else
-                       state = 1;      /* low */
-       }
-
-       return (state);
-}
-
-static int
-acpi_capm_convert_battflags(struct  acpi_battinfo *battp)
-{
-       int     flags;
-
-       flags = 0;
-
-       if (battp->cap >= 50)
-               flags |= APM_BATT_HIGH;
-       else {
-               if (battp->state & ACPI_BATT_STAT_CRITICAL)
-                       flags |= APM_BATT_CRITICAL;
-               else
-                       flags |= APM_BATT_LOW;
-       }
-       if (battp->state & ACPI_BATT_STAT_CHARGING)
-               flags |= APM_BATT_CHARGING;
-       if (battp->state == ACPI_BATT_STAT_NOT_PRESENT)
-               flags = APM_BATT_NOT_PRESENT;
-
-       return (flags);
-}
-
-static int
-acpi_capm_get_info(apm_info_t aip)
-{
-       int     acline;
-       struct  acpi_battinfo batt;
-
-       aip->ai_infoversion = 1;
-       aip->ai_major       = 1;
-       aip->ai_minor       = 2;
-       aip->ai_status      = apm_softc.active;
-       aip->ai_capabilities= 0xff00;   /* XXX unknown */
-
-       if (acpi_acad_get_acline(&acline))
-               aip->ai_acline = 0xff;          /* unknown */
-       else
-               aip->ai_acline = acline;        /* on/off */
-
-       if (acpi_battery_get_battinfo(NULL, &batt)) {
-               aip->ai_batt_stat = 0xff;       /* unknown */
-               aip->ai_batt_life = 0xff;       /* unknown */
-               aip->ai_batt_time = -1;         /* unknown */
-               aip->ai_batteries = 0;
-       } else {
-               aip->ai_batt_stat = acpi_capm_convert_battstate(&batt);
-               aip->ai_batt_life = batt.cap;
-               aip->ai_batt_time = (batt.min == -1) ? -1 : batt.min * 60;
-               aip->ai_batteries = acpi_battery_get_units();
-       }
-
-       return (0);
-}
-
-static int
-acpi_capm_get_pwstatus(apm_pwstatus_t app)
-{
-       device_t dev;
-       int     acline, unit, error;
-       struct  acpi_battinfo batt;
-
-       if (app->ap_device != PMDV_ALLDEV &&
-           (app->ap_device < PMDV_BATT0 || app->ap_device > PMDV_BATT_ALL))
-               return (1);
-
-       if (app->ap_device == PMDV_ALLDEV)
-               error = acpi_battery_get_battinfo(NULL, &batt);
-       else {
-               unit = app->ap_device - PMDV_BATT0;
-               dev = devclass_get_device(devclass_find("battery"), unit);
-               if (dev != NULL)
-                       error = acpi_battery_get_battinfo(dev, &batt);
-               else
-                       error = ENXIO;
-       }
-       if (error)
-               return (1);
-
-       app->ap_batt_stat = acpi_capm_convert_battstate(&batt);
-       app->ap_batt_flag = acpi_capm_convert_battflags(&batt);
-       app->ap_batt_life = batt.cap;
-       app->ap_batt_time = (batt.min == -1) ? -1 : batt.min * 60;
-
-       if (acpi_acad_get_acline(&acline))
-               app->ap_acline = 0xff;          /* unknown */
-       else
-               app->ap_acline = acline;        /* on/off */
-
-       return (0);
-}
-
-static int
-apmopen(struct dev_open_args *ap)
-{
-       return (0);
-}
-
-static int
-apmclose(struct dev_close_args *ap)
-{
-       return (0);
-}
-
-static int
-apmioctl(struct dev_ioctl_args *ap)
-{
-       int     error = 0;
-       struct  acpi_softc *acpi_sc;
-       struct apm_info info;
-       apm_info_old_t aiop;
-
-       acpi_sc = device_get_softc(acpi_dev);
-
-       switch (ap->a_cmd) {
-       case APMIO_SUSPEND:
-               if ((ap->a_fflag & FWRITE) == 0)
-                       return (EPERM);
-               if (apm_softc.active)
-                       acpi_SetSleepState(acpi_sc, acpi_sc->acpi_suspend_sx);
-               else
-                       error = EINVAL;
-               break;
-       case APMIO_STANDBY:
-               if ((ap->a_fflag & FWRITE) == 0)
-                       return (EPERM);
-               if (apm_softc.active)
-                       acpi_SetSleepState(acpi_sc, acpi_sc->acpi_standby_sx);
-               else
-                       error = EINVAL;
-               break;
-       case APMIO_GETINFO_OLD:
-               if (acpi_capm_get_info(&info))
-                       error = ENXIO;
-               aiop = (apm_info_old_t)ap->a_data;
-               aiop->ai_major = info.ai_major;
-               aiop->ai_minor = info.ai_minor;
-               aiop->ai_acline = info.ai_acline;
-               aiop->ai_batt_stat = info.ai_batt_stat;
-               aiop->ai_batt_life = info.ai_batt_life;
-               aiop->ai_status = info.ai_status;
-               break;
-       case APMIO_GETINFO:
-               if (acpi_capm_get_info((apm_info_t)ap->a_data))
-                       error = ENXIO;
-               break;
-       case APMIO_GETPWSTATUS:
-               if (acpi_capm_get_pwstatus((apm_pwstatus_t)ap->a_data))
-                       error = ENXIO;
-               break;
-       case APMIO_ENABLE:
-               if ((ap->a_fflag & FWRITE) == 0)
-                       return (EPERM);
-               apm_softc.active = 1;
-               break;
-       case APMIO_DISABLE:
-               if ((ap->a_fflag & FWRITE) == 0)
-                       return (EPERM);
-               apm_softc.active = 0;
-               break;
-       case APMIO_HALTCPU:
-               break;
-       case APMIO_NOTHALTCPU:
-               break;
-       case APMIO_DISPLAY:
-               if ((ap->a_fflag & FWRITE) == 0)
-                       return (EPERM);
-               break;
-       case APMIO_BIOS:
-               if ((ap->a_fflag & FWRITE) == 0)
-                       return (EPERM);
-               bzero(ap->a_data, sizeof(struct apm_bios_arg));
-               break;
-       default:
-               error = EINVAL;
-               break;
-       }
-
-       return (error);
-}
-
-static int
-apmwrite(struct dev_write_args *ap)
-{
-       return (ap->a_uio->uio_resid);
-}
-
-static void apmfilter_detach(struct knote *);
-static int apmfilter(struct knote *, long);
-
-static struct filterops apmfilterops =
-       { FILTEROP_ISFD, NULL, apmfilter_detach, apmfilter };
-
-static int
-apmkqfilter(struct dev_kqfilter_args *ap)
-{
-       struct knote *kn = ap->a_kn;
-
-       kn->kn_fop = &apmfilterops;
-       ap->a_result = 0;
-       return (0);
-}
-
-static void
-apmfilter_detach(struct knote *kn) {}
-
-static int
-apmfilter(struct knote *kn, long hint)
-{
-       return (0);
-}
-
-static void
-acpi_capm_init(struct acpi_softc *sc)
-{
-        make_dev(&apm_ops, 0, 0, 5, 0664, "apm");
-        make_dev(&apm_ops, 8, 0, 5, 0664, "apm");
-       kprintf("Warning: ACPI is disabling APM's device.  You can't run both\n");
-}
-
-int
-acpi_machdep_init(device_t dev)
-{
-       struct  acpi_softc *sc;
-       int intr_model;
-
-       acpi_dev = dev;
-       sc = device_get_softc(acpi_dev);
-
-       /*
-        * XXX: Prevent the PnP BIOS code from interfering with
-        * our own scan of ISA devices.
-        */
-       PnPBIOStable = NULL;
-
-       acpi_capm_init(sc);
-
-       acpi_install_wakeup_handler(sc);
-
-       if (ioapic_enable)
-               intr_model = ACPI_INTR_APIC;
-       else
-               intr_model = ACPI_INTR_PIC;
-
-       if (intr_model != ACPI_INTR_PIC)
-               acpi_SetIntrModel(intr_model);
-
-       SYSCTL_ADD_UINT(&sc->acpi_sysctl_ctx,
-           SYSCTL_CHILDREN(sc->acpi_sysctl_tree), OID_AUTO,
-           "reset_video", CTLFLAG_RD | CTLFLAG_RW, &acpi_reset_video, 0,
-           "Call the VESA reset BIOS vector on the resume path");
-
-       return (0);
-}
-
-/* Check BIOS date.  If 1998 or older, disable ACPI. */
-int
-acpi_machdep_quirks(int *quirks)
-{
-       char *va;
-       int year;
-
-       /* BIOS address 0xffff5 contains the date in the format mm/dd/yy. */
-       va = pmap_mapbios(0xffff0, 16);
-       ksscanf(va + 11, "%2d", &year);
-       pmap_unmapdev((vm_offset_t)va, 16);
-
-       /* 
-        * Date must be >= 1/1/1999 or we don't trust ACPI.
-        */
-       if (year > 90 && year < 99)
-               *quirks = ACPI_Q_BROKEN;
-
-       return (0);
-}
diff --git a/sys/platform/pc32/acpica/acpi_madt.c b/sys/platform/pc32/acpica/acpi_madt.c
deleted file mode 100644 (file)
index 0f1e4d2..0000000
+++ /dev/null
@@ -1,716 +0,0 @@
-/*
- * Copyright (c) 2009 The DragonFly Project.  All rights reserved.
- * 
- * This code is derived from software contributed to The DragonFly Project
- * by Sepherosa Ziehau <sepherosa@gmail.com>
- * 
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in
- *    the documentation and/or other materials provided with the
- *    distribution.
- * 3. Neither the name of The DragonFly Project nor the names of its
- *    contributors may be used to endorse or promote products derived
- *    from this software without specific, prior written permission.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
- * COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
- * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
- * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
- * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- */
-
-#include <sys/param.h>
-#include <sys/bus.h>
-#include <sys/kernel.h>
-#include <sys/systm.h>
-
-#include <machine_base/isa/isa_intr.h>
-#include <machine_base/apic/lapic.h>
-#include <machine_base/apic/ioapic.h>
-#include <machine_base/apic/apicvar.h>
-
-#include "acpi_sdt.h"
-#include "acpi_sdt_var.h"
-#include "acpi_sci_var.h"
-
-extern int naps;
-
-#define MADT_VPRINTF(fmt, arg...) \
-do { \
-       if (bootverbose) \
-               kprintf("ACPI MADT: " fmt , ##arg); \
-} while (0)
-
-/* Multiple APIC Description Table */
-struct acpi_madt {
-       struct acpi_sdth        madt_hdr;
-       uint32_t                madt_lapic_addr;
-       uint32_t                madt_flags;
-       uint8_t                 madt_ents[1];
-} __packed;
-
-/* Common parts of MADT APIC structure */
-struct acpi_madt_ent {
-       uint8_t                 me_type;        /* MADT_ENT_ */
-       uint8_t                 me_len;
-} __packed;
-
-#define MADT_ENT_LAPIC         0
-#define MADT_ENT_IOAPIC                1
-#define MADT_ENT_INTSRC                2
-#define MADT_ENT_LAPIC_ADDR    5
-
-/* MADT Processor Local APIC */
-struct acpi_madt_lapic {
-       struct acpi_madt_ent    ml_hdr;
-       uint8_t                 ml_cpu_id;
-       uint8_t                 ml_apic_id;
-       uint32_t                ml_flags;       /* MADT_LAPIC_ */
-} __packed;
-
-#define MADT_LAPIC_ENABLED     0x1
-
-/* MADT I/O APIC */
-struct acpi_madt_ioapic {
-       struct acpi_madt_ent    mio_hdr;
-       uint8_t                 mio_apic_id;
-       uint8_t                 mio_reserved;
-       uint32_t                mio_addr;
-       uint32_t                mio_gsi_base;
-} __packed;
-
-/* MADT Interrupt Source Override */
-struct acpi_madt_intsrc {
-       struct acpi_madt_ent    mint_hdr;
-       uint8_t                 mint_bus;       /* MADT_INT_BUS_ */
-       uint8_t                 mint_src;
-       uint32_t                mint_gsi;
-       uint16_t                mint_flags;     /* MADT_INT_ */
-} __packed;
-
-#define MADT_INT_BUS_ISA       0
-
-#define MADT_INT_POLA_MASK     0x3
-#define MADT_INT_POLA_SHIFT    0
-#define MADT_INT_POLA_CONFORM  0
-#define MADT_INT_POLA_HIGH     1
-#define MADT_INT_POLA_RSVD     2
-#define MADT_INT_POLA_LOW      3
-#define MADT_INT_TRIG_MASK     0xc
-#define MADT_INT_TRIG_SHIFT    2
-#define MADT_INT_TRIG_CONFORM  0
-#define MADT_INT_TRIG_EDGE     1
-#define MADT_INT_TRIG_RSVD     2
-#define MADT_INT_TRIG_LEVEL    3
-
-/* MADT Local APIC Address Override */
-struct acpi_madt_lapic_addr {
-       struct acpi_madt_ent    mla_hdr;
-       uint16_t                mla_reserved;
-       uint64_t                mla_lapic_addr;
-} __packed;
-
-typedef int                    (*madt_iter_t)(void *,
-                                   const struct acpi_madt_ent *);
-
-static int                     madt_check(vm_paddr_t);
-static int                     madt_iterate_entries(struct acpi_madt *,
-                                   madt_iter_t, void *);
-
-static vm_paddr_t              madt_lapic_pass1(void);
-static int                     madt_lapic_pass2(int);
-
-static int                     madt_lapic_enumerate(struct lapic_enumerator *);
-static int                     madt_lapic_probe(struct lapic_enumerator *);
-
-static void                    madt_ioapic_enumerate(
-                                   struct ioapic_enumerator *);
-static int                     madt_ioapic_probe(struct ioapic_enumerator *);
-
-static vm_paddr_t              madt_phyaddr;
-
-static void
-madt_probe(void)
-{
-       vm_paddr_t madt_paddr;
-
-       KKASSERT(madt_phyaddr == 0);
-
-       madt_paddr = sdt_search(ACPI_MADT_SIG);
-       if (madt_paddr == 0) {
-               kprintf("madt_probe: can't locate MADT\n");
-               return;
-       }
-
-       /* Preliminary checks */
-       if (madt_check(madt_paddr)) {
-               kprintf("madt_probe: madt_check failed\n");
-               return;
-       }
-
-       madt_phyaddr = madt_paddr;
-}
-SYSINIT(madt_probe, SI_BOOT2_PRESMP, SI_ORDER_SECOND, madt_probe, 0);
-
-static int
-madt_check(vm_paddr_t madt_paddr)
-{
-       struct acpi_madt *madt;
-       int error = 0;
-
-       KKASSERT(madt_paddr != 0);
-
-       madt = sdt_sdth_map(madt_paddr);
-       KKASSERT(madt != NULL);
-
-       /*
-        * MADT in ACPI specification 1.0 - 5.0
-        */
-       if (madt->madt_hdr.sdth_rev < 1 || madt->madt_hdr.sdth_rev > 3) {
-               kprintf("madt_check: unknown MADT revision %d\n",
-                       madt->madt_hdr.sdth_rev);
-       }
-
-       if (madt->madt_hdr.sdth_len <
-           sizeof(*madt) - sizeof(madt->madt_ents)) {
-               kprintf("madt_check: invalid MADT length %u\n",
-                       madt->madt_hdr.sdth_len);
-               error = EINVAL;
-               goto back;
-       }
-back:
-       sdt_sdth_unmap(&madt->madt_hdr);
-       return error;
-}
-
-static int
-madt_iterate_entries(struct acpi_madt *madt, madt_iter_t func, void *arg)
-{
-       int size, cur, error;
-
-       size = madt->madt_hdr.sdth_len -
-              (sizeof(*madt) - sizeof(madt->madt_ents));
-       cur = 0;
-       error = 0;
-
-       while (size - cur > sizeof(struct acpi_madt_ent)) {
-               const struct acpi_madt_ent *ent;
-
-               ent = (const struct acpi_madt_ent *)&madt->madt_ents[cur];
-               if (ent->me_len < sizeof(*ent)) {
-                       kprintf("madt_iterate_entries: invalid MADT "
-                               "entry len %d\n", ent->me_len);
-                       error = EINVAL;
-                       break;
-               }
-               if (ent->me_len > (size - cur)) {
-                       kprintf("madt_iterate_entries: invalid MADT "
-                               "entry len %d, > table length\n", ent->me_len);
-                       error = EINVAL;
-                       break;
-               }
-
-               cur += ent->me_len;
-
-               /*
-                * Only Local APIC, I/O APIC and Interrupt Source Override
-                * are defined in ACPI specification 1.0 - 5.0
-                */
-               switch (ent->me_type) {
-               case MADT_ENT_LAPIC:
-                       if (ent->me_len < sizeof(struct acpi_madt_lapic)) {
-                               kprintf("madt_iterate_entries: invalid MADT "
-                                       "lapic entry len %d\n", ent->me_len);
-                               error = EINVAL;
-                       }
-                       break;
-
-               case MADT_ENT_IOAPIC:
-                       if (ent->me_len < sizeof(struct acpi_madt_ioapic)) {
-                               kprintf("madt_iterate_entries: invalid MADT "
-                                       "ioapic entry len %d\n", ent->me_len);
-                               error = EINVAL;
-                       }
-                       break;
-
-               case MADT_ENT_INTSRC:
-                       if (ent->me_len < sizeof(struct acpi_madt_intsrc)) {
-                               kprintf("madt_iterate_entries: invalid MADT "
-                                       "intsrc entry len %d\n",
-                                       ent->me_len);
-                               error = EINVAL;
-                       }
-                       break;
-               }
-               if (error)
-                       break;
-
-               error = func(arg, ent);
-               if (error)
-                       break;
-       }
-       return error;
-}
-
-static int
-madt_lapic_pass1_callback(void *xarg, const struct acpi_madt_ent *ent)
-{
-       const struct acpi_madt_lapic_addr *lapic_addr_ent;
-       uint64_t *addr64 = xarg;
-
-       if (ent->me_type != MADT_ENT_LAPIC_ADDR)
-               return 0;
-       if (ent->me_len < sizeof(*lapic_addr_ent)) {
-               kprintf("madt_lapic_pass1: "
-                       "invalid LAPIC address override length\n");
-               return 0;
-       }
-       lapic_addr_ent = (const struct acpi_madt_lapic_addr *)ent;
-
-       *addr64 = lapic_addr_ent->mla_lapic_addr;
-       return 0;
-}
-
-static vm_paddr_t
-madt_lapic_pass1(void)
-{
-       struct acpi_madt *madt;
-       vm_paddr_t lapic_addr;
-       uint64_t lapic_addr64;
-       int error;
-
-       KKASSERT(madt_phyaddr != 0);
-
-       madt = sdt_sdth_map(madt_phyaddr);
-       KKASSERT(madt != NULL);
-
-       MADT_VPRINTF("LAPIC address 0x%x, flags %#x\n",
-                    madt->madt_lapic_addr, madt->madt_flags);
-       lapic_addr = madt->madt_lapic_addr;
-
-       lapic_addr64 = 0;
-       error = madt_iterate_entries(madt, madt_lapic_pass1_callback,
-                                    &lapic_addr64);
-       if (error)
-               panic("madt_iterate_entries(pass1) failed");
-
-       if (lapic_addr64 != 0) {
-               kprintf("ACPI MADT: warning 64bits lapic address 0x%llx\n",
-                       lapic_addr64);
-               lapic_addr = lapic_addr64;
-       }
-
-       sdt_sdth_unmap(&madt->madt_hdr);
-
-       return lapic_addr;
-}
-
-struct madt_lapic_pass2_cbarg {
-       int     cpu;
-       int     bsp_found;
-       int     bsp_apic_id;
-};
-
-static int
-madt_lapic_pass2_callback(void *xarg, const struct acpi_madt_ent *ent)
-{
-       const struct acpi_madt_lapic *lapic_ent;
-       struct madt_lapic_pass2_cbarg *arg = xarg;
-
-       if (ent->me_type != MADT_ENT_LAPIC)
-               return 0;
-
-       lapic_ent = (const struct acpi_madt_lapic *)ent;
-       if (lapic_ent->ml_flags & MADT_LAPIC_ENABLED) {
-               MADT_VPRINTF("cpu id %d, apic id %d\n",
-                            lapic_ent->ml_cpu_id, lapic_ent->ml_apic_id);
-               if (lapic_ent->ml_apic_id == arg->bsp_apic_id) {
-                       lapic_set_cpuid(0, lapic_ent->ml_apic_id);
-                       arg->bsp_found = 1;
-               } else {
-                       lapic_set_cpuid(arg->cpu, lapic_ent->ml_apic_id);
-                       arg->cpu++;
-               }
-       }
-       return 0;
-}
-
-static int
-madt_lapic_pass2(int bsp_apic_id)
-{
-       struct acpi_madt *madt;
-       struct madt_lapic_pass2_cbarg arg;
-       int error;
-
-       MADT_VPRINTF("BSP apic id %d\n", bsp_apic_id);
-
-       KKASSERT(madt_phyaddr != 0);
-
-       madt = sdt_sdth_map(madt_phyaddr);
-       KKASSERT(madt != NULL);
-
-       bzero(&arg, sizeof(arg));
-       arg.cpu = 1;
-       arg.bsp_apic_id = bsp_apic_id;
-
-       error = madt_iterate_entries(madt, madt_lapic_pass2_callback, &arg);
-       if (error)
-               panic("madt_iterate_entries(pass2) failed");
-
-       KKASSERT(arg.bsp_found);
-       naps = arg.cpu - 1; /* exclude BSP */
-
-       sdt_sdth_unmap(&madt->madt_hdr);
-
-       return 0;
-}
-
-struct madt_lapic_probe_cbarg {
-       int             cpu_count;
-       vm_paddr_t      lapic_addr;
-};
-
-static int
-madt_lapic_probe_callback(void *xarg, const struct acpi_madt_ent *ent)
-{
-       struct madt_lapic_probe_cbarg *arg = xarg;
-
-       if (ent->me_type == MADT_ENT_LAPIC) {
-               const struct acpi_madt_lapic *lapic_ent;
-
-               lapic_ent = (const struct acpi_madt_lapic *)ent;
-               if (lapic_ent->ml_flags & MADT_LAPIC_ENABLED) {
-                       arg->cpu_count++;
-                       if (lapic_ent->ml_apic_id == APICID_MAX) {
-                               kprintf("madt_lapic_probe: "
-                                   "invalid LAPIC apic id %d\n",
-                                   lapic_ent->ml_apic_id);
-                               return EINVAL;
-                       }
-               }
-       } else if (ent->me_type == MADT_ENT_LAPIC_ADDR) {
-               const struct acpi_madt_lapic_addr *lapic_addr_ent;
-
-               if (ent->me_len < sizeof(*lapic_addr_ent)) {
-                       kprintf("madt_lapic_probe: "
-                               "invalid LAPIC address override length\n");
-                       return 0;
-               }
-               lapic_addr_ent = (const struct acpi_madt_lapic_addr *)ent;
-
-               if (lapic_addr_ent->mla_lapic_addr != 0)
-                       arg->lapic_addr = lapic_addr_ent->mla_lapic_addr;
-       }
-       return 0;
-}
-
-static int
-madt_lapic_probe(struct lapic_enumerator *e)
-{
-       struct madt_lapic_probe_cbarg arg;
-       struct acpi_madt *madt;
-       int error;
-
-       if (madt_phyaddr == 0)
-               return ENXIO;
-
-       madt = sdt_sdth_map(madt_phyaddr);
-       KKASSERT(madt != NULL);
-
-       bzero(&arg, sizeof(arg));
-       arg.lapic_addr = madt->madt_lapic_addr;
-
-       error = madt_iterate_entries(madt, madt_lapic_probe_callback, &arg);
-       if (!error) {
-               if (arg.cpu_count == 0) {
-                       kprintf("madt_lapic_probe: no CPU is found\n");
-                       error = EOPNOTSUPP;
-               }
-               if (arg.lapic_addr == 0) {
-                       kprintf("madt_lapic_probe: zero LAPIC address\n");
-                       error = EOPNOTSUPP;
-               }
-       }
-
-       sdt_sdth_unmap(&madt->madt_hdr);
-       return error;
-}
-
-static int
-madt_lapic_enumerate(struct lapic_enumerator *e)
-{
-       vm_paddr_t lapic_addr;
-       int bsp_apic_id;
-
-       KKASSERT(madt_phyaddr != 0);
-
-       lapic_addr = madt_lapic_pass1();
-       if (lapic_addr == 0)
-               panic("madt_lapic_enumerate: no local apic");
-
-       lapic_map(lapic_addr);
-
-       bsp_apic_id = APIC_ID(lapic->id);
-       if (bsp_apic_id == APICID_MAX) {
-               /*
-                * XXX
-                * Some old brain dead BIOS will set BSP's LAPIC apic id
-                * to 255, though all LAPIC entries in MADT are valid.
-                */
-               kprintf("%s invalid BSP LAPIC apic id %d\n", __func__,
-                   bsp_apic_id);
-               return EINVAL;
-       }
-
-       if (madt_lapic_pass2(bsp_apic_id))
-               panic("madt_lapic_enumerate: madt_lapic_pass2 failed");
-
-       return 0;
-}
-
-static struct lapic_enumerator madt_lapic_enumerator = {
-       .lapic_prio = LAPIC_ENUM_PRIO_MADT,
-       .lapic_probe = madt_lapic_probe,
-       .lapic_enumerate = madt_lapic_enumerate
-};
-
-static void
-madt_lapic_enum_register(void)
-{
-       int prio;
-
-       prio = LAPIC_ENUM_PRIO_MADT;
-       kgetenv_int("hw.madt_lapic_prio", &prio);
-       madt_lapic_enumerator.lapic_prio = prio;
-
-       lapic_enumerator_register(&madt_lapic_enumerator);
-}
-SYSINIT(madt_lapic, SI_BOOT2_PRESMP, SI_ORDER_ANY, madt_lapic_enum_register, 0);
-
-struct madt_ioapic_probe_cbarg {
-       int     ioapic_cnt;
-       int     gsi_base0;
-};
-
-static int
-madt_ioapic_probe_callback(void *xarg, const struct acpi_madt_ent *ent)
-{
-       struct madt_ioapic_probe_cbarg *arg = xarg;
-
-       if (ent->me_type == MADT_ENT_INTSRC) {
-               const struct acpi_madt_intsrc *intsrc_ent;
-               int trig, pola;
-
-               intsrc_ent = (const struct acpi_madt_intsrc *)ent;
-
-               if (intsrc_ent->mint_src >= ISA_IRQ_CNT) {
-                       kprintf("madt_ioapic_probe: invalid intsrc irq (%d)\n",
-                               intsrc_ent->mint_src);
-                       return EINVAL;
-               }
-
-               if (intsrc_ent->mint_bus != MADT_INT_BUS_ISA) {
-                       kprintf("ACPI MADT: warning intsrc irq %d "
-                               "bus is not ISA (%d)\n",
-                               intsrc_ent->mint_src, intsrc_ent->mint_bus);
-               }
-
-               trig = (intsrc_ent->mint_flags & MADT_INT_TRIG_MASK) >>
-                      MADT_INT_TRIG_SHIFT;
-               if (trig == MADT_INT_TRIG_RSVD) {
-                       kprintf("ACPI MADT: warning invalid intsrc irq %d "
-                               "trig, reserved\n", intsrc_ent->mint_src);
-               } else if (trig == MADT_INT_TRIG_LEVEL) {
-                       MADT_VPRINTF("warning invalid intsrc irq %d "
-                           "trig, level\n", intsrc_ent->mint_src);
-               }
-
-               pola = (intsrc_ent->mint_flags & MADT_INT_POLA_MASK) >>
-                      MADT_INT_POLA_SHIFT;
-               if (pola == MADT_INT_POLA_RSVD) {
-                       kprintf("ACPI MADT: warning invalid intsrc irq %d "
-                               "pola, reserved\n", intsrc_ent->mint_src);
-               } else if (pola == MADT_INT_POLA_LOW) {
-                       MADT_VPRINTF("warning invalid intsrc irq %d "
-                           "pola, low\n", intsrc_ent->mint_src);
-               }
-       } else if (ent->me_type == MADT_ENT_IOAPIC) {
-               const struct acpi_madt_ioapic *ioapic_ent;
-
-               ioapic_ent = (const struct acpi_madt_ioapic *)ent;
-               if (ioapic_ent->mio_addr == 0) {
-                       kprintf("madt_ioapic_probe: zero IOAPIC address\n");
-                       return EINVAL;
-               }
-               if (ioapic_ent->mio_apic_id == APICID_MAX) {
-                       kprintf("madt_ioapic_probe: "
-                           "invalid IOAPIC apic id %d\n",
-                           ioapic_ent->mio_apic_id);
-                       return EINVAL;
-               }
-
-               arg->ioapic_cnt++;
-               if (ioapic_ent->mio_gsi_base == 0)
-                       arg->gsi_base0 = 1;
-       }
-       return 0;
-}
-
-static int
-madt_ioapic_probe(struct ioapic_enumerator *e)
-{
-       struct madt_ioapic_probe_cbarg arg;
-       struct acpi_madt *madt;
-       int error;
-
-       if (madt_phyaddr == 0)
-               return ENXIO;
-
-       madt = sdt_sdth_map(madt_phyaddr);
-       KKASSERT(madt != NULL);
-
-       bzero(&arg, sizeof(arg));
-
-       error = madt_iterate_entries(madt, madt_ioapic_probe_callback, &arg);
-       if (!error) {
-               if (arg.ioapic_cnt == 0) {
-                       kprintf("madt_ioapic_probe: no IOAPIC\n");
-                       error = ENXIO;
-               }
-               if (!arg.gsi_base0) {
-                       kprintf("madt_ioapic_probe: no GSI base 0\n");
-                       error = EINVAL;
-               }
-       }
-
-       sdt_sdth_unmap(&madt->madt_hdr);
-       return error;
-}
-
-static int
-madt_ioapic_enum_callback(void *xarg, const struct acpi_madt_ent *ent)
-{
-       if (ent->me_type == MADT_ENT_INTSRC) {
-               const struct acpi_madt_intsrc *intsrc_ent;
-               enum intr_trigger trig;
-               enum intr_polarity pola;
-               int ent_trig, ent_pola;
-
-               intsrc_ent = (const struct acpi_madt_intsrc *)ent;
-
-               KKASSERT(intsrc_ent->mint_src < ISA_IRQ_CNT);
-               if (intsrc_ent->mint_bus != MADT_INT_BUS_ISA)
-                       return 0;
-
-               ent_trig = (intsrc_ent->mint_flags & MADT_INT_TRIG_MASK) >>
-                   MADT_INT_TRIG_SHIFT;
-               if (ent_trig == MADT_INT_TRIG_RSVD)
-                       return 0;
-               else if (ent_trig == MADT_INT_TRIG_LEVEL)
-                       trig = INTR_TRIGGER_LEVEL;
-               else
-                       trig = INTR_TRIGGER_EDGE;
-
-               ent_pola = (intsrc_ent->mint_flags & MADT_INT_POLA_MASK) >>
-                   MADT_INT_POLA_SHIFT;
-               if (ent_pola == MADT_INT_POLA_RSVD)
-                       return 0;
-               else if (ent_pola == MADT_INT_POLA_LOW)
-                       pola = INTR_POLARITY_LOW;
-               else
-                       pola = INTR_POLARITY_HIGH;
-
-               if (intsrc_ent->mint_src == acpi_sci_irqno()) {
-                       acpi_sci_setmode1(trig, pola);
-                       MADT_VPRINTF("SCI irq %d, first test %s/%s\n",
-                           intsrc_ent->mint_src,
-                           intr_str_trigger(trig), intr_str_polarity(pola));
-               }
-
-               /*
-                * We ignore the polarity and trigger changes, since
-                * most of them are wrong or useless at best.
-                */
-               if (intsrc_ent->mint_src == intsrc_ent->mint_gsi) {
-                       /* Nothing changed */
-                       return 0;
-               }
-               trig = INTR_TRIGGER_EDGE;
-               pola = INTR_POLARITY_HIGH;
-
-               MADT_VPRINTF("INTSRC irq %d -> gsi %u %s/%s\n",
-                            intsrc_ent->mint_src, intsrc_ent->mint_gsi,
-                            intr_str_trigger(trig), intr_str_polarity(pola));
-               ioapic_intsrc(intsrc_ent->mint_src, intsrc_ent->mint_gsi,
-                             trig, pola);
-       } else if (ent->me_type == MADT_ENT_IOAPIC) {
-               const struct acpi_madt_ioapic *ioapic_ent;
-               uint32_t ver;
-               void *addr;
-               int npin;
-
-               ioapic_ent = (const struct acpi_madt_ioapic *)ent;
-               MADT_VPRINTF("IOAPIC addr 0x%08x, apic id %d, gsi base %u\n",
-                            ioapic_ent->mio_addr, ioapic_ent->mio_apic_id,
-                            ioapic_ent->mio_gsi_base);
-
-               addr = ioapic_map(ioapic_ent->mio_addr);
-
-               ver = ioapic_read(addr, IOAPIC_VER);
-               npin = ((ver & IOART_VER_MAXREDIR) >> MAXREDIRSHIFT) + 1;
-
-               ioapic_add(addr, ioapic_ent->mio_gsi_base, npin);
-       }
-       return 0;
-}
-
-static void
-madt_ioapic_enumerate(struct ioapic_enumerator *e)
-{
-       struct acpi_madt *madt;
-       int error;
-
-       KKASSERT(madt_phyaddr != 0);
-
-       madt = sdt_sdth_map(madt_phyaddr);
-       KKASSERT(madt != NULL);
-
-       error = madt_iterate_entries(madt, madt_ioapic_enum_callback, NULL);
-       if (error)
-               panic("madt_ioapic_enumerate failed");
-
-       sdt_sdth_unmap(&madt->madt_hdr);
-}
-
-static struct ioapic_enumerator        madt_ioapic_enumerator = {
-       .ioapic_prio = IOAPIC_ENUM_PRIO_MADT,
-       .ioapic_probe = madt_ioapic_probe,
-       .ioapic_enumerate = madt_ioapic_enumerate
-};
-
-static void
-madt_ioapic_enum_register(void)
-{
-       int prio;
-
-       prio = IOAPIC_ENUM_PRIO_MADT;
-       kgetenv_int("hw.madt_ioapic_prio", &prio);
-       madt_ioapic_enumerator.ioapic_prio = prio;
-
-       ioapic_enumerator_register(&madt_ioapic_enumerator);
-}
-SYSINIT(madt_ioapic, SI_BOOT2_PRESMP, SI_ORDER_ANY,
-       madt_ioapic_enum_register, 0);
diff --git a/sys/platform/pc32/acpica/acpi_pstate_machdep.c b/sys/platform/pc32/acpica/acpi_pstate_machdep.c
deleted file mode 100644 (file)
index e122af4..0000000
+++ /dev/null
@@ -1,646 +0,0 @@
-/*
- * Copyright (c) 2009 The DragonFly Project.  All rights reserved.
- *
- * This code is derived from software contributed to The DragonFly Project
- * by Sepherosa Ziehau <sepherosa@gmail.com>
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- *
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in
- *    the documentation and/or other materials provided with the
- *    distribution.
- * 3. Neither the name of The DragonFly Project nor the names of its
- *    contributors may be used to endorse or promote products derived
- *    from this software without specific, prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
- * COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
- * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
- * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
- * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- */
-
-#include <sys/param.h>
-#include <sys/kernel.h>
-#include <sys/systm.h>
-#include <sys/globaldata.h>
-
-#include <machine/md_var.h>
-#include <machine/cpufunc.h>
-#include <machine/cpufreq.h>
-#include <machine/cputypes.h>
-#include <machine/specialreg.h>
-
-#include "acpi.h"
-#include "acpi_cpu_pstate.h"
-
-#define AMD_APMI_HWPSTATE              0x80
-
-#define AMD_MSR_PSTATE_CSR_MASK                0x7ULL
-#define AMD1X_MSR_PSTATE_CTL           0xc0010062
-#define AMD1X_MSR_PSTATE_ST            0xc0010063
-
-#define AMD_MSR_PSTATE_EN              0x8000000000000000ULL
-
-#define AMD10_MSR_PSTATE_START         0xc0010064
-#define AMD10_MSR_PSTATE_COUNT         5
-
-#define AMD0F_PST_CTL_FID(cval)                (((cval) >> 0)  & 0x3f)
-#define AMD0F_PST_CTL_VID(cval)                (((cval) >> 6)  & 0x1f)
-#define AMD0F_PST_CTL_VST(cval)                (((cval) >> 11) & 0x7f)
-#define AMD0F_PST_CTL_MVS(cval)                (((cval) >> 18) & 0x3)
-#define AMD0F_PST_CTL_PLLTIME(cval)    (((cval) >> 20) & 0x7f)
-#define AMD0F_PST_CTL_RVO(cval)                (((cval) >> 28) & 0x3)
-#define AMD0F_PST_CTL_IRT(cval)                (((cval) >> 30) & 0x3)
-
-#define AMD0F_PST_ST_FID(sval)         (((sval) >> 0) & 0x3f)
-#define AMD0F_PST_ST_VID(sval)         (((sval) >> 6) & 0x3f)
-
-#define INTEL_MSR_MISC_ENABLE          0x1a0
-#define INTEL_MSR_MISC_EST_EN          0x10000ULL
-
-#define INTEL_MSR_PERF_STATUS          0x198
-#define INTEL_MSR_PERF_CTL             0x199
-#define INTEL_MSR_PERF_MASK            0xffffULL
-
-static const struct acpi_pst_md *
-               acpi_pst_amd_probe(void);
-static int     acpi_pst_amd_check_csr(const struct acpi_pst_res *,
-                   const struct acpi_pst_res *);
-static int     acpi_pst_amd1x_check_pstates(const struct acpi_pstate *, int,
-                   uint32_t, uint32_t);
-static int     acpi_pst_amd10_check_pstates(const struct acpi_pstate *, int);
-static int     acpi_pst_amd0f_check_pstates(const struct acpi_pstate *, int);
-static int     acpi_pst_amd_init(const struct acpi_pst_res *,
-                   const struct acpi_pst_res *);
-static int     acpi_pst_amd1x_set_pstate(const struct acpi_pst_res *,
-                   const struct acpi_pst_res *, const struct acpi_pstate *);
-static int     acpi_pst_amd0f_set_pstate(const struct acpi_pst_res *,
-                   const struct acpi_pst_res *, const struct acpi_pstate *);
-static const struct acpi_pstate *
-               acpi_pst_amd1x_get_pstate(const struct acpi_pst_res *,
-                   const struct acpi_pstate *, int);
-static const struct acpi_pstate *
-               acpi_pst_amd0f_get_pstate(const struct acpi_pst_res *,
-                   const struct acpi_pstate *, int);
-
-static const struct acpi_pst_md *
-               acpi_pst_intel_probe(void);
-static int     acpi_pst_intel_check_csr(const struct acpi_pst_res *,
-                   const struct acpi_pst_res *);
-static int     acpi_pst_intel_check_pstates(const struct acpi_pstate *, int);
-static int     acpi_pst_intel_init(const struct acpi_pst_res *,
-                   const struct acpi_pst_res *);
-static int     acpi_pst_intel_set_pstate(const struct acpi_pst_res *,
-                   const struct acpi_pst_res *, const struct acpi_pstate *);
-static const struct acpi_pstate *
-               acpi_pst_intel_get_pstate(const struct acpi_pst_res *,
-                   const struct acpi_pstate *, int);
-
-static int     acpi_pst_md_gas_asz(const ACPI_GENERIC_ADDRESS *);
-static int     acpi_pst_md_gas_verify(const ACPI_GENERIC_ADDRESS *);
-static uint32_t        acpi_pst_md_res_read(const struct acpi_pst_res *);
-static void    acpi_pst_md_res_write(const struct acpi_pst_res *, uint32_t);
-
-static const struct acpi_pst_md        acpi_pst_amd10 = {
-       .pmd_check_csr          = acpi_pst_amd_check_csr,
-       .pmd_check_pstates      = acpi_pst_amd10_check_pstates,
-       .pmd_init               = acpi_pst_amd_init,
-       .pmd_set_pstate         = acpi_pst_amd1x_set_pstate,
-       .pmd_get_pstate         = acpi_pst_amd1x_get_pstate
-};
-
-static const struct acpi_pst_md        acpi_pst_amd0f = {
-       .pmd_check_csr          = acpi_pst_amd_check_csr,
-       .pmd_check_pstates      = acpi_pst_amd0f_check_pstates,
-       .pmd_init               = acpi_pst_amd_init,
-       .pmd_set_pstate         = acpi_pst_amd0f_set_pstate,
-       .pmd_get_pstate         = acpi_pst_amd0f_get_pstate
-};
-
-static const struct acpi_pst_md acpi_pst_intel = {
-       .pmd_check_csr          = acpi_pst_intel_check_csr,
-       .pmd_check_pstates      = acpi_pst_intel_check_pstates,
-       .pmd_init               = acpi_pst_intel_init,
-       .pmd_set_pstate         = acpi_pst_intel_set_pstate,
-       .pmd_get_pstate         = acpi_pst_intel_get_pstate
-};
-
-static int acpi_pst_stringent_check = 1;
-TUNABLE_INT("hw.acpi.cpu.pstate.strigent_check", &acpi_pst_stringent_check);
-
-const struct acpi_pst_md *
-acpi_pst_md_probe(void)
-{
-       if (cpu_vendor_id == CPU_VENDOR_AMD)
-               return acpi_pst_amd_probe();
-       else if (cpu_vendor_id == CPU_VENDOR_INTEL)
-               return acpi_pst_intel_probe();
-       return NULL;
-}
-
-static const struct acpi_pst_md *
-acpi_pst_amd_probe(void)
-{
-       uint32_t regs[4];
-
-       /* Only Family >= 0fh has P-State support */
-       if (CPUID_TO_FAMILY(cpu_id) < 0xf)
-               return NULL;
-
-       /* Check whether APMI exists */
-       if (cpu_exthigh < 0x80000007)
-               return NULL;
-
-       /* Fetch APMI */
-       do_cpuid(0x80000007, regs);
-
-       if (CPUID_TO_FAMILY(cpu_id) == 0xf) {           /* Family 0fh */
-               if ((regs[3] & 0x06) == 0x06)
-                       return &acpi_pst_amd0f;
-       } else if (CPUID_TO_FAMILY(cpu_id) >= 0x10) {   /* Family >= 10h */
-               if (regs[3] & 0x80)
-                       return &acpi_pst_amd10;
-       }
-       return NULL;
-}
-
-static int
-acpi_pst_amd_check_csr(const struct acpi_pst_res *ctrl,
-                      const struct acpi_pst_res *status)
-{
-       if (ctrl->pr_gas.SpaceId != ACPI_ADR_SPACE_FIXED_HARDWARE) {
-               kprintf("cpu%d: Invalid P-State control register\n", mycpuid);
-               return EINVAL;
-       }
-       if (status->pr_gas.SpaceId != ACPI_ADR_SPACE_FIXED_HARDWARE) {
-               kprintf("cpu%d: Invalid P-State status register\n", mycpuid);
-               return EINVAL;
-       }
-       return 0;
-}
-
-static int
-acpi_pst_amd1x_check_pstates(const struct acpi_pstate *pstates, int npstates,
-                            uint32_t msr_start, uint32_t msr_end)
-{
-       int i;
-
-       /*
-        * Make sure that related MSR P-State registers are enabled.
-        *
-        * NOTE:
-        * We don't check status register value here;
-        * it will not be used.
-        */
-       for (i = 0; i < npstates; ++i) {
-               uint64_t pstate;
-               uint32_t msr;
-
-               msr = msr_start +
-                     (pstates[i].st_cval & AMD_MSR_PSTATE_CSR_MASK);
-               if (msr >= msr_end) {
-                       kprintf("cpu%d: MSR P-State register %#08x "
-                               "does not exist\n", mycpuid, msr);
-                       return EINVAL;
-               }
-
-               pstate = rdmsr(msr);
-               if ((pstate & AMD_MSR_PSTATE_EN) == 0) {
-                       kprintf("cpu%d: MSR P-State register %#08x "
-                               "is not enabled\n", mycpuid, msr);
-                       return EINVAL;
-               }
-       }
-       return 0;
-}
-
-static int
-acpi_pst_amd10_check_pstates(const struct acpi_pstate *pstates, int npstates)
-{
-       /* Only P0-P4 are supported */
-       if (npstates > AMD10_MSR_PSTATE_COUNT) {
-               kprintf("cpu%d: only P0-P4 is allowed\n", mycpuid);
-               return EINVAL;
-       }
-
-       return acpi_pst_amd1x_check_pstates(pstates, npstates,
-                       AMD10_MSR_PSTATE_START,
-                       AMD10_MSR_PSTATE_START + AMD10_MSR_PSTATE_COUNT);
-}
-
-static int
-acpi_pst_amd1x_set_pstate(const struct acpi_pst_res *ctrl __unused,
-                         const struct acpi_pst_res *status __unused,
-                         const struct acpi_pstate *pstate)
-{
-       uint64_t cval;
-
-       cval = pstate->st_cval & AMD_MSR_PSTATE_CSR_MASK;
-       wrmsr(AMD1X_MSR_PSTATE_CTL, cval);
-
-       /*
-        * Don't check AMD1X_MSR_PSTATE_ST here, since it is
-        * affected by various P-State limits.
-        *
-        * For details:
-        * AMD Family 10h Processor BKDG Rev 3.20 (#31116)
-        * 2.4.2.4 P-state Transition Behavior
-        */
-
-       return 0;
-}
-
-static const struct acpi_pstate *
-acpi_pst_amd1x_get_pstate(const struct acpi_pst_res *status __unused,
-                         const struct acpi_pstate *pstates, int npstates)
-{
-       uint64_t sval;
-       int i;
-
-       sval = rdmsr(AMD1X_MSR_PSTATE_ST) & AMD_MSR_PSTATE_CSR_MASK;
-       for (i = 0; i < npstates; ++i) {
-               if ((pstates[i].st_sval & AMD_MSR_PSTATE_CSR_MASK) == sval)
-                       return &pstates[i];
-       }
-       return NULL;
-}
-
-static int
-acpi_pst_amd0f_check_pstates(const struct acpi_pstate *pstates, int npstates)
-{
-       struct amd0f_fidvid fv_max, fv_min;
-       int i;
-
-       amd0f_fidvid_limit(&fv_min, &fv_max);
-
-       if (fv_min.fid == fv_max.fid && fv_min.vid == fv_max.vid) {
-               kprintf("cpu%d: only one P-State is supported\n", mycpuid);
-               if (acpi_pst_stringent_check)
-                       return EOPNOTSUPP;
-       }
-
-       for (i = 0; i < npstates; ++i) {
-               const struct acpi_pstate *p = &pstates[i];
-               uint32_t fid, vid, mvs, rvo;
-               int mvs_mv, rvo_mv;
-
-               fid = AMD0F_PST_CTL_FID(p->st_cval);
-               vid = AMD0F_PST_CTL_VID(p->st_cval);
-
-               if (i == 0) {
-                       if (vid != fv_max.vid) {
-                               kprintf("cpu%d: max VID mismatch "
-                                       "real %u, lim %d\n", mycpuid,
-                                       vid, fv_max.vid);
-                       }
-                       if (fid != fv_max.fid) {
-                               kprintf("cpu%d: max FID mismatch "
-                                       "real %u, lim %d\n", mycpuid,
-                                       fid, fv_max.fid);
-                       }
-               } else if (i == npstates - 1) {
-                       if (vid != fv_min.vid) {
-                               kprintf("cpu%d: min VID mismatch "
-                                       "real %u, lim %d\n", mycpuid,
-                                       vid, fv_min.vid);
-                       }
-                       if (fid != fv_min.fid) {
-                               kprintf("cpu%d: min FID mismatch "
-                                       "real %u, lim %d\n", mycpuid,
-                                       fid, fv_min.fid);
-                       }
-               } else {
-                       if (fid >= fv_max.fid || fid < (fv_min.fid + 0x8)) {
-                               kprintf("cpu%d: Invalid FID %#x, "
-                                       "out [%#x, %#x]\n", mycpuid, fid,
-                                       fv_min.fid + 0x8, fv_max.fid);
-                               if (acpi_pst_stringent_check)
-                                       return EINVAL;
-                       }
-                       if (vid < fv_max.vid || vid > fv_min.vid) {
-                               kprintf("cpu%d: Invalid VID %#x, "
-                                       "in [%#x, %#x]\n", mycpuid, vid,
-                                       fv_max.vid, fv_min.vid);
-                               if (acpi_pst_stringent_check)
-                                       return EINVAL;
-                       }
-               }
-
-               mvs = AMD0F_PST_CTL_MVS(p->st_cval);
-               rvo = AMD0F_PST_CTL_RVO(p->st_cval);
-
-               /* Only 0 is allowed, i.e. 25mV stepping */
-               if (mvs != 0) {
-                       kprintf("cpu%d: Invalid MVS %#x\n", mycpuid, mvs);
-                       return EINVAL;
-               }
-
-               /* -> mV */
-               mvs_mv = 25 * (1 << mvs);
-               rvo_mv = 25 * rvo;
-               if (rvo_mv % mvs_mv != 0) {
-                       kprintf("cpu%d: Invalid MVS/RVO (%#x/%#x)\n",
-                               mycpuid, mvs, rvo);
-                       return EINVAL;
-               }
-       }
-       return 0;
-}
-
-static int
-acpi_pst_amd0f_set_pstate(const struct acpi_pst_res *ctrl __unused,
-                         const struct acpi_pst_res *status __unused,
-                         const struct acpi_pstate *pstate)
-{
-       struct amd0f_fidvid fv;
-       struct amd0f_xsit xsit;
-
-       fv.fid = AMD0F_PST_CTL_FID(pstate->st_cval);
-       fv.vid = AMD0F_PST_CTL_VID(pstate->st_cval);
-
-       xsit.rvo = AMD0F_PST_CTL_RVO(pstate->st_cval);
-       xsit.mvs = AMD0F_PST_CTL_MVS(pstate->st_cval);
-       xsit.vst = AMD0F_PST_CTL_VST(pstate->st_cval);
-       xsit.pll_time = AMD0F_PST_CTL_PLLTIME(pstate->st_cval);
-       xsit.irt = AMD0F_PST_CTL_IRT(pstate->st_cval);
-
-       return amd0f_set_fidvid(&fv, &xsit);
-}
-
-static const struct acpi_pstate *
-acpi_pst_amd0f_get_pstate(const struct acpi_pst_res *status __unused,
-                         const struct acpi_pstate *pstates, int npstates)
-{
-       struct amd0f_fidvid fv;
-       int error, i;
-
-       error = amd0f_get_fidvid(&fv);
-       if (error)
-               return NULL;
-
-       for (i = 0; i < npstates; ++i) {
-               const struct acpi_pstate *p = &pstates[i];
-
-               if (fv.fid == AMD0F_PST_ST_FID(p->st_sval) &&
-                   fv.vid == AMD0F_PST_ST_VID(p->st_sval))
-                       return p;
-       }
-       return NULL;
-}
-
-static int
-acpi_pst_amd_init(const struct acpi_pst_res *ctrl __unused,
-                 const struct acpi_pst_res *status __unused)
-{
-       return 0;
-}
-
-static const struct acpi_pst_md *
-acpi_pst_intel_probe(void)
-{
-       if ((cpu_feature2 & CPUID2_EST) == 0)
-               return NULL;
-
-       if (CPUID_TO_FAMILY(cpu_id) >= 0xf || CPUID_TO_FAMILY(cpu_id) == 0x6)
-               return &acpi_pst_intel;
-
-       return NULL;
-}
-
-static int
-acpi_pst_intel_check_csr(const struct acpi_pst_res *ctrl,
-                        const struct acpi_pst_res *status)
-{
-       int error;
-
-       if (ctrl->pr_gas.SpaceId != status->pr_gas.SpaceId) {
-               kprintf("cpu%d: P-State control(%d)/status(%d) registers have "
-                       "different SpaceId", mycpuid,
-                       ctrl->pr_gas.SpaceId, status->pr_gas.SpaceId);
-               return EINVAL;
-       }
-
-       switch (ctrl->pr_gas.SpaceId) {
-       case ACPI_ADR_SPACE_FIXED_HARDWARE:
-               if (ctrl->pr_res != NULL || status->pr_res != NULL) {
-                       /* XXX should panic() */
-                       kprintf("cpu%d: Allocated resource for fixed hardware "
-                               "registers\n", mycpuid);
-                       return EINVAL;
-               }
-               break;
-
-       case ACPI_ADR_SPACE_SYSTEM_IO:
-               if (ctrl->pr_res == NULL) {
-                       kprintf("cpu%d: ioport allocation failed for control "
-                               "register\n", mycpuid);
-                       return ENXIO;
-               }
-               error = acpi_pst_md_gas_verify(&ctrl->pr_gas);
-               if (error) {
-                       kprintf("cpu%d: Invalid control register GAS\n",
-                               mycpuid);
-                       return error;
-               }
-
-               if (status->pr_res == NULL) {
-                       kprintf("cpu%d: ioport allocation failed for status "
-                               "register\n", mycpuid);
-                       return ENXIO;
-               }
-               error = acpi_pst_md_gas_verify(&status->pr_gas);
-               if (error) {
-                       kprintf("cpu%d: Invalid status register GAS\n",
-                               mycpuid);
-                       return error;
-               }
-               break;
-
-       default:
-               kprintf("cpu%d: Invalid P-State control/status register "
-                       "SpaceId %d\n", mycpuid, ctrl->pr_gas.SpaceId);
-               return EOPNOTSUPP;
-       }
-       return 0;
-}
-
-static int
-acpi_pst_intel_check_pstates(const struct acpi_pstate *pstates __unused,
-                            int npstates __unused)
-{
-       return 0;
-}
-
-static int
-acpi_pst_intel_init(const struct acpi_pst_res *ctrl __unused,
-                   const struct acpi_pst_res *status __unused)
-{
-       uint64_t misc_enable;
-
-       if (CPUID_TO_FAMILY(cpu_id) == 0xf ||
-           (CPUID_TO_FAMILY(cpu_id) == 0x6 && CPUID_TO_MODEL(cpu_id) < 0xd)) {
-               /* EST enable bit is reserved in INTEL_MSR_MISC_ENABLE */
-               return 0;
-       }
-
-       misc_enable = rdmsr(INTEL_MSR_MISC_ENABLE);
-       if ((misc_enable & INTEL_MSR_MISC_EST_EN) == 0) {
-               misc_enable |= INTEL_MSR_MISC_EST_EN;
-               wrmsr(INTEL_MSR_MISC_ENABLE, misc_enable);
-
-               misc_enable = rdmsr(INTEL_MSR_MISC_ENABLE);
-               if ((misc_enable & INTEL_MSR_MISC_EST_EN) == 0) {
-                       kprintf("cpu%d: Can't enable EST\n", mycpuid);
-                       return EIO;
-               }
-       }
-       return 0;
-}
-
-static int
-acpi_pst_intel_set_pstate(const struct acpi_pst_res *ctrl,
-                         const struct acpi_pst_res *status __unused,
-                         const struct acpi_pstate *pstate)
-{
-       if (ctrl->pr_res != NULL) {
-               acpi_pst_md_res_write(ctrl, pstate->st_cval);
-       } else {
-               uint64_t ctl;
-
-               ctl = rdmsr(INTEL_MSR_PERF_CTL);
-               ctl &= ~INTEL_MSR_PERF_MASK;
-               ctl |= (pstate->st_cval & INTEL_MSR_PERF_MASK);
-               wrmsr(INTEL_MSR_PERF_CTL, ctl);
-       }
-       return 0;
-}
-
-static const struct acpi_pstate *
-acpi_pst_intel_get_pstate(const struct acpi_pst_res *status,
-                         const struct acpi_pstate *pstates, int npstates)
-{
-       int i;
-
-       if (status->pr_res != NULL) {
-               uint32_t st;
-
-               st = acpi_pst_md_res_read(status);
-               for (i = 0; i < npstates; ++i) {
-                       if (pstates[i].st_sval == st)
-                               return &pstates[i];
-               }
-       } else {
-               uint64_t sval;
-
-               sval = rdmsr(INTEL_MSR_PERF_STATUS) & INTEL_MSR_PERF_MASK;
-               for (i = 0; i < npstates; ++i) {
-                       if ((pstates[i].st_sval & INTEL_MSR_PERF_MASK) == sval)
-                               return &pstates[i];
-               }
-       }
-       return NULL;
-}
-
-static int
-acpi_pst_md_gas_asz(const ACPI_GENERIC_ADDRESS *gas)
-{
-       int asz;
-
-       if (gas->AccessWidth != 0)
-               asz = gas->AccessWidth;
-       else
-               asz = gas->BitWidth / NBBY;
-       switch (asz) {
-       case 1:
-       case 2:
-       case 4:
-               break;
-       default:
-               asz = 0;
-               break;
-       }
-       return asz;
-}
-
-static int
-acpi_pst_md_gas_verify(const ACPI_GENERIC_ADDRESS *gas)
-{
-       int reg, end, asz;
-
-       if (gas->BitOffset % NBBY != 0)
-               return EINVAL;
-
-       end = gas->BitWidth / NBBY;
-       reg = gas->BitOffset / NBBY;
-
-       if (reg >= end)
-               return EINVAL;
-
-       asz = acpi_pst_md_gas_asz(gas);
-       if (asz == 0)
-               return EINVAL;
-
-       if (reg + asz > end)
-               return EINVAL;
-       return 0;
-}
-
-static uint32_t
-acpi_pst_md_res_read(const struct acpi_pst_res *res)
-{
-       int asz, reg;
-
-       KKASSERT(res->pr_res != NULL);
-       asz = acpi_pst_md_gas_asz(&res->pr_gas);
-       reg = res->pr_gas.BitOffset / NBBY;
-
-       switch (asz) {
-       case 1:
-               return bus_space_read_1(res->pr_bt, res->pr_bh, reg);
-       case 2:
-               return bus_space_read_2(res->pr_bt, res->pr_bh, reg);
-       case 4:
-               return bus_space_read_4(res->pr_bt, res->pr_bh, reg);
-       }
-       panic("unsupported access width %d", asz);
-
-       /* NEVER REACHED */
-       return 0;
-}
-
-static void
-acpi_pst_md_res_write(const struct acpi_pst_res *res, uint32_t val)
-{
-       int asz, reg;
-
-       KKASSERT(res->pr_res != NULL);
-       asz = acpi_pst_md_gas_asz(&res->pr_gas);
-       reg = res->pr_gas.BitOffset / NBBY;
-
-       switch (asz) {
-       case 1:
-               bus_space_write_1(res->pr_bt, res->pr_bh, reg, val);
-               break;
-       case 2:
-               bus_space_write_2(res->pr_bt, res->pr_bh, reg, val);
-               break;
-       case 4:
-               bus_space_write_4(res->pr_bt, res->pr_bh, reg, val);
-               break;
-       default:
-               panic("unsupported access width %d", asz);
-       }
-}
diff --git a/sys/platform/pc32/acpica/acpi_sdt.c b/sys/platform/pc32/acpica/acpi_sdt.c
deleted file mode 100644 (file)
index e8d2252..0000000
+++ /dev/null
@@ -1,310 +0,0 @@
-/*
- * Copyright (c) 2009 The DragonFly Project.  All rights reserved.
- * 
- * This code is derived from software contributed to The DragonFly Project
- * by Sepherosa Ziehau <sepherosa@gmail.com>
- * 
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in
- *    the documentation and/or other materials provided with the
- *    distribution.
- * 3. Neither the name of The DragonFly Project nor the names of its
- *    contributors may be used to endorse or promote products derived
- *    from this software without specific, prior written permission.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
- * COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
- * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
- * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
- * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- */
-
-#include <sys/param.h>
-#include <sys/kernel.h>
-#include <sys/systm.h>
-
-#include <machine/pmap.h>
-
-#include "acpi_sdt.h"
-#include "acpi_sdt_var.h"
-
-#define SDT_VPRINTF(fmt, arg...) \
-do { \
-       if (bootverbose) \
-               kprintf("ACPI SDT: " fmt , ##arg); \
-} while (0)
-
-#define ACPI_RSDP_EBDA_MAPSZ   1024
-#define ACPI_RSDP_BIOS_MAPSZ   0x20000
-#define ACPI_RSDP_BIOS_MAPADDR 0xe0000
-
-#define ACPI_RSDP_ALIGN                16
-
-#define ACPI_RSDP_SIGLEN       8
-#define ACPI_RSDP_SIG          "RSD PTR "
-
-/* Root System Description Pointer */
-struct acpi_rsdp {
-       uint8_t                 rsdp_sig[ACPI_RSDP_SIGLEN];
-       uint8_t                 rsdp_cksum;
-       uint8_t                 rsdp_oem_id[6];
-       uint8_t                 rsdp_rev;
-       uint32_t                rsdp_rsdt;
-       uint32_t                rsdp_len;
-       uint64_t                rsdp_xsdt;
-       uint8_t                 rsdp_ext_cksum;
-       uint8_t                 rsdp_rsvd[3];
-} __packed;
-
-/* Extended System Description Table */
-struct acpi_xsdt {
-       struct acpi_sdth        xsdt_hdr;
-       uint64_t                xsdt_ents[1];
-} __packed;
-
-/* Root System Description Table */
-struct acpi_rsdt {
-       struct acpi_sdth        rsdt_hdr;
-       uint32_t                rsdt_ents[1];
-} __packed;
-
-typedef        vm_paddr_t              (*sdt_search_t)(vm_paddr_t, const uint8_t *);
-
-static const struct acpi_rsdp  *sdt_rsdp_search(const uint8_t *, int);
-static vm_paddr_t              sdt_search_xsdt(vm_paddr_t, const uint8_t *);
-static vm_paddr_t              sdt_search_rsdt(vm_paddr_t, const uint8_t *);
-
-extern u_long                  ebda_addr;
-
-static sdt_search_t            sdt_search_func;
-static vm_paddr_t              sdt_search_paddr;
-
-static void
-sdt_probe(void)
-{
-       const struct acpi_rsdp *rsdp;
-       vm_size_t mapsz;
-       uint8_t *ptr;
-
-       if (ebda_addr != 0) {
-               mapsz = ACPI_RSDP_EBDA_MAPSZ;
-               ptr = pmap_mapdev(ebda_addr, mapsz);
-
-               rsdp = sdt_rsdp_search(ptr, mapsz);
-               if (rsdp == NULL) {
-                       SDT_VPRINTF("RSDP not in EBDA\n");
-                       pmap_unmapdev((vm_offset_t)ptr, mapsz);
-
-                       ptr = NULL;
-                       mapsz = 0;
-               } else {
-                       SDT_VPRINTF("RSDP in EBDA\n");
-                       goto found_rsdp;
-               }
-       }
-
-       mapsz = ACPI_RSDP_BIOS_MAPSZ;
-       ptr = pmap_mapdev(ACPI_RSDP_BIOS_MAPADDR, mapsz);
-
-       rsdp = sdt_rsdp_search(ptr, mapsz);
-       if (rsdp == NULL) {
-               kprintf("sdt_probe: no RSDP\n");
-               pmap_unmapdev((vm_offset_t)ptr, mapsz);
-               return;
-       } else {
-               SDT_VPRINTF("RSDP in BIOS mem\n");
-       }
-
-found_rsdp:
-       if (rsdp->rsdp_rev != 2) {
-               sdt_search_func = sdt_search_rsdt;
-               sdt_search_paddr = rsdp->rsdp_rsdt;
-       } else {
-               sdt_search_func = sdt_search_xsdt;
-               sdt_search_paddr = rsdp->rsdp_xsdt;
-       }
-       pmap_unmapdev((vm_offset_t)ptr, mapsz);
-}
-SYSINIT(sdt_probe, SI_BOOT2_PRESMP, SI_ORDER_FIRST, sdt_probe, 0);
-
-static const struct acpi_rsdp *
-sdt_rsdp_search(const uint8_t *target, int size)
-{
-       const struct acpi_rsdp *rsdp;
-       int i;
-
-       KKASSERT(size > sizeof(*rsdp));
-
-       for (i = 0; i < size - sizeof(*rsdp); i += ACPI_RSDP_ALIGN) {
-               rsdp = (const struct acpi_rsdp *)&target[i];
-               if (memcmp(rsdp->rsdp_sig, ACPI_RSDP_SIG,
-                          ACPI_RSDP_SIGLEN) == 0)
-                       return rsdp;
-       }
-       return NULL;
-}
-
-void *
-sdt_sdth_map(vm_paddr_t paddr)
-{
-       struct acpi_sdth *sdth;
-       vm_size_t mapsz;
-
-       sdth = pmap_mapdev(paddr, sizeof(*sdth));
-       mapsz = sdth->sdth_len;
-       pmap_unmapdev((vm_offset_t)sdth, sizeof(*sdth));
-
-       if (mapsz < sizeof(*sdth))
-               return NULL;
-
-       return pmap_mapdev(paddr, mapsz);
-}
-
-void
-sdt_sdth_unmap(struct acpi_sdth *sdth)
-{
-       pmap_unmapdev((vm_offset_t)sdth, sdth->sdth_len);
-}
-
-static vm_paddr_t
-sdt_search_xsdt(vm_paddr_t xsdt_paddr, const uint8_t *sig)
-{
-       struct acpi_xsdt *xsdt;
-       vm_paddr_t sdt_paddr = 0;
-       int i, nent;
-
-       if (xsdt_paddr == 0) {
-               kprintf("sdt_search_xsdt: XSDT paddr == 0\n");
-               return 0;
-       }
-
-       xsdt = sdt_sdth_map(xsdt_paddr);
-       if (xsdt == NULL) {
-               kprintf("sdt_search_xsdt: can't map XSDT\n");
-               return 0;
-       }
-
-       if (memcmp(xsdt->xsdt_hdr.sdth_sig, ACPI_XSDT_SIG,
-                  ACPI_SDTH_SIGLEN) != 0) {
-               kprintf("sdt_search_xsdt: not XSDT\n");
-               goto back;
-       }
-
-       if (xsdt->xsdt_hdr.sdth_rev != 1) {
-               kprintf("sdt_search_xsdt: unknown XSDT revision %d\n",
-                       xsdt->xsdt_hdr.sdth_rev);
-       }
-
-       if (xsdt->xsdt_hdr.sdth_len < sizeof(xsdt->xsdt_hdr)) {
-               kprintf("sdt_search_xsdt: invalid XSDT length %u\n",
-                       xsdt->xsdt_hdr.sdth_len);
-               goto back;
-       }
-
-       nent = (xsdt->xsdt_hdr.sdth_len - sizeof(xsdt->xsdt_hdr)) /
-              sizeof(xsdt->xsdt_ents[0]);
-       for (i = 0; i < nent; ++i) {
-               struct acpi_sdth *sdth;
-
-               if (xsdt->xsdt_ents[i] == 0)
-                       continue;
-
-               sdth = sdt_sdth_map(xsdt->xsdt_ents[i]);
-               if (sdth != NULL) {
-                       int ret;
-
-                       ret = memcmp(sdth->sdth_sig, sig, ACPI_SDTH_SIGLEN);
-                       sdt_sdth_unmap(sdth);
-
-                       if (ret == 0) {
-                               sdt_paddr = xsdt->xsdt_ents[i];
-                               break;
-                       }
-               }
-       }
-back:
-       sdt_sdth_unmap(&xsdt->xsdt_hdr);
-       return sdt_paddr;
-}
-
-static vm_paddr_t
-sdt_search_rsdt(vm_paddr_t rsdt_paddr, const uint8_t *sig)
-{
-       struct acpi_rsdt *rsdt;
-       vm_paddr_t sdt_paddr = 0;
-       int i, nent;
-
-       if (rsdt_paddr == 0) {
-               kprintf("sdt_search_rsdt: RSDT paddr == 0\n");
-               return 0;
-       }
-
-       rsdt = sdt_sdth_map(rsdt_paddr);
-       if (rsdt == NULL) {
-               kprintf("sdt_search_rsdt: can't map RSDT\n");
-               return 0;
-       }
-
-       if (memcmp(rsdt->rsdt_hdr.sdth_sig, ACPI_RSDT_SIG,
-                  ACPI_SDTH_SIGLEN) != 0) {
-               kprintf("sdt_search_rsdt: not RSDT\n");
-               goto back;
-       }
-
-       if (rsdt->rsdt_hdr.sdth_rev != 1) {
-               kprintf("sdt_search_rsdt: unknown RSDT revision %d\n",
-                       rsdt->rsdt_hdr.sdth_rev);
-       }
-
-       if (rsdt->rsdt_hdr.sdth_len < sizeof(rsdt->rsdt_hdr)) {
-               kprintf("sdt_search_rsdt: invalid RSDT length %u\n",
-                       rsdt->rsdt_hdr.sdth_len);
-               goto back;
-       }
-
-       nent = (rsdt->rsdt_hdr.sdth_len - sizeof(rsdt->rsdt_hdr)) /
-              sizeof(rsdt->rsdt_ents[0]);
-       for (i = 0; i < nent; ++i) {
-               struct acpi_sdth *sdth;
-
-               if (rsdt->rsdt_ents[i] == 0)
-                       continue;
-
-               sdth = sdt_sdth_map(rsdt->rsdt_ents[i]);
-               if (sdth != NULL) {
-                       int ret;
-
-                       ret = memcmp(sdth->sdth_sig, sig, ACPI_SDTH_SIGLEN);
-                       sdt_sdth_unmap(sdth);
-
-                       if (ret == 0) {
-                               sdt_paddr = rsdt->rsdt_ents[i];
-                               break;
-                       }
-               }
-       }
-back:
-       sdt_sdth_unmap(&rsdt->rsdt_hdr);
-       return sdt_paddr;
-}
-
-vm_paddr_t
-sdt_search(const uint8_t *sig)
-{
-       if (sdt_search_func == NULL)
-               return 0;
-       return sdt_search_func(sdt_search_paddr, sig);
-}
diff --git a/sys/platform/pc32/acpica/acpi_sdt.h b/sys/platform/pc32/acpica/acpi_sdt.h
deleted file mode 100644 (file)
index d0b5c6e..0000000
+++ /dev/null
@@ -1,57 +0,0 @@
-/*
- * Copyright (c) 2009 The DragonFly Project.  All rights reserved.
- * 
- * This code is derived from software contributed to The DragonFly Project
- * by Sepherosa Ziehau <sepherosa@gmail.com>
- * 
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in
- *    the documentation and/or other materials provided with the
- *    distribution.
- * 3. Neither the name of The DragonFly Project nor the names of its
- *    contributors may be used to endorse or promote products derived
- *    from this software without specific, prior written permission.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
- * COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
- * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
- * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
- * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- */
-
-#ifndef _ACPI_SDT_H_
-#define _ACPI_SDT_H_
-
-#define ACPI_SDTH_SIGLEN       4
-#define ACPI_RSDT_SIG          "RSDT"
-#define ACPI_XSDT_SIG          "XSDT"
-#define ACPI_MADT_SIG          "APIC"
-#define ACPI_FADT_SIG          "FACP"
-
-/* System Description Table Header */
-struct acpi_sdth {
-       uint8_t                 sdth_sig[ACPI_SDTH_SIGLEN];
-       uint32_t                sdth_len;
-       uint8_t                 sdth_rev;
-       uint8_t                 sdth_cksum;
-       uint8_t                 sdth_oem_id[6];
-       uint8_t                 sdth_oem_tbid[8];
-       uint32_t                sdth_oem_rev;
-       uint32_t                sdth_crt_id;
-       uint32_t                sdth_crt_rev;
-} __packed;
-
-#endif /* !_ACPI_SDT_H_ */
diff --git a/sys/platform/pc32/acpica/acpi_sdt_var.h b/sys/platform/pc32/acpica/acpi_sdt_var.h
deleted file mode 100644 (file)
index 2ca615c..0000000
+++ /dev/null
@@ -1,9 +0,0 @@
-#ifndef _ACPI_SDT_VAR_H_
-#define _ACPI_SDT_VAR_H_
-
-void           *sdt_sdth_map(vm_paddr_t);
-void           sdt_sdth_unmap(struct acpi_sdth *);
-
-vm_paddr_t     sdt_search(const uint8_t *);
-
-#endif /* !_ACPI_SDT_VAR_H_ */
diff --git a/sys/platform/pc32/acpica/acpi_wakecode.S b/sys/platform/pc32/acpica/acpi_wakecode.S
deleted file mode 100644 (file)
index e5e39ee..0000000
+++ /dev/null
@@ -1,238 +0,0 @@
-/*-
- * Copyright (c) 2001 Takanori Watanabe <takawata@jp.freebsd.org>
- * Copyright (c) 2001 Mitsuru IWASAKI <iwasaki@jp.freebsd.org>
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * $FreeBSD: src/sys/i386/acpica/acpi_wakecode.S,v 1.9 2004/01/01 22:57:22 njl Exp $
- */
-
-#define LOCORE
-
-#include <machine/asmacros.h>
-#include <machine/param.h>
-#include <machine/specialreg.h>
-
-       .align 4
-       .code16
-wakeup_16:
-       nop
-       cli
-
-       /*
-        * Set up segment registers for real mode and a small stack for
-        * any calls we make.
-        */
-       movw    %cs,%ax
-       movw    %ax,%ds
-       movw    %ax,%ss
-       movw    $PAGE_SIZE,%sp
-
-       /* Re-initialize video BIOS if the reset_video tunable is set. */
-       cmp     $0,reset_video
-       je      wakeup_16_gdt
-       lcall   $0xc000,$3
-
-       /*
-        * Set up segment registers for real mode again in case the
-        * previous BIOS call clobbers them.
-        */
-       movw    %cs,%ax
-       movw    %ax,%ds
-       movw    %ax,%ss
-
-wakeup_16_gdt:
-       /* Load GDT for real mode */
-       lgdt    physical_gdt
-
-       /* Restore CR2, CR3 and CR4 */
-       mov     previous_cr2,%eax
-       mov     %eax,%cr2
-       mov     previous_cr3,%eax
-       mov     %eax,%cr3
-       mov     previous_cr4,%eax
-       mov     %eax,%cr4
-
-       /* Transfer some values to protected mode */
-#define NVALUES        9
-#define TRANSFER_STACK32(val, idx)     \
-       mov     val,%eax;               \
-       mov     %eax,wakeup_32stack+(idx+1)+(idx*4);
-
-       TRANSFER_STACK32(previous_ss,           (NVALUES - 9))
-       TRANSFER_STACK32(previous_fs,           (NVALUES - 8))
-       TRANSFER_STACK32(previous_ds,           (NVALUES - 7))
-       TRANSFER_STACK32(physical_gdt+2,        (NVALUES - 6))
-       TRANSFER_STACK32(where_to_recover,      (NVALUES - 5))
-       TRANSFER_STACK32(previous_idt+2,        (NVALUES - 4))
-       TRANSFER_STACK32(previous_ldt,          (NVALUES - 3))
-       TRANSFER_STACK32(previous_gdt+2,        (NVALUES - 2))
-       TRANSFER_STACK32(previous_tr,           (NVALUES - 1))
-       TRANSFER_STACK32(previous_cr0,          (NVALUES - 0))
-
-       mov     physical_esp,%esi       /* to be used in 32bit code */
-
-       /* Enable protected mode */
-       mov     %cr0,%eax
-       orl     $(CR0_PE),%eax
-       mov     %eax,%cr0
-
-wakeup_sw32:
-       /* Switch to protected mode by intersegmental jump */
-       ljmpl   $0x8,$0x12345678        /* Code location, to be replaced */
-
-       .code32
-wakeup_32:
-       /*
-        * Switched to protected mode w/o paging
-        *      %esi:   KERNEL stack pointer (physical address)
-        */
-
-       nop
-
-       /* Set up segment registers for protected mode */
-       movw    $0x10,%ax               /* KDSEL to segment registers */
-       movw    %ax,%ds
-       movw    %ax,%es
-       movw    %ax,%gs
-       movw    %ax,%ss
-       movw    $0x18,%ax               /* KPSEL to %fs */
-       movw    %ax,%fs
-       movl    %esi,%esp               /* physical address stack pointer */
-
-wakeup_32stack:
-       /* Operands are overwritten in 16bit code */
-       pushl   $0xabcdef09             /* ss + dummy */
-       pushl   $0xabcdef08             /* fs + gs */
-       pushl   $0xabcdef07             /* ds + es */
-       pushl   $0xabcdef06             /* gdt:base (physical address) */
-       pushl   $0xabcdef05             /* recover address */ 
-       pushl   $0xabcdef04             /* idt:base */ 
-       pushl   $0xabcdef03             /* ldt + idt:limit */
-       pushl   $0xabcdef02             /* gdt:base */
-       pushl   $0xabcdef01             /* TR + gdt:limit */
-       pushl   $0xabcdef00             /* CR0 */
-
-       movl    %esp,%ebp
-#define CR0_REGISTER           0(%ebp)
-#define TASK_REGISTER          4(%ebp)
-#define PREVIOUS_GDT           6(%ebp)
-#define PREVIOUS_LDT           12(%ebp)
-#define PREVIOUS_IDT           14(%ebp)
-#define RECOVER_ADDR           20(%ebp)
-#define PHYSICAL_GDT_BASE      24(%ebp)
-#define PREVIOUS_DS            28(%ebp)
-#define PREVIOUS_ES            30(%ebp)
-#define PREVIOUS_FS            32(%ebp)
-#define PREVIOUS_GS            34(%ebp)
-#define PREVIOUS_SS            36(%ebp)
-
-       /* Fixup TSS type field */
-#define TSS_TYPEFIX_MASK       0xf9
-       xorl    %esi,%esi
-       movl    PHYSICAL_GDT_BASE,%ebx
-       movw    TASK_REGISTER,%si
-       leal    (%ebx,%esi),%eax        /* get TSS segment descriptor */
-       andb    $TSS_TYPEFIX_MASK,5(%eax)
-
-       /* Prepare to return to sleep/wakeup code point */
-       lgdt    PREVIOUS_GDT
-       lidt    PREVIOUS_IDT
-
-       xorl    %eax,%eax
-       movl    %eax,%ebx
-       movl    %eax,%ecx
-       movl    %eax,%edx
-       movl    %eax,%esi
-       movl    %eax,%edi
-       movl    PREVIOUS_DS,%ebx
-       movl    PREVIOUS_FS,%ecx
-       movl    PREVIOUS_SS,%edx
-       movw    TASK_REGISTER,%si
-       shll    $16,%esi
-       movw    PREVIOUS_LDT,%si
-       movl    RECOVER_ADDR,%edi
-
-       /* Enable paging and etc. */
-       movl    CR0_REGISTER,%eax
-       movl    %eax,%cr0
-
-       /* Flush the prefetch queue */
-       jmp     1f
-1:     jmp     1f
-1:
-       /*
-        * Now that we are in kernel virtual memory addressing
-        *      %ebx:   ds + es
-        *      %ecx:   fs + gs
-        *      %edx:   ss + dummy
-        *      %esi:   LDTR + TR
-        *      %edi:   recover address
-        */
-
-       nop
-
-       movl    %esi,%eax               /* LDTR + TR */
-       lldt    %ax                     /* load LDT register */
-       shrl    $16,%eax
-       ltr     %ax                     /* load task register */
-
-       /* Restore segment registers */
-       movl    %ebx,%eax               /* ds + es */
-       movw    %ax,%ds
-       shrl    $16,%eax
-       movw    %ax,%es
-       movl    %ecx,%eax               /* fs + gs */
-       movw    %ax,%fs
-       shrl    $16,%eax
-       movw    %ax,%gs
-       movl    %edx,%eax               /* ss */
-       movw    %ax,%ss
-
-       /* Jump to acpi_restorecpu() */
-       jmp     *%edi
-
-/* used in real mode */
-physical_gdt:          .word 0
-                       .long 0
-physical_esp:          .long 0
-previous_cr2:          .long 0
-previous_cr3:          .long 0
-previous_cr4:          .long 0
-reset_video:           .long 0
-
-/* transfer from real mode to protected mode */
-previous_cr0:          .long 0
-previous_tr:           .word 0
-previous_gdt:          .word 0
-                       .long 0
-previous_ldt:          .word 0
-previous_idt:          .word 0
-                       .long 0
-where_to_recover:      .long 0
-previous_ds:           .word 0
-previous_es:           .word 0
-previous_fs:           .word 0
-previous_gs:           .word 0
-previous_ss:           .word 0
-dummy:                 .word 0
diff --git a/sys/platform/pc32/acpica/acpi_wakeup.c b/sys/platform/pc32/acpica/acpi_wakeup.c
deleted file mode 100644 (file)
index 333ee65..0000000
+++ /dev/null
@@ -1,357 +0,0 @@
-/*-
- * Copyright (c) 2001 Takanori Watanabe <takawata@jp.freebsd.org>
- * Copyright (c) 2001 Mitsuru IWASAKI <iwasaki@jp.freebsd.org>
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * $FreeBSD: src/sys/i386/acpica/acpi_wakeup.c,v 1.33 2004/05/06 02:18:58 njl Exp $
- */
-
-#include <sys/param.h>
-#include <sys/systm.h>
-#include <sys/kernel.h>
-#include <sys/bus.h>
-#include <sys/lock.h>
-#include <sys/proc.h>
-#include <sys/sysctl.h>
-
-#include <vm/vm.h>
-#include <vm/pmap.h>
-#include <vm/vm_object.h>
-#include <vm/vm_page.h>
-#include <vm/vm_map.h>
-
-#include <machine/cpufunc.h>
-#include <machine/segments.h>
-#include <machine_base/icu/icu_var.h>
-
-#include "acpi.h"
-#include <dev/acpica/acpivar.h>
-
-#include "acpi_wakecode.h"
-
-extern uint32_t        acpi_reset_video;
-extern void    initializecpu(void);
-
-static __attribute__((used)) struct region_descriptor  r_idt, r_gdt, *p_gdt;
-static __attribute__((used)) uint16_t  r_ldt;
-
-static __attribute__((used)) uint32_t  r_eax, r_ebx, r_ecx, r_edx, r_ebp,
-                                       r_esi, r_edi, r_efl, r_cr0, r_cr2,
-                                       r_cr3, r_cr4, ret_addr;
-
-static __attribute__((used)) uint16_t  r_cs, r_ds, r_es, r_fs, r_gs, r_ss,
-                                       r_tr;
-static __attribute__((used)) uint32_t  r_esp;
-
-static void            acpi_printcpu(void);
-static void            acpi_realmodeinst(void *arg, bus_dma_segment_t *segs,
-                                         int nsegs, int error);
-static void            acpi_alloc_wakeup_handler(void);
-
-/* XXX shut gcc up */
-extern int             acpi_savecpu(void);
-extern int             acpi_restorecpu(void);
-
-#if defined(__GNUC__) || defined(__INTEL_COMPILER)
-__asm__("                              \n\
-       .text                           \n\
-       .p2align 2, 0x90                \n\
-       .type acpi_restorecpu, @function\n\
-acpi_restorecpu:                       \n\
-       .align 4                        \n\
-       movl    r_eax,%eax              \n\
-       movl    r_ebx,%ebx              \n\
-       movl    r_ecx,%ecx              \n\
-       movl    r_edx,%edx              \n\
-       movl    r_ebp,%ebp              \n\
-       movl    r_esi,%esi              \n\
-       movl    r_edi,%edi              \n\
-       movl    r_esp,%esp              \n\
-                                       \n\
-       pushl   r_efl                   \n\
-       popfl                           \n\
-                                       \n\
-       movl    ret_addr,%eax           \n\
-       movl    %eax,(%esp)             \n\
-       xorl    %eax,%eax               \n\
-       ret                             \n\
-                                       \n\
-       .text                           \n\
-       .p2align 2, 0x90                \n\
-       .type acpi_savecpu, @function   \n\
-acpi_savecpu:                          \n\
-       movw    %cs,r_cs                \n\
-       movw    %ds,r_ds                \n\
-       movw    %es,r_es                \n\
-       movw    %fs,r_fs                \n\
-       movw    %gs,r_gs                \n\
-       movw    %ss,r_ss                \n\
-                                       \n\
-       movl    %eax,r_eax              \n\
-       movl    %ebx,r_ebx              \n\
-       movl    %ecx,r_ecx              \n\
-       movl    %edx,r_edx              \n\
-       movl    %ebp,r_ebp              \n\
-       movl    %esi,r_esi              \n\
-       movl    %edi,r_edi              \n\
-                                       \n\
-       movl    %cr0,%eax               \n\
-       movl    %eax,r_cr0              \n\
-       movl    %cr2,%eax               \n\
-       movl    %eax,r_cr2              \n\
-       movl    %cr3,%eax               \n\
-       movl    %eax,r_cr3              \n\
-       movl    %cr4,%eax               \n\
-       movl    %eax,r_cr4              \n\
-                                       \n\
-       pushfl                          \n\
-       popl    r_efl                   \n\
-                                       \n\
-       movl    %esp,r_esp              \n\
-                                       \n\
-       sgdt    r_gdt                   \n\
-       sidt    r_idt                   \n\
-       sldt    r_ldt                   \n\
-       str     r_tr                    \n\
-                                       \n\
-       movl    (%esp),%eax             \n\
-       movl    %eax,ret_addr           \n\
-       movl    $1,%eax                 \n\
-       ret                             \n\
-");
-#endif /* __GNUC__ || __INTEL_COMPILER */
-
-static void
-acpi_printcpu(void)
-{
-       kprintf("======== acpi_printcpu() debug dump ========\n");
-       kprintf("gdt[%04x:%08x] idt[%04x:%08x] ldt[%04x] tr[%04x] efl[%08x]\n",
-               r_gdt.rd_limit, r_gdt.rd_base, r_idt.rd_limit, r_idt.rd_base,
-               r_ldt, r_tr, r_efl);
-       kprintf("eax[%08x] ebx[%08x] ecx[%08x] edx[%08x]\n",
-               r_eax, r_ebx, r_ecx, r_edx);
-       kprintf("esi[%08x] edi[%08x] ebp[%08x] esp[%08x]\n",
-               r_esi, r_edi, r_ebp, r_esp);
-       kprintf("cr0[%08x] cr2[%08x] cr3[%08x] cr4[%08x]\n",
-               r_cr0, r_cr2, r_cr3, r_cr4);
-       kprintf("cs[%04x] ds[%04x] es[%04x] fs[%04x] gs[%04x] ss[%04x]\n",
-               r_cs, r_ds, r_es, r_fs, r_gs, r_ss);
-}
-
-#define WAKECODE_FIXUP(offset, type, val) do   {               \
-       type    *addr;                                          \
-       addr = (type *)(sc->acpi_wakeaddr + offset);            \
-       *addr = val;                                            \
-} while (0)
-
-#define WAKECODE_BCOPY(offset, type, val) do   {               \
-       void    *addr;                                          \
-       addr = (void *)(sc->acpi_wakeaddr + offset);            \
-       bcopy(&(val), addr, sizeof(type));                      \
-} while (0)
-
-int
-acpi_sleep_machdep(struct acpi_softc *sc, int state)
-{
-       ACPI_STATUS             status;
-       vm_paddr_t              oldphys;
-       struct pmap             *pm;
-       vm_page_t               page;
-       static vm_page_t        opage = NULL;
-       int                     ret = 0;
-       int                     pteobj_allocated = 0;
-       uint32_t                cr3;
-       u_long                  ef;
-       struct proc             *p;
-
-       if (sc->acpi_wakeaddr == 0)
-               return (0);
-
-       AcpiSetFirmwareWakingVector(sc->acpi_wakephys);
-
-       ef = read_eflags();
-       ACPI_DISABLE_IRQS();
-
-       /* Create Identity Mapping */
-       if ((p = curproc) == NULL)
-               p = &proc0;
-       pm = vmspace_pmap(p->p_vmspace);
-       cr3 = rcr3();
-#ifdef PAE
-       load_cr3(vtophys(pm->pm_pdpt));
-#else
-       load_cr3(vtophys(pm->pm_pdir));
-#endif
-       /*
-        * note: DragonFly still uses the VM object (FreeBSD-5 no longer uses
-        * the VM object).
-        */
-       if (pm->pm_pteobj == NULL) {
-               pm->pm_pteobj = vm_object_allocate(OBJT_DEFAULT, PTDPTDI + 1);
-               pteobj_allocated = 1;
-       }
-
-       oldphys = pmap_extract(pm, sc->acpi_wakephys);
-       if (oldphys)
-               opage = PHYS_TO_VM_PAGE(oldphys);
-       page = PHYS_TO_VM_PAGE(sc->acpi_wakephys);
-       pmap_enter(pm, sc->acpi_wakephys, page,
-                  VM_PROT_READ | VM_PROT_WRITE | VM_PROT_EXECUTE,
-                  1, NULL);
-
-       ret_addr = 0;
-       if (acpi_savecpu()) {
-               /* Execute Sleep */
-               cpu_disable_intr();
-
-               p_gdt = (struct region_descriptor *)
-                               (sc->acpi_wakeaddr + physical_gdt);
-               p_gdt->rd_limit = r_gdt.rd_limit;
-               p_gdt->rd_base = vtophys(r_gdt.rd_base);
-
-               WAKECODE_FIXUP(physical_esp, uint32_t, vtophys(r_esp));
-               WAKECODE_FIXUP(previous_cr0, uint32_t, r_cr0);
-               WAKECODE_FIXUP(previous_cr2, uint32_t, r_cr2);
-               WAKECODE_FIXUP(previous_cr3, uint32_t, r_cr3);
-               WAKECODE_FIXUP(previous_cr4, uint32_t, r_cr4);
-
-               WAKECODE_FIXUP(reset_video, uint32_t, acpi_reset_video);
-
-               WAKECODE_FIXUP(previous_tr,  uint16_t, r_tr);
-               WAKECODE_BCOPY(previous_gdt, struct region_descriptor, r_gdt);
-               WAKECODE_FIXUP(previous_ldt, uint16_t, r_ldt);
-               WAKECODE_BCOPY(previous_idt, struct region_descriptor, r_idt);
-
-               WAKECODE_FIXUP(where_to_recover, void *, acpi_restorecpu);
-
-               WAKECODE_FIXUP(previous_ds,  uint16_t, r_ds);
-               WAKECODE_FIXUP(previous_es,  uint16_t, r_es);
-               WAKECODE_FIXUP(previous_fs,  uint16_t, r_fs);
-               WAKECODE_FIXUP(previous_gs,  uint16_t, r_gs);
-               WAKECODE_FIXUP(previous_ss,  uint16_t, r_ss);
-
-               if (bootverbose)
-                       acpi_printcpu();
-
-               /* Call ACPICA to enter the desired sleep state */
-               if (state == ACPI_STATE_S4 && sc->acpi_s4bios)
-                       status = AcpiEnterSleepStateS4bios();
-               else
-                       status = AcpiEnterSleepState(state);
-
-               if (ACPI_FAILURE(status)) {
-                       device_printf(sc->acpi_dev,
-                               "AcpiEnterSleepState failed - %s\n",
-                               AcpiFormatException(status));
-                       ret = -1;
-                       goto out;
-               }
-
-               for (;;) ;
-       } else {
-               /* Execute Wakeup */
-#if 0
-               initializecpu();
-#endif
-               icu_reinit();
-               cpu_enable_intr();
-
-               if (bootverbose) {
-                       acpi_savecpu();
-                       acpi_printcpu();
-               }
-       }
-
-out:
-       pmap_remove(pm, sc->acpi_wakephys, sc->acpi_wakephys + PAGE_SIZE);
-       if (opage) {
-               pmap_enter(pm, sc->acpi_wakephys, page,
-                          VM_PROT_READ | VM_PROT_WRITE,
-                          0, NULL);
-       }
-
-       if (pteobj_allocated) {
-               vm_object_deallocate(pm->pm_pteobj);
-               pm->pm_pteobj = NULL;
-       }
-       load_cr3(cr3);
-
-       write_eflags(ef);
-
-       return (ret);
-}
-
-static bus_dma_tag_t   acpi_waketag;
-static bus_dmamap_t    acpi_wakemap;
-static vm_offset_t     acpi_wakeaddr = 0;
-
-static void
-acpi_alloc_wakeup_handler(void)
-{
-       if (!cold)
-               return;
-
-       if (bus_dma_tag_create(/* parent */ NULL, /* alignment */ 2, 0,
-                              /* lowaddr below 1MB */ 0x9ffff,
-                              /* highaddr */ BUS_SPACE_MAXADDR, NULL, NULL,
-                               PAGE_SIZE, 1, PAGE_SIZE, 0, &acpi_waketag) != 0) {
-               kprintf("acpi_alloc_wakeup_handler: can't create wake tag\n");
-               return;
-       }
-
-       if (bus_dmamem_alloc(acpi_waketag, (void **)&acpi_wakeaddr,
-                            BUS_DMA_NOWAIT, &acpi_wakemap)) {
-               kprintf("acpi_alloc_wakeup_handler: can't alloc wake memory\n");
-               return;
-       }
-}
-
-SYSINIT(acpiwakeup, SI_BOOT1_POST, SI_ORDER_ANY, acpi_alloc_wakeup_handler, 0);
-
-static void
-acpi_realmodeinst(void *arg, bus_dma_segment_t *segs, int nsegs, int error)
-{
-       struct acpi_softc       *sc = arg;
-       uint32_t                *addr;
-
-       addr = (uint32_t *)&wakecode[wakeup_sw32 + 2];
-       *addr = segs[0].ds_addr + wakeup_32;
-       bcopy(wakecode, (void *)sc->acpi_wakeaddr, sizeof(wakecode));
-       sc->acpi_wakephys = segs[0].ds_addr;
-}
-
-void
-acpi_install_wakeup_handler(struct acpi_softc *sc)
-{
-       if (acpi_wakeaddr == 0)
-               return;
-
-       sc->acpi_waketag = acpi_waketag;
-       sc->acpi_wakeaddr = acpi_wakeaddr;
-       sc->acpi_wakemap = acpi_wakemap;
-
-       bus_dmamap_load(sc->acpi_waketag, sc->acpi_wakemap,
-                       (void *)sc->acpi_wakeaddr, PAGE_SIZE,
-                       acpi_realmodeinst, sc, 0);
-}
diff --git a/sys/platform/pc32/acpica/genwakecode.sh b/sys/platform/pc32/acpica/genwakecode.sh
deleted file mode 100644 (file)
index 5090f4a..0000000
+++ /dev/null
@@ -1,15 +0,0 @@
-#!/bin/sh
-# $FreeBSD: src/sys/i386/acpica/genwakecode.sh,v 1.1 2002/05/01 21:52:34 peter Exp $
-#
-echo "/* generated from `pwd`/acpi_wakecode.o */"
-echo 'static char wakecode[] = {';
-hexdump -bv acpi_wakecode.bin | \
-    sed -e 's/^[0-9a-f][0-9a-f]*//' -e 's/\([[:digit:]]\{1,\}\) */0\1,/g'
-echo '};'
-
-nm -n acpi_wakecode.o | while read offset dummy what
-do
-    echo "#define ${what}      0x${offset}"
-done
-
-exit 0
diff --git a/sys/platform/pc32/apic/apic_vector.s b/sys/platform/pc32/apic/apic_vector.s
deleted file mode 100644 (file)
index edadfce..0000000
+++ /dev/null
@@ -1,562 +0,0 @@
-/*
- *     from: vector.s, 386BSD 0.1 unknown origin
- * $FreeBSD: src/sys/i386/isa/apic_vector.s,v 1.47.2.5 2001/09/01 22:33:38 tegge Exp $
- */
-
-#include "opt_auto_eoi.h"
-
-#include <machine/asmacros.h>
-#include <machine/lock.h>
-#include <machine/psl.h>
-#include <machine/trap.h>
-
-#include <machine_base/icu/icu.h>
-#include <bus/isa/isa.h>
-
-#include "assym.s"
-
-#include "apicreg.h"
-#include <machine_base/apic/ioapic_ipl.h>
-#include <machine/intr_machdep.h>
-
-/* convert an absolute IRQ# into bitmask */
-#define IRQ_LBIT(irq_num)      (1 << ((irq_num) & 0x1f))
-
-/* convert an absolute IRQ# into ipending index */
-#define IRQ_LIDX(irq_num)      ((irq_num) >> 5)
-
-#define MPLOCKED     lock ;
-
-/*
- * Push an interrupt frame in a format acceptable to doreti, reload
- * the segment registers for the kernel.
- */
-#define PUSH_FRAME                                                     \
-       pushl   $0 ;            /* dummy error code */                  \
-       pushl   $0 ;            /* dummy trap type */                   \
-       pushl   $0 ;            /* dummy xflags type */                 \
-       pushal ;                                                        \
-       pushl   %ds ;           /* save data and extra segments ... */  \
-       pushl   %es ;                                                   \
-       pushl   %fs ;                                                   \
-       pushl   %gs ;                                                   \
-       cld ;                                                           \
-       mov     $KDSEL,%ax ;                                            \
-       mov     %ax,%ds ;                                               \
-       mov     %ax,%es ;                                               \
-       mov     %ax,%gs ;                                               \
-       mov     $KPSEL,%ax ;                                            \
-       mov     %ax,%fs ;                                               \
-
-/*
- * Warning: POP_FRAME can only be used if there is no chance of a
- * segment register being changed (e.g. by procfs), which is why syscalls
- * have to use doreti.
- */
-#define POP_FRAME                                                      \
-       popl    %gs ;                                                   \
-       popl    %fs ;                                                   \
-       popl    %es ;                                                   \
-       popl    %ds ;                                                   \
-       popal ;                                                         \
-       addl    $3*4,%esp ;     /* dummy xflags, trap & error codes */  \
-
-#define IOAPICADDR(irq_num) \
-       CNAME(ioapic_irqs) + IOAPIC_IRQI_SIZE * (irq_num) + IOAPIC_IRQI_ADDR
-#define REDIRIDX(irq_num) \
-       CNAME(ioapic_irqs) + IOAPIC_IRQI_SIZE * (irq_num) + IOAPIC_IRQI_IDX
-#define IOAPICFLAGS(irq_num) \
-       CNAME(ioapic_irqs) + IOAPIC_IRQI_SIZE * (irq_num) + IOAPIC_IRQI_FLAGS
-
-#define MASK_IRQ(irq_num)                                              \
-       IOAPIC_IMASK_LOCK ;                     /* into critical reg */ \
-       testl   $IOAPIC_IRQI_FLAG_MASKED, IOAPICFLAGS(irq_num) ;        \
-       jne     7f ;                    /* masked, don't mask */        \
-       orl     $IOAPIC_IRQI_FLAG_MASKED, IOAPICFLAGS(irq_num) ;        \
-                                               /* set the mask bit */  \
-       movl    IOAPICADDR(irq_num), %ecx ;     /* ioapic addr */       \
-       movl    REDIRIDX(irq_num), %eax ;       /* get the index */     \
-       movl    %eax, (%ecx) ;                  /* write the index */   \
-       orl     $IOART_INTMASK,IOAPIC_WINDOW(%ecx) ;/* set the mask */  \
-7: ;                                           /* already masked */    \
-       IOAPIC_IMASK_UNLOCK ;                                           \
-
-/*
- * Test to see whether we are handling an edge or level triggered INT.
- *  Level-triggered INTs must still be masked as we don't clear the source,
- *  and the EOI cycle would cause redundant INTs to occur.
- */
-#define MASK_LEVEL_IRQ(irq_num)                                                \
-       testl   $IOAPIC_IRQI_FLAG_LEVEL, IOAPICFLAGS(irq_num) ;         \
-       jz      9f ;                            /* edge, don't mask */  \
-       MASK_IRQ(irq_num) ;                                             \
-9: ;                                                                   \
-
-/*
- * Test to see if the source is currntly masked, clear if so.
- */
-#define UNMASK_IRQ(irq_num)                                            \
-       cmpl    $0,%eax ;                                               \
-       jnz     8f ;                                                    \
-       IOAPIC_IMASK_LOCK ;                     /* into critical reg */ \
-       testl   $IOAPIC_IRQI_FLAG_MASKED, IOAPICFLAGS(irq_num) ;        \
-       je      7f ;                    /* bit clear, not masked */     \
-       andl    $~IOAPIC_IRQI_FLAG_MASKED, IOAPICFLAGS(irq_num) ;       \
-                                               /* clear mask bit */    \
-       movl    IOAPICADDR(irq_num),%ecx ;      /* ioapic addr */       \
-       movl    REDIRIDX(irq_num), %eax ;       /* get the index */     \
-       movl    %eax,(%ecx) ;                   /* write the index */   \
-       andl    $~IOART_INTMASK,IOAPIC_WINDOW(%ecx) ;/* clear the mask */ \
-7: ;                                                                   \
-       IOAPIC_IMASK_UNLOCK ;                                           \
-8: ;                                                                   \
-
-/*
- * Interrupt call handlers run in the following sequence:
- *
- *     - Push the trap frame required by doreti
- *     - Mask the interrupt and reenable its source
- *     - If we cannot take the interrupt set its ipending bit and
- *       doreti.
- *     - If we can take the interrupt clear its ipending bit,
- *       call the handler, then unmask and doreti.
- *
- * YYY can cache gd base opitner instead of using hidden %fs prefixes.
- */
-
-#define        INTR_HANDLER(irq_num)                                           \
-       .text ;                                                         \
-       SUPERALIGN_TEXT ;                                               \
-IDTVEC(ioapic_intr##irq_num) ;                                         \
-       PUSH_FRAME ;                                                    \
-       FAKE_MCOUNT(15*4(%esp)) ;                                       \
-       MASK_LEVEL_IRQ(irq_num) ;                                       \
-       movl    lapic,%eax ;                                            \
-       movl    $0,LA_EOI(%eax) ;                                       \
-       movl    PCPU(curthread),%ebx ;                                  \
-       movl    $0,%eax ;       /* CURRENT CPL IN FRAME (REMOVED) */    \
-       pushl   %eax ;                                                  \
-       testl   $-1,TD_NEST_COUNT(%ebx) ;                               \
-       jne     1f ;                                                    \
-       testl   $-1,TD_CRITCOUNT(%ebx) ;                                \
-       je      2f ;                                                    \
-1: ;                                                                   \
-       /* in critical section, make interrupt pending */               \
-       /* set the pending bit and return, leave interrupt masked */    \
-       movl    $IRQ_LIDX(irq_num),%edx ;                               \
-       orl     $IRQ_LBIT(irq_num),PCPU_E4(ipending,%edx) ;             \
-       orl     $RQF_INTPEND,PCPU(reqflags) ;                           \
-       jmp     5f ;                                                    \
-2: ;                                                                   \
-       /* clear pending bit, run handler */                            \
-       movl    $IRQ_LIDX(irq_num),%edx ;                               \
-       andl    $~IRQ_LBIT(irq_num),PCPU_E4(ipending,%edx) ;            \
-       pushl   $irq_num ;                                              \
-       pushl   %esp ;                   /* pass frame by reference */  \
-       incl    TD_CRITCOUNT(%ebx) ;                                    \
-       sti ;                                                           \
-       call    ithread_fast_handler ;   /* returns 0 to unmask */      \
-       decl    TD_CRITCOUNT(%ebx) ;                                    \
-       addl    $8, %esp ;                                              \
-       UNMASK_IRQ(irq_num) ;                                           \
-5: ;                                                                   \
-       MEXITCOUNT ;                                                    \
-       jmp     doreti ;                                                \
-
-/*
- * Handle "spurious INTerrupts".
- * Notes:
- *  This is different than the "spurious INTerrupt" generated by an
- *   8259 PIC for missing INTs.  See the APIC documentation for details.
- *  This routine should NOT do an 'EOI' cycle.
- */
-       .text
-       SUPERALIGN_TEXT
-       .globl Xspuriousint
-Xspuriousint:
-
-       /* No EOI cycle used here */
-
-       iret
-
-/*
- * Handle TLB shootdowns.
- *
- * NOTE: Interrupts remain disabled.
- */
-       .text
-       SUPERALIGN_TEXT
-       .globl  Xinvltlb
-Xinvltlb:
-       PUSH_FRAME
-       movl    lapic,%eax
-       movl    $0,LA_EOI(%eax)         /* End Of Interrupt to APIC */
-       FAKE_MCOUNT(15*4(%esp))
-
-       subl    $8,%esp                 /* make same as interrupt frame */
-       pushl   %esp                    /* pass frame by reference */
-       call    smp_invltlb_intr
-       addl    $12,%esp
-
-       MEXITCOUNT
-       jmp     doreti_syscall_ret
-
-/*
- * Executed by a CPU when it receives an Xcpustop IPI from another CPU,
- *
- *  - Signals its receipt.
- *  - Waits for permission to restart.
- *  - Processing pending IPIQ events while waiting.
- *  - Signals its restart.
- */
-
-       .text
-       SUPERALIGN_TEXT
-       .globl Xcpustop
-Xcpustop:
-       pushl   %ebp
-       movl    %esp, %ebp
-       pushl   %eax
-       pushl   %ecx
-       pushl   %edx
-       pushl   %ds                     /* save current data segment */
-       pushl   %fs
-
-       movl    $KDSEL, %eax
-       mov     %ax, %ds                /* use KERNEL data segment */
-       movl    $KPSEL, %eax
-       mov     %ax, %fs
-
-       movl    lapic, %eax
-       movl    $0, LA_EOI(%eax)        /* End Of Interrupt to APIC */
-
-       movl    PCPU(cpuid), %eax
-       imull   $PCB_SIZE, %eax
-       leal    CNAME(stoppcbs)(%eax), %eax
-       pushl   %eax
-       call    CNAME(savectx)          /* Save process context */
-       addl    $4, %esp
-       
-               
-       movl    PCPU(cpuid), %eax
-
-       /*
-        * Indicate that we have stopped and loop waiting for permission
-        * to start again.  We must still process IPI events while in a
-        * stopped state.
-        *
-        * Interrupts must remain enabled for non-IPI'd per-cpu interrupts
-        * (e.g. Xtimer, Xinvltlb).
-        */
-       MPLOCKED
-       btsl    %eax, stopped_cpus      /* stopped_cpus |= (1<<id) */
-       sti
-1:
-       andl    $~RQF_IPIQ,PCPU(reqflags)
-       pushl   %eax
-       call    lwkt_smp_stopped
-       popl    %eax
-       btl     %eax, started_cpus      /* while (!(started_cpus & (1<<id))) */
-       jnc     1b
-
-       MPLOCKED
-       btrl    %eax, started_cpus      /* started_cpus &= ~(1<<id) */
-       MPLOCKED
-       btrl    %eax, stopped_cpus      /* stopped_cpus &= ~(1<<id) */
-
-       test    %eax, %eax
-       jnz     2f
-
-       movl    CNAME(cpustop_restartfunc), %eax
-       test    %eax, %eax
-       jz      2f
-       movl    $0, CNAME(cpustop_restartfunc)  /* One-shot */
-
-       call    *%eax
-2:
-       popl    %fs
-       popl    %ds                     /* restore previous data segment */
-       popl    %edx
-       popl    %ecx
-       popl    %eax
-       movl    %ebp, %esp
-       popl    %ebp
-       iret
-
-       /*
-        * For now just have one ipiq IPI, but what we really want is
-        * to have one for each source cpu to the APICs don't get stalled
-        * backlogging the requests.
-        */
-       .text
-       SUPERALIGN_TEXT
-       .globl Xipiq
-Xipiq:
-       PUSH_FRAME
-       movl    lapic,%eax
-       movl    $0,LA_EOI(%eax)         /* End Of Interrupt to APIC */
-       FAKE_MCOUNT(15*4(%esp))
-
-       incl    PCPU(cnt) + V_IPI
-       movl    PCPU(curthread),%ebx
-       testl   $-1,TD_CRITCOUNT(%ebx)
-       jne     1f
-       subl    $8,%esp                 /* make same as interrupt frame */
-       pushl   %esp                    /* pass frame by reference */
-       incl    PCPU(intr_nesting_level)
-       incl    TD_CRITCOUNT(%ebx)
-       sti
-       call    lwkt_process_ipiq_frame
-       decl    TD_CRITCOUNT(%ebx)
-       decl    PCPU(intr_nesting_level)
-       addl    $12,%esp
-       pushl   $0                      /* CPL for frame (REMOVED) */
-       MEXITCOUNT
-       jmp     doreti
-1:
-       orl     $RQF_IPIQ,PCPU(reqflags)
-       MEXITCOUNT
-       jmp     doreti_syscall_ret
-
-       .text
-       SUPERALIGN_TEXT
-       .globl Xtimer
-Xtimer:
-       PUSH_FRAME
-       movl    lapic,%eax
-       movl    $0,LA_EOI(%eax)         /* End Of Interrupt to APIC */
-       FAKE_MCOUNT(15*4(%esp))
-
-       incl    PCPU(cnt) + V_TIMER
-       movl    PCPU(curthread),%ebx
-       testl   $-1,TD_CRITCOUNT(%ebx)
-       jne     1f
-       testl   $-1,TD_NEST_COUNT(%ebx)
-       jne     1f
-       subl    $8,%esp                 /* make same as interrupt frame */
-       pushl   %esp                    /* pass frame by reference */
-       incl    PCPU(intr_nesting_level)
-       incl    TD_CRITCOUNT(%ebx)
-       sti
-       call    lapic_timer_process_frame
-       decl    TD_CRITCOUNT(%ebx)
-       decl    PCPU(intr_nesting_level)
-       addl    $12,%esp
-       pushl   $0                      /* CPL for frame (REMOVED) */
-       MEXITCOUNT
-       jmp     doreti
-1:
-       orl     $RQF_TIMER,PCPU(reqflags)
-       MEXITCOUNT
-       jmp     doreti_syscall_ret
-
-MCOUNT_LABEL(bintr)
-       INTR_HANDLER(0)
-       INTR_HANDLER(1)
-       INTR_HANDLER(2)
-       INTR_HANDLER(3)
-       INTR_HANDLER(4)
-       INTR_HANDLER(5)
-       INTR_HANDLER(6)
-       INTR_HANDLER(7)
-       INTR_HANDLER(8)
-       INTR_HANDLER(9)
-       INTR_HANDLER(10)
-       INTR_HANDLER(11)
-       INTR_HANDLER(12)
-       INTR_HANDLER(13)
-       INTR_HANDLER(14)
-       INTR_HANDLER(15)
-       INTR_HANDLER(16)
-       INTR_HANDLER(17)
-       INTR_HANDLER(18)
-       INTR_HANDLER(19)
-       INTR_HANDLER(20)
-       INTR_HANDLER(21)
-       INTR_HANDLER(22)
-       INTR_HANDLER(23)
-       INTR_HANDLER(24)
-       INTR_HANDLER(25)
-       INTR_HANDLER(26)
-       INTR_HANDLER(27)
-       INTR_HANDLER(28)
-       INTR_HANDLER(29)
-       INTR_HANDLER(30)
-       INTR_HANDLER(31)
-       INTR_HANDLER(32)
-       INTR_HANDLER(33)
-       INTR_HANDLER(34)
-       INTR_HANDLER(35)
-       INTR_HANDLER(36)
-       INTR_HANDLER(37)
-       INTR_HANDLER(38)
-       INTR_HANDLER(39)
-       INTR_HANDLER(40)
-       INTR_HANDLER(41)
-       INTR_HANDLER(42)
-       INTR_HANDLER(43)
-       INTR_HANDLER(44)
-       INTR_HANDLER(45)
-       INTR_HANDLER(46)
-       INTR_HANDLER(47)
-       INTR_HANDLER(48)
-       INTR_HANDLER(49)
-       INTR_HANDLER(50)
-       INTR_HANDLER(51)
-       INTR_HANDLER(52)
-       INTR_HANDLER(53)
-       INTR_HANDLER(54)
-       INTR_HANDLER(55)
-       INTR_HANDLER(56)
-       INTR_HANDLER(57)
-       INTR_HANDLER(58)
-       INTR_HANDLER(59)
-       INTR_HANDLER(60)
-       INTR_HANDLER(61)
-       INTR_HANDLER(62)
-       INTR_HANDLER(63)
-       INTR_HANDLER(64)
-       INTR_HANDLER(65)
-       INTR_HANDLER(66)
-       INTR_HANDLER(67)
-       INTR_HANDLER(68)
-       INTR_HANDLER(69)
-       INTR_HANDLER(70)
-       INTR_HANDLER(71)
-       INTR_HANDLER(72)
-       INTR_HANDLER(73)
-       INTR_HANDLER(74)
-       INTR_HANDLER(75)
-       INTR_HANDLER(76)
-       INTR_HANDLER(77)
-       INTR_HANDLER(78)
-       INTR_HANDLER(79)
-       INTR_HANDLER(80)
-       INTR_HANDLER(81)
-       INTR_HANDLER(82)
-       INTR_HANDLER(83)
-       INTR_HANDLER(84)
-       INTR_HANDLER(85)
-       INTR_HANDLER(86)
-       INTR_HANDLER(87)
-       INTR_HANDLER(88)
-       INTR_HANDLER(89)
-       INTR_HANDLER(90)
-       INTR_HANDLER(91)
-       INTR_HANDLER(92)
-       INTR_HANDLER(93)
-       INTR_HANDLER(94)
-       INTR_HANDLER(95)
-       INTR_HANDLER(96)
-       INTR_HANDLER(97)
-       INTR_HANDLER(98)
-       INTR_HANDLER(99)
-       INTR_HANDLER(100)
-       INTR_HANDLER(101)
-       INTR_HANDLER(102)
-       INTR_HANDLER(103)
-       INTR_HANDLER(104)
-       INTR_HANDLER(105)
-       INTR_HANDLER(106)
-       INTR_HANDLER(107)
-       INTR_HANDLER(108)
-       INTR_HANDLER(109)
-       INTR_HANDLER(110)
-       INTR_HANDLER(111)
-       INTR_HANDLER(112)
-       INTR_HANDLER(113)
-       INTR_HANDLER(114)
-       INTR_HANDLER(115)
-       INTR_HANDLER(116)
-       INTR_HANDLER(117)
-       INTR_HANDLER(118)
-       INTR_HANDLER(119)
-       INTR_HANDLER(120)
-       INTR_HANDLER(121)
-       INTR_HANDLER(122)
-       INTR_HANDLER(123)
-       INTR_HANDLER(124)
-       INTR_HANDLER(125)
-       INTR_HANDLER(126)
-       INTR_HANDLER(127)
-       INTR_HANDLER(128)
-       INTR_HANDLER(129)
-       INTR_HANDLER(130)
-       INTR_HANDLER(131)
-       INTR_HANDLER(132)
-       INTR_HANDLER(133)
-       INTR_HANDLER(134)
-       INTR_HANDLER(135)
-       INTR_HANDLER(136)
-       INTR_HANDLER(137)
-       INTR_HANDLER(138)
-       INTR_HANDLER(139)
-       INTR_HANDLER(140)
-       INTR_HANDLER(141)
-       INTR_HANDLER(142)
-       INTR_HANDLER(143)
-       INTR_HANDLER(144)
-       INTR_HANDLER(145)
-       INTR_HANDLER(146)
-       INTR_HANDLER(147)
-       INTR_HANDLER(148)
-       INTR_HANDLER(149)
-       INTR_HANDLER(150)
-       INTR_HANDLER(151)
-       INTR_HANDLER(152)
-       INTR_HANDLER(153)
-       INTR_HANDLER(154)
-       INTR_HANDLER(155)
-       INTR_HANDLER(156)
-       INTR_HANDLER(157)
-       INTR_HANDLER(158)
-       INTR_HANDLER(159)
-       INTR_HANDLER(160)
-       INTR_HANDLER(161)
-       INTR_HANDLER(162)
-       INTR_HANDLER(163)
-       INTR_HANDLER(164)
-       INTR_HANDLER(165)
-       INTR_HANDLER(166)
-       INTR_HANDLER(167)
-       INTR_HANDLER(168)
-       INTR_HANDLER(169)
-       INTR_HANDLER(170)
-       INTR_HANDLER(171)
-       INTR_HANDLER(172)
-       INTR_HANDLER(173)
-       INTR_HANDLER(174)
-       INTR_HANDLER(175)
-       INTR_HANDLER(176)
-       INTR_HANDLER(177)
-       INTR_HANDLER(178)
-       INTR_HANDLER(179)
-       INTR_HANDLER(180)
-       INTR_HANDLER(181)
-       INTR_HANDLER(182)
-       INTR_HANDLER(183)
-       INTR_HANDLER(184)
-       INTR_HANDLER(185)
-       INTR_HANDLER(186)
-       INTR_HANDLER(187)
-       INTR_HANDLER(188)
-       INTR_HANDLER(189)
-       INTR_HANDLER(190)
-       INTR_HANDLER(191)
-MCOUNT_LABEL(eintr)
-
-       .data
-
-/* variables used by stop_cpus()/restart_cpus()/Xcpustop */
-       .globl stopped_cpus, started_cpus
-stopped_cpus:
-       .long   0
-started_cpus:
-       .long   0
-
-       .globl CNAME(cpustop_restartfunc)
-CNAME(cpustop_restartfunc):
-       .long 0
-               
-       .text
-
diff --git a/sys/platform/pc32/apic/apicreg.h b/sys/platform/pc32/apic/apicreg.h
deleted file mode 100644 (file)
index 090bcd4..0000000
+++ /dev/null
@@ -1,903 +0,0 @@
-/*
- * Copyright (c) 2003,2004 The DragonFly Project.  All rights reserved.
- * 
- * This code is derived from software contributed to The DragonFly Project
- * by Matthew Dillon <dillon@backplane.com>
- * 
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in
- *    the documentation and/or other materials provided with the
- *    distribution.
- * 3. Neither the name of The DragonFly Project nor the names of its
- *    contributors may be used to endorse or promote products derived
- *    from this software without specific, prior written permission.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
- * COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
- * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
- * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
- * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- * 
- * Copyright (c) 1996, by Peter Wemm and Steve Passe, All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. The name of the developer may NOT be used to endorse or promote products
- *    derived from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * $FreeBSD: src/sys/i386/include/apic.h,v 1.14.2.2 2003/03/21 21:46:15 jhb Exp $
- * $DragonFly: src/sys/platform/pc32/apic/apicreg.h,v 1.6 2005/11/03 23:45:09 dillon Exp $
- */
-
-#ifndef _MACHINE_APICREG_H_
-#define _MACHINE_APICREG_H_
-
-/*
- * Local && I/O APIC definitions for Pentium P54C+ Built-in APIC.
- *
- * A per-cpu APIC resides in memory location 0xFEE00000.
- *
- *               31 ... 24   23 ... 16   15 ... 8     7 ... 0
- *             +-----------+-----------+-----------+-----------+
- * 0000        |           |           |           |           |
- * 0010        |           |           |           |           |
- *             +-----------+-----------+-----------+-----------+
- *
- *             +-----------+-----------+-----------+-----------+
- * 0020 ID     |     | ID  |           |           |           | RW
- *             +-----------+-----------+-----------+-----------+
- *
- *                 The physical APIC ID is used with physical interrupt
- *                 delivery modes.
- *
- *             +-----------+-----------+-----------+-----------+
- * 0030 VER    |           |           |           |           |
- *             +-----------+-----------+-----------+-----------+
- * 0040        |           |           |           |           |
- * 0050        |           |           |           |           |
- * 0060        |           |           |           |           |
- * 0070        |           |           |           |           |
- *             +-----------+-----------+-----------+-----------+
- * 0080 TPR    |           |           |           | PRIO SUBC |
- * 0090 APR    |           |           |           |           |
- * 00A0 PPR    |           |           |           |           |
- *             +-----------+-----------+-----------+-----------+
- *
- *                 The Task Priority Register provides a priority threshold
- *                 mechanism for interrupting the processor.  Only interrupts
- *                 with a higher priority then that specified in the TPR will
- *                 be served.   Other interrupts are recorded and serviced
- *                 as soon as the TPR value decreases enough to allow that
- *                 (unless EOId by another APIC).
- *
- *                 PRIO (7:4).  Main priority.  If 15 the APIC will not
- *                              accept any interrupts.
- *                 SUBC (3:0)   Sub priority.  See APR/PPR.
- *
- *
- *                 The Processor Priority Register determines whether a
- *                 pending interrupt can be dispensed to the processor.  ISRV
- *                 Is the vector of the highest priority ISR bit set or
- *                 zero if no ISR bit is set.
- *
- *                 IF TPR[7:4] >= ISRV[7:4]
- *                     PPR[7:0] = TPR[7:0]
- *                 ELSE
- *                     PPR[7:0] = ISRV[7:4].000
- *                     
- *                 The Arbitration Priority Register holds the current
- *                 lowest priority of the procsesor, a value used during
- *                 lowest-priority arbitration.
- *
- *                 IF (TPR[7:4] >= IRRV[7:4] AND TPR[7:4] > ISRV[7:4])
- *                     APR[7:0] = TPR[7:0]
- *                 ELSE
- *                     APR[7:4] = max((TPR[7:4]&ISRV[7:4]),IRRV[7:4]).000
- *                 
- *             +-----------+-----------+-----------+-----------+
- * 00B0 EOI    |           |           |           |           |
- *             +-----------+-----------+-----------+-----------+
- * 00C0        |           |           |           |           |
- *             +-----------+-----------+-----------+-----------+
- * 00D0 LDR    |LOG APICID |           |           |           |
- *             +-----------+-----------+-----------+-----------+
- * 00E0 DFR    |MODEL|     |           |           |           |
- *             +-----------+-----------+-----------+-----------+
- *
- *                 The logical APIC ID is used with logical interrupt
- *                 delivery modes.  Interpretation of logical destination
- *                 information depends on the MODEL bits in the Destination
- *                 Format Regiuster.  
- *
- *                 MODEL=1111 FLAT MODEL - The MDA is interpreted as
- *                                         a decoded address.  By setting
- *                                         one bit in the LDR for each
- *                                         local apic 8 APICs can coexist.
- *
- *                 MODEL=0000 CLUSTER MODEL - 
- *
- *               31 ... 24   23 ... 16   15 ... 8     7 ... 0
- *             +-----------+-----------+-----------+-----------+
- * 00F0 SVR    |           |           |       FE  |  vvvvvvvv |
- *             +-----------+-----------+-----------+-----------+
- *
- *                 Spurious interrupt vector register.  The 4 low
- *                 vector bits must be programmed to 1111, e.g.
- *                 vvvv1111.
- *
- *                 E - LAPIC enable (0 = disable, 1 = enable)
- *
- *                 F - Focus processor disable (1 = disable, 0 = enable)
- *
- *                 NOTE: The handler for the spurious interrupt vector
- *                 should *NOT* issue an EOI because the spurious 
- *                 interrupt does not effect the ISR.
- *
- *             +-----------+-----------+-----------+-----------+
- * 0100-0170 ISR|           |           |           |           |
- * 0180-01F0 TMR|           |           |           |           |
- * 0200-0270 IRR|           |           |           |           |
- *             +-----------+-----------+-----------+-----------+
- *
- *                 These registers represent 256 bits, one bit for each
- *                 possible interrupt.  Interrupts 0-15 are reserved so
- *                 bits 0-15 are also reserved.
- *
- *                 TMR - Trigger mode register.  Upon acceptance of an int
- *                       the corresponding bit is cleared for edge-trig and
- *                       set for level-trig.  If the TMR bit is set (level),
- *                       the local APIC sends an EOI to all I/O APICs as
- *                       a result of software issuing an EOI command.
- *                       
- *                 IRR - Interrupt Request Register.  Contains active
- *                       interrupt requests that have been accepted but not
- *                       yet dispensed by the current local APIC.  The bit is
- *                       cleared and the corresponding ISR bit is set when
- *                       the INTA cycle is issued.
- *
- *                 ISR - Interrupt In-Service register.  Interrupt has been
- *                       delivered but not yet fully serviced.  Cleared when
- *                       an EOI is issued from the processor.  An EOI will
- *                       also send an EOI to all I/O APICs if TMR was set.
- *
- *             +-----------+-----------+-----------+-----------+
- * 0280 ESR    |           |           |           |           |
- * 0290-02F0    |           |           |           |           |
- *             +--FEDCBA98-+--76543210-+--FEDCBA98-+-----------+
- * 0300        ICR_LO  |           |      XX   |  TL SDMMM | vector    |
- * 0310        ICR_HI  | DEST FIELD|           |           |           |
- *             +-----------+-----------+-----------+-----------+
- *
- *                 The interrupt command register.  Generally speaking
- *                 writing to ICR_LO initiates a command.  All fields
- *                 are R/W except the 'S' (delivery status) field, which
- *                 is read-only.  When
- *     
- *
- *                     XX:     Destination Shorthand field:
- *
- *                             00      Use Destination field
- *                             01      Self only.  Dest field ignored.
- *                             10      All including self (uses a 
- *                                     destination field of 0x0F)
- *                             11      All excluding self (uses a
- *                                     destination field of 0x0F)
- *
- *                     T:      1 = Level 0 = Edge Trigger modde, used for
- *                             the INIT level de-assert delivery mode only
- *                             to de-assert a request.
- *
- *                     L:      0 = De-Assert, 1 = Assert.  Always write as
- *                             1 when initiating a new command.  Can only
- *                             write as 0 for INIT mode de-assertion of
- *                             command.
- *
- *                     S:      1 = Send Pending.  Interrupt has been injected
- *                             but APIC has not yet accepted it.
- *
- *                     D:      0=physical 1=logical.  In physical mode
- *                             only 24-27 of DEST FIELD is used from ICR_HI.
- *
- *                     MMM:    000 Fixed. Deliver to all processors according
- *                                 to the ICR.  Always treated as edge trig.
- *
- *                             001 Lowest Priority.  Deliver to just the
- *                                 processor running at the lowest priority.
- *
- *                             010 SMI.  The vector must be 00B.  Only edge
- *                                 triggered is allowed.  The vector field
- *                                 must be programmed to zero (huh?).
- *
- *                             011 <reserved>
- *
- *                             100 NMI.  Deliver as an NMI to all processors
- *                                 listed in the destination field.  The
- *                                 vector is ignored.  Alawys treated as 
- *                                 edge triggered.
- *
- *                             101 INIT.  Deliver as an INIT signal to all
- *                                 processors (like FIXED).  Vector is ignored
- *                                 and it is always edge-triggered.
- *
- *                             110 Start Up.  Sends a special message between
- *                                 cpus.  the vector contains a start-up
- *                                 address for MP boot protocol.
- *                                 Always edge triggered.  Note: a startup
- *                                 int is not automatically tried in case of
- *                                 failure.
- *
- *                             111 <reserved>
- *
- *             +-----------+--------10-+--FEDCBA98-+-----------+
- * 0320        LTIMER  |           |        TM |  ---S---- | vector    |
- * 0330                |           |           |           |           |
- *             +-----------+--------10-+--FEDCBA98-+-----------+
- * 0340        LVPCINT |           |        -M |  ---S-MMM | vector    |
- * 0350        LVINT0  |           |        -M |  LRPS-MMM | vector    |
- * 0360 LVINT1 |           |        -M |  LRPS-MMM | vector    |
- * 0370        LVERROR |           |        -M |  -------- | vector    |
- *             +-----------+-----------+-----------+-----------+
- *
- *                     T:      1 = periodic, 0 = one-shot
- *
- *                     M:      1 = masked
- *
- *                     L:      1 = level, 0 = edge
- *
- *                     R:      For level triggered only, set to 1 when a
- *                             level int is accepted, cleared by EOI.
- *
- *                     P:      Pin Polarity 0 = Active High, 1 = Active Low
- *
- *                     S:      1 = Send Pending.  Interrupt has been injected
- *                             but APIC has not yet accepted it.
- *
- *                     MMM     000 = Fixed     deliver to cpu according to LVT
- *
- *                     MMM     100 = NMI       deliver as an NMI.  Always edge
- *
- *                     MMM     111 = ExtInt    deliver from 8259, routes INTA
- *                                             bus cycle to external
- *                                             controller.  Controller is 
- *                                             expected to supply vector.
- *                                             Always level.
- *
- *             +-----------+-----------+-----------+-----------+
- * 0380        TMR_ICR |           |           |           |           |
- * 0390        TMR_CCR |           |           |           |           |
- *             +-----------+-----------+-----------+-----------+
- *
- *             The timer initial count register and current count
- *             register (32 bits)
- *
- *             +-----------+-----------+-----------+-----------+
- * 03A0                |           |           |           |           |
- * 03B0                |           |           |           |           |
- * 03C0                |           |           |           |           |
- * 03D0                |           |           |           |           |
- *             +-----------+-----------+-----------+-----------+
- * 03E0 TMR_DCR        |           |           |           |      d-dd |
- *             +-----------+-----------+-----------+-----------+
- *
- *             The timer divide configuration register.  d-dd is:
- *
- *             0000 - divide by 2
- *             0001 - divide by 4
- *             0010 - divide by 8
- *             0011 - divide by 16
- *             1000 - divide by 32
- *             1001 - divide by 64
- *             1010 - divide by 128
- *             1011 - divide by 1
- *
- *     NOTE ON EOI: Upon receiving an EOI the APIC clears the highest priority
- *     interrupt in the ISR and selects the next highest priority interrupt
- *     for posting to the CPU.  If the interrupt being EOId was level
- *     triggered the APIC will send an EOI to all I/O APICs.  For the moment
- *     you can write garbage to the EOI register but for future compatibility
- *     0 should be written.
- */
-
-#ifndef LOCORE
-#include <sys/types.h>
-
-#define PAD3   int : 32; int : 32; int : 32
-#define PAD4   int : 32; int : 32; int : 32; int : 32
-
-struct LAPIC {
-       /* reserved */          PAD4;
-       /* reserved */          PAD4;
-       u_int32_t id;           PAD3;   /* 0020 R/W */
-       u_int32_t version;      PAD3;   /* 0030 RO */
-       /* reserved */          PAD4;
-       /* reserved */          PAD4;
-       /* reserved */          PAD4;
-       /* reserved */          PAD4;
-       u_int32_t tpr;          PAD3;
-       u_int32_t apr;          PAD3;
-       u_int32_t ppr;          PAD3;
-       u_int32_t eoi;          PAD3;
-       /* reserved */          PAD4;
-       u_int32_t ldr;          PAD3;
-       u_int32_t dfr;          PAD3;
-       u_int32_t svr;          PAD3;
-       u_int32_t isr0;         PAD3;
-       u_int32_t isr1;         PAD3;
-       u_int32_t isr2;         PAD3;
-       u_int32_t isr3;         PAD3;
-       u_int32_t isr4;         PAD3;
-       u_int32_t isr5;         PAD3;
-       u_int32_t isr6;         PAD3;
-       u_int32_t isr7;         PAD3;
-       u_int32_t tmr0;         PAD3;
-       u_int32_t tmr1;         PAD3;
-       u_int32_t tmr2;         PAD3;
-       u_int32_t tmr3;         PAD3;
-       u_int32_t tmr4;         PAD3;
-       u_int32_t tmr5;         PAD3;
-       u_int32_t tmr6;         PAD3;
-       u_int32_t tmr7;         PAD3;
-       u_int32_t irr0;         PAD3;
-       u_int32_t irr1;         PAD3;
-       u_int32_t irr2;         PAD3;
-       u_int32_t irr3;         PAD3;
-       u_int32_t irr4;         PAD3;
-       u_int32_t irr5;         PAD3;
-       u_int32_t irr6;         PAD3;
-       u_int32_t irr7;         PAD3;
-       u_int32_t esr;          PAD3;
-       /* reserved */          PAD4;
-       /* reserved */          PAD4;
-       /* reserved */          PAD4;
-       /* reserved */          PAD4;
-       /* reserved */          PAD4;
-       /* reserved */          PAD4;
-       /* reserved */          PAD4;
-       u_int32_t icr_lo;       PAD3;
-       u_int32_t icr_hi;       PAD3;
-       u_int32_t lvt_timer;    PAD3;
-       /* reserved */          PAD4;
-       u_int32_t lvt_pcint;    PAD3;
-       u_int32_t lvt_lint0;    PAD3;
-       u_int32_t lvt_lint1;    PAD3;
-       u_int32_t lvt_error;    PAD3;
-       u_int32_t icr_timer;    PAD3;
-       u_int32_t ccr_timer;    PAD3;
-       /* reserved */          PAD4;
-       /* reserved */          PAD4;
-       /* reserved */          PAD4;
-       /* reserved */          PAD4;
-       u_int32_t dcr_timer;    PAD3;
-       /* reserved */          PAD4;
-};
-
-typedef struct LAPIC lapic_t;
-
-/******************************************************************************
- * I/O APIC structure
- */
-
-struct IOAPIC {
-       u_int32_t ioregsel;     PAD3;
-       u_int32_t iowin;        PAD3;
-};
-
-typedef struct IOAPIC ioapic_t;
-
-#undef PAD4
-#undef PAD3
-
-#endif  /* !LOCORE */
-
-
-/******************************************************************************
- * various code 'logical' values
- */
-
-/*
- * TPR loads to prioritize which cpu grabs an interrupt
- *
- * (note: some fields of the TPR are reserved)
- */
-#define LOPRIO_LEVEL           0x00000010      /* TPR of CPU accepting INTs */
-#define ALLHWI_LEVEL           0x00000000      /* TPR of CPU grabbing INTs */
-
-/******************************************************************************
- * LOCAL APIC defines
- */
-
-/*
- * default physical location for the LOCAL (CPU) APIC
- */
-#define DEFAULT_APIC_BASE      0xfee00000
-
-/*
- * lapic.id (rw)
- */
-#define APIC_ID_MASK           0xff000000
-#define APIC_ID_SHIFT          24
-#define APIC_ID_CLUSTER                0xf0
-#define APIC_ID_CLUSTER_ID     0x0f
-#define APIC_MAX_CLUSTER       0xe
-#define APIC_MAX_INTRACLUSTER_ID 3
-#define APIC_ID_CLUSTER_SHIFT   4
-
-#define APIC_ID(id)            (((id) & APIC_ID_MASK) >> APIC_ID_SHIFT)
-
-/*
- * lapic.ver (ro)
- */
-#define APIC_VER_VERSION       0x000000ff
-#define APIC_VER_MAXLVT                0x00ff0000
-#define MAXLVTSHIFT            16
-
-/*
- * lapic.ldr (rw)
- */
-#define APIC_LDR_RESERVED       0x00ffffff
-
-/*
- * lapic.dfr (rw)
- *
- * The logical APIC ID is used with logical interrupt
- * delivery modes.  Interpretation of logical destination
- * information depends on the MODEL bits in the Destination
- * Format Regiuster.
- *
- * MODEL=1111 FLAT MODEL - The MDA is interpreted as
- *                        a decoded address.  By setting
- *                        one bit in the LDR for each
- *                        local apic 8 APICs can coexist.
- *  
- * MODEL=0000 CLUSTER MODEL -
- */
-#define APIC_DFR_RESERVED      0x0fffffff
-#define APIC_DFR_MODEL_MASK    0xf0000000
-#define APIC_DFR_MODEL_FLAT    0xf0000000
-#define APIC_DFR_MODEL_CLUSTER 0x00000000
-
-/*
- * lapic.svr
- *
- * Contains the spurious interrupt vector and bits to enable/disable
- * the local apic and focus processor.
- */
-#define APIC_SVR_VECTOR                0x000000ff
-#define APIC_SVR_ENABLE                0x00000100
-#define APIC_SVR_FOCUS_DISABLE 0x00000200
-
-/*
- * lapic.tpr
- *
- *    PRIO (7:4).  Main priority.  If 15 the APIC will not
- *              accept any interrupts.
- *    SUBC (3:0)        Sub priority.  See APR/PPR.
- */
-#define APIC_TPR_PRIO          0x000000ff
-#define APIC_TPR_INT           0x000000f0
-#define APIC_TPR_SUB           0x0000000f
-
-/*
- * lapic.icr_lo          -------- ----XXRR TL-SDMMM vvvvvvvv
- * 
- *     The interrupt command register.  Generally speaking
- *     writing to ICR_LO initiates a command.  All fields
- *     are R/W except the 'S' (delivery status) field, which
- *     is read-only.  When
- *              
- *      XX:     Destination Shorthand field:
- *
- *             00 -    Use Destination field
- *             01 -    Self only.  Dest field ignored.
- *             10 -    All including self (uses a
- *                     destination field of 0x0F)
- *             11 -    All excluding self (uses a
- *                     destination field of 0x0F)
- *
- *     RR:     RR mode (? needs documentation)
- *                  
- *      T:      1 = Level 0 = Edge Trigger modde, used for
- *             the INIT level de-assert delivery mode only
- *             to de-assert a request.
- * 
- *     L:      0 = De-Assert, 1 = Assert.  Always write as
- *             1 when initiating a new command.  Can only
- *             write as 0 for INIT mode de-assertion of
- *             command.
- *
- *     S:      1 = Send Pending.  Interrupt has been injected but the APIC
- *             has not yet accepted it.
- * 
- *     D:      0 = physical 1 = logical.  In physical mode only bits 24-27
- *             of the DEST field is used from ICR_HI.
- *
- *     MMM:    Delivery mode
- *
- *             000 - Fixed.  Deliver to all processors according to the
- *                   ICR.  Always treated as edge triggered.
- *
- *             001 - Lowest Priority.  Deliver to just the processor
- *                   running at the lowest priority.
- *
- *             010 - SMI.  The vector must be 00B.  Only edge triggered
- *                   is allowed.  The vector field must be programmed to
- *                   0 (huh?)
- *
- *             011 - RR Delivery mode (?? needs documentation).
- *
- *             100 - NMI.  Deliver as an NMI to all processors listed in
- *                   the destination field.  The vector is ignored.  Always
- *                   treated as edge triggered.
- *
- *             101 - INIT.  Deliver as an INIT signal to all processors
- *                   (like FIXED) according to the ICR.  The vector is
- *                   ignored and delivery is always edge-triggered.
- *
- *             110 - Startup.  Send a special message between cpus.  The
- *                   vector contains a startup address for the MP boot
- *                   protocol.  Always edge triggered.  Note: a startup
- *                   interrupt is not automatically tried in case of failure.
- *
- *             111 - <reserved>
- */
-#define APIC_VECTOR_MASK       0x000000ff
-
-#define APIC_DELMODE_MASK      0x00000700
-#define APIC_DELMODE_FIXED     0x00000000
-#define APIC_DELMODE_LOWPRIO   0x00000100
-#define APIC_DELMODE_SMI       0x00000200
-#define APIC_DELMODE_RR                0x00000300
-#define APIC_DELMODE_NMI       0x00000400
-#define APIC_DELMODE_INIT      0x00000500
-#define APIC_DELMODE_STARTUP   0x00000600
-#define APIC_DELMODE_RESV7     0x00000700
-
-#define APIC_DESTMODE_MASK     0x00000800
-#define APIC_DESTMODE_PHY      0x00000000
-#define APIC_DESTMODE_LOG      0x00000800
-
-#define APIC_DELSTAT_MASK      0x00001000
-#define APIC_DELSTAT_IDLE      0x00000000
-#define APIC_DELSTAT_PEND      0x00001000
-
-#define APIC_LEVEL_MASK                0x00004000
-#define APIC_LEVEL_DEASSERT    0x00000000
-#define APIC_LEVEL_ASSERT      0x00004000
-
-#define APIC_TRIGMOD_MASK      0x00008000
-#define APIC_TRIGMOD_EDGE      0x00000000
-#define APIC_TRIGMOD_LEVEL     0x00008000
-
-#define APIC_RRSTAT_MASK       0x00030000
-#define APIC_RRSTAT_INVALID    0x00000000
-#define APIC_RRSTAT_INPROG     0x00010000
-#define APIC_RRSTAT_VALID      0x00020000
-#define APIC_RRSTAT_RESV       0x00030000
-
-#define APIC_DEST_MASK         0x000c0000
-#define APIC_DEST_DESTFLD      0x00000000
-#define APIC_DEST_SELF         0x00040000
-#define APIC_DEST_ALLISELF     0x00080000
-#define APIC_DEST_ALLESELF     0x000c0000
-
-#define APIC_ICRLO_RESV_MASK   0xfff02000
-
-/*
- * lapic.icr_hi
- */
-#define APIC_ICRH_ID_MASK      APIC_ID_MASK
-
-/*
- * lapic.lvt_timer
- * lapic.lvt_pcint
- * lapic.lvt_lint0
- * lapic.lvt_lint1
- * lapic.lvt_error
- *
- *             +-----------+--------10-+--FEDCBA98-+-----------+
- * 0320        LTIMER  |           |        TM |  ---S---- | vector    |
- * 0330                |           |           |           |           |
- *             +-----------+--------10-+--FEDCBA98-+-----------+
- * 0340        LVPCINT |           |        -M |  ---S-MMM | vector    |
- * 0350        LVINT0  |           |        -M |  LRPS-MMM | vector    |
- * 0360 LVINT1 |           |        -M |  LRPS-MMM | vector    |
- * 0370        LVERROR |           |        -M |  -------- | vector    |
- *             +-----------+-----------+-----------+-----------+
- *
- *                     T:      1 = periodic, 0 = one-shot
- *                             (LTIMER only)
- *
- *                     M:      1 = masked
- *
- *                     L:      1 = level, 0 = edge
- *                             (LVINT0/1 only)
- *
- *                     R:      For level triggered only, set to 1 when a
- *                             level int is accepted, cleared by EOI.
- *                             (LVINT0/1 only)
- *
- *                     P:      Pin Polarity 0 = Active High, 1 = Active Low
- *                             (LVINT0/1 only)
- *
- *                     S:      1 = Send Pending.  Interrupt has been injected
- *                             but APIC has not yet accepted it.
- *
- *                     MMM     000 = Fixed     deliver to cpu according to LVT
- *
- *                     MMM     100 = NMI       deliver as an NMI.  Always edge
- *
- *                     MMM     111 = ExtInt    deliver from 8259, routes INTA
- *                                             bus cycle to external
- *                                             controller.  Controller is 
- *                                             expected to supply vector.
- *                                             Always level.
- */
-#define APIC_LVT_VECTOR                0x000000ff
-
-#define APIC_LVT_DM_MASK       0x00000700
-#define APIC_LVT_DM_FIXED      0x00000000
-#define APIC_LVT_DM_NMI                0x00000400
-#define APIC_LVT_DM_EXTINT     0x00000700
-
-#define APIC_LVT_DS            0x00001000      /* (S) Send Pending */
-#define APIC_LVT_POLARITY_MASK 0x00002000
-#define APIC_LVT_POLARITY_LO   0x00002000      /* (P) Pin Polarity */
-#define APIC_LVT_POLARITY_HI   0x00000000
-#define APIC_LVT_LEVELSTATUS   0x00004000      /* (R) level trig status */
-#define APIC_LVT_TRIG_MASK     0x00008000
-#define APIC_LVT_LEVELTRIG     0x00008000      /* (L) 1 = level, 0 = edge */
-#define APIC_LVT_MASKED                0x00010000      /* (M) 1 = masked */
-
-/*
- * lapic.lvt_timer
- */
-#define APIC_LVTT_VECTOR       APIC_LVT_VECTOR
-#define APIC_LVTT_DS           APIC_LVT_DS
-#define APIC_LVTT_MASKED       APIC_LVT_MASKED
-#define APIC_LVTT_PERIODIC     0x00020000
-
-#define APIC_TIMER_MAX_COUNT    0xffffffff
-
-/*
- * lapic.icr_timer - initial count register (32 bits)
- * lapic.ccr_timer - current count register (32 bits)
- */
-
-/*
- * lapic.dcr_timer - timer divider register
- *
- * d0dd
- *
- *     0000 - divide by 2
- *     0001 - divide by 4
- *     0010 - divide by 8
- *     0011 - divide by 16
- *     1000 - divide by 32
- *     1001 - divide by 64
- *     1010 - divide by 128
- *     1011 - divide by 1
- */
-#define APIC_TDCR_2            0x00
-#define APIC_TDCR_4            0x01
-#define APIC_TDCR_8            0x02
-#define APIC_TDCR_16           0x03
-#define APIC_TDCR_32           0x08
-#define APIC_TDCR_64           0x09
-#define APIC_TDCR_128          0x0a
-#define APIC_TDCR_1            0x0b
-
-/******************************************************************************
- * I/O APIC defines
- */
-
-/* default physical locations of an IO APIC */
-#define DEFAULT_IO_APIC_BASE   0xfec00000
-
-/* window register offset */
-#define IOAPIC_WINDOW          0x10
-
-/* 
- * indexes into IO APIC (index into array of 32 bit entities)
- */
-#define IOAPIC_ID              0x00
-#define IOAPIC_VER             0x01
-#define IOAPIC_ARB             0x02
-#define IOAPIC_REDTBL          0x10
-#define IOAPIC_REDTBL0         IOAPIC_REDTBL
-#define IOAPIC_REDTBL1         (IOAPIC_REDTBL+0x02)
-#define IOAPIC_REDTBL2         (IOAPIC_REDTBL+0x04)
-#define IOAPIC_REDTBL3         (IOAPIC_REDTBL+0x06)
-#define IOAPIC_REDTBL4         (IOAPIC_REDTBL+0x08)
-#define IOAPIC_REDTBL5         (IOAPIC_REDTBL+0x0a)
-#define IOAPIC_REDTBL6         (IOAPIC_REDTBL+0x0c)
-#define IOAPIC_REDTBL7         (IOAPIC_REDTBL+0x0e)
-#define IOAPIC_REDTBL8         (IOAPIC_REDTBL+0x10)
-#define IOAPIC_REDTBL9         (IOAPIC_REDTBL+0x12)
-#define IOAPIC_REDTBL10                (IOAPIC_REDTBL+0x14)
-#define IOAPIC_REDTBL11                (IOAPIC_REDTBL+0x16)
-#define IOAPIC_REDTBL12                (IOAPIC_REDTBL+0x18)
-#define IOAPIC_REDTBL13                (IOAPIC_REDTBL+0x1a)
-#define IOAPIC_REDTBL14                (IOAPIC_REDTBL+0x1c)
-#define IOAPIC_REDTBL15                (IOAPIC_REDTBL+0x1e)
-#define IOAPIC_REDTBL16                (IOAPIC_REDTBL+0x20)
-#define IOAPIC_REDTBL17                (IOAPIC_REDTBL+0x22)
-#define IOAPIC_REDTBL18                (IOAPIC_REDTBL+0x24)
-#define IOAPIC_REDTBL19                (IOAPIC_REDTBL+0x26)
-#define IOAPIC_REDTBL20                (IOAPIC_REDTBL+0x28)
-#define IOAPIC_REDTBL21                (IOAPIC_REDTBL+0x2a)
-#define IOAPIC_REDTBL22                (IOAPIC_REDTBL+0x2c)
-#define IOAPIC_REDTBL23                (IOAPIC_REDTBL+0x2e)
-
-/* fields in VER */
-#define IOART_VER_VERSION      0x000000ff
-#define IOART_VER_MAXREDIR     0x00ff0000
-#define MAXREDIRSHIFT          16
-
-/*
- * fields in the IO APIC's redirection table entries
- */
-
-/*
- * High 32 bit word.  The high 8 bits contain the destination field.
- *
- * If this entry is set up for Physical Mode, bits 59:56 (the low 4 bits
- * of the 8 bit destination field) contain an APIC ID.
- *
- * If this entry is set up for Logical Mode, the destination field potentially
- * defines a set of processors.  Bits 63:56 (all 8 bits) specify the logical
- * destination address.
- *
- * Current we use IOART_HI_DEST_BROADCAST to broadcast to all LAPICs
- */
-#define IOART_HI_DEST_MASK     APIC_ID_MASK
-#define IOART_HI_DEST_RESV     ~APIC_ID_MASK
-#define IOART_HI_DEST_BROADCAST        IOART_HI_DEST_MASK      
-#define IOART_HI_DEST_SHIFT    24
-
-/*
- * Low 32 bit word
- */
-#define IOART_RESV     0x00fe0000      /* reserved */
-
-/*
- * Interrupt mask bit.  If 1 the interrupt is masked.  An edge sensitive
- * interrupt which is masked will be lost.
- */
-#define IOART_INTMASK  0x00010000      /* R/W: INTerrupt mask */
-#define IOART_INTMCLR  0x00000000      /*       clear, allow INTs */
-#define IOART_INTMSET  0x00010000      /*       set, inhibit INTs */
-
-/*
- * Select trigger mode.
- */
-#define IOART_TRGRMOD  0x00008000      /* R/W: trigger mode */
-#define IOART_TRGREDG  0x00000000      /*       edge */
-#define IOART_TRGRLVL  0x00008000      /*       level */
-
-/*
- * Remote IRR.  Only applies to level triggered interrupts, this bit 
- * is set to 1 when the IOAPIC has delivered a level triggered interrupt
- * to a local APIC.  It is cleared when the LAPIC EOI's the interrupt.
- * This field is read-only.
- */
-#define IOART_REM_IRR  0x00004000      /* RO: remote IRR */
-
-/*
- * Select interrupt pin polarity
- */
-#define IOART_INTPOL   0x00002000      /* R/W: INT input pin polarity */
-#define IOART_INTAHI   0x00000000      /*      active high */
-#define IOART_INTALO   0x00002000      /*      active low */
-
-/*
- * Delivery Status (read only).  0 = no interrupt pending, 1 = interrupt
- * pending for tranmission to an LAPIC.  Note that this bit does not 
- * indicate whether the interrupt has been processed or is undergoing 
- * processing by a cpu.
- */
-#define IOART_DELIVS   0x00001000      /* RO: delivery status */
-
-/*
- * Destination mode.
- *
- * In physical mode the destination APIC is identified by its ID.
- * Bits 56-59 specify the 4 bit APIC ID.  
- *
- * In logical mode destinations are identified by matching on the logical
- * destination under the control of the destination format register and 
- * logical destination register in each local APIC.
- *
- */
-#define IOART_DESTMOD  0x00000800      /* R/W: destination mode */
-#define IOART_DESTPHY  0x00000000      /*      physical */
-#define IOART_DESTLOG  0x00000800      /*      logical */
-
-/*
- * Delivery mode.
- *
- *     000     Fixed           Deliver the signal on the INTR signal for
- *                             all processor core's LAPICs listed in the 
- *                             destination.  The trigger mode may be
- *                             edge or level.
- *
- *     001     Lowest Pri      Deliver to the processor core whos LAPIC
- *                             is operating at the lowest priority (TPR).
- *                             The trigger mode may be edge or level.
- *
- *     010     SMI             System management interrupt.  the vector
- *                             information is ignored but must be programmed
- *                             to all zero's for future compatibility.
- *                             Must be edge triggered.
- *
- *     011     Reserved
- *
- *     100     NMI             Deliver on the NMI signal for all cpu cores
- *                             listed in the destination.  Vector information
- *                             is ignored.  NMIs are treated as edge triggered
- *                             interrupts even if programmed as level 
- *                             triggered.  For proper operation the pin must
- *                             be programmed as an edge trigger.
- *
- *     101     INIT            Deliver to all processor cores listed in
- *                             the destination by asserting their INIT signal.
- *                             All addressed LAPICs will assume their INIT
- *                             state.  Always treated as edge-triggered even
- *                             if programmed as level.  For proper operation
- *                             the pin must be programed as an edge trigger.
- *
- *     110     Reserved
- *
- *     111     ExINT           Deliver as an INTR signal to all processor
- *                             cores listed in the destination as an 
- *                             interrupt originating in an externally
- *                             connected interrupt controller.
- *                             The INTA cycle corresponding to this ExINT
- *                             will be routed to the external controller
- *                             that is expected to supply the vector. 
- *                             Must be edge triggered.
- *                     
- */
-#define IOART_DELMOD   0x00000700      /* R/W: delivery mode */
-#define IOART_DELFIXED 0x00000000      /*       fixed */
-#define IOART_DELLOPRI 0x00000100      /*       lowest priority */
-#define IOART_DELSMI   0x00000200      /*       System Management INT */
-#define IOART_DELRSV1  0x00000300      /*       reserved */
-#define IOART_DELNMI   0x00000400      /*       NMI signal */
-#define IOART_DELINIT  0x00000500      /*       INIT signal */
-#define IOART_DELRSV2  0x00000600      /*       reserved */
-#define IOART_DELEXINT 0x00000700      /*       External INTerrupt */
-
-/*
- * The interrupt vector.  Valid values range from 0x10 to 0xFE.
- */
-#define IOART_INTVEC   0x000000ff      /* R/W: INTerrupt vector field */
-
-#endif /* _MACHINE_APIC_H_ */
diff --git a/sys/platform/pc32/apic/apicvar.h b/sys/platform/pc32/apic/apicvar.h
deleted file mode 100644 (file)
index 80c035d..0000000
+++ /dev/null
@@ -1,48 +0,0 @@
-/*-
- * Copyright (c) 2003 John Baldwin <jhb@FreeBSD.org>
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 3. Neither the name of the author nor the names of any co-contributors
- *    may be used to endorse or promote products derived from this software
- *    without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * $FreeBSD: src/sys/i386/include/apicvar.h,v 1.5 2003/11/14 22:21:30 peter Exp $
- * $DragonFly: src/sys/platform/pc32/apic/apicvar.h,v 1.4 2007/04/30 16:45:55 dillon Exp $
- */
-
-#ifndef _MACHINE_APICVAR_H_
-#define _MACHINE_APICVAR_H_
-
-/*
- * Size of APIC ID list.
- * Also used a MAX size of various other arrays.
- */
-#define NAPICID                256
-
-/*
- * APICID must be less than this value
- * 255 is for "broadcast to all APICs"
- */
-#define APICID_MAX     255
-
-#endif /* _MACHINE_APICVAR_H_ */
diff --git a/sys/platform/pc32/apic/ioapic.c b/sys/platform/pc32/apic/ioapic.c
deleted file mode 100644 (file)
index fc3eb2f..0000000
+++ /dev/null
@@ -1,620 +0,0 @@
-/*
- * Copyright (c) 1996, by Steve Passe
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. The name of the developer may NOT be used to endorse or promote products
- *    derived from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * $FreeBSD: src/sys/i386/i386/mpapic.c,v 1.37.2.7 2003/01/25 02:31:47 peter Exp $
- */
-
-#include <sys/param.h>
-#include <sys/systm.h>
-#include <sys/kernel.h>
-#include <sys/bus.h>
-#include <sys/machintr.h>
-#include <sys/thread2.h>
-
-#include <machine/pmap.h>
-#include <machine_base/isa/isa_intr.h>
-#include <machine_base/icu/icu_var.h>
-#include <machine_base/apic/lapic.h>
-#include <machine_base/apic/ioapic.h>
-#include <machine_base/apic/ioapic_abi.h>
-#include <machine_base/apic/apicvar.h>
-
-#define IOAPIC_COUNT_MAX       16
-#define IOAPIC_ID_MASK         (IOAPIC_COUNT_MAX - 1)
-
-struct ioapic_info {
-       int             io_idx;
-       int             io_apic_id;
-       void            *io_addr;
-       int             io_npin;
-       int             io_gsi_base;
-
-       TAILQ_ENTRY(ioapic_info) io_link;
-};
-TAILQ_HEAD(ioapic_info_list, ioapic_info);
-
-struct ioapic_intsrc {
-       int             int_gsi;
-       enum intr_trigger int_trig;
-       enum intr_polarity int_pola;
-};
-
-struct ioapic_conf {
-       struct ioapic_info_list ioc_list;
-       struct ioapic_intsrc ioc_intsrc[ISA_IRQ_CNT];
-};
-
-static int     ioapic_config(void);
-static void    ioapic_setup(const struct ioapic_info *);
-static int     ioapic_alloc_apic_id(int);
-static void    ioapic_set_apic_id(const struct ioapic_info *);
-static void    ioapic_gsi_setup(int);
-static const struct ioapic_info *
-               ioapic_gsi_search(int);
-static void    ioapic_pin_prog(void *, int, int,
-                   enum intr_trigger, enum intr_polarity, uint32_t, int);
-
-static struct ioapic_conf      ioapic_conf;
-
-static TAILQ_HEAD(, ioapic_enumerator) ioapic_enumerators =
-       TAILQ_HEAD_INITIALIZER(ioapic_enumerators);
-
-int            ioapic_enable = -1; /* I/O APIC auto-enable mode */
-
-static int
-ioapic_config(void)
-{
-       struct ioapic_info *info;
-       int start_apic_id = 0;
-       struct ioapic_enumerator *e;
-       int error, i, probe;
-       u_long ef = 0;
-
-       TAILQ_INIT(&ioapic_conf.ioc_list);
-       for (i = 0; i < ISA_IRQ_CNT; ++i)
-               ioapic_conf.ioc_intsrc[i].int_gsi = -1;
-
-       probe = 1;
-       TUNABLE_INT_FETCH("hw.ioapic_probe", &probe);
-       if (!probe) {
-               kprintf("IOAPIC: warning I/O APIC will not be probed\n");
-               return ENXIO;
-       }
-
-       TAILQ_FOREACH(e, &ioapic_enumerators, ioapic_link) {
-               error = e->ioapic_probe(e);
-               if (!error)
-                       break;
-       }
-       if (e == NULL) {
-               kprintf("IOAPIC: can't find I/O APIC\n");
-               return ENXIO;
-       }
-
-       crit_enter();
-
-       ef = read_eflags();
-       cpu_disable_intr();
-
-       /*
-        * Switch to I/O APIC MachIntrABI and reconfigure
-        * the default IDT entries.
-        */
-       MachIntrABI = MachIntrABI_IOAPIC;
-       MachIntrABI.setdefault();
-
-       e->ioapic_enumerate(e);
-
-       /*
-        * Setup index
-        */
-       i = 0;
-       TAILQ_FOREACH(info, &ioapic_conf.ioc_list, io_link)
-               info->io_idx = i++;
-
-       if (i > IOAPIC_COUNT_MAX)
-               panic("ioapic_config: more than 16 I/O APIC");
-
-       /*
-        * Setup APIC ID
-        */
-       TAILQ_FOREACH(info, &ioapic_conf.ioc_list, io_link) {
-               int apic_id;
-
-               apic_id = ioapic_alloc_apic_id(start_apic_id);
-               if (apic_id == NAPICID) {
-                       kprintf("IOAPIC: can't alloc APIC ID for "
-                               "%dth I/O APIC\n", info->io_idx);
-                       break;
-               }
-               info->io_apic_id = apic_id;
-
-               start_apic_id = apic_id + 1;
-       }
-       if (info != NULL) {
-               /*
-                * xAPIC allows I/O APIC's APIC ID to be same
-                * as the LAPIC's APIC ID
-                */
-               kprintf("IOAPIC: use xAPIC model to alloc APIC ID "
-                       "for I/O APIC\n");
-
-               TAILQ_FOREACH(info, &ioapic_conf.ioc_list, io_link)
-                       info->io_apic_id = info->io_idx;
-       }
-
-       /*
-        * Warning about any GSI holes
-        */
-       TAILQ_FOREACH(info, &ioapic_conf.ioc_list, io_link) {
-               const struct ioapic_info *prev_info;
-
-               prev_info = TAILQ_PREV(info, ioapic_info_list, io_link);
-               if (prev_info != NULL) {
-                       if (info->io_gsi_base !=
-                       prev_info->io_gsi_base + prev_info->io_npin) {
-                               kprintf("IOAPIC: warning gsi hole "
-                                       "[%d, %d]\n",
-                                       prev_info->io_gsi_base +
-                                       prev_info->io_npin,
-                                       info->io_gsi_base - 1);
-                       }
-               }
-       }
-
-       if (bootverbose) {
-               TAILQ_FOREACH(info, &ioapic_conf.ioc_list, io_link) {
-                       kprintf("IOAPIC: idx %d, apic id %d, "
-                               "gsi base %d, npin %d\n",
-                               info->io_idx,
-                               info->io_apic_id,
-                               info->io_gsi_base,
-                               info->io_npin);
-               }
-       }
-
-       /*
-        * Setup all I/O APIC
-        */
-       TAILQ_FOREACH(info, &ioapic_conf.ioc_list, io_link)
-               ioapic_setup(info);
-       ioapic_fixup_legacy_irqmaps();
-
-       write_eflags(ef);
-
-       MachIntrABI.cleanup();
-
-       crit_exit();
-
-       return 0;
-}
-
-void
-ioapic_enumerator_register(struct ioapic_enumerator *ne)
-{
-       struct ioapic_enumerator *e;
-
-       TAILQ_FOREACH(e, &ioapic_enumerators, ioapic_link) {
-               if (e->ioapic_prio < ne->ioapic_prio) {
-                       TAILQ_INSERT_BEFORE(e, ne, ioapic_link);
-                       return;
-               }
-       }
-       TAILQ_INSERT_TAIL(&ioapic_enumerators, ne, ioapic_link);
-}
-
-void
-ioapic_add(void *addr, int gsi_base, int npin)
-{
-       struct ioapic_info *info, *ninfo;
-       int gsi_end;
-
-       gsi_end = gsi_base + npin - 1;
-       TAILQ_FOREACH(info, &ioapic_conf.ioc_list, io_link) {
-               if ((gsi_base >= info->io_gsi_base &&
-                    gsi_base < info->io_gsi_base + info->io_npin) ||
-                   (gsi_end >= info->io_gsi_base &&
-                    gsi_end < info->io_gsi_base + info->io_npin)) {
-                       panic("ioapic_add: overlapped gsi, base %d npin %d, "
-                             "hit base %d, npin %d\n", gsi_base, npin,
-                             info->io_gsi_base, info->io_npin);
-               }
-               if (info->io_addr == addr)
-                       panic("ioapic_add: duplicated addr %p", addr);
-       }
-
-       ninfo = kmalloc(sizeof(*ninfo), M_DEVBUF, M_WAITOK | M_ZERO);
-       ninfo->io_addr = addr;
-       ninfo->io_npin = npin;
-       ninfo->io_gsi_base = gsi_base;
-       ninfo->io_apic_id = -1;
-
-       /*
-        * Create IOAPIC list in ascending order of GSI base
-        */
-       TAILQ_FOREACH_REVERSE(info, &ioapic_conf.ioc_list,
-           ioapic_info_list, io_link) {
-               if (ninfo->io_gsi_base > info->io_gsi_base) {
-                       TAILQ_INSERT_AFTER(&ioapic_conf.ioc_list,
-                           info, ninfo, io_link);
-                       break;
-               }
-       }
-       if (info == NULL)
-               TAILQ_INSERT_HEAD(&ioapic_conf.ioc_list, ninfo, io_link);
-}
-
-void
-ioapic_intsrc(int irq, int gsi, enum intr_trigger trig, enum intr_polarity pola)
-{
-       struct ioapic_intsrc *int_src;
-
-       KKASSERT(irq < ISA_IRQ_CNT);
-       int_src = &ioapic_conf.ioc_intsrc[irq];
-
-       if (gsi == 0) {
-               /* Don't allow mixed mode */
-               kprintf("IOAPIC: warning intsrc irq %d -> gsi 0\n", irq);
-               return;
-       }
-
-       if (int_src->int_gsi != -1) {
-               if (int_src->int_gsi != gsi) {
-                       kprintf("IOAPIC: warning intsrc irq %d, gsi "
-                               "%d -> %d\n", irq, int_src->int_gsi, gsi);
-               }
-               if (int_src->int_trig != trig) {
-                       kprintf("IOAPIC: warning intsrc irq %d, trig "
-                               "%s -> %s\n", irq,
-                               intr_str_trigger(int_src->int_trig),
-                               intr_str_trigger(trig));
-               }
-               if (int_src->int_pola != pola) {
-                       kprintf("IOAPIC: warning intsrc irq %d, pola "
-                               "%s -> %s\n", irq,
-                               intr_str_polarity(int_src->int_pola),
-                               intr_str_polarity(pola));
-               }
-       }
-       int_src->int_gsi = gsi;
-       int_src->int_trig = trig;
-       int_src->int_pola = pola;
-}
-
-static void
-ioapic_set_apic_id(const struct ioapic_info *info)
-{
-       uint32_t id;
-       int apic_id;
-
-       id = ioapic_read(info->io_addr, IOAPIC_ID);
-
-       id &= ~APIC_ID_MASK;
-       id |= (info->io_apic_id << 24);
-
-       ioapic_write(info->io_addr, IOAPIC_ID, id);
-
-       /*
-        * Re-read && test
-        */
-       id = ioapic_read(info->io_addr, IOAPIC_ID);
-       apic_id = (id & APIC_ID_MASK) >> 24;
-
-       /*
-        * I/O APIC ID is a 4bits field
-        */
-       if ((apic_id & IOAPIC_ID_MASK) !=
-           (info->io_apic_id & IOAPIC_ID_MASK)) {
-               panic("ioapic_set_apic_id: can't set apic id to %d, "
-                     "currently set to %d\n", info->io_apic_id, apic_id);
-       }
-}
-
-static void
-ioapic_gsi_setup(int gsi)
-{
-       enum intr_trigger trig;
-       enum intr_polarity pola;
-       int irq;
-
-       if (gsi == 0) {
-               /* ExtINT */
-               imen_lock();
-               ioapic_extpin_setup(ioapic_gsi_ioaddr(gsi),
-                   ioapic_gsi_pin(gsi), 0);
-               imen_unlock();
-               return;
-       }
-
-       trig = 0;       /* silence older gcc's */
-       pola = 0;       /* silence older gcc's */
-
-       for (irq = 0; irq < ISA_IRQ_CNT; ++irq) {
-               const struct ioapic_intsrc *int_src =
-                   &ioapic_conf.ioc_intsrc[irq];
-
-               if (gsi == int_src->int_gsi) {
-                       trig = int_src->int_trig;
-                       pola = int_src->int_pola;
-                       break;
-               }
-       }
-
-       if (irq == ISA_IRQ_CNT) {
-               /*
-                * No explicit IRQ to GSI mapping;
-                * use the default 1:1 mapping
-                */
-               irq = gsi;
-               if (irq < ISA_IRQ_CNT) {
-                       if (ioapic_conf.ioc_intsrc[irq].int_gsi >= 0) {
-                               /*
-                                * This IRQ is mapped to different GSI,
-                                * don't do the default configuration.
-                                * The configuration of the target GSI
-                                * will finally setup this IRQ.
-                                *
-                                * This GSI is not used, disable it.
-                                */
-                               imen_lock();
-                               ioapic_pin_setup(ioapic_gsi_ioaddr(gsi),
-                                   ioapic_gsi_pin(gsi), 0,
-                                   INTR_TRIGGER_EDGE, INTR_POLARITY_HIGH, 0);
-                               imen_unlock();
-                               return;
-                       }
-                       trig = INTR_TRIGGER_EDGE;
-                       pola = INTR_POLARITY_HIGH;
-               } else {
-                       trig = INTR_TRIGGER_LEVEL;
-                       pola = INTR_POLARITY_LOW;
-               }
-       }
-
-       ioapic_set_legacy_irqmap(irq, gsi, trig, pola);
-}
-
-void *
-ioapic_gsi_ioaddr(int gsi)
-{
-       const struct ioapic_info *info;
-
-       info = ioapic_gsi_search(gsi);
-       return info->io_addr;
-}
-
-int
-ioapic_gsi_pin(int gsi)
-{
-       const struct ioapic_info *info;
-
-       info = ioapic_gsi_search(gsi);
-       return gsi - info->io_gsi_base;
-}
-
-static const struct ioapic_info *
-ioapic_gsi_search(int gsi)
-{
-       const struct ioapic_info *info;
-
-       TAILQ_FOREACH(info, &ioapic_conf.ioc_list, io_link) {
-               if (gsi >= info->io_gsi_base &&
-                   gsi < info->io_gsi_base + info->io_npin)
-                       return info;
-       }
-       panic("ioapic_gsi_search: no I/O APIC");
-}
-
-int
-ioapic_gsi(int idx, int pin)
-{
-       const struct ioapic_info *info;
-
-       TAILQ_FOREACH(info, &ioapic_conf.ioc_list, io_link) {
-               if (info->io_idx == idx)
-                       break;
-       }
-       if (info == NULL)
-               return -1;
-       if (pin >= info->io_npin)
-               return -1;
-       return info->io_gsi_base + pin;
-}
-
-void
-ioapic_extpin_setup(void *addr, int pin, int vec)
-{
-       ioapic_pin_prog(addr, pin, vec,
-           INTR_TRIGGER_CONFORM, INTR_POLARITY_CONFORM, IOART_DELEXINT, 0);
-}
-
-int
-ioapic_extpin_gsi(void)
-{
-       return 0;
-}
-
-void
-ioapic_pin_setup(void *addr, int pin, int vec,
-    enum intr_trigger trig, enum intr_polarity pola, int cpuid)
-{
-       /*
-        * Always clear an I/O APIC pin before [re]programming it.  This is
-        * particularly important if the pin is set up for a level interrupt
-        * as the IOART_REM_IRR bit might be set.   When we reprogram the
-        * vector any EOI from pending ints on this pin could be lost and
-        * IRR might never get reset.
-        *
-        * To fix this problem, clear the vector and make sure it is 
-        * programmed as an edge interrupt.  This should theoretically
-        * clear IRR so we can later, safely program it as a level 
-        * interrupt.
-        */
-       ioapic_pin_prog(addr, pin, vec, INTR_TRIGGER_EDGE, INTR_POLARITY_HIGH,
-           IOART_DELFIXED, cpuid);
-       ioapic_pin_prog(addr, pin, vec, trig, pola, IOART_DELFIXED, cpuid);
-}
-
-static void
-ioapic_pin_prog(void *addr, int pin, int vec,
-    enum intr_trigger trig, enum intr_polarity pola,
-    uint32_t del_mode, int cpuid)
-{
-       uint32_t flags, target;
-       int select;
-
-       KKASSERT(del_mode == IOART_DELEXINT || del_mode == IOART_DELFIXED);
-
-       select = IOAPIC_REDTBL0 + (2 * pin);
-
-       flags = ioapic_read(addr, select) & IOART_RESV;
-       flags |= IOART_INTMSET | IOART_DESTPHY;
-#ifdef foo
-       flags |= del_mode;
-#else
-       /*
-        * We only support limited I/O APIC mixed mode,
-        * so even for ExtINT, we still use "fixed"
-        * delivery mode.
-        */
-       flags |= IOART_DELFIXED;
-#endif
-
-       if (del_mode == IOART_DELEXINT) {
-               KKASSERT(trig == INTR_TRIGGER_CONFORM &&
-                        pola == INTR_POLARITY_CONFORM);
-               flags |= IOART_TRGREDG | IOART_INTAHI;
-       } else {
-               switch (trig) {
-               case INTR_TRIGGER_EDGE:
-                       flags |= IOART_TRGREDG;
-                       break;
-
-               case INTR_TRIGGER_LEVEL:
-                       flags |= IOART_TRGRLVL;
-                       break;
-
-               case INTR_TRIGGER_CONFORM:
-                       panic("ioapic_pin_prog: trig conform is not "
-                             "supported\n");
-               }
-               switch (pola) {
-               case INTR_POLARITY_HIGH:
-                       flags |= IOART_INTAHI;
-                       break;
-
-               case INTR_POLARITY_LOW:
-                       flags |= IOART_INTALO;
-                       break;
-
-               case INTR_POLARITY_CONFORM:
-                       panic("ioapic_pin_prog: pola conform is not "
-                             "supported\n");
-               }
-       }
-
-       target = ioapic_read(addr, select + 1) & IOART_HI_DEST_RESV;
-       target |= (CPUID_TO_APICID(cpuid) << IOART_HI_DEST_SHIFT) &
-                 IOART_HI_DEST_MASK;
-
-       ioapic_write(addr, select, flags | vec);
-       ioapic_write(addr, select + 1, target);
-}
-
-static void
-ioapic_setup(const struct ioapic_info *info)
-{
-       int i;
-
-       ioapic_set_apic_id(info);
-
-       for (i = 0; i < info->io_npin; ++i)
-               ioapic_gsi_setup(info->io_gsi_base + i);
-}
-
-static int
-ioapic_alloc_apic_id(int start)
-{
-       for (;;) {
-               const struct ioapic_info *info;
-               int apic_id, apic_id16;
-
-               apic_id = lapic_unused_apic_id(start);
-               if (apic_id == NAPICID) {
-                       kprintf("IOAPIC: can't find unused APIC ID\n");
-                       return apic_id;
-               }
-               apic_id16 = apic_id & IOAPIC_ID_MASK;
-
-               /*
-                * Check against other I/O APIC's APIC ID's lower 4bits.
-                *
-                * The new APIC ID will have to be different from others
-                * in the lower 4bits, no matter whether xAPIC is used
-                * or not.
-                */
-               TAILQ_FOREACH(info, &ioapic_conf.ioc_list, io_link) {
-                       if (info->io_apic_id == -1) {
-                               info = NULL;
-                               break;
-                       }
-                       if ((info->io_apic_id & IOAPIC_ID_MASK) == apic_id16)
-                               break;
-               }
-               if (info == NULL)
-                       return apic_id;
-
-               kprintf("IOAPIC: APIC ID %d has same lower 4bits as "
-                       "%dth I/O APIC, keep searching...\n",
-                       apic_id, info->io_idx);
-
-               start = apic_id + 1;
-       }
-       panic("ioapic_unused_apic_id: never reached");
-}
-
-void *
-ioapic_map(vm_paddr_t pa)
-{
-       KKASSERT(pa < 0x100000000LL);
-       return pmap_mapdev_uncacheable(pa, PAGE_SIZE);
-}
-
-static void
-ioapic_sysinit(void *dummy __unused)
-{
-       int error;
-
-       if (!ioapic_enable)
-               return;
-
-       KASSERT(lapic_enable, ("I/O APIC is enabled, but LAPIC is disabled"));
-       error = ioapic_config();
-       if (error) {
-               ioapic_enable = 0;
-               icu_reinit_noioapic();
-               lapic_fixup_noioapic();
-       }
-}
-SYSINIT(ioapic, SI_BOOT2_IOAPIC, SI_ORDER_FIRST, ioapic_sysinit, NULL);
diff --git a/sys/platform/pc32/apic/ioapic.h b/sys/platform/pc32/apic/ioapic.h
deleted file mode 100644 (file)
index c048abd..0000000
+++ /dev/null
@@ -1,67 +0,0 @@
-/*
- * Copyright (c) 1996, by Steve Passe
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. The name of the developer may NOT be used to endorse or promote products
- *    derived from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * $FreeBSD: src/sys/i386/include/mpapic.h,v 1.14.2.2 2000/09/30 02:49:34 ps Exp $
- * $DragonFly: src/sys/platform/pc32/apic/mpapic.h,v 1.12 2008/06/07 11:37:23 mneumann Exp $
- */
-
-#ifndef _ARCH_APIC_IOAPIC_H_
-#define _ARCH_APIC_IOAPIC_H_
-
-#ifndef _SYS_BUS_H_
-#include <sys/bus.h>
-#endif
-
-#ifndef _SYS_QUEUE_H_
-#include <sys/queue.h>
-#endif
-
-u_int  ioapic_read(volatile void *, int);
-void   ioapic_write(volatile void *, int, u_int);
-
-struct ioapic_enumerator {
-       int     ioapic_prio;
-       TAILQ_ENTRY(ioapic_enumerator) ioapic_link;
-       int     (*ioapic_probe)(struct ioapic_enumerator *);
-       void    (*ioapic_enumerate)(struct ioapic_enumerator *);
-};
-
-#define IOAPIC_ENUM_PRIO_MPTABLE       20
-#define IOAPIC_ENUM_PRIO_MADT          40
-
-void   ioapic_enumerator_register(struct ioapic_enumerator *);
-void   ioapic_add(void *, int, int);
-void   ioapic_intsrc(int, int, enum intr_trigger, enum intr_polarity);
-void   *ioapic_gsi_ioaddr(int);
-int    ioapic_gsi_pin(int);
-void   ioapic_pin_setup(void *, int, int,
-           enum intr_trigger, enum intr_polarity, int);
-void   ioapic_extpin_setup(void *, int, int);
-int    ioapic_extpin_gsi(void);
-int    ioapic_gsi(int, int);
-void   *ioapic_map(vm_paddr_t);
-
-extern int     ioapic_enable;
-
-#endif /* !_ARCH_APIC_IOAPIC_H_ */
diff --git a/sys/platform/pc32/apic/ioapic_abi.c b/sys/platform/pc32/apic/ioapic_abi.c
deleted file mode 100644 (file)
index 2a88fe2..0000000
+++ /dev/null
@@ -1,1467 +0,0 @@
-/*
- * Copyright (c) 2005 The DragonFly Project.  All rights reserved.
- * Copyright (c) 1996, by Steve Passe.  All rights reserved.
- * Copyright (c) 1991 The Regents of the University of California.
- * All rights reserved.
- * 
- * This code is derived from software contributed to The DragonFly Project
- * by Matthew Dillon <dillon@backplane.com>
- *
- * This code is derived from software contributed to Berkeley by
- * William Jolitz.
- * 
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in
- *    the documentation and/or other materials provided with the
- *    distribution.
- * 3. Neither the name of The DragonFly Project nor the names of its
- *    contributors may be used to endorse or promote products derived
- *    from this software without specific, prior written permission.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
- * COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
- * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
- * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
- * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- */
-
-#include <sys/param.h>
-#include <sys/systm.h>
-#include <sys/kernel.h>
-#include <sys/machintr.h>
-#include <sys/interrupt.h>
-#include <sys/bus.h>
-#include <sys/rman.h>
-#include <sys/thread2.h>
-
-#include <machine/smp.h>
-#include <machine/segments.h>
-#include <machine/md_var.h>
-#include <machine/intr_machdep.h>
-#include <machine/globaldata.h>
-#include <machine/msi_var.h>
-
-#include <machine_base/isa/isa_intr.h>
-#include <machine_base/icu/icu.h>
-#include <machine_base/icu/icu_var.h>
-#include <machine_base/apic/ioapic.h>
-#include <machine_base/apic/ioapic_abi.h>
-#include <machine_base/apic/ioapic_ipl.h>
-#include <machine_base/apic/apicreg.h>
-
-#include <dev/acpica/acpi_sci_var.h>
-
-#define IOAPIC_HWI_VECTORS     IDT_HWI_VECTORS
-
-extern inthand_t
-       IDTVEC(ioapic_intr0),
-       IDTVEC(ioapic_intr1),
-       IDTVEC(ioapic_intr2),
-       IDTVEC(ioapic_intr3),
-       IDTVEC(ioapic_intr4),
-       IDTVEC(ioapic_intr5),
-       IDTVEC(ioapic_intr6),
-       IDTVEC(ioapic_intr7),
-       IDTVEC(ioapic_intr8),
-       IDTVEC(ioapic_intr9),
-       IDTVEC(ioapic_intr10),
-       IDTVEC(ioapic_intr11),
-       IDTVEC(ioapic_intr12),
-       IDTVEC(ioapic_intr13),
-       IDTVEC(ioapic_intr14),
-       IDTVEC(ioapic_intr15),
-       IDTVEC(ioapic_intr16),
-       IDTVEC(ioapic_intr17),
-       IDTVEC(ioapic_intr18),
-       IDTVEC(ioapic_intr19),
-       IDTVEC(ioapic_intr20),
-       IDTVEC(ioapic_intr21),
-       IDTVEC(ioapic_intr22),
-       IDTVEC(ioapic_intr23),
-       IDTVEC(ioapic_intr24),
-       IDTVEC(ioapic_intr25),
-       IDTVEC(ioapic_intr26),
-       IDTVEC(ioapic_intr27),
-       IDTVEC(ioapic_intr28),
-       IDTVEC(ioapic_intr29),
-       IDTVEC(ioapic_intr30),
-       IDTVEC(ioapic_intr31),
-       IDTVEC(ioapic_intr32),
-       IDTVEC(ioapic_intr33),
-       IDTVEC(ioapic_intr34),
-       IDTVEC(ioapic_intr35),
-       IDTVEC(ioapic_intr36),
-       IDTVEC(ioapic_intr37),
-       IDTVEC(ioapic_intr38),
-       IDTVEC(ioapic_intr39),
-       IDTVEC(ioapic_intr40),
-       IDTVEC(ioapic_intr41),
-       IDTVEC(ioapic_intr42),
-       IDTVEC(ioapic_intr43),
-       IDTVEC(ioapic_intr44),
-       IDTVEC(ioapic_intr45),
-       IDTVEC(ioapic_intr46),
-       IDTVEC(ioapic_intr47),
-       IDTVEC(ioapic_intr48),
-       IDTVEC(ioapic_intr49),
-       IDTVEC(ioapic_intr50),
-       IDTVEC(ioapic_intr51),
-       IDTVEC(ioapic_intr52),
-       IDTVEC(ioapic_intr53),
-       IDTVEC(ioapic_intr54),
-       IDTVEC(ioapic_intr55),
-       IDTVEC(ioapic_intr56),
-       IDTVEC(ioapic_intr57),
-       IDTVEC(ioapic_intr58),
-       IDTVEC(ioapic_intr59),
-       IDTVEC(ioapic_intr60),
-       IDTVEC(ioapic_intr61),
-       IDTVEC(ioapic_intr62),
-       IDTVEC(ioapic_intr63),
-       IDTVEC(ioapic_intr64),
-       IDTVEC(ioapic_intr65),
-       IDTVEC(ioapic_intr66),
-       IDTVEC(ioapic_intr67),
-       IDTVEC(ioapic_intr68),
-       IDTVEC(ioapic_intr69),
-       IDTVEC(ioapic_intr70),
-       IDTVEC(ioapic_intr71),
-       IDTVEC(ioapic_intr72),
-       IDTVEC(ioapic_intr73),
-       IDTVEC(ioapic_intr74),
-       IDTVEC(ioapic_intr75),
-       IDTVEC(ioapic_intr76),
-       IDTVEC(ioapic_intr77),
-       IDTVEC(ioapic_intr78),
-       IDTVEC(ioapic_intr79),
-       IDTVEC(ioapic_intr80),
-       IDTVEC(ioapic_intr81),
-       IDTVEC(ioapic_intr82),
-       IDTVEC(ioapic_intr83),
-       IDTVEC(ioapic_intr84),
-       IDTVEC(ioapic_intr85),
-       IDTVEC(ioapic_intr86),
-       IDTVEC(ioapic_intr87),
-       IDTVEC(ioapic_intr88),
-       IDTVEC(ioapic_intr89),
-       IDTVEC(ioapic_intr90),
-       IDTVEC(ioapic_intr91),
-       IDTVEC(ioapic_intr92),
-       IDTVEC(ioapic_intr93),
-       IDTVEC(ioapic_intr94),
-       IDTVEC(ioapic_intr95),
-       IDTVEC(ioapic_intr96),
-       IDTVEC(ioapic_intr97),
-       IDTVEC(ioapic_intr98),
-       IDTVEC(ioapic_intr99),
-       IDTVEC(ioapic_intr100),
-       IDTVEC(ioapic_intr101),
-       IDTVEC(ioapic_intr102),
-       IDTVEC(ioapic_intr103),
-       IDTVEC(ioapic_intr104),
-       IDTVEC(ioapic_intr105),
-       IDTVEC(ioapic_intr106),
-       IDTVEC(ioapic_intr107),
-       IDTVEC(ioapic_intr108),
-       IDTVEC(ioapic_intr109),
-       IDTVEC(ioapic_intr110),
-       IDTVEC(ioapic_intr111),
-       IDTVEC(ioapic_intr112),
-       IDTVEC(ioapic_intr113),
-       IDTVEC(ioapic_intr114),
-       IDTVEC(ioapic_intr115),
-       IDTVEC(ioapic_intr116),
-       IDTVEC(ioapic_intr117),
-       IDTVEC(ioapic_intr118),
-       IDTVEC(ioapic_intr119),
-       IDTVEC(ioapic_intr120),
-       IDTVEC(ioapic_intr121),
-       IDTVEC(ioapic_intr122),
-       IDTVEC(ioapic_intr123),
-       IDTVEC(ioapic_intr124),
-       IDTVEC(ioapic_intr125),
-       IDTVEC(ioapic_intr126),
-       IDTVEC(ioapic_intr127),
-       IDTVEC(ioapic_intr128),
-       IDTVEC(ioapic_intr129),
-       IDTVEC(ioapic_intr130),
-       IDTVEC(ioapic_intr131),
-       IDTVEC(ioapic_intr132),
-       IDTVEC(ioapic_intr133),
-       IDTVEC(ioapic_intr134),
-       IDTVEC(ioapic_intr135),
-       IDTVEC(ioapic_intr136),
-       IDTVEC(ioapic_intr137),
-       IDTVEC(ioapic_intr138),
-       IDTVEC(ioapic_intr139),
-       IDTVEC(ioapic_intr140),
-       IDTVEC(ioapic_intr141),
-       IDTVEC(ioapic_intr142),
-       IDTVEC(ioapic_intr143),
-       IDTVEC(ioapic_intr144),
-       IDTVEC(ioapic_intr145),
-       IDTVEC(ioapic_intr146),
-       IDTVEC(ioapic_intr147),
-       IDTVEC(ioapic_intr148),
-       IDTVEC(ioapic_intr149),
-       IDTVEC(ioapic_intr150),
-       IDTVEC(ioapic_intr151),
-       IDTVEC(ioapic_intr152),
-       IDTVEC(ioapic_intr153),
-       IDTVEC(ioapic_intr154),
-       IDTVEC(ioapic_intr155),
-       IDTVEC(ioapic_intr156),
-       IDTVEC(ioapic_intr157),
-       IDTVEC(ioapic_intr158),
-       IDTVEC(ioapic_intr159),
-       IDTVEC(ioapic_intr160),
-       IDTVEC(ioapic_intr161),
-       IDTVEC(ioapic_intr162),
-       IDTVEC(ioapic_intr163),
-       IDTVEC(ioapic_intr164),
-       IDTVEC(ioapic_intr165),
-       IDTVEC(ioapic_intr166),
-       IDTVEC(ioapic_intr167),
-       IDTVEC(ioapic_intr168),
-       IDTVEC(ioapic_intr169),
-       IDTVEC(ioapic_intr170),
-       IDTVEC(ioapic_intr171),
-       IDTVEC(ioapic_intr172),
-       IDTVEC(ioapic_intr173),
-       IDTVEC(ioapic_intr174),
-       IDTVEC(ioapic_intr175),
-       IDTVEC(ioapic_intr176),
-       IDTVEC(ioapic_intr177),
-       IDTVEC(ioapic_intr178),
-       IDTVEC(ioapic_intr179),
-       IDTVEC(ioapic_intr180),
-       IDTVEC(ioapic_intr181),
-       IDTVEC(ioapic_intr182),
-       IDTVEC(ioapic_intr183),
-       IDTVEC(ioapic_intr184),
-       IDTVEC(ioapic_intr185),
-       IDTVEC(ioapic_intr186),
-       IDTVEC(ioapic_intr187),
-       IDTVEC(ioapic_intr188),
-       IDTVEC(ioapic_intr189),
-       IDTVEC(ioapic_intr190),
-       IDTVEC(ioapic_intr191);
-
-static inthand_t *ioapic_intr[IOAPIC_HWI_VECTORS] = {
-       &IDTVEC(ioapic_intr0),
-       &IDTVEC(ioapic_intr1),
-       &IDTVEC(ioapic_intr2),
-       &IDTVEC(ioapic_intr3),
-       &IDTVEC(ioapic_intr4),
-       &IDTVEC(ioapic_intr5),
-       &IDTVEC(ioapic_intr6),
-       &IDTVEC(ioapic_intr7),
-       &IDTVEC(ioapic_intr8),
-       &IDTVEC(ioapic_intr9),
-       &IDTVEC(ioapic_intr10),
-       &IDTVEC(ioapic_intr11),
-       &IDTVEC(ioapic_intr12),
-       &IDTVEC(ioapic_intr13),
-       &IDTVEC(ioapic_intr14),
-       &IDTVEC(ioapic_intr15),
-       &IDTVEC(ioapic_intr16),
-       &IDTVEC(ioapic_intr17),
-       &IDTVEC(ioapic_intr18),
-       &IDTVEC(ioapic_intr19),
-       &IDTVEC(ioapic_intr20),
-       &IDTVEC(ioapic_intr21),
-       &IDTVEC(ioapic_intr22),
-       &IDTVEC(ioapic_intr23),
-       &IDTVEC(ioapic_intr24),
-       &IDTVEC(ioapic_intr25),
-       &IDTVEC(ioapic_intr26),
-       &IDTVEC(ioapic_intr27),
-       &IDTVEC(ioapic_intr28),
-       &IDTVEC(ioapic_intr29),
-       &IDTVEC(ioapic_intr30),
-       &IDTVEC(ioapic_intr31),
-       &IDTVEC(ioapic_intr32),
-       &IDTVEC(ioapic_intr33),
-       &IDTVEC(ioapic_intr34),
-       &IDTVEC(ioapic_intr35),
-       &IDTVEC(ioapic_intr36),
-       &IDTVEC(ioapic_intr37),
-       &IDTVEC(ioapic_intr38),
-       &IDTVEC(ioapic_intr39),
-       &IDTVEC(ioapic_intr40),
-       &IDTVEC(ioapic_intr41),
-       &IDTVEC(ioapic_intr42),
-       &IDTVEC(ioapic_intr43),
-       &IDTVEC(ioapic_intr44),
-       &IDTVEC(ioapic_intr45),
-       &IDTVEC(ioapic_intr46),
-       &IDTVEC(ioapic_intr47),
-       &IDTVEC(ioapic_intr48),
-       &IDTVEC(ioapic_intr49),
-       &IDTVEC(ioapic_intr50),
-       &IDTVEC(ioapic_intr51),
-       &IDTVEC(ioapic_intr52),
-       &IDTVEC(ioapic_intr53),
-       &IDTVEC(ioapic_intr54),
-       &IDTVEC(ioapic_intr55),
-       &IDTVEC(ioapic_intr56),
-       &IDTVEC(ioapic_intr57),
-       &IDTVEC(ioapic_intr58),
-       &IDTVEC(ioapic_intr59),
-       &IDTVEC(ioapic_intr60),
-       &IDTVEC(ioapic_intr61),
-       &IDTVEC(ioapic_intr62),
-       &IDTVEC(ioapic_intr63),
-       &IDTVEC(ioapic_intr64),
-       &IDTVEC(ioapic_intr65),
-       &IDTVEC(ioapic_intr66),
-       &IDTVEC(ioapic_intr67),
-       &IDTVEC(ioapic_intr68),
-       &IDTVEC(ioapic_intr69),
-       &IDTVEC(ioapic_intr70),
-       &IDTVEC(ioapic_intr71),
-       &IDTVEC(ioapic_intr72),
-       &IDTVEC(ioapic_intr73),
-       &IDTVEC(ioapic_intr74),
-       &IDTVEC(ioapic_intr75),
-       &IDTVEC(ioapic_intr76),
-       &IDTVEC(ioapic_intr77),
-       &IDTVEC(ioapic_intr78),
-       &IDTVEC(ioapic_intr79),
-       &IDTVEC(ioapic_intr80),
-       &IDTVEC(ioapic_intr81),
-       &IDTVEC(ioapic_intr82),
-       &IDTVEC(ioapic_intr83),
-       &IDTVEC(ioapic_intr84),
-       &IDTVEC(ioapic_intr85),
-       &IDTVEC(ioapic_intr86),
-       &IDTVEC(ioapic_intr87),
-       &IDTVEC(ioapic_intr88),
-       &IDTVEC(ioapic_intr89),
-       &IDTVEC(ioapic_intr90),
-       &IDTVEC(ioapic_intr91),
-       &IDTVEC(ioapic_intr92),
-       &IDTVEC(ioapic_intr93),
-       &IDTVEC(ioapic_intr94),
-       &IDTVEC(ioapic_intr95),
-       &IDTVEC(ioapic_intr96),
-       &IDTVEC(ioapic_intr97),
-       &IDTVEC(ioapic_intr98),
-       &IDTVEC(ioapic_intr99),
-       &IDTVEC(ioapic_intr100),
-       &IDTVEC(ioapic_intr101),
-       &IDTVEC(ioapic_intr102),
-       &IDTVEC(ioapic_intr103),
-       &IDTVEC(ioapic_intr104),
-       &IDTVEC(ioapic_intr105),
-       &IDTVEC(ioapic_intr106),
-       &IDTVEC(ioapic_intr107),
-       &IDTVEC(ioapic_intr108),
-       &IDTVEC(ioapic_intr109),
-       &IDTVEC(ioapic_intr110),
-       &IDTVEC(ioapic_intr111),
-       &IDTVEC(ioapic_intr112),
-       &IDTVEC(ioapic_intr113),
-       &IDTVEC(ioapic_intr114),
-       &IDTVEC(ioapic_intr115),
-       &IDTVEC(ioapic_intr116),
-       &IDTVEC(ioapic_intr117),
-       &IDTVEC(ioapic_intr118),
-       &IDTVEC(ioapic_intr119),
-       &IDTVEC(ioapic_intr120),
-       &IDTVEC(ioapic_intr121),
-       &IDTVEC(ioapic_intr122),
-       &IDTVEC(ioapic_intr123),
-       &IDTVEC(ioapic_intr124),
-       &IDTVEC(ioapic_intr125),
-       &IDTVEC(ioapic_intr126),
-       &IDTVEC(ioapic_intr127),
-       &IDTVEC(ioapic_intr128),
-       &IDTVEC(ioapic_intr129),
-       &IDTVEC(ioapic_intr130),
-       &IDTVEC(ioapic_intr131),
-       &IDTVEC(ioapic_intr132),
-       &IDTVEC(ioapic_intr133),
-       &IDTVEC(ioapic_intr134),
-       &IDTVEC(ioapic_intr135),
-       &IDTVEC(ioapic_intr136),
-       &IDTVEC(ioapic_intr137),
-       &IDTVEC(ioapic_intr138),
-       &IDTVEC(ioapic_intr139),
-       &IDTVEC(ioapic_intr140),
-       &IDTVEC(ioapic_intr141),
-       &IDTVEC(ioapic_intr142),
-       &IDTVEC(ioapic_intr143),
-       &IDTVEC(ioapic_intr144),
-       &IDTVEC(ioapic_intr145),
-       &IDTVEC(ioapic_intr146),
-       &IDTVEC(ioapic_intr147),
-       &IDTVEC(ioapic_intr148),
-       &IDTVEC(ioapic_intr149),
-       &IDTVEC(ioapic_intr150),
-       &IDTVEC(ioapic_intr151),
-       &IDTVEC(ioapic_intr152),
-       &IDTVEC(ioapic_intr153),
-       &IDTVEC(ioapic_intr154),
-       &IDTVEC(ioapic_intr155),
-       &IDTVEC(ioapic_intr156),
-       &IDTVEC(ioapic_intr157),
-       &IDTVEC(ioapic_intr158),
-       &IDTVEC(ioapic_intr159),
-       &IDTVEC(ioapic_intr160),
-       &IDTVEC(ioapic_intr161),
-       &IDTVEC(ioapic_intr162),
-       &IDTVEC(ioapic_intr163),
-       &IDTVEC(ioapic_intr164),
-       &IDTVEC(ioapic_intr165),
-       &IDTVEC(ioapic_intr166),
-       &IDTVEC(ioapic_intr167),
-       &IDTVEC(ioapic_intr168),
-       &IDTVEC(ioapic_intr169),
-       &IDTVEC(ioapic_intr170),
-       &IDTVEC(ioapic_intr171),
-       &IDTVEC(ioapic_intr172),
-       &IDTVEC(ioapic_intr173),
-       &IDTVEC(ioapic_intr174),
-       &IDTVEC(ioapic_intr175),
-       &IDTVEC(ioapic_intr176),
-       &IDTVEC(ioapic_intr177),
-       &IDTVEC(ioapic_intr178),
-       &IDTVEC(ioapic_intr179),
-       &IDTVEC(ioapic_intr180),
-       &IDTVEC(ioapic_intr181),
-       &IDTVEC(ioapic_intr182),
-       &IDTVEC(ioapic_intr183),
-       &IDTVEC(ioapic_intr184),
-       &IDTVEC(ioapic_intr185),
-       &IDTVEC(ioapic_intr186),
-       &IDTVEC(ioapic_intr187),
-       &IDTVEC(ioapic_intr188),
-       &IDTVEC(ioapic_intr189),
-       &IDTVEC(ioapic_intr190),
-       &IDTVEC(ioapic_intr191)
-};
-
-#define IOAPIC_HWI_SYSCALL     (IDT_OFFSET_SYSCALL - IDT_OFFSET)
-
-static struct ioapic_irqmap {
-       int                     im_type;        /* IOAPIC_IMT_ */
-       enum intr_trigger       im_trig;
-       enum intr_polarity      im_pola;
-       int                     im_gsi;
-       int                     im_msi_base;
-       uint32_t                im_flags;       /* IOAPIC_IMF_ */
-} ioapic_irqmaps[MAXCPU][IOAPIC_HWI_VECTORS];
-
-static struct lwkt_token ioapic_irqmap_tok =
-       LWKT_TOKEN_INITIALIZER(ioapic_irqmap_token);
-
-#define IOAPIC_IMT_UNUSED      0
-#define IOAPIC_IMT_RESERVED    1
-#define IOAPIC_IMT_LEGACY      2
-#define IOAPIC_IMT_SYSCALL     3
-#define IOAPIC_IMT_SHADOW      4
-#define IOAPIC_IMT_MSI         5
-#define IOAPIC_IMT_MSIX                6
-
-#define IOAPIC_IMT_ISHWI(map)  ((map)->im_type != IOAPIC_IMT_RESERVED && \
-                                (map)->im_type != IOAPIC_IMT_SYSCALL && \
-                                (map)->im_type != IOAPIC_IMT_SHADOW)
-
-#define IOAPIC_IMF_CONF                0x1
-
-extern void    IOAPIC_INTREN(int);
-extern void    IOAPIC_INTRDIS(int);
-
-extern int     imcr_present;
-
-static void    ioapic_abi_intr_enable(int);
-static void    ioapic_abi_intr_disable(int);
-static void    ioapic_abi_intr_setup(int, int);
-static void    ioapic_abi_intr_teardown(int);
-
-static void    ioapic_abi_legacy_intr_config(int,
-                   enum intr_trigger, enum intr_polarity);
-static int     ioapic_abi_legacy_intr_cpuid(int);
-static int     ioapic_abi_legacy_intr_find(int,
-                   enum intr_trigger, enum intr_polarity);
-static int     ioapic_abi_legacy_intr_find_bygsi(int,
-                   enum intr_trigger, enum intr_polarity);
-
-static int     ioapic_abi_msi_alloc(int [], int, int);
-static void    ioapic_abi_msi_release(const int [], int, int);
-static void    ioapic_abi_msi_map(int, uint64_t *, uint32_t *, int);
-static int     ioapic_abi_msix_alloc(int *, int);
-static void    ioapic_abi_msix_release(int, int);
-
-static int     ioapic_abi_msi_alloc_intern(int, const char *,
-                   int [], int, int);
-static void    ioapic_abi_msi_release_intern(int, const char *,
-                   const int [], int, int);
-
-static void    ioapic_abi_finalize(void);
-static void    ioapic_abi_cleanup(void);
-static void    ioapic_abi_setdefault(void);
-static void    ioapic_abi_stabilize(void);
-static void    ioapic_abi_initmap(void);
-static void    ioapic_abi_rman_setup(struct rman *);
-
-static int     ioapic_abi_gsi_cpuid(int, int);
-static int     ioapic_find_unused_irqmap(int);
-
-struct machintr_abi MachIntrABI_IOAPIC = {
-       MACHINTR_IOAPIC,
-
-       .intr_disable   = ioapic_abi_intr_disable,
-       .intr_enable    = ioapic_abi_intr_enable,
-       .intr_setup     = ioapic_abi_intr_setup,
-       .intr_teardown  = ioapic_abi_intr_teardown,
-
-       .legacy_intr_config = ioapic_abi_legacy_intr_config,
-       .legacy_intr_cpuid = ioapic_abi_legacy_intr_cpuid,
-       .legacy_intr_find = ioapic_abi_legacy_intr_find,
-       .legacy_intr_find_bygsi = ioapic_abi_legacy_intr_find_bygsi,
-
-       .msi_alloc      = ioapic_abi_msi_alloc,
-       .msi_release    = ioapic_abi_msi_release,
-       .msi_map        = ioapic_abi_msi_map,
-       .msix_alloc     = ioapic_abi_msix_alloc,
-       .msix_release   = ioapic_abi_msix_release,
-
-       .finalize       = ioapic_abi_finalize,
-       .cleanup        = ioapic_abi_cleanup,
-       .setdefault     = ioapic_abi_setdefault,
-       .stabilize      = ioapic_abi_stabilize,
-       .initmap        = ioapic_abi_initmap,
-       .rman_setup     = ioapic_abi_rman_setup
-};
-
-static int     ioapic_abi_extint_irq = -1;
-static int     ioapic_abi_legacy_irq_max;
-static int     ioapic_abi_gsi_balance;
-static int     ioapic_abi_msi_start;   /* NOTE: for testing only */
-
-struct ioapic_irqinfo  ioapic_irqs[IOAPIC_HWI_VECTORS];
-
-static void
-ioapic_abi_intr_enable(int irq)
-{
-       const struct ioapic_irqmap *map;
-
-       KASSERT(irq >= 0 && irq < IOAPIC_HWI_VECTORS,
-           ("ioapic enable, invalid irq %d", irq));
-
-       map = &ioapic_irqmaps[mycpuid][irq];
-       KASSERT(IOAPIC_IMT_ISHWI(map),
-           ("ioapic enable, not hwi irq %d, type %d, cpu%d",
-            irq, map->im_type, mycpuid));
-       if (map->im_type != IOAPIC_IMT_LEGACY)
-               return;
-
-       IOAPIC_INTREN(irq);
-}
-
-static void
-ioapic_abi_intr_disable(int irq)
-{
-       const struct ioapic_irqmap *map;
-
-       KASSERT(irq >= 0 && irq < IOAPIC_HWI_VECTORS,
-           ("ioapic disable, invalid irq %d", irq));
-
-       map = &ioapic_irqmaps[mycpuid][irq];
-       KASSERT(IOAPIC_IMT_ISHWI(map),
-           ("ioapic disable, not hwi irq %d, type %d, cpu%d",
-            irq, map->im_type, mycpuid));
-       if (map->im_type != IOAPIC_IMT_LEGACY)
-               return;
-
-       IOAPIC_INTRDIS(irq);
-}
-
-static void
-ioapic_abi_finalize(void)
-{
-       KKASSERT(MachIntrABI.type == MACHINTR_IOAPIC);
-       KKASSERT(ioapic_enable);
-
-       /*
-        * If an IMCR is present, program bit 0 to disconnect the 8259
-        * from the BSP.
-        */
-       if (imcr_present) {
-               outb(0x22, 0x70);       /* select IMCR */
-               outb(0x23, 0x01);       /* disconnect 8259 */
-       }
-}
-
-/*
- * This routine is called after physical interrupts are enabled but before
- * the critical section is released.  We need to clean out any interrupts
- * that had already been posted to the cpu.
- */
-static void
-ioapic_abi_cleanup(void)
-{
-       bzero(mdcpu->gd_ipending, sizeof(mdcpu->gd_ipending));
-}
-
-/* Must never be called */
-static void
-ioapic_abi_stabilize(void)
-{
-       panic("ioapic_stabilize() is called");
-}
-
-static void
-ioapic_abi_intr_setup(int intr, int flags)
-{
-       const struct ioapic_irqmap *map;
-       int vector, select;
-       uint32_t value;
-       u_long ef;
-
-       KASSERT(intr >= 0 && intr < IOAPIC_HWI_VECTORS,
-           ("ioapic setup, invalid irq %d", intr));
-
-       map = &ioapic_irqmaps[mycpuid][intr];
-       KASSERT(IOAPIC_IMT_ISHWI(map),
-           ("ioapic setup, not hwi irq %d, type %d, cpu%d",
-            intr, map->im_type, mycpuid));
-       if (map->im_type != IOAPIC_IMT_LEGACY)
-               return;
-
-       KASSERT(ioapic_irqs[intr].io_addr != NULL,
-           ("ioapic setup, no GSI information, irq %d", intr));
-
-       ef = read_eflags();
-       cpu_disable_intr();
-
-       vector = IDT_OFFSET + intr;
-
-       /*
-        * Now reprogram the vector in the IO APIC.  In order to avoid
-        * losing an EOI for a level interrupt, which is vector based,
-        * make sure that the IO APIC is programmed for edge-triggering
-        * first, then reprogrammed with the new vector.  This should
-        * clear the IRR bit.
-        */
-       imen_lock();
-
-       select = ioapic_irqs[intr].io_idx;
-       value = ioapic_read(ioapic_irqs[intr].io_addr, select);
-       value |= IOART_INTMSET;
-
-       ioapic_write(ioapic_irqs[intr].io_addr, select,
-           (value & ~APIC_TRIGMOD_MASK));
-       ioapic_write(ioapic_irqs[intr].io_addr, select,
-           (value & ~IOART_INTVEC) | vector);
-
-       imen_unlock();
-
-       IOAPIC_INTREN(intr);
-
-       write_eflags(ef);
-}
-
-static void
-ioapic_abi_intr_teardown(int intr)
-{
-       const struct ioapic_irqmap *map;
-       int vector, select;
-       uint32_t value;
-       u_long ef;
-
-       KASSERT(intr >= 0 && intr < IOAPIC_HWI_VECTORS,
-           ("ioapic teardown, invalid irq %d", intr));
-
-       map = &ioapic_irqmaps[mycpuid][intr];
-       KASSERT(IOAPIC_IMT_ISHWI(map),
-           ("ioapic teardown, not hwi irq %d, type %d, cpu%d",
-            intr, map->im_type, mycpuid));
-       if (map->im_type != IOAPIC_IMT_LEGACY)
-               return;
-
-       KASSERT(ioapic_irqs[intr].io_addr != NULL,
-           ("ioapic teardown, no GSI information, irq %d", intr));
-
-       ef = read_eflags();
-       cpu_disable_intr();
-
-       /*
-        * Teardown an interrupt vector.  The vector should already be
-        * installed in the cpu's IDT, but make sure.
-        */
-       IOAPIC_INTRDIS(intr);
-
-       vector = IDT_OFFSET + intr;
-
-       /*
-        * In order to avoid losing an EOI for a level interrupt, which
-        * is vector based, make sure that the IO APIC is programmed for
-        * edge-triggering first, then reprogrammed with the new vector.
-        * This should clear the IRR bit.
-        */
-       imen_lock();
-
-       select = ioapic_irqs[intr].io_idx;
-       value = ioapic_read(ioapic_irqs[intr].io_addr, select);
-
-       ioapic_write(ioapic_irqs[intr].io_addr, select,
-           (value & ~APIC_TRIGMOD_MASK));
-       ioapic_write(ioapic_irqs[intr].io_addr, select,
-           (value & ~IOART_INTVEC) | vector);
-
-       imen_unlock();
-
-       write_eflags(ef);
-}
-
-static void
-ioapic_abi_setdefault(void)
-{
-       int intr;
-
-       for (intr = 0; intr < IOAPIC_HWI_VECTORS; ++intr) {
-               if (intr == IOAPIC_HWI_SYSCALL)
-                       continue;
-               setidt(IDT_OFFSET + intr, ioapic_intr[intr], SDT_SYS386IGT,
-                      SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
-       }
-}
-
-static void
-ioapic_abi_initmap(void)
-{
-       int cpu;
-
-       kgetenv_int("hw.ioapic.gsi.balance", &ioapic_abi_gsi_balance);
-
-       kgetenv_int("hw.ioapic.msi_start", &ioapic_abi_msi_start);
-       ioapic_abi_msi_start &= ~0x1f;  /* MUST be 32 aligned */
-
-       /*
-        * NOTE: ncpus is not ready yet
-        */
-       for (cpu = 0; cpu < MAXCPU; ++cpu) {
-               int i;
-
-               for (i = 0; i < IOAPIC_HWI_VECTORS; ++i) {
-                       ioapic_irqmaps[cpu][i].im_gsi = -1;
-                       ioapic_irqmaps[cpu][i].im_msi_base = -1;
-               }
-               ioapic_irqmaps[cpu][IOAPIC_HWI_SYSCALL].im_type =
-                   IOAPIC_IMT_SYSCALL;
-       }
-}
-
-static int
-ioapic_find_unused_irqmap(int gsi)
-{
-       int cpuid, i;
-
-       cpuid = ioapic_abi_gsi_cpuid(-1, gsi);
-
-       for (i = ISA_IRQ_CNT; i < IOAPIC_HWI_VECTORS; ++i) {
-               if (i == acpi_sci_irqno())
-                       continue;
-               if (ioapic_irqmaps[cpuid][i].im_type == IOAPIC_IMT_UNUSED)
-                       return i;
-       }
-       return -1;
-}
-
-void
-ioapic_set_legacy_irqmap(int irq, int gsi, enum intr_trigger trig,
-    enum intr_polarity pola)
-{
-       struct ioapic_irqinfo *info;
-       struct ioapic_irqmap *map;
-       void *ioaddr;
-       int pin, cpuid;
-
-       KKASSERT(trig == INTR_TRIGGER_EDGE || trig == INTR_TRIGGER_LEVEL);
-       KKASSERT(pola == INTR_POLARITY_HIGH || pola == INTR_POLARITY_LOW);
-
-       KKASSERT(irq >= 0);
-       if (irq >= IOAPIC_HWI_VECTORS) {
-               /*
-                * Some BIOSes seem to assume that all 256 IDT vectors
-                * could be used, while we limit the available IDT
-                * vectors to 192; find an unused IRQ for this GSI.
-                */
-               irq = ioapic_find_unused_irqmap(gsi);
-               if (irq < 0) {
-                       kprintf("failed to find unused irq for gsi %d, "
-                           "overflow\n", gsi);
-                       return;
-               }
-       }
-       KKASSERT(irq < IOAPIC_HWI_VECTORS);
-
-       cpuid = ioapic_abi_gsi_cpuid(irq, gsi);
-       map = &ioapic_irqmaps[cpuid][irq];
-
-       if (map->im_type != IOAPIC_IMT_UNUSED) {
-               /*
-                * There are so many IOAPICs, that 1:1 mapping
-                * of GSI and IRQ hits SYSCALL entry.
-                */
-               irq = ioapic_find_unused_irqmap(gsi);
-               if (irq < 0) {
-                       kprintf("failed to find unused irq for gsi %d, "
-                           "conflict\n", gsi);
-                       return;
-               }
-               KKASSERT(irq < IOAPIC_HWI_VECTORS);
-
-               cpuid = ioapic_abi_gsi_cpuid(irq, gsi);
-               map = &ioapic_irqmaps[cpuid][irq];
-       }
-
-       if (irq > ioapic_abi_legacy_irq_max)
-               ioapic_abi_legacy_irq_max = irq;
-
-       KKASSERT(map->im_type == IOAPIC_IMT_UNUSED);
-       map->im_type = IOAPIC_IMT_LEGACY;
-
-       map->im_gsi = gsi;
-       map->im_trig = trig;
-       map->im_pola = pola;
-
-       if (bootverbose) {
-               kprintf("IOAPIC: irq %d -> gsi %d %s/%s\n",
-                       irq, map->im_gsi,
-                       intr_str_trigger(map->im_trig),
-                       intr_str_polarity(map->im_pola));
-       }
-
-       pin = ioapic_gsi_pin(map->im_gsi);
-       ioaddr = ioapic_gsi_ioaddr(map->im_gsi);
-
-       info = &ioapic_irqs[irq];
-
-       imen_lock();
-
-       info->io_addr = ioaddr;
-       info->io_idx = IOAPIC_REDTBL + (2 * pin);
-       info->io_flags = IOAPIC_IRQI_FLAG_MASKED;
-       if (map->im_trig == INTR_TRIGGER_LEVEL)
-               info->io_flags |= IOAPIC_IRQI_FLAG_LEVEL;
-
-       ioapic_pin_setup(ioaddr, pin, IDT_OFFSET + irq,
-           map->im_trig, map->im_pola, cpuid);
-
-       imen_unlock();
-}
-
-void
-ioapic_fixup_legacy_irqmaps(void)
-{
-       int cpu;
-
-       ioapic_abi_legacy_irq_max += 1;
-       if (bootverbose) {
-               kprintf("IOAPIC: legacy irq max %d\n",
-                   ioapic_abi_legacy_irq_max);
-       }
-
-       for (cpu = 0; cpu < ncpus; ++cpu) {
-               int i;
-
-               for (i = 0; i < ioapic_abi_legacy_irq_max; ++i) {
-                       struct ioapic_irqmap *map = &ioapic_irqmaps[cpu][i];
-
-                       if (map->im_type == IOAPIC_IMT_UNUSED) {
-                               map->im_type = IOAPIC_IMT_RESERVED;
-                               if (bootverbose) {
-                                       kprintf("IOAPIC: "
-                                           "cpu%d irq %d reserved\n", cpu, i);
-                               }
-                       }
-               }
-       }
-}
-
-static int
-ioapic_abi_legacy_intr_find_bygsi(int gsi, enum intr_trigger trig,
-    enum intr_polarity pola)
-{
-       int cpu;
-
-#ifdef INVARIANTS
-       if (trig == INTR_TRIGGER_CONFORM) {
-               KKASSERT(pola == INTR_POLARITY_CONFORM);
-       } else {
-               KKASSERT(trig == INTR_TRIGGER_EDGE ||
-                   trig == INTR_TRIGGER_LEVEL);
-               KKASSERT(pola == INTR_POLARITY_HIGH ||
-                   pola == INTR_POLARITY_LOW);
-       }
-#endif
-
-       for (cpu = 0; cpu < ncpus; ++cpu) {
-               int irq;
-
-               for (irq = 0; irq < ioapic_abi_legacy_irq_max; ++irq) {
-                       const struct ioapic_irqmap *map =
-                           &ioapic_irqmaps[cpu][irq];
-
-                       if (map->im_gsi == gsi) {
-                               KKASSERT(map->im_type == IOAPIC_IMT_LEGACY);
-
-                               if ((map->im_flags & IOAPIC_IMF_CONF) &&
-                                   trig != INTR_TRIGGER_CONFORM &&
-                                   pola != INTR_POLARITY_CONFORM) {
-                                       if (map->im_trig != trig ||
-                                           map->im_pola != pola)
-                                               return -1;
-                               }
-                               return irq;
-                       }
-               }
-       }
-       return -1;
-}
-
-static int
-ioapic_abi_legacy_intr_find(int irq, enum intr_trigger trig,
-    enum intr_polarity pola)
-{
-       int cpu;
-
-#ifdef INVARIANTS
-       if (trig == INTR_TRIGGER_CONFORM) {
-               KKASSERT(pola == INTR_POLARITY_CONFORM);
-       } else {
-               KKASSERT(trig == INTR_TRIGGER_EDGE ||
-                   trig == INTR_TRIGGER_LEVEL);
-               KKASSERT(pola == INTR_POLARITY_HIGH ||
-                   pola == INTR_POLARITY_LOW);
-       }
-#endif
-
-       if (irq < 0 || irq >= ioapic_abi_legacy_irq_max)
-               return -1;
-
-       for (cpu = 0; cpu < ncpus; ++cpu) {
-               const struct ioapic_irqmap *map = &ioapic_irqmaps[cpu][irq];
-
-               if (map->im_type == IOAPIC_IMT_LEGACY) {
-                       if ((map->im_flags & IOAPIC_IMF_CONF) &&
-                           trig != INTR_TRIGGER_CONFORM &&
-                           pola != INTR_POLARITY_CONFORM) {
-                               if (map->im_trig != trig ||
-                                   map->im_pola != pola)
-                                       return -1;
-                       }
-                       return irq;
-               }
-       }
-       return -1;
-}
-
-static void
-ioapic_abi_legacy_intr_config(int irq, enum intr_trigger trig,
-    enum intr_polarity pola)
-{
-       struct ioapic_irqinfo *info;
-       struct ioapic_irqmap *map = NULL;
-       void *ioaddr;
-       int pin, cpuid;
-
-       KKASSERT(trig == INTR_TRIGGER_EDGE || trig == INTR_TRIGGER_LEVEL);
-       KKASSERT(pola == INTR_POLARITY_HIGH || pola == INTR_POLARITY_LOW);
-
-       KKASSERT(irq >= 0 && irq < ioapic_abi_legacy_irq_max);
-       for (cpuid = 0; cpuid < ncpus; ++cpuid) {
-               map = &ioapic_irqmaps[cpuid][irq];
-               if (map->im_type == IOAPIC_IMT_LEGACY)
-                       break;
-       }
-       KKASSERT(cpuid < ncpus);
-
-#ifdef notyet
-       if (map->im_flags & IOAPIC_IMF_CONF) {
-               if (trig != map->im_trig) {
-                       panic("ioapic_intr_config: trig %s -> %s",
-                             intr_str_trigger(map->im_trig),
-                             intr_str_trigger(trig));
-               }
-               if (pola != map->im_pola) {
-                       panic("ioapic_intr_config: pola %s -> %s",
-                             intr_str_polarity(map->im_pola),
-                             intr_str_polarity(pola));
-               }
-               return;
-       }
-#endif
-       map->im_flags |= IOAPIC_IMF_CONF;
-
-       if (trig == map->im_trig && pola == map->im_pola)
-               return;
-
-       if (bootverbose) {
-               kprintf("IOAPIC: irq %d, gsi %d %s/%s -> %s/%s\n",
-                       irq, map->im_gsi,
-                       intr_str_trigger(map->im_trig),
-                       intr_str_polarity(map->im_pola),
-                       intr_str_trigger(trig),
-                       intr_str_polarity(pola));
-       }
-       map->im_trig = trig;
-       map->im_pola = pola;
-
-       pin = ioapic_gsi_pin(map->im_gsi);
-       ioaddr = ioapic_gsi_ioaddr(map->im_gsi);
-
-       info = &ioapic_irqs[irq];
-
-       imen_lock();
-
-       info->io_flags &= ~IOAPIC_IRQI_FLAG_LEVEL;
-       if (map->im_trig == INTR_TRIGGER_LEVEL)
-               info->io_flags |= IOAPIC_IRQI_FLAG_LEVEL;
-
-       ioapic_pin_setup(ioaddr, pin, IDT_OFFSET + irq,
-           map->im_trig, map->im_pola, cpuid);
-
-       imen_unlock();
-}
-
-int
-ioapic_conf_legacy_extint(int irq)
-{
-       struct ioapic_irqinfo *info;
-       struct ioapic_irqmap *map;
-       void *ioaddr;
-       int pin, error, vec;
-
-       /* XXX only irq0 is allowed */
-       KKASSERT(irq == 0);
-
-       vec = IDT_OFFSET + irq;
-
-       if (ioapic_abi_extint_irq == irq)
-               return 0;
-       else if (ioapic_abi_extint_irq >= 0)
-               return EEXIST;
-
-       error = icu_ioapic_extint(irq, vec);
-       if (error)
-               return error;
-
-       /* ExtINT is always targeted to cpu0 */
-       map = &ioapic_irqmaps[0][irq];
-
-       KKASSERT(map->im_type == IOAPIC_IMT_RESERVED ||
-                map->im_type == IOAPIC_IMT_LEGACY);
-       if (map->im_type == IOAPIC_IMT_LEGACY) {
-               if (map->im_flags & IOAPIC_IMF_CONF)
-                       return EEXIST;
-       }
-       ioapic_abi_extint_irq = irq;
-
-       map->im_type = IOAPIC_IMT_LEGACY;
-       map->im_trig = INTR_TRIGGER_EDGE;
-       map->im_pola = INTR_POLARITY_HIGH;
-       map->im_flags = IOAPIC_IMF_CONF;
-
-       map->im_gsi = ioapic_extpin_gsi();
-       KKASSERT(map->im_gsi >= 0);
-
-       if (bootverbose) {
-               kprintf("IOAPIC: irq %d -> extint gsi %d %s/%s\n",
-                       irq, map->im_gsi,
-                       intr_str_trigger(map->im_trig),
-                       intr_str_polarity(map->im_pola));
-       }
-
-       pin = ioapic_gsi_pin(map->im_gsi);
-       ioaddr = ioapic_gsi_ioaddr(map->im_gsi);
-
-       info = &ioapic_irqs[irq];
-
-       imen_lock();
-
-       info->io_addr = ioaddr;
-       info->io_idx = IOAPIC_REDTBL + (2 * pin);
-       info->io_flags = IOAPIC_IRQI_FLAG_MASKED;
-
-       ioapic_extpin_setup(ioaddr, pin, vec);
-
-       imen_unlock();
-
-       return 0;
-}
-
-static int
-ioapic_abi_legacy_intr_cpuid(int irq)
-{
-       const struct ioapic_irqmap *map = NULL;
-       int cpuid;
-
-       KKASSERT(irq >= 0 && irq < ioapic_abi_legacy_irq_max);
-
-       for (cpuid = 0; cpuid < ncpus; ++cpuid) {
-               map = &ioapic_irqmaps[cpuid][irq];
-               if (map->im_type == IOAPIC_IMT_LEGACY)
-                       return cpuid;
-       }
-
-       /* XXX some drivers tries to peek at reserved IRQs */
-       for (cpuid = 0; cpuid < ncpus; ++cpuid) {
-               map = &ioapic_irqmaps[cpuid][irq];
-               KKASSERT(map->im_type == IOAPIC_IMT_RESERVED);
-       }
-       return 0;
-}
-
-static int
-ioapic_abi_gsi_cpuid(int irq, int gsi)
-{
-       char envpath[32];
-       int cpuid = -1;
-
-       KKASSERT(gsi >= 0);
-
-       if (irq == 0 || gsi == 0) {
-               KKASSERT(irq >= 0);
-               if (bootverbose) {
-                       kprintf("IOAPIC: irq %d, gsi %d -> cpu0 (0)\n",
-                           irq, gsi);
-               }
-               return 0;
-       }
-
-       if (irq >= 0 && irq == acpi_sci_irqno()) {
-               if (bootverbose) {
-                       kprintf("IOAPIC: irq %d, gsi %d -> cpu0 (sci)\n",
-                           irq, gsi);
-               }
-               return 0;
-       }
-
-       ksnprintf(envpath, sizeof(envpath), "hw.ioapic.gsi.%d.cpu", gsi);
-       kgetenv_int(envpath, &cpuid);
-
-       if (cpuid < 0) {
-               if (!ioapic_abi_gsi_balance) {
-                       if (irq >= 0 && bootverbose) {
-                               kprintf("IOAPIC: irq %d, gsi %d -> cpu0 "
-                                   "(fixed)\n", irq, gsi);
-                       }
-                       return 0;
-               }
-
-               cpuid = gsi % ncpus;
-               if (irq >= 0 && bootverbose) {
-                       kprintf("IOAPIC: irq %d, gsi %d -> cpu%d (auto)\n",
-                           irq, gsi, cpuid);
-               }
-       } else if (cpuid >= ncpus) {
-               cpuid = ncpus - 1;
-               if (irq >= 0 && bootverbose) {
-                       kprintf("IOAPIC: irq %d, gsi %d -> cpu%d (fixup)\n",
-                           irq, gsi, cpuid);
-               }
-       } else {
-               if (irq >= 0 && bootverbose) {
-                       kprintf("IOAPIC: irq %d, gsi %d -> cpu%d (user)\n",
-                           irq, gsi, cpuid);
-               }
-       }
-       return cpuid;
-}
-
-static void
-ioapic_abi_rman_setup(struct rman *rm)
-{
-       int start, end, i;
-
-       KASSERT(rm->rm_cpuid >= 0 && rm->rm_cpuid < MAXCPU,
-           ("invalid rman cpuid %d", rm->rm_cpuid));
-
-       start = end = -1;
-       for (i = 0; i < IOAPIC_HWI_VECTORS; ++i) {
-               const struct ioapic_irqmap *map =
-                   &ioapic_irqmaps[rm->rm_cpuid][i];
-
-               if (start < 0) {
-                       if (IOAPIC_IMT_ISHWI(map))
-                               start = end = i;
-               } else {
-                       if (IOAPIC_IMT_ISHWI(map)) {
-                               end = i;
-                       } else {
-                               KKASSERT(end >= 0);
-                               if (bootverbose) {
-                                       kprintf("IOAPIC: rman cpu%d %d - %d\n",
-                                           rm->rm_cpuid, start, end);
-                               }
-                               if (rman_manage_region(rm, start, end)) {
-                                       panic("rman_manage_region"
-                                           "(cpu%d %d - %d)", rm->rm_cpuid,
-                                           start, end);
-                               }
-                               start = end = -1;
-                       }
-               }
-       }
-       if (start >= 0) {
-               KKASSERT(end >= 0);
-               if (bootverbose) {
-                       kprintf("IOAPIC: rman cpu%d %d - %d\n",
-                           rm->rm_cpuid, start, end);
-               }
-               if (rman_manage_region(rm, start, end)) {
-                       panic("rman_manage_region(cpu%d %d - %d)",
-                           rm->rm_cpuid, start, end);
-               }
-       }
-}
-
-static int
-ioapic_abi_msi_alloc_intern(int type, const char *desc,
-    int intrs[], int count, int cpuid)
-{
-       int i, error;
-
-       KASSERT(cpuid >= 0 && cpuid < ncpus,
-           ("invalid cpuid %d", cpuid));
-
-       KASSERT(count > 0 && count <= 32, ("invalid count %d", count));
-       KASSERT((count & (count - 1)) == 0,
-           ("count %d is not power of 2", count));
-
-       lwkt_gettoken(&ioapic_irqmap_tok);
-
-       /*
-        * NOTE:
-        * Since IDT_OFFSET is 32, which is the maximum valid 'count',
-        * we do not need to find out the first properly aligned
-        * interrupt vector.
-        */
-
-       error = EMSGSIZE;
-       for (i = ioapic_abi_msi_start; i < IOAPIC_HWI_VECTORS; i += count) {
-               int j;
-
-               if (ioapic_irqmaps[cpuid][i].im_type != IOAPIC_IMT_UNUSED)
-                       continue;
-
-               for (j = 1; j < count; ++j) {
-                       if (ioapic_irqmaps[cpuid][i + j].im_type !=
-                           IOAPIC_IMT_UNUSED)
-                               break;
-               }
-               if (j != count)
-                       continue;
-
-               for (j = 0; j < count; ++j) {
-                       int intr = i + j, cpu;
-
-                       for (cpu = 0; cpu < ncpus; ++cpu) {
-                               struct ioapic_irqmap *map;
-
-                               map = &ioapic_irqmaps[cpu][intr];
-                               KASSERT(map->im_msi_base < 0,
-                                   ("intr %d cpu%d, stale %s-base %d",
-                                    intr, cpu, desc, map->im_msi_base));
-                               KASSERT(map->im_type == IOAPIC_IMT_UNUSED,
-                                   ("intr %d cpu%d, already allocated",
-                                    intr, cpu));
-
-                               if (cpu == cpuid) {
-                                       map->im_type = type;
-                                       map->im_msi_base = i;
-                               } else {
-                                       map->im_type = IOAPIC_IMT_SHADOW;
-                               }
-                       }
-
-                       intrs[j] = intr;
-                       msi_setup(intr);
-
-                       if (bootverbose) {
-                               kprintf("alloc %s intr %d on cpu%d\n",
-                                   desc, intr, cpuid);
-                       }
-               }
-               error = 0;
-               break;
-       }
-
-       lwkt_reltoken(&ioapic_irqmap_tok);
-
-       return error;
-}
-
-static void
-ioapic_abi_msi_release_intern(int type, const char *desc,
-    const int intrs[], int count, int cpuid)
-{
-       int i, msi_base = -1, intr_next = -1, mask;
-
-       KASSERT(cpuid >= 0 && cpuid < ncpus,
-           ("invalid cpuid %d", cpuid));
-
-       KASSERT(count > 0 && count <= 32, ("invalid count %d", count));
-
-       mask = count - 1;
-       KASSERT((count & mask) == 0, ("count %d is not power of 2", count));
-
-       lwkt_gettoken(&ioapic_irqmap_tok);
-
-       for (i = 0; i < count; ++i) {
-               int intr = intrs[i], cpu;
-
-               KASSERT(intr >= 0 && intr < IOAPIC_HWI_VECTORS,
-                   ("invalid intr %d", intr));
-
-               for (cpu = 0; cpu < ncpus; ++cpu) {
-                       struct ioapic_irqmap *map;
-
-                       map = &ioapic_irqmaps[cpu][intr];
-
-                       if (cpu == cpuid) {
-                               KASSERT(map->im_type == type,
-                                   ("trying to release non-%s intr %d cpu%d, "
-                                    "type %d", desc, intr, cpu,
-                                    map->im_type));
-                               KASSERT(map->im_msi_base >= 0 &&
-                                   map->im_msi_base <= intr,
-                                   ("intr %d cpu%d, invalid %s-base %d",
-                                    intr, cpu, desc, map->im_msi_base));
-                               KASSERT((map->im_msi_base & mask) == 0,
-                                   ("intr %d cpu%d, %s-base %d is "
-                                    "not properly aligned %d",
-                                    intr, cpu, desc, map->im_msi_base, count));
-
-                               if (msi_base < 0) {
-                                       msi_base = map->im_msi_base;
-                               } else {
-                                       KASSERT(map->im_msi_base == msi_base,
-                                           ("intr %d cpu%d, "
-                                            "inconsistent %s-base, "
-                                            "was %d, now %d",
-                                            intr, cpu, desc,
-                                            msi_base, map->im_msi_base));
-                               }
-                               map->im_msi_base = -1;
-                       } else {
-                               KASSERT(map->im_type == IOAPIC_IMT_SHADOW,
-                                   ("trying to release non-%ssh intr %d cpu%d, "
-                                    "type %d", desc, intr, cpu,
-                                    map->im_type));
-                               KASSERT(map->im_msi_base < 0,
-                                   ("intr %d cpu%d, invalid %ssh-base %d",
-                                    intr, cpu, desc, map->im_msi_base));
-                       }
-                       map->im_type = IOAPIC_IMT_UNUSED;
-               }
-
-               if (intr_next < intr)
-                       intr_next = intr;
-
-               if (bootverbose) {
-                       kprintf("release %s intr %d on cpu%d\n",
-                           desc, intr, cpuid);
-               }
-       }
-
-       KKASSERT(intr_next > 0);
-       KKASSERT(msi_base >= 0);
-
-       ++intr_next;
-       if (intr_next < IOAPIC_HWI_VECTORS) {
-               int cpu;
-
-               for (cpu = 0; cpu < ncpus; ++cpu) {
-                       const struct ioapic_irqmap *map =
-                           &ioapic_irqmaps[cpu][intr_next];
-
-                       if (map->im_type == type) {
-                               KASSERT(map->im_msi_base != msi_base,
-                                   ("more than %d %s was allocated",
-                                    count, desc));
-                       }
-               }
-       }
-
-       lwkt_reltoken(&ioapic_irqmap_tok);
-}
-
-static int
-ioapic_abi_msi_alloc(int intrs[], int count, int cpuid)
-{
-       return ioapic_abi_msi_alloc_intern(IOAPIC_IMT_MSI, "MSI",
-           intrs, count, cpuid);
-}
-
-static void
-ioapic_abi_msi_release(const int intrs[], int count, int cpuid)
-{
-       ioapic_abi_msi_release_intern(IOAPIC_IMT_MSI, "MSI",
-           intrs, count, cpuid);
-}
-
-static int
-ioapic_abi_msix_alloc(int *intr, int cpuid)
-{
-       return ioapic_abi_msi_alloc_intern(IOAPIC_IMT_MSIX, "MSI-X",
-           intr, 1, cpuid);
-}
-
-static void
-ioapic_abi_msix_release(int intr, int cpuid)
-{
-       ioapic_abi_msi_release_intern(IOAPIC_IMT_MSIX, "MSI-X",
-           &intr, 1, cpuid);
-}
-
-static void
-ioapic_abi_msi_map(int intr, uint64_t *addr, uint32_t *data, int cpuid)
-{
-       const struct ioapic_irqmap *map;
-
-       KASSERT(cpuid >= 0 && cpuid < ncpus,
-           ("invalid cpuid %d", cpuid));
-
-       KASSERT(intr >= 0 && intr < IOAPIC_HWI_VECTORS,
-           ("invalid intr %d", intr));
-
-       lwkt_gettoken(&ioapic_irqmap_tok);
-
-       map = &ioapic_irqmaps[cpuid][intr];
-       KASSERT(map->im_type == IOAPIC_IMT_MSI ||
-           map->im_type == IOAPIC_IMT_MSIX,
-           ("trying to map non-MSI/MSI-X intr %d, type %d", intr, map->im_type));
-       KASSERT(map->im_msi_base >= 0 && map->im_msi_base <= intr,
-           ("intr %d, invalid %s-base %d", intr,
-            map->im_type == IOAPIC_IMT_MSI ? "MSI" : "MSI-X",
-            map->im_msi_base));
-
-       msi_map(map->im_msi_base, addr, data, cpuid);
-
-       if (bootverbose) {
-               kprintf("map %s intr %d on cpu%d\n",
-                   map->im_type == IOAPIC_IMT_MSI ? "MSI" : "MSI-X",
-                   intr, cpuid);
-       }
-
-       lwkt_reltoken(&ioapic_irqmap_tok);
-}
diff --git a/sys/platform/pc32/apic/ioapic_abi.h b/sys/platform/pc32/apic/ioapic_abi.h
deleted file mode 100644 (file)
index 7c548ec..0000000
+++ /dev/null
@@ -1,73 +0,0 @@
-/*
- * Copyright (c) 1991 The Regents of the University of California.
- * Copyright (c) 1996, by Steve Passe.  All rights reserved.
- * Copyright (c) 2005,2008 The DragonFly Project.  All rights reserved.
- * All rights reserved.
- * 
- * This code is derived from software contributed to The DragonFly Project
- * by Matthew Dillon <dillon@backplane.com>
- *
- * This code is derived from software contributed to Berkeley by
- * William Jolitz.
- * 
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in
- *    the documentation and/or other materials provided with the
- *    distribution.
- * 3. Neither the name of The DragonFly Project nor the names of its
- *    contributors may be used to endorse or promote products derived
- *    from this software without specific, prior written permission.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
- * COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
- * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
- * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
- * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- */
-
-#ifndef _ARCH_APIC_IOAPIC_ABI_H_
-#define _ARCH_APIC_IOAPIC_ABI_H_
-
-#ifndef _SYS_BUS_H_
-#include <sys/bus.h>
-#endif
-
-/*
- * NOTE:
- * - Keep size of ioapic_irqinfo power of 2
- * - Update IOAPIC_IRQI_SZSHIFT after changing ioapic_irqinfo size
- */
-struct ioapic_irqinfo {
-       uint32_t        io_flags;       /* IOAPIC_IRQI_FLAG_ */
-       volatile void   *io_addr;
-       int             io_idx;
-       uint32_t        io_pad;
-};
-#define IOAPIC_IRQI_SZSHIFT    4
-
-#define IOAPIC_IRQI_FLAG_LEVEL 0x1     /* default to edge trigger */
-#define IOAPIC_IRQI_FLAG_MASKED        0x2
-
-extern struct ioapic_irqinfo   ioapic_irqs[];
-
-extern struct machintr_abi MachIntrABI_IOAPIC;
-
-int    ioapic_conf_legacy_extint(int);
-void   ioapic_set_legacy_irqmap(int, int, enum intr_trigger,
-           enum intr_polarity);
-void   ioapic_fixup_legacy_irqmaps(void);
-
-#endif /* !_ARCH_APIC_IOAPIC_ABI_H_ */
diff --git a/sys/platform/pc32/apic/ioapic_ipl.h b/sys/platform/pc32/apic/ioapic_ipl.h
deleted file mode 100644 (file)
index 6a325cc..0000000
+++ /dev/null
@@ -1,45 +0,0 @@
-/*-
- * Copyright (c) 1997, by Steve Passe
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. The name of the developer may NOT be used to endorse or promote products
- *    derived from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * $FreeBSD: src/sys/i386/isa/apic_ipl.h,v 1.3 1999/08/28 00:44:36 peter Exp $
- * $DragonFly: src/sys/platform/pc32/apic/apic_ipl.h,v 1.8 2006/10/23 21:50:29 dillon Exp $
- */
-
-#ifndef _ARCH_APIC_IOAPIC_IPL_H_
-#define        _ARCH_APIC_IOAPIC_IPL_H_
-
-#ifdef LOCORE
-
-/*
- * Interrupts may or may not be disabled when using these functions.
- */
-#define IOAPIC_IMASK_LOCK                                              \
-        SPIN_LOCK(imen_spinlock) ;                                     \
-
-#define IOAPIC_IMASK_UNLOCK                                            \
-        SPIN_UNLOCK(imen_spinlock) ;                                   \
-
-#endif
-
-#endif /* !_ARCH_APIC_IOAPIC_IPL_H_ */
diff --git a/sys/platform/pc32/apic/ioapic_ipl.s b/sys/platform/pc32/apic/ioapic_ipl.s
deleted file mode 100644 (file)
index 0639264..0000000
+++ /dev/null
@@ -1,133 +0,0 @@
-/*
- * Copyright (c) 2003,2004 The DragonFly Project.  All rights reserved.
- * 
- * This code is derived from software contributed to The DragonFly Project
- * by Matthew Dillon <dillon@backplane.com>
- * 
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in
- *    the documentation and/or other materials provided with the
- *    distribution.
- * 3. Neither the name of The DragonFly Project nor the names of its
- *    contributors may be used to endorse or promote products derived
- *    from this software without specific, prior written permission.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
- * COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
- * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
- * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
- * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- * 
- * Copyright (c) 1997, by Steve Passe,  All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. The name of the developer may NOT be used to endorse or promote products
- *    derived from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * $FreeBSD: src/sys/i386/isa/apic_ipl.s,v 1.27.2.2 2000/09/30 02:49:35 ps Exp $
- */
-
-#include <machine/asmacros.h>
-#include <machine/segments.h>
-#include <machine/lock.h>
-#include <machine/psl.h>
-#include <machine/trap.h>
-
-#include "apicreg.h"
-#include <machine_base/apic/ioapic_ipl.h>
-#include "assym.s"
-
-       .text
-       SUPERALIGN_TEXT
-
-       /*
-        * Functions to enable and disable a hardware interrupt.  The
-        * IRQ number is passed as an argument.
-        */
-ENTRY(IOAPIC_INTRDIS)
-       IOAPIC_IMASK_LOCK               /* enter critical reg */
-       movl    4(%esp),%eax
-1:
-       shll    $IOAPIC_IRQI_SZSHIFT, %eax
-       orl     $IOAPIC_IRQI_FLAG_MASKED, CNAME(ioapic_irqs) + IOAPIC_IRQI_FLAGS(%eax)
-       movl    CNAME(ioapic_irqs) + IOAPIC_IRQI_ADDR(%eax), %edx
-       movl    CNAME(ioapic_irqs) + IOAPIC_IRQI_IDX(%eax), %ecx
-       testl   %edx, %edx
-       jz      2f
-       movl    %ecx, (%edx)            /* target register index */
-       orl     $IOART_INTMASK, IOAPIC_WINDOW(%edx)
-                                       /* set intmask in target apic reg */
-2:
-       IOAPIC_IMASK_UNLOCK             /* exit critical reg */
-       ret
-
-ENTRY(IOAPIC_INTREN)
-       IOAPIC_IMASK_LOCK               /* enter critical reg */
-       movl    4(%esp), %eax           /* mask into %eax */
-1:
-       shll    $IOAPIC_IRQI_SZSHIFT, %eax
-       andl    $~IOAPIC_IRQI_FLAG_MASKED, CNAME(ioapic_irqs) + IOAPIC_IRQI_FLAGS(%eax)
-       movl    CNAME(ioapic_irqs) + IOAPIC_IRQI_ADDR(%eax), %edx
-       movl    CNAME(ioapic_irqs) + IOAPIC_IRQI_IDX(%eax), %ecx
-       testl   %edx, %edx
-       jz      2f
-       movl    %ecx, (%edx)            /* write the target register index */
-       andl    $~IOART_INTMASK, IOAPIC_WINDOW(%edx)
-                                       /* clear mask bit */
-2:     
-       IOAPIC_IMASK_UNLOCK             /* exit critical reg */
-       ret
-
-/******************************************************************************
- * 
- */
-
-/*
- * u_int ioapic_read(volatile void *ioapic, int select);
- */
-ENTRY(ioapic_read)
-       movl    4(%esp), %edx           /* IOAPIC base register address */
-       movl    8(%esp), %eax           /* target register index */
-       movl    %eax, (%edx)            /* write the target register index */
-       movl    IOAPIC_WINDOW(%edx), %eax /* read the IOAPIC register data */
-       ret                             /* %eax = register value */
-
-/*
- * void ioapic_write(volatile void *ioapic, int select, int value);
- */
-ENTRY(ioapic_write)
-       movl    4(%esp), %edx           /* IOAPIC base register address */
-       movl    8(%esp), %eax           /* target register index */
-       movl    %eax, (%edx)            /* write the target register index */
-       movl    12(%esp), %eax          /* target register value */
-       movl    %eax, IOAPIC_WINDOW(%edx) /* write the IOAPIC register data */
-       ret                             /* %eax = void */
diff --git a/sys/platform/pc32/apic/lapic.c b/sys/platform/pc32/apic/lapic.c
deleted file mode 100644 (file)
index 90cbe78..0000000
+++ /dev/null
@@ -1,775 +0,0 @@
-/*
- * Copyright (c) 1996, by Steve Passe
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. The name of the developer may NOT be used to endorse or promote products
- *    derived from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * $FreeBSD: src/sys/i386/i386/mpapic.c,v 1.37.2.7 2003/01/25 02:31:47 peter Exp $
- */
-
-#include <sys/param.h>
-#include <sys/systm.h>
-#include <sys/kernel.h>
-#include <sys/bus.h>
-#include <sys/machintr.h>
-#include <machine/globaldata.h>
-#include <machine/smp.h>
-#include <machine/cputypes.h>
-#include <machine/md_var.h>
-#include <machine/pmap.h>
-#include <machine/specialreg.h>
-#include <machine_base/apic/lapic.h>
-#include <machine_base/apic/ioapic.h>
-#include <machine_base/apic/ioapic_abi.h>
-#include <machine_base/apic/apicvar.h>
-#include <machine_base/icu/icu_var.h>
-#include <machine/segments.h>
-#include <sys/thread2.h>
-
-#include <machine/intr_machdep.h>
-
-extern int naps;
-
-volatile lapic_t       *lapic;
-
-static void    lapic_timer_calibrate(void);
-static void    lapic_timer_set_divisor(int);
-static void    lapic_timer_fixup_handler(void *);
-static void    lapic_timer_restart_handler(void *);
-
-void           lapic_timer_process(void);
-void           lapic_timer_process_frame(struct intrframe *);
-
-static int     lapic_timer_enable = 1;
-TUNABLE_INT("hw.lapic_timer_enable", &lapic_timer_enable);
-
-static void    lapic_timer_intr_reload(struct cputimer_intr *, sysclock_t);
-static void    lapic_timer_intr_enable(struct cputimer_intr *);
-static void    lapic_timer_intr_restart(struct cputimer_intr *);
-static void    lapic_timer_intr_pmfixup(struct cputimer_intr *);
-
-static struct cputimer_intr lapic_cputimer_intr = {
-       .freq = 0,
-       .reload = lapic_timer_intr_reload,
-       .enable = lapic_timer_intr_enable,
-       .config = cputimer_intr_default_config,
-       .restart = lapic_timer_intr_restart,
-       .pmfixup = lapic_timer_intr_pmfixup,
-       .initclock = cputimer_intr_default_initclock,
-       .next = SLIST_ENTRY_INITIALIZER,
-       .name = "lapic",
-       .type = CPUTIMER_INTR_LAPIC,
-       .prio = CPUTIMER_INTR_PRIO_LAPIC,
-       .caps = CPUTIMER_INTR_CAP_NONE
-};
-
-static int             lapic_timer_divisor_idx = -1;
-static const uint32_t  lapic_timer_divisors[] = {
-       APIC_TDCR_2,    APIC_TDCR_4,    APIC_TDCR_8,    APIC_TDCR_16,
-       APIC_TDCR_32,   APIC_TDCR_64,   APIC_TDCR_128,  APIC_TDCR_1
-};
-#define APIC_TIMER_NDIVISORS (int)(NELEM(lapic_timer_divisors))
-
-/*
- * APIC ID <-> CPU ID mapping structures.
- */
-int    cpu_id_to_apic_id[NAPICID];
-int    apic_id_to_cpu_id[NAPICID];
-int    lapic_enable = 1;
-
-/*
- * Enable LAPIC, configure interrupts.
- */
-void
-lapic_init(boolean_t bsp)
-{
-       uint32_t timer;
-       u_int   temp;
-
-       /*
-        * Install vectors
-        *
-        * Since IDT is shared between BSP and APs, these vectors
-        * only need to be installed once; we do it on BSP.
-        */
-       if (bsp) {
-               if (cpu_vendor_id == CPU_VENDOR_AMD &&
-                   CPUID_TO_FAMILY(cpu_id) >= 0xf) {
-                       uint32_t tcr;
-
-                       /*
-                        * Set the LINTEN bit in the HyperTransport
-                        * Transaction Control Register.
-                        *
-                        * This will cause EXTINT and NMI interrupts
-                        * routed over the hypertransport bus to be
-                        * fed into the LAPIC LINT0/LINT1.  If the bit
-                        * isn't set, the interrupts will go to the
-                        * general cpu INTR/NMI pins.  On a dual-core
-                        * cpu the interrupt winds up going to BOTH cpus.
-                        * The first cpu that does the interrupt ack
-                        * cycle will get the correct interrupt.  The
-                        * second cpu that does it will get a spurious
-                        * interrupt vector (typically IRQ 7).
-                        */
-                       outl(0x0cf8,
-                           (1 << 31) | /* enable */
-                           (0 << 16) | /* bus */
-                           (0x18 << 11) | /* dev (cpu + 0x18) */
-                           (0 << 8) |  /* func */
-                           0x68        /* reg */
-                           );
-                       tcr = inl(0xcfc);
-                       if ((tcr & 0x00010000) == 0) {
-                               kprintf("LAPIC: AMD LINTEN on\n");
-                               outl(0xcfc, tcr|0x00010000);
-                       }
-                       outl(0x0cf8, 0);
-               }
-
-               /* Install a 'Spurious INTerrupt' vector */
-               setidt(XSPURIOUSINT_OFFSET, Xspuriousint,
-                   SDT_SYS386IGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
-
-               /* Install a timer vector */
-               setidt(XTIMER_OFFSET, Xtimer,
-                   SDT_SYS386IGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
-
-               /* Install an inter-CPU IPI for TLB invalidation */
-               setidt(XINVLTLB_OFFSET, Xinvltlb,
-                   SDT_SYS386IGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
-
-               /* Install an inter-CPU IPI for IPIQ messaging */
-               setidt(XIPIQ_OFFSET, Xipiq,
-                   SDT_SYS386IGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
-
-               /* Install an inter-CPU IPI for CPU stop/restart */
-               setidt(XCPUSTOP_OFFSET, Xcpustop,
-                   SDT_SYS386IGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
-       }
-
-       /*
-        * Setup LINT0 as ExtINT on the BSP.  This is theoretically an
-        * aggregate interrupt input from the 8259.  The INTA cycle
-        * will be routed to the external controller (the 8259) which
-        * is expected to supply the vector.
-        *
-        * Must be setup edge triggered, active high.
-        *
-        * Disable LINT0 on BSP, if I/O APIC is enabled.
-        *
-        * Disable LINT0 on the APs.  It doesn't matter what delivery
-        * mode we use because we leave it masked.
-        */
-       temp = lapic->lvt_lint0;
-       temp &= ~(APIC_LVT_MASKED | APIC_LVT_TRIG_MASK | 
-                 APIC_LVT_POLARITY_MASK | APIC_LVT_DM_MASK);
-       if (bsp) {
-               temp |= APIC_LVT_DM_EXTINT;
-               if (ioapic_enable)
-                       temp |= APIC_LVT_MASKED;
-       } else {
-               temp |= APIC_LVT_DM_FIXED | APIC_LVT_MASKED;
-       }
-       lapic->lvt_lint0 = temp;
-
-       /*
-        * Setup LINT1 as NMI.
-        *
-        * Must be setup edge trigger, active high.
-        *
-        * Enable LINT1 on BSP, if I/O APIC is enabled.
-        *
-        * Disable LINT1 on the APs.
-        */
-       temp = lapic->lvt_lint1;
-       temp &= ~(APIC_LVT_MASKED | APIC_LVT_TRIG_MASK | 
-                 APIC_LVT_POLARITY_MASK | APIC_LVT_DM_MASK);
-       temp |= APIC_LVT_MASKED | APIC_LVT_DM_NMI;
-       if (bsp && ioapic_enable)
-               temp &= ~APIC_LVT_MASKED;
-       lapic->lvt_lint1 = temp;
-
-       /*
-        * Mask the LAPIC error interrupt, LAPIC performance counter
-        * interrupt.
-        */
-       lapic->lvt_error = lapic->lvt_error | APIC_LVT_MASKED;
-       lapic->lvt_pcint = lapic->lvt_pcint | APIC_LVT_MASKED;
-
-       /*
-        * Set LAPIC timer vector and mask the LAPIC timer interrupt.
-        */
-       timer = lapic->lvt_timer;
-       timer &= ~APIC_LVTT_VECTOR;
-       timer |= XTIMER_OFFSET;
-       timer |= APIC_LVTT_MASKED;
-       lapic->lvt_timer = timer;
-
-       /*
-        * Set the Task Priority Register as needed.   At the moment allow
-        * interrupts on all cpus (the APs will remain CLId until they are
-        * ready to deal).
-        */
-       temp = lapic->tpr;
-       temp &= ~APIC_TPR_PRIO;         /* clear priority field */
-       lapic->tpr = temp;
-
-       /* 
-        * Enable the LAPIC 
-        */
-       temp = lapic->svr;
-       temp |= APIC_SVR_ENABLE;        /* enable the LAPIC */
-       temp &= ~APIC_SVR_FOCUS_DISABLE; /* enable lopri focus processor */
-
-       /*
-        * Set the spurious interrupt vector.  The low 4 bits of the vector
-        * must be 1111.
-        */
-       if ((XSPURIOUSINT_OFFSET & 0x0F) != 0x0F)
-               panic("bad XSPURIOUSINT_OFFSET: 0x%08x", XSPURIOUSINT_OFFSET);
-       temp &= ~APIC_SVR_VECTOR;
-       temp |= XSPURIOUSINT_OFFSET;
-
-       lapic->svr = temp;
-
-       /*
-        * Pump out a few EOIs to clean out interrupts that got through
-        * before we were able to set the TPR.
-        */
-       lapic->eoi = 0;
-       lapic->eoi = 0;
-       lapic->eoi = 0;
-
-       if (bsp) {
-               lapic_timer_calibrate();
-               if (lapic_timer_enable) {
-                       cputimer_intr_register(&lapic_cputimer_intr);
-                       cputimer_intr_select(&lapic_cputimer_intr, 0);
-               }
-       } else {
-               lapic_timer_set_divisor(lapic_timer_divisor_idx);
-       }
-
-       if (bootverbose)
-               apic_dump("apic_initialize()");
-}
-
-static void
-lapic_timer_set_divisor(int divisor_idx)
-{
-       KKASSERT(divisor_idx >= 0 && divisor_idx < APIC_TIMER_NDIVISORS);
-       lapic->dcr_timer = lapic_timer_divisors[divisor_idx];
-}
-
-static void
-lapic_timer_oneshot(u_int count)
-{
-       uint32_t value;
-
-       value = lapic->lvt_timer;
-       value &= ~APIC_LVTT_PERIODIC;
-       lapic->lvt_timer = value;
-       lapic->icr_timer = count;
-}
-
-static void
-lapic_timer_oneshot_quick(u_int count)
-{
-       lapic->icr_timer = count;
-}
-
-static void
-lapic_timer_calibrate(void)
-{
-       sysclock_t value;
-
-       /* Try to calibrate the local APIC timer. */
-       for (lapic_timer_divisor_idx = 0;
-            lapic_timer_divisor_idx < APIC_TIMER_NDIVISORS;
-            lapic_timer_divisor_idx++) {
-               lapic_timer_set_divisor(lapic_timer_divisor_idx);
-               lapic_timer_oneshot(APIC_TIMER_MAX_COUNT);
-               DELAY(2000000);
-               value = APIC_TIMER_MAX_COUNT - lapic->ccr_timer;
-               if (value != APIC_TIMER_MAX_COUNT)
-                       break;
-       }
-       if (lapic_timer_divisor_idx >= APIC_TIMER_NDIVISORS)
-               panic("lapic: no proper timer divisor?!");
-       lapic_cputimer_intr.freq = value / 2;
-
-       kprintf("lapic: divisor index %d, frequency %u Hz\n",
-               lapic_timer_divisor_idx, lapic_cputimer_intr.freq);
-}
-
-static void
-lapic_timer_process_oncpu(struct globaldata *gd, struct intrframe *frame)
-{
-       sysclock_t count;
-
-       gd->gd_timer_running = 0;
-
-       count = sys_cputimer->count();
-       if (TAILQ_FIRST(&gd->gd_systimerq) != NULL)