igb: Cache align msix, rx and tx data
authorSepherosa Ziehau <sephe@dragonflybsd.org>
Sat, 6 Oct 2012 15:03:22 +0000 (23:03 +0800)
committerSepherosa Ziehau <sephe@dragonflybsd.org>
Sat, 6 Oct 2012 15:22:14 +0000 (23:22 +0800)
sys/dev/netif/igb/if_igb.h

index 539f623..1e5c96d 100644 (file)
@@ -237,7 +237,7 @@ struct igb_tx_ring {
 
        u_long                  no_desc_avail;
        u_long                  tx_packets;
-};
+} __cachealign;
 
 /*
  * Receive ring: one per queue
@@ -266,7 +266,7 @@ struct igb_rx_ring {
 
        /* Soft stats */
        u_long                  rx_packets;
-};
+} __cachealign;
 
 struct igb_msix_data {
        struct lwkt_serialize   *msix_serialize;
@@ -287,7 +287,7 @@ struct igb_msix_data {
        u_int                   msix_vector;
        int                     msix_rate;
        char                    msix_rate_desc[32];
-};
+} __cachealign;
 
 struct igb_softc {
        struct arpcom           arpcom;