From: Sepherosa Ziehau <sephe@dragonflybsd.org>
Date: Sun, 14 Aug 2011 12:39:58 +0000 (+0800)
Subject: msk(4): Do not blindly clear entire GPHY control register.
X-Git-Tag: v2.12.0~208
X-Git-Url: https://gitweb.dragonflybsd.org/dragonfly.git/commitdiff_plain/86d08fa7ce9ed147ba85a00654126703f2e637ea?ds=sidebyside

msk(4): Do not blindly clear entire GPHY control register.

It seems some bits of the register is used for other purposes such
that clearing these bits resulted in unexpected results such as
corrupted RX frames or missing LE status updates.

Obtained-from: FreeBSD 222219
---

diff --git a/sys/dev/netif/msk/if_msk.c b/sys/dev/netif/msk/if_msk.c
index 9857285cae..6894a6db53 100644
--- a/sys/dev/netif/msk/if_msk.c
+++ b/sys/dev/netif/msk/if_msk.c
@@ -1185,8 +1185,8 @@ mskc_reset(struct msk_softc *sc)
 	/* Reset GPHY/GMAC Control */
 	for (i = 0; i < sc->msk_num_port; i++) {
 		/* GPHY Control reset. */
-		CSR_WRITE_4(sc, MR_ADDR(i, GPHY_CTRL), GPC_RST_SET);
-		CSR_WRITE_4(sc, MR_ADDR(i, GPHY_CTRL), GPC_RST_CLR);
+		CSR_WRITE_1(sc, MR_ADDR(i, GPHY_CTRL), GPC_RST_SET);
+		CSR_WRITE_1(sc, MR_ADDR(i, GPHY_CTRL), GPC_RST_CLR);
 		/* GMAC Control reset. */
 		CSR_WRITE_4(sc, MR_ADDR(i, GMAC_CTRL), GMC_RST_SET);
 		CSR_WRITE_4(sc, MR_ADDR(i, GMAC_CTRL), GMC_RST_CLR);