bnx: Dispatch state timer to the same CPU as MSI/legacy interrupt CPU
[dragonfly.git] / sys / dev / netif / bnx / if_bnx.c
2012-07-26 Sepherosa Ziehaubnx: Dispatch state timer to the same CPU as MSI/legacy...
2012-07-26 Sepherosa Ziehaubnx: Use MPSAFE callout
2012-07-26 Sepherosa Ziehaubnx: Add support for BCM57766 chips
2012-07-26 Sepherosa Ziehaubnx: BCM57791 and BCM57795 are 10/100 only
2012-07-26 Sepherosa Ziehaubnx: Reconfigure DMA read/write control register
2012-07-26 Sepherosa Ziehaubnx: Enable MBUF low attention on buffer manager
2012-07-26 Sepherosa Ziehaubnx: Using 57765_FAMILY to conf Low Watermark Maximum...
2012-07-26 Sepherosa Ziehaubnx: Properly configure PCI-E PL/DL registers and MAC...
2012-07-26 Sepherosa Ziehaubnx: Adjust RX/TX ring limit for BCM57785 family
2012-07-26 Sepherosa Ziehaubnx: Remove unused code
2012-07-26 Sepherosa Ziehaubge/bnx: Avoid using magic register name
2012-07-26 Sepherosa Ziehaubnx: UDP hardware checksum offloading works
2012-07-26 Sepherosa Ziehaubnx: Utilize BNX_IS_5717_PLUS
2012-07-26 Sepherosa Ziehaubnx: Add macros to further differentiate BCM57785 and...
2012-07-19 Sepherosa Ziehaubnx: Add BCM5718 and BCM57785 chip families support