From d97cabe2e26428130d8fb8aed7106f6c586fe401 Mon Sep 17 00:00:00 2001 From: Matthew Dillon Date: Wed, 7 Jan 2004 20:21:20 +0000 Subject: [PATCH] Fix a bug introduced in the last commit. When calculating the delta count from the 8254 we have to use timer0_max_count + 1 instead of timer0_max_count because our frequency correction may load timer0_max_count + 1. Implement clkintr_pending in the FAST_INTR path as well as the normal INTR path. --- sys/i386/icu/icu_vector.s | 40 ++++++++++++++++-------------- sys/i386/isa/clock.c | 10 +++++--- sys/i386/isa/icu_vector.s | 40 ++++++++++++++++-------------- sys/platform/pc32/icu/icu_vector.s | 40 ++++++++++++++++-------------- sys/platform/pc32/isa/clock.c | 10 +++++--- sys/platform/pc32/isa/icu_vector.s | 40 ++++++++++++++++-------------- 6 files changed, 98 insertions(+), 82 deletions(-) diff --git a/sys/i386/icu/icu_vector.s b/sys/i386/icu/icu_vector.s index dcf406bf6f..866c63a521 100644 --- a/sys/i386/icu/icu_vector.s +++ b/sys/i386/icu/icu_vector.s @@ -1,7 +1,7 @@ /* * from: vector.s, 386BSD 0.1 unknown origin * $FreeBSD: src/sys/i386/isa/icu_vector.s,v 1.14.2.2 2000/07/18 21:12:42 dfr Exp $ - * $DragonFly: src/sys/i386/icu/Attic/icu_vector.s,v 1.14 2003/08/25 19:50:32 dillon Exp $ + * $DragonFly: src/sys/i386/icu/Attic/icu_vector.s,v 1.15 2004/01/07 20:21:20 dillon Exp $ */ /* @@ -111,12 +111,13 @@ * prefixes. */ -#define FAST_INTR(irq_num, vec_name, icu, enable_icus) \ +#define FAST_INTR(irq_num, vec_name, icu, enable_icus, maybe_extra_ipending) \ .text ; \ SUPERALIGN_TEXT ; \ IDTVEC(vec_name) ; \ PUSH_FRAME ; \ FAKE_MCOUNT(13*4(%esp)) ; \ + maybe_extra_ipending ; \ MASK_IRQ(icu, irq_num) ; \ enable_icus ; \ movl PCPU(curthread),%ebx ; \ @@ -255,25 +256,26 @@ IDTVEC(vec_name) ; \ popl %ebp ; \ ret ; \ +#define CLKINTR_PENDING movl $1,CNAME(clkintr_pending) + MCOUNT_LABEL(bintr) - FAST_INTR(0,fastintr0, IO_ICU1, ENABLE_ICU1) - FAST_INTR(1,fastintr1, IO_ICU1, ENABLE_ICU1) - FAST_INTR(2,fastintr2, IO_ICU1, ENABLE_ICU1) - FAST_INTR(3,fastintr3, IO_ICU1, ENABLE_ICU1) - FAST_INTR(4,fastintr4, IO_ICU1, ENABLE_ICU1) - FAST_INTR(5,fastintr5, IO_ICU1, ENABLE_ICU1) - FAST_INTR(6,fastintr6, IO_ICU1, ENABLE_ICU1) - FAST_INTR(7,fastintr7, IO_ICU1, ENABLE_ICU1) - FAST_INTR(8,fastintr8, IO_ICU2, ENABLE_ICU1_AND_2) - FAST_INTR(9,fastintr9, IO_ICU2, ENABLE_ICU1_AND_2) - FAST_INTR(10,fastintr10, IO_ICU2, ENABLE_ICU1_AND_2) - FAST_INTR(11,fastintr11, IO_ICU2, ENABLE_ICU1_AND_2) - FAST_INTR(12,fastintr12, IO_ICU2, ENABLE_ICU1_AND_2) - FAST_INTR(13,fastintr13, IO_ICU2, ENABLE_ICU1_AND_2) - FAST_INTR(14,fastintr14, IO_ICU2, ENABLE_ICU1_AND_2) - FAST_INTR(15,fastintr15, IO_ICU2, ENABLE_ICU1_AND_2) + FAST_INTR(0,fastintr0, IO_ICU1, ENABLE_ICU1, CLKINTR_PENDING) + FAST_INTR(1,fastintr1, IO_ICU1, ENABLE_ICU1,) + FAST_INTR(2,fastintr2, IO_ICU1, ENABLE_ICU1,) + FAST_INTR(3,fastintr3, IO_ICU1, ENABLE_ICU1,) + FAST_INTR(4,fastintr4, IO_ICU1, ENABLE_ICU1,) + FAST_INTR(5,fastintr5, IO_ICU1, ENABLE_ICU1,) + FAST_INTR(6,fastintr6, IO_ICU1, ENABLE_ICU1,) + FAST_INTR(7,fastintr7, IO_ICU1, ENABLE_ICU1,) + FAST_INTR(8,fastintr8, IO_ICU2, ENABLE_ICU1_AND_2,) + FAST_INTR(9,fastintr9, IO_ICU2, ENABLE_ICU1_AND_2,) + FAST_INTR(10,fastintr10, IO_ICU2, ENABLE_ICU1_AND_2,) + FAST_INTR(11,fastintr11, IO_ICU2, ENABLE_ICU1_AND_2,) + FAST_INTR(12,fastintr12, IO_ICU2, ENABLE_ICU1_AND_2,) + FAST_INTR(13,fastintr13, IO_ICU2, ENABLE_ICU1_AND_2,) + FAST_INTR(14,fastintr14, IO_ICU2, ENABLE_ICU1_AND_2,) + FAST_INTR(15,fastintr15, IO_ICU2, ENABLE_ICU1_AND_2,) -#define CLKINTR_PENDING movl $1,CNAME(clkintr_pending) INTR(0,intr0, IO_ICU1, ENABLE_ICU1, al, CLKINTR_PENDING) INTR(1,intr1, IO_ICU1, ENABLE_ICU1, al,) INTR(2,intr2, IO_ICU1, ENABLE_ICU1, al,) diff --git a/sys/i386/isa/clock.c b/sys/i386/isa/clock.c index deb91d5088..e20e9fea11 100644 --- a/sys/i386/isa/clock.c +++ b/sys/i386/isa/clock.c @@ -35,7 +35,7 @@ * * from: @(#)clock.c 7.2 (Berkeley) 5/12/91 * $FreeBSD: src/sys/i386/isa/clock.c,v 1.149.2.6 2002/11/02 04:41:50 iwasaki Exp $ - * $DragonFly: src/sys/i386/isa/Attic/clock.c,v 1.8 2004/01/07 10:59:09 dillon Exp $ + * $DragonFly: src/sys/i386/isa/Attic/clock.c,v 1.9 2004/01/07 20:21:20 dillon Exp $ */ /* @@ -1226,12 +1226,16 @@ i8254_get_timecount(struct timecounter *tc) ef = read_eflags(); clock_lock(); - /* Select timer0 and latch counter value. */ + /* + * Select timer0 and latch counter value. Because we may reload + * the counter with timer0_max_count + 1 to correct the frequency + * our delta count calculation must use timer0_max_count + 1. + */ outb(TIMER_MODE, TIMER_SEL0 | TIMER_LATCH); low = inb(TIMER_CNTR0); high = inb(TIMER_CNTR0); - count = timer0_max_count - ((high << 8) | low); + count = timer0_max_count + 1 - ((high << 8) | low); if (count < i8254_lastcount || (!i8254_ticked && (clkintr_pending || ((count < 20 || (!(ef & PSL_I) && count < timer0_max_count / 2u)) && diff --git a/sys/i386/isa/icu_vector.s b/sys/i386/isa/icu_vector.s index ca2a3b323a..ad4a2d8d62 100644 --- a/sys/i386/isa/icu_vector.s +++ b/sys/i386/isa/icu_vector.s @@ -1,7 +1,7 @@ /* * from: vector.s, 386BSD 0.1 unknown origin * $FreeBSD: src/sys/i386/isa/icu_vector.s,v 1.14.2.2 2000/07/18 21:12:42 dfr Exp $ - * $DragonFly: src/sys/i386/isa/Attic/icu_vector.s,v 1.14 2003/08/25 19:50:32 dillon Exp $ + * $DragonFly: src/sys/i386/isa/Attic/icu_vector.s,v 1.15 2004/01/07 20:21:20 dillon Exp $ */ /* @@ -111,12 +111,13 @@ * prefixes. */ -#define FAST_INTR(irq_num, vec_name, icu, enable_icus) \ +#define FAST_INTR(irq_num, vec_name, icu, enable_icus, maybe_extra_ipending) \ .text ; \ SUPERALIGN_TEXT ; \ IDTVEC(vec_name) ; \ PUSH_FRAME ; \ FAKE_MCOUNT(13*4(%esp)) ; \ + maybe_extra_ipending ; \ MASK_IRQ(icu, irq_num) ; \ enable_icus ; \ movl PCPU(curthread),%ebx ; \ @@ -255,25 +256,26 @@ IDTVEC(vec_name) ; \ popl %ebp ; \ ret ; \ +#define CLKINTR_PENDING movl $1,CNAME(clkintr_pending) + MCOUNT_LABEL(bintr) - FAST_INTR(0,fastintr0, IO_ICU1, ENABLE_ICU1) - FAST_INTR(1,fastintr1, IO_ICU1, ENABLE_ICU1) - FAST_INTR(2,fastintr2, IO_ICU1, ENABLE_ICU1) - FAST_INTR(3,fastintr3, IO_ICU1, ENABLE_ICU1) - FAST_INTR(4,fastintr4, IO_ICU1, ENABLE_ICU1) - FAST_INTR(5,fastintr5, IO_ICU1, ENABLE_ICU1) - FAST_INTR(6,fastintr6, IO_ICU1, ENABLE_ICU1) - FAST_INTR(7,fastintr7, IO_ICU1, ENABLE_ICU1) - FAST_INTR(8,fastintr8, IO_ICU2, ENABLE_ICU1_AND_2) - FAST_INTR(9,fastintr9, IO_ICU2, ENABLE_ICU1_AND_2) - FAST_INTR(10,fastintr10, IO_ICU2, ENABLE_ICU1_AND_2) - FAST_INTR(11,fastintr11, IO_ICU2, ENABLE_ICU1_AND_2) - FAST_INTR(12,fastintr12, IO_ICU2, ENABLE_ICU1_AND_2) - FAST_INTR(13,fastintr13, IO_ICU2, ENABLE_ICU1_AND_2) - FAST_INTR(14,fastintr14, IO_ICU2, ENABLE_ICU1_AND_2) - FAST_INTR(15,fastintr15, IO_ICU2, ENABLE_ICU1_AND_2) + FAST_INTR(0,fastintr0, IO_ICU1, ENABLE_ICU1, CLKINTR_PENDING) + FAST_INTR(1,fastintr1, IO_ICU1, ENABLE_ICU1,) + FAST_INTR(2,fastintr2, IO_ICU1, ENABLE_ICU1,) + FAST_INTR(3,fastintr3, IO_ICU1, ENABLE_ICU1,) + FAST_INTR(4,fastintr4, IO_ICU1, ENABLE_ICU1,) + FAST_INTR(5,fastintr5, IO_ICU1, ENABLE_ICU1,) + FAST_INTR(6,fastintr6, IO_ICU1, ENABLE_ICU1,) + FAST_INTR(7,fastintr7, IO_ICU1, ENABLE_ICU1,) + FAST_INTR(8,fastintr8, IO_ICU2, ENABLE_ICU1_AND_2,) + FAST_INTR(9,fastintr9, IO_ICU2, ENABLE_ICU1_AND_2,) + FAST_INTR(10,fastintr10, IO_ICU2, ENABLE_ICU1_AND_2,) + FAST_INTR(11,fastintr11, IO_ICU2, ENABLE_ICU1_AND_2,) + FAST_INTR(12,fastintr12, IO_ICU2, ENABLE_ICU1_AND_2,) + FAST_INTR(13,fastintr13, IO_ICU2, ENABLE_ICU1_AND_2,) + FAST_INTR(14,fastintr14, IO_ICU2, ENABLE_ICU1_AND_2,) + FAST_INTR(15,fastintr15, IO_ICU2, ENABLE_ICU1_AND_2,) -#define CLKINTR_PENDING movl $1,CNAME(clkintr_pending) INTR(0,intr0, IO_ICU1, ENABLE_ICU1, al, CLKINTR_PENDING) INTR(1,intr1, IO_ICU1, ENABLE_ICU1, al,) INTR(2,intr2, IO_ICU1, ENABLE_ICU1, al,) diff --git a/sys/platform/pc32/icu/icu_vector.s b/sys/platform/pc32/icu/icu_vector.s index 9ca078ae34..d54f7be474 100644 --- a/sys/platform/pc32/icu/icu_vector.s +++ b/sys/platform/pc32/icu/icu_vector.s @@ -1,7 +1,7 @@ /* * from: vector.s, 386BSD 0.1 unknown origin * $FreeBSD: src/sys/i386/isa/icu_vector.s,v 1.14.2.2 2000/07/18 21:12:42 dfr Exp $ - * $DragonFly: src/sys/platform/pc32/icu/icu_vector.s,v 1.14 2003/08/25 19:50:32 dillon Exp $ + * $DragonFly: src/sys/platform/pc32/icu/icu_vector.s,v 1.15 2004/01/07 20:21:20 dillon Exp $ */ /* @@ -111,12 +111,13 @@ * prefixes. */ -#define FAST_INTR(irq_num, vec_name, icu, enable_icus) \ +#define FAST_INTR(irq_num, vec_name, icu, enable_icus, maybe_extra_ipending) \ .text ; \ SUPERALIGN_TEXT ; \ IDTVEC(vec_name) ; \ PUSH_FRAME ; \ FAKE_MCOUNT(13*4(%esp)) ; \ + maybe_extra_ipending ; \ MASK_IRQ(icu, irq_num) ; \ enable_icus ; \ movl PCPU(curthread),%ebx ; \ @@ -255,25 +256,26 @@ IDTVEC(vec_name) ; \ popl %ebp ; \ ret ; \ +#define CLKINTR_PENDING movl $1,CNAME(clkintr_pending) + MCOUNT_LABEL(bintr) - FAST_INTR(0,fastintr0, IO_ICU1, ENABLE_ICU1) - FAST_INTR(1,fastintr1, IO_ICU1, ENABLE_ICU1) - FAST_INTR(2,fastintr2, IO_ICU1, ENABLE_ICU1) - FAST_INTR(3,fastintr3, IO_ICU1, ENABLE_ICU1) - FAST_INTR(4,fastintr4, IO_ICU1, ENABLE_ICU1) - FAST_INTR(5,fastintr5, IO_ICU1, ENABLE_ICU1) - FAST_INTR(6,fastintr6, IO_ICU1, ENABLE_ICU1) - FAST_INTR(7,fastintr7, IO_ICU1, ENABLE_ICU1) - FAST_INTR(8,fastintr8, IO_ICU2, ENABLE_ICU1_AND_2) - FAST_INTR(9,fastintr9, IO_ICU2, ENABLE_ICU1_AND_2) - FAST_INTR(10,fastintr10, IO_ICU2, ENABLE_ICU1_AND_2) - FAST_INTR(11,fastintr11, IO_ICU2, ENABLE_ICU1_AND_2) - FAST_INTR(12,fastintr12, IO_ICU2, ENABLE_ICU1_AND_2) - FAST_INTR(13,fastintr13, IO_ICU2, ENABLE_ICU1_AND_2) - FAST_INTR(14,fastintr14, IO_ICU2, ENABLE_ICU1_AND_2) - FAST_INTR(15,fastintr15, IO_ICU2, ENABLE_ICU1_AND_2) + FAST_INTR(0,fastintr0, IO_ICU1, ENABLE_ICU1, CLKINTR_PENDING) + FAST_INTR(1,fastintr1, IO_ICU1, ENABLE_ICU1,) + FAST_INTR(2,fastintr2, IO_ICU1, ENABLE_ICU1,) + FAST_INTR(3,fastintr3, IO_ICU1, ENABLE_ICU1,) + FAST_INTR(4,fastintr4, IO_ICU1, ENABLE_ICU1,) + FAST_INTR(5,fastintr5, IO_ICU1, ENABLE_ICU1,) + FAST_INTR(6,fastintr6, IO_ICU1, ENABLE_ICU1,) + FAST_INTR(7,fastintr7, IO_ICU1, ENABLE_ICU1,) + FAST_INTR(8,fastintr8, IO_ICU2, ENABLE_ICU1_AND_2,) + FAST_INTR(9,fastintr9, IO_ICU2, ENABLE_ICU1_AND_2,) + FAST_INTR(10,fastintr10, IO_ICU2, ENABLE_ICU1_AND_2,) + FAST_INTR(11,fastintr11, IO_ICU2, ENABLE_ICU1_AND_2,) + FAST_INTR(12,fastintr12, IO_ICU2, ENABLE_ICU1_AND_2,) + FAST_INTR(13,fastintr13, IO_ICU2, ENABLE_ICU1_AND_2,) + FAST_INTR(14,fastintr14, IO_ICU2, ENABLE_ICU1_AND_2,) + FAST_INTR(15,fastintr15, IO_ICU2, ENABLE_ICU1_AND_2,) -#define CLKINTR_PENDING movl $1,CNAME(clkintr_pending) INTR(0,intr0, IO_ICU1, ENABLE_ICU1, al, CLKINTR_PENDING) INTR(1,intr1, IO_ICU1, ENABLE_ICU1, al,) INTR(2,intr2, IO_ICU1, ENABLE_ICU1, al,) diff --git a/sys/platform/pc32/isa/clock.c b/sys/platform/pc32/isa/clock.c index 05b08197d4..c9c7fb55d2 100644 --- a/sys/platform/pc32/isa/clock.c +++ b/sys/platform/pc32/isa/clock.c @@ -35,7 +35,7 @@ * * from: @(#)clock.c 7.2 (Berkeley) 5/12/91 * $FreeBSD: src/sys/i386/isa/clock.c,v 1.149.2.6 2002/11/02 04:41:50 iwasaki Exp $ - * $DragonFly: src/sys/platform/pc32/isa/clock.c,v 1.8 2004/01/07 10:59:09 dillon Exp $ + * $DragonFly: src/sys/platform/pc32/isa/clock.c,v 1.9 2004/01/07 20:21:20 dillon Exp $ */ /* @@ -1226,12 +1226,16 @@ i8254_get_timecount(struct timecounter *tc) ef = read_eflags(); clock_lock(); - /* Select timer0 and latch counter value. */ + /* + * Select timer0 and latch counter value. Because we may reload + * the counter with timer0_max_count + 1 to correct the frequency + * our delta count calculation must use timer0_max_count + 1. + */ outb(TIMER_MODE, TIMER_SEL0 | TIMER_LATCH); low = inb(TIMER_CNTR0); high = inb(TIMER_CNTR0); - count = timer0_max_count - ((high << 8) | low); + count = timer0_max_count + 1 - ((high << 8) | low); if (count < i8254_lastcount || (!i8254_ticked && (clkintr_pending || ((count < 20 || (!(ef & PSL_I) && count < timer0_max_count / 2u)) && diff --git a/sys/platform/pc32/isa/icu_vector.s b/sys/platform/pc32/isa/icu_vector.s index 4ccb076ba5..ec4e0b32a3 100644 --- a/sys/platform/pc32/isa/icu_vector.s +++ b/sys/platform/pc32/isa/icu_vector.s @@ -1,7 +1,7 @@ /* * from: vector.s, 386BSD 0.1 unknown origin * $FreeBSD: src/sys/i386/isa/icu_vector.s,v 1.14.2.2 2000/07/18 21:12:42 dfr Exp $ - * $DragonFly: src/sys/platform/pc32/isa/Attic/icu_vector.s,v 1.14 2003/08/25 19:50:32 dillon Exp $ + * $DragonFly: src/sys/platform/pc32/isa/Attic/icu_vector.s,v 1.15 2004/01/07 20:21:20 dillon Exp $ */ /* @@ -111,12 +111,13 @@ * prefixes. */ -#define FAST_INTR(irq_num, vec_name, icu, enable_icus) \ +#define FAST_INTR(irq_num, vec_name, icu, enable_icus, maybe_extra_ipending) \ .text ; \ SUPERALIGN_TEXT ; \ IDTVEC(vec_name) ; \ PUSH_FRAME ; \ FAKE_MCOUNT(13*4(%esp)) ; \ + maybe_extra_ipending ; \ MASK_IRQ(icu, irq_num) ; \ enable_icus ; \ movl PCPU(curthread),%ebx ; \ @@ -255,25 +256,26 @@ IDTVEC(vec_name) ; \ popl %ebp ; \ ret ; \ +#define CLKINTR_PENDING movl $1,CNAME(clkintr_pending) + MCOUNT_LABEL(bintr) - FAST_INTR(0,fastintr0, IO_ICU1, ENABLE_ICU1) - FAST_INTR(1,fastintr1, IO_ICU1, ENABLE_ICU1) - FAST_INTR(2,fastintr2, IO_ICU1, ENABLE_ICU1) - FAST_INTR(3,fastintr3, IO_ICU1, ENABLE_ICU1) - FAST_INTR(4,fastintr4, IO_ICU1, ENABLE_ICU1) - FAST_INTR(5,fastintr5, IO_ICU1, ENABLE_ICU1) - FAST_INTR(6,fastintr6, IO_ICU1, ENABLE_ICU1) - FAST_INTR(7,fastintr7, IO_ICU1, ENABLE_ICU1) - FAST_INTR(8,fastintr8, IO_ICU2, ENABLE_ICU1_AND_2) - FAST_INTR(9,fastintr9, IO_ICU2, ENABLE_ICU1_AND_2) - FAST_INTR(10,fastintr10, IO_ICU2, ENABLE_ICU1_AND_2) - FAST_INTR(11,fastintr11, IO_ICU2, ENABLE_ICU1_AND_2) - FAST_INTR(12,fastintr12, IO_ICU2, ENABLE_ICU1_AND_2) - FAST_INTR(13,fastintr13, IO_ICU2, ENABLE_ICU1_AND_2) - FAST_INTR(14,fastintr14, IO_ICU2, ENABLE_ICU1_AND_2) - FAST_INTR(15,fastintr15, IO_ICU2, ENABLE_ICU1_AND_2) + FAST_INTR(0,fastintr0, IO_ICU1, ENABLE_ICU1, CLKINTR_PENDING) + FAST_INTR(1,fastintr1, IO_ICU1, ENABLE_ICU1,) + FAST_INTR(2,fastintr2, IO_ICU1, ENABLE_ICU1,) + FAST_INTR(3,fastintr3, IO_ICU1, ENABLE_ICU1,) + FAST_INTR(4,fastintr4, IO_ICU1, ENABLE_ICU1,) + FAST_INTR(5,fastintr5, IO_ICU1, ENABLE_ICU1,) + FAST_INTR(6,fastintr6, IO_ICU1, ENABLE_ICU1,) + FAST_INTR(7,fastintr7, IO_ICU1, ENABLE_ICU1,) + FAST_INTR(8,fastintr8, IO_ICU2, ENABLE_ICU1_AND_2,) + FAST_INTR(9,fastintr9, IO_ICU2, ENABLE_ICU1_AND_2,) + FAST_INTR(10,fastintr10, IO_ICU2, ENABLE_ICU1_AND_2,) + FAST_INTR(11,fastintr11, IO_ICU2, ENABLE_ICU1_AND_2,) + FAST_INTR(12,fastintr12, IO_ICU2, ENABLE_ICU1_AND_2,) + FAST_INTR(13,fastintr13, IO_ICU2, ENABLE_ICU1_AND_2,) + FAST_INTR(14,fastintr14, IO_ICU2, ENABLE_ICU1_AND_2,) + FAST_INTR(15,fastintr15, IO_ICU2, ENABLE_ICU1_AND_2,) -#define CLKINTR_PENDING movl $1,CNAME(clkintr_pending) INTR(0,intr0, IO_ICU1, ENABLE_ICU1, al, CLKINTR_PENDING) INTR(1,intr1, IO_ICU1, ENABLE_ICU1, al,) INTR(2,intr2, IO_ICU1, ENABLE_ICU1, al,) -- 2.41.0