From fc3f9779a7eaae77ebf45424093fed8e689a9c7d Mon Sep 17 00:00:00 2001 From: Simon Schubert Date: Tue, 21 Aug 2007 19:40:24 +0000 Subject: [PATCH] The first commit of a series of 6 commits for the amd64 port. This commit includes header files for amd64 cpu that are in sys/cpu/amd64/include. The #1 task to port for amd64 is to get the world/kernel cross-compiled for the 64-bit target. This involves creating a platform and cpu target for the build. The skeleton infrastructure for the cpu and platform is the sys/cpu/amd64 directory and the sys/platform/pc64 directory. The first stage of this #1 task is to have the world cross-build. It includes the building of cross toolchains, the libraries and the world. This series of commits makes the world cross-build (buildworld) for the amd64 port with these environment variables: TARGET_CPU=amd64; TARGET_PLATFORM=pc64; NO_GCC41=1 This is the first commit: resurrect headers for sys/cpu/amd64/include from CVS Attic; patch and mark them as CPU specific. On-behalf-of: Noah Yan Submitted-by: Noah Yan --- sys/cpu/amd64/include/asm.h | 84 ++++ sys/cpu/amd64/include/atomic.h | 583 +++++++++++++++++++++++ sys/cpu/amd64/include/coredump.h | 14 + sys/cpu/amd64/include/cpu.h | 63 +++ sys/cpu/amd64/include/cpufunc.h | 795 +++++++++++++++++++++++++++++++ sys/cpu/amd64/include/elf.h | 149 ++++++ sys/cpu/amd64/include/endian.h | 199 ++++++++ sys/cpu/amd64/include/exec.h | 43 ++ sys/cpu/amd64/include/float.h | 76 +++ sys/cpu/amd64/include/frame.h | 124 +++++ sys/cpu/amd64/include/ieee.h | 97 ++++ sys/cpu/amd64/include/ieeefp.h | 293 ++++++++++++ sys/cpu/amd64/include/inttypes.h | 221 +++++++++ sys/cpu/amd64/include/limits.h | 100 ++++ sys/cpu/amd64/include/math.h | 12 + sys/cpu/amd64/include/npx.h | 161 +++++++ sys/cpu/amd64/include/param.h | 260 ++++++++++ sys/cpu/amd64/include/pmap.h | 294 ++++++++++++ sys/cpu/amd64/include/profile.h | 169 +++++++ sys/cpu/amd64/include/psl.h | 89 ++++ sys/cpu/amd64/include/reg.h | 113 +++++ sys/cpu/amd64/include/reloc.h | 54 +++ sys/cpu/amd64/include/segments.h | 258 ++++++++++ sys/cpu/amd64/include/setjmp.h | 54 +++ sys/cpu/amd64/include/signal.h | 106 +++++ sys/cpu/amd64/include/stdarg.h | 100 ++++ sys/cpu/amd64/include/stdint.h | 255 ++++++++++ sys/cpu/amd64/include/sysarch.h | 62 +++ sys/cpu/amd64/include/tls.h | 122 +++++ sys/cpu/amd64/include/trap.h | 108 +++++ sys/cpu/amd64/include/tss.h | 72 +++ sys/cpu/amd64/include/types.h | 84 ++++ sys/cpu/amd64/include/ucontext.h | 83 ++++ sys/cpu/amd64/include/varargs.h | 78 +++ sys/cpu/amd64/include/vframe.h | 57 +++ 35 files changed, 5432 insertions(+) create mode 100644 sys/cpu/amd64/include/asm.h create mode 100644 sys/cpu/amd64/include/atomic.h create mode 100644 sys/cpu/amd64/include/coredump.h create mode 100644 sys/cpu/amd64/include/cpu.h create mode 100644 sys/cpu/amd64/include/cpufunc.h create mode 100644 sys/cpu/amd64/include/elf.h create mode 100644 sys/cpu/amd64/include/endian.h create mode 100644 sys/cpu/amd64/include/exec.h create mode 100644 sys/cpu/amd64/include/float.h create mode 100644 sys/cpu/amd64/include/frame.h create mode 100644 sys/cpu/amd64/include/ieee.h create mode 100644 sys/cpu/amd64/include/ieeefp.h create mode 100644 sys/cpu/amd64/include/inttypes.h create mode 100644 sys/cpu/amd64/include/limits.h create mode 100644 sys/cpu/amd64/include/math.h create mode 100644 sys/cpu/amd64/include/npx.h create mode 100644 sys/cpu/amd64/include/param.h create mode 100644 sys/cpu/amd64/include/pmap.h create mode 100644 sys/cpu/amd64/include/profile.h create mode 100644 sys/cpu/amd64/include/psl.h create mode 100644 sys/cpu/amd64/include/reg.h create mode 100644 sys/cpu/amd64/include/reloc.h create mode 100644 sys/cpu/amd64/include/segments.h create mode 100644 sys/cpu/amd64/include/setjmp.h create mode 100644 sys/cpu/amd64/include/signal.h create mode 100644 sys/cpu/amd64/include/stdarg.h create mode 100644 sys/cpu/amd64/include/stdint.h create mode 100644 sys/cpu/amd64/include/sysarch.h create mode 100644 sys/cpu/amd64/include/tls.h create mode 100644 sys/cpu/amd64/include/trap.h create mode 100644 sys/cpu/amd64/include/tss.h create mode 100644 sys/cpu/amd64/include/types.h create mode 100644 sys/cpu/amd64/include/ucontext.h create mode 100644 sys/cpu/amd64/include/varargs.h create mode 100644 sys/cpu/amd64/include/vframe.h diff --git a/sys/cpu/amd64/include/asm.h b/sys/cpu/amd64/include/asm.h new file mode 100644 index 0000000000..00f10a81d4 --- /dev/null +++ b/sys/cpu/amd64/include/asm.h @@ -0,0 +1,84 @@ +/*- + * Copyright (c) 1990 The Regents of the University of California. + * All rights reserved. + * + * This code is derived from software contributed to Berkeley by + * William Jolitz. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * 3. All advertising materials mentioning features or use of this software + * must display the following acknowledgement: + * This product includes software developed by the University of + * California, Berkeley and its contributors. + * 4. Neither the name of the University nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + * from: @(#)DEFS.h 5.1 (Berkeley) 4/23/90 + * $FreeBSD: src/sys/amd64/include/asm.h,v 1.14 2003/06/02 05:59:35 peter Exp $ + * $DragonFly: src/sys/cpu/amd64/include/asm.h,v 1.1 2007/08/21 19:40:24 corecode Exp $ + */ + +#ifndef _CPU_ASM_H_ +#define _CPU_ASM_H_ + +#include + +#ifdef PIC +#define PIC_PLT(x) x@PLT +#define PIC_GOT(x) x@GOTPCREL(%rip) +#else +#define PIC_PLT(x) x +#define PIC_GOT(x) x +#endif + +/* + * CNAME and HIDENAME manage the relationship between symbol names in C + * and the equivalent assembly language names. CNAME is given a name as + * it would be used in a C program. It expands to the equivalent assembly + * language name. HIDENAME is given an assembly-language name, and expands + * to a possibly-modified form that will be invisible to C programs. + */ +#define CNAME(csym) csym +#define HIDENAME(asmsym) .asmsym + +/* XXX should use .p2align 4,0x90 for -m486. */ +#define _START_ENTRY .text; .p2align 2,0x90 + +#define _ENTRY(x) _START_ENTRY; \ + .globl CNAME(x); .type CNAME(x),@function; CNAME(x): + +#ifdef PROF +#define ALTENTRY(x) _ENTRY(x); \ + call PIC_PLT(HIDENAME(mcount)); \ + jmp 9f +#define ENTRY(x) _ENTRY(x); \ + call PIC_PLT(HIDENAME(mcount)); \ + 9: +#else +#define ALTENTRY(x) _ENTRY(x) +#define ENTRY(x) _ENTRY(x) +#endif + +#define RCSID(x) .text; .asciz x + +#endif /* !_CPU_ASM_H_ */ diff --git a/sys/cpu/amd64/include/atomic.h b/sys/cpu/amd64/include/atomic.h new file mode 100644 index 0000000000..ad23ce798d --- /dev/null +++ b/sys/cpu/amd64/include/atomic.h @@ -0,0 +1,583 @@ +/*- + * Copyright (c) 1998 Doug Rabson + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + * $FreeBSD: src/sys/amd64/include/atomic.h,v 1.32 2003/11/21 03:02:00 peter Exp $ + * $DragonFly: src/sys/cpu/amd64/include/atomic.h,v 1.1 2007/08/21 19:40:24 corecode Exp $ + */ +#ifndef _CPU_ATOMIC_H_ +#define _CPU_ATOMIC_H_ + +/* + * Various simple arithmetic on memory which is atomic in the presence + * of interrupts and multiple processors. + * + * atomic_set_char(P, V) (*(u_char*)(P) |= (V)) + * atomic_clear_char(P, V) (*(u_char*)(P) &= ~(V)) + * atomic_add_char(P, V) (*(u_char*)(P) += (V)) + * atomic_subtract_char(P, V) (*(u_char*)(P) -= (V)) + * + * atomic_set_short(P, V) (*(u_short*)(P) |= (V)) + * atomic_clear_short(P, V) (*(u_short*)(P) &= ~(V)) + * atomic_add_short(P, V) (*(u_short*)(P) += (V)) + * atomic_subtract_short(P, V) (*(u_short*)(P) -= (V)) + * + * atomic_set_int(P, V) (*(u_int*)(P) |= (V)) + * atomic_clear_int(P, V) (*(u_int*)(P) &= ~(V)) + * atomic_add_int(P, V) (*(u_int*)(P) += (V)) + * atomic_subtract_int(P, V) (*(u_int*)(P) -= (V)) + * atomic_readandclear_int(P) (return *(u_int*)P; *(u_int*)P = 0;) + * + * atomic_set_long(P, V) (*(u_long*)(P) |= (V)) + * atomic_clear_long(P, V) (*(u_long*)(P) &= ~(V)) + * atomic_add_long(P, V) (*(u_long*)(P) += (V)) + * atomic_subtract_long(P, V) (*(u_long*)(P) -= (V)) + * atomic_readandclear_long(P) (return *(u_long*)P; *(u_long*)P = 0;) + */ + +/* + * The above functions are expanded inline in the statically-linked + * kernel. Lock prefixes are generated if an SMP kernel is being + * built. + * + * Kernel modules call real functions which are built into the kernel. + * This allows kernel modules to be portable between UP and SMP systems. + */ +#if defined(KLD_MODULE) +#define ATOMIC_ASM(NAME, TYPE, OP, CONS, V) \ +void atomic_##NAME##_##TYPE(volatile u_##TYPE *p, u_##TYPE v) + +int atomic_cmpset_int(volatile u_int *dst, u_int exp, u_int src); +int atomic_cmpset_long(volatile u_long *dst, u_long exp, u_long src); + +#define ATOMIC_STORE_LOAD(TYPE, LOP, SOP) \ +u_##TYPE atomic_load_acq_##TYPE(volatile u_##TYPE *p); \ +void atomic_store_rel_##TYPE(volatile u_##TYPE *p, u_##TYPE v) + +#else /* !KLD_MODULE */ + +#ifdef __GNUC__ + +/* + * For userland, assume the SMP case and use lock prefixes so that + * the binaries will run on both types of systems. + */ +#if defined(SMP) || !defined(_KERNEL) +#define MPLOCKED "lock ; " +#else +#define MPLOCKED +#endif + +/* + * The assembly is volatilized to demark potential before-and-after side + * effects if an interrupt or SMP collision were to occur. + */ +#define ATOMIC_ASM(NAME, TYPE, OP, CONS, V) \ +static __inline void \ +atomic_##NAME##_##TYPE(volatile u_##TYPE *p, u_##TYPE v)\ +{ \ + __asm __volatile(MPLOCKED OP \ + : "+m" (*p) \ + : CONS (V)); \ +} \ +struct __hack + +#else /* !__GNUC__ */ + +#define ATOMIC_ASM(NAME, TYPE, OP, CONS, V) \ +extern void atomic_##NAME##_##TYPE(volatile u_##TYPE *p, u_##TYPE v) + +#endif /* __GNUC__ */ + +/* + * These functions operate on a 32 bit interrupt interlock which is defined + * as follows: + * + * bit 0-30 interrupt handler disabled bits (counter) + * bit 31 interrupt handler currently running bit (1 = run) + * + * atomic_intr_cond_test(P) Determine if the interlock is in an + * acquired state. Returns 0 if it not + * acquired, non-zero if it is. + * + * atomic_intr_cond_try(P) + * Increment the request counter and attempt to + * set bit 31 to acquire the interlock. If + * we are unable to set bit 31 the request + * counter is decremented and we return -1, + * otherwise we return 0. + * + * atomic_intr_cond_enter(P, func, arg) + * Increment the request counter and attempt to + * set bit 31 to acquire the interlock. If + * we are unable to set bit 31 func(arg) is + * called in a loop until we are able to set + * bit 31. + * + * atomic_intr_cond_exit(P, func, arg) + * Decrement the request counter and clear bit + * 31. If the request counter is still non-zero + * call func(arg) once. + * + * atomic_intr_handler_disable(P) + * Set bit 30, indicating that the interrupt + * handler has been disabled. Must be called + * after the hardware is disabled. + * + * Returns bit 31 indicating whether a serialized + * accessor is active (typically the interrupt + * handler is running). 0 == not active, + * non-zero == active. + * + * atomic_intr_handler_enable(P) + * Clear bit 30, indicating that the interrupt + * handler has been enabled. Must be called + * before the hardware is actually enabled. + * + * atomic_intr_handler_is_enabled(P) + * Returns bit 30, 0 indicates that the handler + * is enabled, non-zero indicates that it is + * disabled. The request counter portion of + * the field is ignored. + */ + +#ifndef __ATOMIC_INTR_T +#define __ATOMIC_INTR_T +typedef volatile int atomic_intr_t; +#endif + +#if defined(KLD_MODULE) + +void atomic_intr_init(atomic_intr_t *p); +int atomic_intr_handler_disable(atomic_intr_t *p); +void atomic_intr_handler_enable(atomic_intr_t *p); +int atomic_intr_handler_is_enabled(atomic_intr_t *p); +int atomic_intr_cond_test(atomic_intr_t *p); +int atomic_intr_cond_try(atomic_intr_t *p); +void atomic_intr_cond_enter(atomic_intr_t *p, void (*func)(void *), void *arg); +void atomic_intr_cond_exit(atomic_intr_t *p, void (*func)(void *), void *arg); + +#else + +static __inline +void +atomic_intr_init(atomic_intr_t *p) +{ + *p = 0; +} + +static __inline +int +atomic_intr_handler_disable(atomic_intr_t *p) +{ + int data; + + __asm __volatile(MPLOCKED "orl $0x40000000,%1; movl %1,%%eax; " \ + "andl $0x80000000,%%eax" \ + : "=a"(data) , "+m"(*p)); + return(data); +} + +static __inline +void +atomic_intr_handler_enable(atomic_intr_t *p) +{ + __asm __volatile(MPLOCKED "andl $0xBFFFFFFF,%0" : "+m" (*p)); +} + +static __inline +int +atomic_intr_handler_is_enabled(atomic_intr_t *p) +{ + int data; + + __asm __volatile("movl %1,%%eax; andl $0x40000000,%%eax" \ + : "=a"(data) : "m"(*p)); + return(data); +} + +static __inline +void +atomic_intr_cond_enter(atomic_intr_t *p, void (*func)(void *), void *arg) +{ + __asm __volatile(MPLOCKED "incl %0; " \ + "1: ;" \ + MPLOCKED "btsl $31,%0; jnc 2f; " \ + "movq %2,%rdi; call *%1; " \ + "jmp 1b; " \ + "2: ;" \ + : "+m" (*p) \ + : "r"(func), "m"(arg) \ + : "ax", "cx", "dx", "di"); /* XXX clobbers more regs */ +} + +/* + * Attempt to enter the interrupt condition variable. Returns zero on + * success, 1 on failure. + */ +static __inline +int +atomic_intr_cond_try(atomic_intr_t *p) +{ + int ret; + + __asm __volatile(MPLOCKED "incl %0; " \ + "1: ;" \ + "subl %%eax,%%eax; " \ + MPLOCKED "btsl $31,%0; jnc 2f; " \ + MPLOCKED "decl %0; " \ + "movl $1,%%eax;" \ + "2: ;" \ + : "+m" (*p), "=a"(ret) \ + : : "cx", "dx"); + return (ret); +} + + +static __inline +int +atomic_intr_cond_test(atomic_intr_t *p) +{ + return((int)(*p & 0x80000000)); +} + +static __inline +void +atomic_intr_cond_exit(atomic_intr_t *p, void (*func)(void *), void *arg) +{ + __asm __volatile(MPLOCKED "decl %0; " \ + MPLOCKED "btrl $31,%0; " \ + "testl $0x3FFFFFFF,%0; jz 1f; " \ + "movq %2,%rdi; call *%1; " \ + "1: ;" \ + : "+m" (*p) \ + : "r"(func), "m"(arg) \ + : "ax", "cx", "dx", "di"); /* XXX clobbers more regs */ +} + +#endif + +/* + * Atomic compare and set, used by the mutex functions + * + * if (*dst == exp) *dst = src (all 32 bit words) + * + * Returns 0 on failure, non-zero on success + */ + +#if defined(__GNUC__) + +static __inline int +atomic_cmpset_int(volatile u_int *dst, u_int exp, u_int src) +{ + int res = exp; + + __asm __volatile ( + MPLOCKED + " cmpxchgl %1,%2 ; " + " setz %%al ; " + " movzbl %%al,%0 ; " + "1: " + "# atomic_cmpset_int" + : "+a" (res) /* 0 (result) */ + : "r" (src), /* 1 */ + "m" (*(dst)) /* 2 */ + : "memory"); + + return (res); +} + +static __inline int +atomic_cmpset_long(volatile u_long *dst, u_long exp, u_long src) +{ + long res = exp; + + __asm __volatile ( + MPLOCKED + " cmpxchgq %1,%2 ; " + " setz %%al ; " + " movzbq %%al,%0 ; " + "1: " + "# atomic_cmpset_long" + : "+a" (res) /* 0 (result) */ + : "r" (src), /* 1 */ + "m" (*(dst)) /* 2 */ + : "memory"); + + return (res); +} +#endif /* defined(__GNUC__) */ + +#if defined(__GNUC__) + +#define ATOMIC_STORE_LOAD(TYPE, LOP, SOP) \ +static __inline u_##TYPE \ +atomic_load_acq_##TYPE(volatile u_##TYPE *p) \ +{ \ + u_##TYPE res; \ + \ + __asm __volatile(MPLOCKED LOP \ + : "=a" (res), /* 0 (result) */\ + "+m" (*p) /* 1 */ \ + : : "memory"); \ + \ + return (res); \ +} \ + \ +/* \ + * The XCHG instruction asserts LOCK automagically. \ + */ \ +static __inline void \ +atomic_store_rel_##TYPE(volatile u_##TYPE *p, u_##TYPE v)\ +{ \ + __asm __volatile(SOP \ + : "+m" (*p), /* 0 */ \ + "+r" (v) /* 1 */ \ + : : "memory"); \ +} \ +struct __hack + +#else /* !defined(__GNUC__) */ + +extern int atomic_cmpset_int(volatile u_int *, u_int, u_int); +extern int atomic_cmpset_long(volatile u_long *, u_long, u_long); + +#define ATOMIC_STORE_LOAD(TYPE, LOP, SOP) \ +extern u_##TYPE atomic_load_acq_##TYPE(volatile u_##TYPE *p); \ +extern void atomic_store_rel_##TYPE(volatile u_##TYPE *p, u_##TYPE v) + +#endif /* defined(__GNUC__) */ + +#endif /* KLD_MODULE */ + +ATOMIC_ASM(set, char, "orb %b1,%0", "iq", v); +ATOMIC_ASM(clear, char, "andb %b1,%0", "iq", ~v); +ATOMIC_ASM(add, char, "addb %b1,%0", "iq", v); +ATOMIC_ASM(subtract, char, "subb %b1,%0", "iq", v); + +ATOMIC_ASM(set, short, "orw %w1,%0", "ir", v); +ATOMIC_ASM(clear, short, "andw %w1,%0", "ir", ~v); +ATOMIC_ASM(add, short, "addw %w1,%0", "ir", v); +ATOMIC_ASM(subtract, short, "subw %w1,%0", "ir", v); + +ATOMIC_ASM(set, int, "orl %1,%0", "ir", v); +ATOMIC_ASM(clear, int, "andl %1,%0", "ir", ~v); +ATOMIC_ASM(add, int, "addl %1,%0", "ir", v); +ATOMIC_ASM(subtract, int, "subl %1,%0", "ir", v); + +ATOMIC_ASM(set, long, "orq %1,%0", "ir", v); +ATOMIC_ASM(clear, long, "andq %1,%0", "ir", ~v); +ATOMIC_ASM(add, long, "addq %1,%0", "ir", v); +ATOMIC_ASM(subtract, long, "subq %1,%0", "ir", v); + +ATOMIC_STORE_LOAD(char, "cmpxchgb %b0,%1", "xchgb %b1,%0"); +ATOMIC_STORE_LOAD(short,"cmpxchgw %w0,%1", "xchgw %w1,%0"); +ATOMIC_STORE_LOAD(int, "cmpxchgl %0,%1", "xchgl %1,%0"); +ATOMIC_STORE_LOAD(long, "cmpxchgq %0,%1", "xchgq %1,%0"); + +#undef ATOMIC_ASM +#undef ATOMIC_STORE_LOAD + +#define atomic_set_acq_char atomic_set_char +#define atomic_set_rel_char atomic_set_char +#define atomic_clear_acq_char atomic_clear_char +#define atomic_clear_rel_char atomic_clear_char +#define atomic_add_acq_char atomic_add_char +#define atomic_add_rel_char atomic_add_char +#define atomic_subtract_acq_char atomic_subtract_char +#define atomic_subtract_rel_char atomic_subtract_char + +#define atomic_set_acq_short atomic_set_short +#define atomic_set_rel_short atomic_set_short +#define atomic_clear_acq_short atomic_clear_short +#define atomic_clear_rel_short atomic_clear_short +#define atomic_add_acq_short atomic_add_short +#define atomic_add_rel_short atomic_add_short +#define atomic_subtract_acq_short atomic_subtract_short +#define atomic_subtract_rel_short atomic_subtract_short + +#define atomic_set_acq_int atomic_set_int +#define atomic_set_rel_int atomic_set_int +#define atomic_clear_acq_int atomic_clear_int +#define atomic_clear_rel_int atomic_clear_int +#define atomic_add_acq_int atomic_add_int +#define atomic_add_rel_int atomic_add_int +#define atomic_subtract_acq_int atomic_subtract_int +#define atomic_subtract_rel_int atomic_subtract_int +#define atomic_cmpset_acq_int atomic_cmpset_int +#define atomic_cmpset_rel_int atomic_cmpset_int + +#define atomic_set_acq_long atomic_set_long +#define atomic_set_rel_long atomic_set_long +#define atomic_clear_acq_long atomic_clear_long +#define atomic_clear_rel_long atomic_clear_long +#define atomic_add_acq_long atomic_add_long +#define atomic_add_rel_long atomic_add_long +#define atomic_subtract_acq_long atomic_subtract_long +#define atomic_subtract_rel_long atomic_subtract_long + +#define atomic_cmpset_acq_ptr atomic_cmpset_ptr +#define atomic_cmpset_rel_ptr atomic_cmpset_ptr + +#define atomic_set_8 atomic_set_char +#define atomic_set_acq_8 atomic_set_acq_char +#define atomic_set_rel_8 atomic_set_rel_char +#define atomic_clear_8 atomic_clear_char +#define atomic_clear_acq_8 atomic_clear_acq_char +#define atomic_clear_rel_8 atomic_clear_rel_char +#define atomic_add_8 atomic_add_char +#define atomic_add_acq_8 atomic_add_acq_char +#define atomic_add_rel_8 atomic_add_rel_char +#define atomic_subtract_8 atomic_subtract_char +#define atomic_subtract_acq_8 atomic_subtract_acq_char +#define atomic_subtract_rel_8 atomic_subtract_rel_char +#define atomic_load_acq_8 atomic_load_acq_char +#define atomic_store_rel_8 atomic_store_rel_char + +#define atomic_set_16 atomic_set_short +#define atomic_set_acq_16 atomic_set_acq_short +#define atomic_set_rel_16 atomic_set_rel_short +#define atomic_clear_16 atomic_clear_short +#define atomic_clear_acq_16 atomic_clear_acq_short +#define atomic_clear_rel_16 atomic_clear_rel_short +#define atomic_add_16 atomic_add_short +#define atomic_add_acq_16 atomic_add_acq_short +#define atomic_add_rel_16 atomic_add_rel_short +#define atomic_subtract_16 atomic_subtract_short +#define atomic_subtract_acq_16 atomic_subtract_acq_short +#define atomic_subtract_rel_16 atomic_subtract_rel_short +#define atomic_load_acq_16 atomic_load_acq_short +#define atomic_store_rel_16 atomic_store_rel_short + +#define atomic_set_32 atomic_set_int +#define atomic_set_acq_32 atomic_set_acq_int +#define atomic_set_rel_32 atomic_set_rel_int +#define atomic_clear_32 atomic_clear_int +#define atomic_clear_acq_32 atomic_clear_acq_int +#define atomic_clear_rel_32 atomic_clear_rel_int +#define atomic_add_32 atomic_add_int +#define atomic_add_acq_32 atomic_add_acq_int +#define atomic_add_rel_32 atomic_add_rel_int +#define atomic_subtract_32 atomic_subtract_int +#define atomic_subtract_acq_32 atomic_subtract_acq_int +#define atomic_subtract_rel_32 atomic_subtract_rel_int +#define atomic_load_acq_32 atomic_load_acq_int +#define atomic_store_rel_32 atomic_store_rel_int +#define atomic_cmpset_32 atomic_cmpset_int +#define atomic_cmpset_acq_32 atomic_cmpset_acq_int +#define atomic_cmpset_rel_32 atomic_cmpset_rel_int +#define atomic_readandclear_32 atomic_readandclear_int + +#if !defined(WANT_FUNCTIONS) +static __inline int +atomic_cmpset_ptr(volatile void *dst, void *exp, void *src) +{ + + return (atomic_cmpset_long((volatile u_long *)dst, + (u_long)exp, (u_long)src)); +} + +static __inline void * +atomic_load_acq_ptr(volatile void *p) +{ + /* + * The apparently-bogus cast to intptr_t in the following is to + * avoid a warning from "gcc -Wbad-function-cast". + */ + return ((void *)(intptr_t)atomic_load_acq_long((volatile u_long *)p)); +} + +static __inline void +atomic_store_rel_ptr(volatile void *p, void *v) +{ + atomic_store_rel_long((volatile u_long *)p, (u_long)v); +} + +#define ATOMIC_PTR(NAME) \ +static __inline void \ +atomic_##NAME##_ptr(volatile void *p, uintptr_t v) \ +{ \ + atomic_##NAME##_long((volatile u_long *)p, v); \ +} \ + \ +static __inline void \ +atomic_##NAME##_acq_ptr(volatile void *p, uintptr_t v) \ +{ \ + atomic_##NAME##_acq_long((volatile u_long *)p, v);\ +} \ + \ +static __inline void \ +atomic_##NAME##_rel_ptr(volatile void *p, uintptr_t v) \ +{ \ + atomic_##NAME##_rel_long((volatile u_long *)p, v);\ +} + +ATOMIC_PTR(set) +ATOMIC_PTR(clear) +ATOMIC_PTR(add) +ATOMIC_PTR(subtract) + +#undef ATOMIC_PTR + +#if defined(__GNUC__) + +static __inline u_int +atomic_readandclear_int(volatile u_int *addr) +{ + u_int result; + + __asm __volatile ( + " xorl %0,%0 ; " + " xchgl %1,%0 ; " + "# atomic_readandclear_int" + : "=&r" (result) /* 0 (result) */ + : "m" (*addr)); /* 1 (addr) */ + + return (result); +} + +static __inline u_long +atomic_readandclear_long(volatile u_long *addr) +{ + u_long result; + + __asm __volatile ( + " xorq %0,%0 ; " + " xchgq %1,%0 ; " + "# atomic_readandclear_int" + : "=&r" (result) /* 0 (result) */ + : "m" (*addr)); /* 1 (addr) */ + + return (result); +} + +#else /* !defined(__GNUC__) */ + +extern u_long atomic_readandclear_long(volatile u_long *); +extern u_int atomic_readandclear_int(volatile u_int *); + +#endif /* defined(__GNUC__) */ + +#endif /* !defined(WANT_FUNCTIONS) */ +#endif /* ! _CPU_ATOMIC_H_ */ diff --git a/sys/cpu/amd64/include/coredump.h b/sys/cpu/amd64/include/coredump.h new file mode 100644 index 0000000000..aa7b88d414 --- /dev/null +++ b/sys/cpu/amd64/include/coredump.h @@ -0,0 +1,14 @@ +/* + * $DragonFly: src/sys/cpu/amd64/include/coredump.h,v 1.1 2007/08/21 19:40:24 corecode Exp $ + */ + +#ifndef _CPU_COREDUMP_H_ +#define _CPU_COREDUMP_H_ +/* + * The pcb is augmented with machine-dependent additional data for + * core dumps. For the i386: ??? + */ +struct md_coredump { +}; + +#endif diff --git a/sys/cpu/amd64/include/cpu.h b/sys/cpu/amd64/include/cpu.h new file mode 100644 index 0000000000..43c32fea24 --- /dev/null +++ b/sys/cpu/amd64/include/cpu.h @@ -0,0 +1,63 @@ +/*- + * Copyright (c) 1990 The Regents of the University of California. + * All rights reserved. + * + * This code is derived from software contributed to Berkeley by + * William Jolitz. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * 3. All advertising materials mentioning features or use of this software + * must display the following acknowledgement: + * This product includes software developed by the University of + * California, Berkeley and its contributors. + * 4. Neither the name of the University nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + * from: @(#)cpu.h 5.4 (Berkeley) 5/9/91 + * $FreeBSD: src/sys/i386/include/cpu.h,v 1.43.2.2 2001/06/15 09:37:57 scottl Exp $ + * $DragonFly: src/sys/cpu/amd64/include/cpu.h,v 1.1 2007/08/21 19:40:24 corecode Exp $ + */ + +#ifndef _CPU_CPU_H_ +#define _CPU_CPU_H_ + +/* + * CTL_MACHDEP definitions. + */ +#define CPU_CONSDEV 1 /* cdev_t: console terminal device */ +#define CPU_ADJKERNTZ 2 /* int: timezone offset (seconds) */ +#define CPU_DISRTCSET 3 /* int: disable resettodr() call */ +#define CPU_BOOTINFO 4 /* struct: bootinfo */ +#define CPU_WALLCLOCK 5 /* int: indicates wall CMOS clock */ +#define CPU_MAXID 6 /* number of valid machdep ids */ + +#define CTL_MACHDEP_NAMES { \ + { 0, 0 }, \ + { "console_device", CTLTYPE_STRUCT }, \ + { "adjkerntz", CTLTYPE_INT }, \ + { "disable_rtc_set", CTLTYPE_INT }, \ + { "bootinfo", CTLTYPE_STRUCT }, \ + { "wall_cmos_clock", CTLTYPE_INT }, \ +} + +#endif /* !_CPU_CPU_H_ */ diff --git a/sys/cpu/amd64/include/cpufunc.h b/sys/cpu/amd64/include/cpufunc.h new file mode 100644 index 0000000000..656da221eb --- /dev/null +++ b/sys/cpu/amd64/include/cpufunc.h @@ -0,0 +1,795 @@ +/*- + * Copyright (c) 2003 Peter Wemm. + * Copyright (c) 1993 The Regents of the University of California. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * 3. All advertising materials mentioning features or use of this software + * must display the following acknowledgement: + * This product includes software developed by the University of + * California, Berkeley and its contributors. + * 4. Neither the name of the University nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + * $FreeBSD: src/sys/amd64/include/cpufunc.h,v 1.139 2004/01/28 23:53:04 peter Exp $ + * $DragonFly: src/sys/cpu/amd64/include/cpufunc.h,v 1.1 2007/08/21 19:40:24 corecode Exp $ + */ + +/* + * Functions to provide access to special i386 instructions. + * This in included in sys/systm.h, and that file should be + * used in preference to this. + */ + +#ifndef _CPU_CPUFUNC_H_ +#define _CPU_CPUFUNC_H_ + +#include +#include + +struct thread; +struct region_descriptor; + +__BEGIN_DECLS +#define readb(va) (*(volatile u_int8_t *) (va)) +#define readw(va) (*(volatile u_int16_t *) (va)) +#define readl(va) (*(volatile u_int32_t *) (va)) +#define readq(va) (*(volatile u_int64_t *) (va)) + +#define writeb(va, d) (*(volatile u_int8_t *) (va) = (d)) +#define writew(va, d) (*(volatile u_int16_t *) (va) = (d)) +#define writel(va, d) (*(volatile u_int32_t *) (va) = (d)) +#define writeq(va, d) (*(volatile u_int64_t *) (va) = (d)) + +#ifdef __GNUC__ + +static __inline void +breakpoint(void) +{ + __asm __volatile("int $3"); +} + +static __inline u_int +bsfl(u_int mask) +{ + u_int result; + + __asm __volatile("bsfl %1,%0" : "=r" (result) : "rm" (mask)); + return (result); +} + +static __inline u_long +bsfq(u_long mask) +{ + u_long result; + + __asm __volatile("bsfq %1,%0" : "=r" (result) : "rm" (mask)); + return (result); +} + +static __inline u_int +bsrl(u_int mask) +{ + u_int result; + + __asm __volatile("bsrl %1,%0" : "=r" (result) : "rm" (mask)); + return (result); +} + +static __inline u_long +bsrq(u_long mask) +{ + u_long result; + + __asm __volatile("bsrq %1,%0" : "=r" (result) : "rm" (mask)); + return (result); +} + +static __inline void +disable_intr(void) +{ + __asm __volatile("cli" : : : "memory"); +} + +static __inline void +do_cpuid(u_int ax, u_int *p) +{ + __asm __volatile("cpuid" + : "=a" (p[0]), "=b" (p[1]), "=c" (p[2]), "=d" (p[3]) + : "0" (ax)); +} + +static __inline void +enable_intr(void) +{ + __asm __volatile("sti"); +} + +#ifdef _KERNEL + +#define HAVE_INLINE_FFS + +static __inline int +ffs(int mask) +{ +#if 0 + /* + * Note that gcc-2's builtin ffs would be used if we didn't declare + * this inline or turn off the builtin. The builtin is faster but + * broken in gcc-2.4.5 and slower but working in gcc-2.5 and later + * versions. + */ + return (mask == 0 ? mask : (int)bsfl((u_int)mask) + 1); +#else + /* Actually, the above is way out of date. The builtins use cmov etc */ + return (__builtin_ffs(mask)); +#endif +} + +#define HAVE_INLINE_FFSL + +static __inline int +ffsl(long mask) +{ + return (mask == 0 ? mask : (int)bsfq((u_long)mask) + 1); +} + +#define HAVE_INLINE_FLS + +static __inline int +fls(int mask) +{ + return (mask == 0 ? mask : (int)bsrl((u_int)mask) + 1); +} + +#define HAVE_INLINE_FLSL + +static __inline int +flsl(long mask) +{ + return (mask == 0 ? mask : (int)bsrq((u_long)mask) + 1); +} + +#endif /* _KERNEL */ + +static __inline void +halt(void) +{ + __asm __volatile("hlt"); +} + +#if __GNUC__ < 2 + +#define inb(port) inbv(port) +#define outb(port, data) outbv(port, data) + +#else /* __GNUC >= 2 */ + +/* + * The following complications are to get around gcc not having a + * constraint letter for the range 0..255. We still put "d" in the + * constraint because "i" isn't a valid constraint when the port + * isn't constant. This only matters for -O0 because otherwise + * the non-working version gets optimized away. + * + * Use an expression-statement instead of a conditional expression + * because gcc-2.6.0 would promote the operands of the conditional + * and produce poor code for "if ((inb(var) & const1) == const2)". + * + * The unnecessary test `(port) < 0x10000' is to generate a warning if + * the `port' has type u_short or smaller. Such types are pessimal. + * This actually only works for signed types. The range check is + * careful to avoid generating warnings. + */ +#define inb(port) __extension__ ({ \ + u_char _data; \ + if (__builtin_constant_p(port) && ((port) & 0xffff) < 0x100 \ + && (port) < 0x10000) \ + _data = inbc(port); \ + else \ + _data = inbv(port); \ + _data; }) + +#define outb(port, data) ( \ + __builtin_constant_p(port) && ((port) & 0xffff) < 0x100 \ + && (port) < 0x10000 \ + ? outbc(port, data) : outbv(port, data)) + +static __inline u_char +inbc(u_int port) +{ + u_char data; + + __asm __volatile("inb %1,%0" : "=a" (data) : "id" ((u_short)(port))); + return (data); +} + +static __inline void +outbc(u_int port, u_char data) +{ + __asm __volatile("outb %0,%1" : : "a" (data), "id" ((u_short)(port))); +} + +#endif /* __GNUC <= 2 */ + +static __inline u_char +inbv(u_int port) +{ + u_char data; + /* + * We use %%dx and not %1 here because i/o is done at %dx and not at + * %edx, while gcc generates inferior code (movw instead of movl) + * if we tell it to load (u_short) port. + */ + __asm __volatile("inb %%dx,%0" : "=a" (data) : "d" (port)); + return (data); +} + +static __inline u_int +inl(u_int port) +{ + u_int data; + + __asm __volatile("inl %%dx,%0" : "=a" (data) : "d" (port)); + return (data); +} + +static __inline void +insb(u_int port, void *addr, size_t cnt) +{ + __asm __volatile("cld; rep; insb" + : "+D" (addr), "+c" (cnt) + : "d" (port) + : "memory"); +} + +static __inline void +insw(u_int port, void *addr, size_t cnt) +{ + __asm __volatile("cld; rep; insw" + : "+D" (addr), "+c" (cnt) + : "d" (port) + : "memory"); +} + +static __inline void +insl(u_int port, void *addr, size_t cnt) +{ + __asm __volatile("cld; rep; insl" + : "+D" (addr), "+c" (cnt) + : "d" (port) + : "memory"); +} + +static __inline void +invd(void) +{ + __asm __volatile("invd"); +} + +static __inline u_short +inw(u_int port) +{ + u_short data; + + __asm __volatile("inw %%dx,%0" : "=a" (data) : "d" (port)); + return (data); +} + +static __inline void +outbv(u_int port, u_char data) +{ + u_char al; + /* + * Use an unnecessary assignment to help gcc's register allocator. + * This make a large difference for gcc-1.40 and a tiny difference + * for gcc-2.6.0. For gcc-1.40, al had to be ``asm("ax")'' for + * best results. gcc-2.6.0 can't handle this. + */ + al = data; + __asm __volatile("outb %0,%%dx" : : "a" (al), "d" (port)); +} + +static __inline void +outl(u_int port, u_int data) +{ + /* + * outl() and outw() aren't used much so we haven't looked at + * possible micro-optimizations such as the unnecessary + * assignment for them. + */ + __asm __volatile("outl %0,%%dx" : : "a" (data), "d" (port)); +} + +static __inline void +outsb(u_int port, const void *addr, size_t cnt) +{ + __asm __volatile("cld; rep; outsb" + : "+S" (addr), "+c" (cnt) + : "d" (port)); +} + +static __inline void +outsw(u_int port, const void *addr, size_t cnt) +{ + __asm __volatile("cld; rep; outsw" + : "+S" (addr), "+c" (cnt) + : "d" (port)); +} + +static __inline void +outsl(u_int port, const void *addr, size_t cnt) +{ + __asm __volatile("cld; rep; outsl" + : "+S" (addr), "+c" (cnt) + : "d" (port)); +} + +static __inline void +outw(u_int port, u_short data) +{ + __asm __volatile("outw %0,%%dx" : : "a" (data), "d" (port)); +} + +static __inline void +ia32_pause(void) +{ + __asm __volatile("pause"); +} + +static __inline u_long +read_rflags(void) +{ + u_long rf; + + __asm __volatile("pushfq; popq %0" : "=r" (rf)); + return (rf); +} + +static __inline u_int64_t +rdmsr(u_int msr) +{ + u_int32_t low, high; + + __asm __volatile("rdmsr" : "=a" (low), "=d" (high) : "c" (msr)); + return (low | ((u_int64_t)high << 32)); +} + +static __inline u_int64_t +rdpmc(u_int pmc) +{ + u_int32_t low, high; + + __asm __volatile("rdpmc" : "=a" (low), "=d" (high) : "c" (pmc)); + return (low | ((u_int64_t)high << 32)); +} + +static __inline u_int64_t +rdtsc(void) +{ + u_int32_t low, high; + + __asm __volatile("rdtsc" : "=a" (low), "=d" (high)); + return (low | ((u_int64_t)high << 32)); +} + +static __inline void +wbinvd(void) +{ + __asm __volatile("wbinvd"); +} + +static __inline void +write_rflags(u_long rf) +{ + __asm __volatile("pushq %0; popfq" : : "r" (rf)); +} + +static __inline void +wrmsr(u_int msr, u_int64_t newval) +{ + u_int32_t low, high; + + low = newval; + high = newval >> 32; + __asm __volatile("wrmsr" : : "a" (low), "d" (high), "c" (msr)); +} + +static __inline void +load_cr0(u_long data) +{ + + __asm __volatile("movq %0,%%cr0" : : "r" (data)); +} + +static __inline u_long +rcr0(void) +{ + u_long data; + + __asm __volatile("movq %%cr0,%0" : "=r" (data)); + return (data); +} + +static __inline u_long +rcr2(void) +{ + u_long data; + + __asm __volatile("movq %%cr2,%0" : "=r" (data)); + return (data); +} + +static __inline void +load_cr3(u_long data) +{ + + __asm __volatile("movq %0,%%cr3" : : "r" (data) : "memory"); +} + +static __inline u_long +rcr3(void) +{ + u_long data; + + __asm __volatile("movq %%cr3,%0" : "=r" (data)); + return (data); +} + +static __inline void +load_cr4(u_long data) +{ + __asm __volatile("movq %0,%%cr4" : : "r" (data)); +} + +static __inline u_long +rcr4(void) +{ + u_long data; + + __asm __volatile("movq %%cr4,%0" : "=r" (data)); + return (data); +} + +/* + * Global TLB flush (except for thise for pages marked PG_G) + */ +static __inline void +invltlb(void) +{ + + load_cr3(rcr3()); +} + +/* + * TLB flush for an individual page (even if it has PG_G). + * Only works on 486+ CPUs (i386 does not have PG_G). + */ +static __inline void +invlpg(u_long addr) +{ + + __asm __volatile("invlpg %0" : : "m" (*(char *)addr) : "memory"); +} + +static __inline u_int +rfs(void) +{ + u_int sel; + __asm __volatile("movl %%fs,%0" : "=rm" (sel)); + return (sel); +} + +static __inline u_int +rgs(void) +{ + u_int sel; + __asm __volatile("movl %%gs,%0" : "=rm" (sel)); + return (sel); +} + +static __inline void +load_ds(u_int sel) +{ + __asm __volatile("movl %0,%%ds" : : "rm" (sel)); +} + +static __inline void +load_es(u_int sel) +{ + __asm __volatile("movl %0,%%es" : : "rm" (sel)); +} + +#ifdef _KERNEL +/* This is defined in but is too painful to get to */ +#ifndef MSR_FSBASE +#define MSR_FSBASE 0xc0000100 +#endif +static __inline void +load_fs(u_int sel) +{ + register u_int32_t fsbase __asm("ecx"); + + /* Preserve the fsbase value across the selector load */ + fsbase = MSR_FSBASE; + __asm __volatile("rdmsr; movl %0,%%fs; wrmsr" + : : "rm" (sel), "c" (fsbase) : "eax", "edx"); +} + +#ifndef MSR_GSBASE +#define MSR_GSBASE 0xc0000101 +#endif +static __inline void +load_gs(u_int sel) +{ + register u_int32_t gsbase __asm("ecx"); + + /* + * Preserve the gsbase value across the selector load. + * Note that we have to disable interrupts because the gsbase + * being trashed happens to be the kernel gsbase at the time. + */ + gsbase = MSR_GSBASE; + __asm __volatile("pushfq; cli; rdmsr; movl %0,%%gs; wrmsr; popfq" + : : "rm" (sel), "c" (gsbase) : "eax", "edx"); +} +#else +/* Usable by userland */ +static __inline void +load_fs(u_int sel) +{ + __asm __volatile("movl %0,%%fs" : : "rm" (sel)); +} + +static __inline void +load_gs(u_int sel) +{ + __asm __volatile("movl %0,%%gs" : : "rm" (sel)); +} +#endif + +/* void lidt(struct region_descriptor *addr); */ +static __inline void +lidt(struct region_descriptor *addr) +{ + __asm __volatile("lidt (%0)" : : "r" (addr)); +} + +/* void lldt(u_short sel); */ +static __inline void +lldt(u_short sel) +{ + __asm __volatile("lldt %0" : : "r" (sel)); +} + +/* void ltr(u_short sel); */ +static __inline void +ltr(u_short sel) +{ + __asm __volatile("ltr %0" : : "r" (sel)); +} + +static __inline u_int64_t +rdr0(void) +{ + u_int64_t data; + __asm __volatile("movq %%dr0,%0" : "=r" (data)); + return (data); +} + +static __inline void +load_dr0(u_int64_t dr0) +{ + __asm __volatile("movq %0,%%dr0" : : "r" (dr0)); +} + +static __inline u_int64_t +rdr1(void) +{ + u_int64_t data; + __asm __volatile("movq %%dr1,%0" : "=r" (data)); + return (data); +} + +static __inline void +load_dr1(u_int64_t dr1) +{ + __asm __volatile("movq %0,%%dr1" : : "r" (dr1)); +} + +static __inline u_int64_t +rdr2(void) +{ + u_int64_t data; + __asm __volatile("movq %%dr2,%0" : "=r" (data)); + return (data); +} + +static __inline void +load_dr2(u_int64_t dr2) +{ + __asm __volatile("movq %0,%%dr2" : : "r" (dr2)); +} + +static __inline u_int64_t +rdr3(void) +{ + u_int64_t data; + __asm __volatile("movq %%dr3,%0" : "=r" (data)); + return (data); +} + +static __inline void +load_dr3(u_int64_t dr3) +{ + __asm __volatile("movq %0,%%dr3" : : "r" (dr3)); +} + +static __inline u_int64_t +rdr4(void) +{ + u_int64_t data; + __asm __volatile("movq %%dr4,%0" : "=r" (data)); + return (data); +} + +static __inline void +load_dr4(u_int64_t dr4) +{ + __asm __volatile("movq %0,%%dr4" : : "r" (dr4)); +} + +static __inline u_int64_t +rdr5(void) +{ + u_int64_t data; + __asm __volatile("movq %%dr5,%0" : "=r" (data)); + return (data); +} + +static __inline void +load_dr5(u_int64_t dr5) +{ + __asm __volatile("movq %0,%%dr5" : : "r" (dr5)); +} + +static __inline u_int64_t +rdr6(void) +{ + u_int64_t data; + __asm __volatile("movq %%dr6,%0" : "=r" (data)); + return (data); +} + +static __inline void +load_dr6(u_int64_t dr6) +{ + __asm __volatile("movq %0,%%dr6" : : "r" (dr6)); +} + +static __inline u_int64_t +rdr7(void) +{ + u_int64_t data; + __asm __volatile("movq %%dr7,%0" : "=r" (data)); + return (data); +} + +static __inline void +load_dr7(u_int64_t dr7) +{ + __asm __volatile("movq %0,%%dr7" : : "r" (dr7)); +} + +static __inline register_t +intr_disable(void) +{ + register_t rflags; + + rflags = read_rflags(); + disable_intr(); + return (rflags); +} + +static __inline void +intr_restore(register_t rflags) +{ + write_rflags(rflags); +} + +#else /* !__GNUC__ */ + +int breakpoint(void); +u_int bsfl(u_int mask); +u_int bsrl(u_int mask); +void cpu_invlpg(u_long addr); +void cpu_invlpg_range(u_long start, u_long end); +void disable_intr(void); +void do_cpuid(u_int ax, u_int *p); +void enable_intr(void); +void halt(void); +u_char inb(u_int port); +u_int inl(u_int port); +void insb(u_int port, void *addr, size_t cnt); +void insl(u_int port, void *addr, size_t cnt); +void insw(u_int port, void *addr, size_t cnt); +void invd(void); +void invlpg(u_int addr); +void invlpg_range(u_int start, u_int end); +void invltlb(void); +u_short inw(u_int port); +void load_cr0(u_int cr0); +void load_cr3(u_int cr3); +void load_cr4(u_int cr4); +void load_fs(u_int sel); +void load_gs(u_int sel); +struct region_descriptor; +void lidt(struct region_descriptor *addr); +void lldt(u_short sel); +void ltr(u_short sel); +void outb(u_int port, u_char data); +void outl(u_int port, u_int data); +void outsb(u_int port, void *addr, size_t cnt); +void outsl(u_int port, void *addr, size_t cnt); +void outsw(u_int port, void *addr, size_t cnt); +void outw(u_int port, u_short data); +void ia32_pause(void); +u_int rcr0(void); +u_int rcr2(void); +u_int rcr3(void); +u_int rcr4(void); +u_int rfs(void); +u_int rgs(void); +u_int64_t rdmsr(u_int msr); +u_int64_t rdpmc(u_int pmc); +u_int64_t rdtsc(void); +u_int read_rflags(void); +void wbinvd(void); +void write_rflags(u_int rf); +void wrmsr(u_int msr, u_int64_t newval); +u_int64_t rdr0(void); +void load_dr0(u_int64_t dr0); +u_int64_t rdr1(void); +void load_dr1(u_int64_t dr1); +u_int64_t rdr2(void); +void load_dr2(u_int64_t dr2); +u_int64_t rdr3(void); +void load_dr3(u_int64_t dr3); +u_int64_t rdr4(void); +void load_dr4(u_int64_t dr4); +u_int64_t rdr5(void); +void load_dr5(u_int64_t dr5); +u_int64_t rdr6(void); +void load_dr6(u_int64_t dr6); +u_int64_t rdr7(void); +void load_dr7(u_int64_t dr7); +register_t intr_disable(void); +void intr_restore(register_t rf); + +#endif /* __GNUC__ */ + +void reset_dbregs(void); + +__END_DECLS + +#endif /* !_CPU_CPUFUNC_H_ */ diff --git a/sys/cpu/amd64/include/elf.h b/sys/cpu/amd64/include/elf.h new file mode 100644 index 0000000000..180c8b64b0 --- /dev/null +++ b/sys/cpu/amd64/include/elf.h @@ -0,0 +1,149 @@ +/*- + * Copyright (c) 1996-1997 John D. Polstra. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + * $FreeBSD: src/sys/amd64/include/elf.h,v 1.18 2004/08/03 08:21:48 dfr Exp $ + * $DragonFly: src/sys/cpu/amd64/include/elf.h,v 1.1 2007/08/21 19:40:24 corecode Exp $ + */ + +#ifndef _CPU_ELF_H_ +#define _CPU_ELF_H_ + +/* + * ELF definitions for the AMD64 architecture. + */ + + +#ifndef __ELF_WORD_SIZE +#define __ELF_WORD_SIZE 64 /* Used by */ +#endif +#include /* Definitions common to all 32 bit architectures. */ +#include /* Definitions common to all 64 bit architectures. */ +#include + +#define ELF_ARCH EM_X86_64 + +#define ELF_MACHINE_OK(x) ((x) == EM_X86_64) + +/* + * Auxiliary vector entries for passing information to the interpreter. + * + * The i386 supplement to the SVR4 ABI specification names this "auxv_t", + * but POSIX lays claim to all symbols ending with "_t". + */ +typedef struct { /* Auxiliary vector entry on initial stack */ + int a_type; /* Entry type. */ + union { + int a_val; /* Integer value. */ + } a_un; +} Elf32_Auxinfo; + + +typedef struct { /* Auxiliary vector entry on initial stack */ + long a_type; /* Entry type. */ + union { + long a_val; /* Integer value. */ + void *a_ptr; /* Address. */ + void (*a_fcn)(void); /* Function pointer (not used). */ + } a_un; +} Elf64_Auxinfo; + +__ElfType(Auxinfo); + +/* Values for a_type. */ +#define AT_NULL 0 /* Terminates the vector. */ +#define AT_IGNORE 1 /* Ignored entry. */ +#define AT_EXECFD 2 /* File descriptor of program to load. */ +#define AT_PHDR 3 /* Program header of program already loaded. */ +#define AT_PHENT 4 /* Size of each program header entry. */ +#define AT_PHNUM 5 /* Number of program header entries. */ +#define AT_PAGESZ 6 /* Page size in bytes. */ +#define AT_BASE 7 /* Interpreter's base address. */ +#define AT_FLAGS 8 /* Flags (unused for i386). */ +#define AT_ENTRY 9 /* Where interpreter should transfer control. */ + +/* + * The following non-standard values are used for passing information + * from John Polstra's testbed program to the dynamic linker. These + * are expected to go away soon. + * + * Unfortunately, these overlap the Linux non-standard values, so they + * must not be used in the same context. + */ +#define AT_BRK 10 /* Starting point for sbrk and brk. */ +#define AT_DEBUG 11 /* Debugging level. */ + +/* + * The following non-standard values are used in Linux ELF binaries. + */ +#define AT_NOTELF 10 /* Program is not ELF ?? */ +#define AT_UID 11 /* Real uid. */ +#define AT_EUID 12 /* Effective uid. */ +#define AT_GID 13 /* Real gid. */ +#define AT_EGID 14 /* Effective gid. */ + +#define AT_COUNT 15 /* Count of defined aux entry types. */ + +/* + * Relocation types. + */ + +#define R_X86_64_NONE 0 /* No relocation. */ +#define R_X86_64_64 1 /* Add 64 bit symbol value. */ +#define R_X86_64_PC32 2 /* PC-relative 32 bit signed sym value. */ +#define R_X86_64_GOT32 3 /* PC-relative 32 bit GOT offset. */ +#define R_X86_64_PLT32 4 /* PC-relative 32 bit PLT offset. */ +#define R_X86_64_COPY 5 /* Copy data from shared object. */ +#define R_X86_64_GLOB_DAT 6 /* Set GOT entry to data address. */ +#define R_X86_64_JMP_SLOT 7 /* Set GOT entry to code address. */ +#define R_X86_64_RELATIVE 8 /* Add load address of shared object. */ +#define R_X86_64_GOTPCREL 9 /* Add 32 bit signed pcrel offset to GOT. */ +#define R_X86_64_32 10 /* Add 32 bit zero extended symbol value */ +#define R_X86_64_32S 11 /* Add 32 bit sign extended symbol value */ +#define R_X86_64_16 12 /* Add 16 bit zero extended symbol value */ +#define R_X86_64_PC16 13 /* Add 16 bit signed extended pc relative symbol value */ +#define R_X86_64_8 14 /* Add 8 bit zero extended symbol value */ +#define R_X86_64_PC8 15 /* Add 8 bit signed extended pc relative symbol value */ +#define R_X86_64_DTPMOD64 16 /* ID of module containing symbol */ +#define R_X86_64_DTPOFF64 17 /* Offset in TLS block */ +#define R_X86_64_TPOFF64 18 /* Offset in static TLS block */ +#define R_X86_64_TLSGD 19 /* PC relative offset to GD GOT entry */ +#define R_X86_64_TLSLD 20 /* PC relative offset to LD GOT entry */ +#define R_X86_64_DTPOFF32 21 /* Offset in TLS block */ +#define R_X86_64_GOTTPOFF 22 /* PC relative offset to IE GOT entry */ +#define R_X86_64_TPOFF32 23 /* Offset in static TLS block */ + +#define R_X86_64_COUNT 24 /* Count of defined relocation types. */ + +/* Define "machine" characteristics */ +#if __ELF_WORD_SIZE == 32 +#define ELF_TARG_CLASS ELFCLASS32 +#else +#define ELF_TARG_CLASS ELFCLASS64 +#endif +#define ELF_TARG_DATA ELFDATA2LSB +#define ELF_TARG_MACH EM_X86_64 +#define ELF_TARG_VER 1 + +#endif /* !_CPU_ELF_H_ */ diff --git a/sys/cpu/amd64/include/endian.h b/sys/cpu/amd64/include/endian.h new file mode 100644 index 0000000000..891ea7aac5 --- /dev/null +++ b/sys/cpu/amd64/include/endian.h @@ -0,0 +1,199 @@ +/*- + * Copyright (c) 1987, 1991 Regents of the University of California. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * 3. All advertising materials mentioning features or use of this software + * must display the following acknowledgement: + * This product includes software developed by the University of + * California, Berkeley and its contributors. + * 4. Neither the name of the University nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + * @(#)endian.h 7.8 (Berkeley) 4/3/91 + * $FreeBSD: src/sys/amd64/include/endian.h,v 1.5 2003/09/22 22:37:49 peter Exp $ + * $DragonFly: src/sys/cpu/amd64/include/endian.h,v 1.1 2007/08/21 19:40:24 corecode Exp $ + */ + +#ifndef _CPU_ENDIAN_H_ +#define _CPU_ENDIAN_H_ + +#ifndef _KERNEL +#include +#endif + +#include + +/* + * Define the order of 32-bit words in 64-bit words. + */ +#define _QUAD_HIGHWORD 1 +#define _QUAD_LOWWORD 0 + +/* + * Definitions for byte order, according to byte significance from low + * address to high. + */ +#define _LITTLE_ENDIAN 1234 /* LSB first: i386, vax */ +#define _BIG_ENDIAN 4321 /* MSB first: 68000, ibm, net */ +#define _PDP_ENDIAN 3412 /* LSB first in word, MSW first in long */ + +#define _BYTE_ORDER _LITTLE_ENDIAN + +/* + * Deprecated variants that don't have enough underscores to be useful in more + * strict namespaces. + */ +#if __BSD_VISIBLE +#define LITTLE_ENDIAN _LITTLE_ENDIAN +#define BIG_ENDIAN _BIG_ENDIAN +#define PDP_ENDIAN _PDP_ENDIAN +#define BYTE_ORDER _BYTE_ORDER +#endif + +#ifdef __GNUC__ + +#define __word_swap_int_var(x) \ +__extension__ ({ register __uint32_t __X = (x); \ + __asm ("rorl $16, %0" : "+r" (__X)); \ + __X; }) + +#ifdef __OPTIMIZE__ + +#define __word_swap_int_const(x) \ + ((((x) & 0xffff0000) >> 16) | \ + (((x) & 0x0000ffff) << 16)) +#define __word_swap_int(x) (__builtin_constant_p(x) ? \ + __word_swap_int_const(x) : __word_swap_int_var(x)) + +#else /* __OPTIMIZE__ */ + +#define __word_swap_int(x) __word_swap_int_var(x) + +#endif /* __OPTIMIZE__ */ + +#define __byte_swap_int_var(x) \ +__extension__ ({ register __uint32_t __X = (x); \ + __asm ("bswap %0" : "+r" (__X)); \ + __X; }) + +#ifdef __OPTIMIZE__ + +#define __byte_swap_int_const(x) \ + ((((x) & 0xff000000) >> 24) | \ + (((x) & 0x00ff0000) >> 8) | \ + (((x) & 0x0000ff00) << 8) | \ + (((x) & 0x000000ff) << 24)) +#define __byte_swap_int(x) (__builtin_constant_p(x) ? \ + __byte_swap_int_const(x) : __byte_swap_int_var(x)) + +#else /* __OPTIMIZE__ */ + +#define __byte_swap_int(x) __byte_swap_int_var(x) + +#endif /* __OPTIMIZE__ */ + +#define __byte_swap_long_var(x) \ +__extension__ ({ register __uint64_t __X = (x); \ + __asm ("bswap %0" : "+r" (__X)); \ + __X; }) + +#ifdef __OPTIMIZE__ + +#define __byte_swap_long_const(x) \ + (((x >> 56) | \ + ((x >> 40) & 0xff00) | \ + ((x >> 24) & 0xff0000) | \ + ((x >> 8) & 0xff000000) | \ + ((x << 8) & (0xfful << 32)) | \ + ((x << 24) & (0xfful << 40)) | \ + ((x << 40) & (0xfful << 48)) | \ + ((x << 56)))) + +#define __byte_swap_long(x) (__builtin_constant_p(x) ? \ + __byte_swap_long_const(x) : __byte_swap_long_var(x)) + +#else /* __OPTIMIZE__ */ + +#define __byte_swap_long(x) __byte_swap_long_var(x) + +#endif /* __OPTIMIZE__ */ + +#define __byte_swap_word_var(x) \ +__extension__ ({ register __uint16_t __X = (x); \ + __asm ("xchgb %h0, %b0" : "+Q" (__X)); \ + __X; }) + +#ifdef __OPTIMIZE__ + +#define __byte_swap_word_const(x) \ + ((((x) & 0xff00) >> 8) | \ + (((x) & 0x00ff) << 8)) + +#define __byte_swap_word(x) (__builtin_constant_p(x) ? \ + __byte_swap_word_const(x) : __byte_swap_word_var(x)) + +#else /* __OPTIMIZE__ */ + +#define __byte_swap_word(x) __byte_swap_word_var(x) + +#endif /* __OPTIMIZE__ */ + +static __inline __uint64_t +__bswap64(__uint64_t _x) +{ + + return (__byte_swap_long(_x)); +} + +static __inline __uint32_t +__bswap32(__uint32_t _x) +{ + + return (__byte_swap_int(_x)); +} + +static __inline __uint16_t +__bswap16(__uint16_t _x) +{ + + return (__byte_swap_word(_x)); +} + +#define __htonl(x) __bswap32(x) +#define __htons(x) __bswap16(x) +#define __ntohl(x) __bswap32(x) +#define __ntohs(x) __bswap16(x) + +#else /* !__GNUC__ */ + +/* + * No optimizations are available for this compiler. Fall back to + * non-optimized functions by defining the constant usually used to prevent + * redefinition. + */ +#define _BYTEORDER_FUNC_DEFINED + +#endif /* __GNUC__ */ + +#endif /* !_CPU_ENDIAN_H_ */ diff --git a/sys/cpu/amd64/include/exec.h b/sys/cpu/amd64/include/exec.h new file mode 100644 index 0000000000..2b1c0e2ddc --- /dev/null +++ b/sys/cpu/amd64/include/exec.h @@ -0,0 +1,43 @@ +/*- + * Copyright (c) 1992, 1993 + * The Regents of the University of California. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * 3. All advertising materials mentioning features or use of this software + * must display the following acknowledgement: + * This product includes software developed by the University of + * California, Berkeley and its contributors. + * 4. Neither the name of the University nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + * @(#)exec.h 8.1 (Berkeley) 6/11/93 + * $FreeBSD: src/sys/amd64/include/exec.h,v 1.8 1999/08/28 00:44:11 peter Exp $ + * $DragonFly: src/sys/cpu/amd64/include/exec.h,v 1.1 2007/08/21 19:40:24 corecode Exp $ + */ + +#ifndef _EXEC_H_ +#define _EXEC_H_ + +#define __LDPGSZ 4096 + +#endif /* !_EXEC_H_ */ diff --git a/sys/cpu/amd64/include/float.h b/sys/cpu/amd64/include/float.h new file mode 100644 index 0000000000..9716ee8f57 --- /dev/null +++ b/sys/cpu/amd64/include/float.h @@ -0,0 +1,76 @@ +/* + * Copyright (c) 1989 Regents of the University of California. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * 3. All advertising materials mentioning features or use of this software + * must display the following acknowledgement: + * This product includes software developed by the University of + * California, Berkeley and its contributors. + * 4. Neither the name of the University nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + * from: @(#)float.h 7.1 (Berkeley) 5/8/90 + * $FreeBSD: src/sys/amd64/include/float.h,v 1.10 2003/02/08 20:37:54 mike Exp $ + * $DragonFly: src/sys/cpu/amd64/include/float.h,v 1.1 2007/08/21 19:40:24 corecode Exp $ + */ + +#ifndef _CPU_FLOAT_H_ +#define _CPU_FLOAT_H_ + +#define FLT_RADIX 2 /* b */ +#define FLT_ROUNDS 1 /* FP addition rounds to nearest */ +#define FLT_EVAL_METHOD (-1) /* i387 semantics are...interesting */ +#define DECIMAL_DIG 21 /* max precision in decimal digits */ + +#define FLT_MANT_DIG 24 /* p */ +#define FLT_EPSILON 1.19209290E-07F /* b**(1-p) */ +#define FLT_DIG 6 /* floor((p-1)*log10(b))+(b == 10) */ +#define FLT_MIN_EXP (-125) /* emin */ +#define FLT_MIN 1.17549435E-38F /* b**(emin-1) */ +#define FLT_MIN_10_EXP (-37) /* ceil(log10(b**(emin-1))) */ +#define FLT_MAX_EXP 128 /* emax */ +#define FLT_MAX 3.40282347E+38F /* (1-b**(-p))*b**emax */ +#define FLT_MAX_10_EXP 38 /* floor(log10((1-b**(-p))*b**emax)) */ + +#define DBL_MANT_DIG 53 +#define DBL_EPSILON 2.2204460492503131E-16 +#define DBL_DIG 15 +#define DBL_MIN_EXP (-1021) +#define DBL_MIN 2.2250738585072014E-308 +#define DBL_MIN_10_EXP (-307) +#define DBL_MAX_EXP 1024 +#define DBL_MAX 1.7976931348623157E+308 +#define DBL_MAX_10_EXP 308 + + +#define LDBL_MANT_DIG 64 +#define LDBL_EPSILON 1.0842021724855044340E-19L +#define LDBL_DIG 18 +#define LDBL_MIN_EXP (-16381) +#define LDBL_MIN 3.3621031431120935063E-4932L +#define LDBL_MIN_10_EXP (-4931) +#define LDBL_MAX_EXP 16384 +#define LDBL_MAX 1.1897314953572317650E+4932L +#define LDBL_MAX_10_EXP 4932 +#endif /* _CPU_FLOAT_H_ */ diff --git a/sys/cpu/amd64/include/frame.h b/sys/cpu/amd64/include/frame.h new file mode 100644 index 0000000000..cef0377a60 --- /dev/null +++ b/sys/cpu/amd64/include/frame.h @@ -0,0 +1,124 @@ +/*- + * Copyright (c) 2003 Peter Wemm. + * Copyright (c) 1990 The Regents of the University of California. + * All rights reserved. + * + * This code is derived from software contributed to Berkeley by + * William Jolitz. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * 3. All advertising materials mentioning features or use of this software + * must display the following acknowledgement: + * This product includes software developed by the University of + * California, Berkeley and its contributors. + * 4. Neither the name of the University nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + * from: @(#)frame.h 5.2 (Berkeley) 1/18/91 + * $FreeBSD: src/sys/amd64/include/frame.h,v 1.26 2003/11/08 04:39:22 peter Exp $ + * $DragonFly: src/sys/cpu/amd64/include/frame.h,v 1.1 2007/08/21 19:40:24 corecode Exp $ + */ + +#ifndef _CPU_FRAME_H_ +#define _CPU_FRAME_H_ + +/* + * System stack frames. + */ + +/* + * Exception/Trap Stack Frame + * + * The ordering of this is specifically so that we can take first 6 + * the syscall arguments directly from the beginning of the frame. + */ + +struct trapframe { + /* fs XXX */ + /* es XXX */ + /* ds XXX */ + register_t tf_rdi; + register_t tf_rsi; + register_t tf_rdx; + register_t tf_rcx; + register_t tf_r8; + register_t tf_r9; + register_t tf_rax; + register_t tf_rbx; + register_t tf_rbp; + register_t tf_r10; + register_t tf_r11; + register_t tf_r12; + register_t tf_r13; + register_t tf_r14; + register_t tf_r15; + register_t tf_trapno; + register_t tf_addr; + register_t tf_flags; + /* below portion defined in hardware */ + register_t tf_err; + register_t tf_rip; + register_t tf_cs; + register_t tf_rflags; + register_t tf_rsp; + register_t tf_ss; +}; + +/* Interrupt stack frame */ + +struct intrframe { + /* vec */ + /* ppl */ + /* fs XXX */ + /* es XXX */ + /* ds XXX */ + register_t if_rdi; + register_t if_rsi; + register_t if_rdx; + register_t if_rcx; + register_t if_r8; + register_t if_r9; + register_t if_rax; + register_t if_rbx; + register_t if_rbp; + register_t if_r10; + register_t if_r11; + register_t if_r12; + register_t if_r13; + register_t if_r14; + register_t if_r15; + register_t :64; /* compat with trap frame - trapno */ + register_t :64; /* compat with trap frame - addr */ + register_t :64; /* compat with trap frame - flags */ + register_t :64; /* compat with trap frame - err */ + /* below portion defined in hardware */ + register_t if_rip; + register_t if_cs; + register_t if_rflags; + register_t if_rsp; + register_t if_ss; +}; + +int kdb_trap(int, int, struct trapframe *); + +#endif /* _CPU_FRAME_H_ */ diff --git a/sys/cpu/amd64/include/ieee.h b/sys/cpu/amd64/include/ieee.h new file mode 100644 index 0000000000..26000a1cd8 --- /dev/null +++ b/sys/cpu/amd64/include/ieee.h @@ -0,0 +1,97 @@ +/* $NetBSD: ieee.h,v 1.7 2003/10/26 21:46:46 kleink Exp $ */ +/* $DragonFly: src/sys/cpu/amd64/include/ieee.h,v 1.1 2007/08/21 19:40:24 corecode Exp $ */ + +/* + * Copyright (c) 1992, 1993 + * The Regents of the University of California. All rights reserved. + * + * This software was developed by the Computer Systems Engineering group + * at Lawrence Berkeley Laboratory under DARPA contract BG 91-66 and + * contributed to Berkeley. + * + * All advertising materials mentioning features or use of this software + * must display the following acknowledgement: + * This product includes software developed by the University of + * California, Lawrence Berkeley Laboratory. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * 3. Neither the name of the University nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + * @(#)ieee.h 8.1 (Berkeley) 6/11/93 + */ + +/* + * ieee.h defines the machine-dependent layout of the machine's IEEE + * floating point. It does *not* define (yet?) any of the rounding + * mode bits, exceptions, and so forth. + */ + +#include + +#define EXT_EXPBITS 15 +#define EXT_FRACBITS 64 + +/* + * struct ieee_ext is the raw storage layout of the 80-bit + * extended-precision type as implemented by the FPU. Per the + * respective ABI specifications, it is followed by a tail padding of + * + * amd64: 48 bits, + * i386: 16 bits. + */ +struct ieee_ext { + u_int ext_fracl; + u_int ext_frach:31; + u_int ext_int:1; + u_int ext_exp:15; + u_int ext_sign:1; +}; + +/* + * Floats whose exponent is in [1..INFNAN) (of whatever type) are + * `normal'. Floats whose exponent is INFNAN are either Inf or NaN. + * Floats whose exponent is zero are either zero (iff all fraction + * bits are zero) or subnormal values. + * + * A NaN is a `signalling NaN' if its QUIETNAN bit is clear in its + * high fraction; if the bit is set, it is a `quiet NaN'. + */ +#define EXT_EXP_INFNAN 32767 + +#if 0 +#define EXT_QUIETNAN (1 << 30) +#endif + +/* + * Exponent biases. + */ +#define EXT_EXP_BIAS 16383 + +/* + * Convenience data structures. + */ +union ieee_ext_u { + long double extu_ld; + struct ieee_ext extu_ext; +}; diff --git a/sys/cpu/amd64/include/ieeefp.h b/sys/cpu/amd64/include/ieeefp.h new file mode 100644 index 0000000000..21e16cca96 --- /dev/null +++ b/sys/cpu/amd64/include/ieeefp.h @@ -0,0 +1,293 @@ +/*- + * Copyright (c) 2003 Peter Wemm. + * Copyright (c) 1990 Andrew Moore, Talke Studio + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * 3. All advertising materials mentioning features or use of this software + * must display the following acknowledgement: + * This product includes software developed by the University of + * California, Berkeley and its contributors. + * 4. Neither the name of the University nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + * from: @(#) ieeefp.h 1.0 (Berkeley) 9/23/93 + * $FreeBSD: src/sys/amd64/include/ieeefp.h,v 1.11 2003/11/08 04:39:22 peter Exp $ + * $DragonFly: src/sys/cpu/amd64/include/ieeefp.h,v 1.1 2007/08/21 19:40:24 corecode Exp $ + */ + +/* + * IEEE floating point type and constant definitions. + */ + +#ifndef _CPU_IEEEFP_H_ +#define _CPU_IEEEFP_H_ + +/* + * FP rounding modes + */ +typedef enum { + FP_RN=0, /* round to nearest */ + FP_RM, /* round down to minus infinity */ + FP_RP, /* round up to plus infinity */ + FP_RZ /* truncate */ +} fp_rnd_t; + +/* + * FP precision modes + */ +typedef enum { + FP_PS=0, /* 24 bit (single-precision) */ + FP_PRS, /* reserved */ + FP_PD, /* 53 bit (double-precision) */ + FP_PE /* 64 bit (extended-precision) */ +} fp_prec_t; + +#define fp_except_t int + +/* + * FP exception masks + */ +#define FP_X_INV 0x01 /* invalid operation */ +#define FP_X_DNML 0x02 /* denormal */ +#define FP_X_DZ 0x04 /* zero divide */ +#define FP_X_OFL 0x08 /* overflow */ +#define FP_X_UFL 0x10 /* underflow */ +#define FP_X_IMP 0x20 /* (im)precision */ +#define FP_X_STK 0x40 /* stack fault */ + +/* + * FP registers + */ +#define FP_MSKS_REG 0 /* exception masks */ +#define FP_PRC_REG 0 /* precision */ +#define FP_RND_REG 0 /* direction */ +#define FP_STKY_REG 1 /* sticky flags */ + +/* + * FP register bit field masks + */ +#define FP_MSKS_FLD 0x3f /* exception masks field */ +#define FP_PRC_FLD 0x300 /* precision control field */ +#define FP_RND_FLD 0xc00 /* round control field */ +#define FP_STKY_FLD 0x3f /* sticky flags field */ + +/* + * SSE mxcsr register bit field masks + */ +#define SSE_STKY_FLD 0x3f /* exception flags */ +#define SSE_DAZ_FLD 0x40 /* Denormals are zero */ +#define SSE_MSKS_FLD 0x1f80 /* exception masks field */ +#define SSE_RND_FLD 0x6000 /* rounding control */ +#define SSE_FZ_FLD 0x8000 /* flush to zero on underflow */ + +/* + * FP register bit field offsets + */ +#define FP_MSKS_OFF 0 /* exception masks offset */ +#define FP_PRC_OFF 8 /* precision control offset */ +#define FP_RND_OFF 10 /* round control offset */ +#define FP_STKY_OFF 0 /* sticky flags offset */ + +/* + * SSE mxcsr register bit field offsets + */ +#define SSE_STKY_OFF 0 /* exception flags offset */ +#define SSE_DAZ_OFF 6 /* DAZ exception mask offset */ +#define SSE_MSKS_OFF 7 /* other exception masks offset */ +#define SSE_RND_OFF 13 /* rounding control offset */ +#define SSE_FZ_OFF 15 /* flush to zero offset */ + +#if defined(__GNUC__) && !defined(__cplusplus) + +#define __fldenv(addr) __asm __volatile("fldenv %0" : : "m" (*(addr))) +#define __fnstenv(addr) __asm __volatile("fnstenv %0" : "=m" (*(addr))) +#define __fldcw(addr) __asm __volatile("fldcw %0" : "=m" (*(addr))) +#define __fnstcw(addr) __asm __volatile("fnstcw %0" : "=m" (*(addr))) +#define __fnstsw(addr) __asm __volatile("fnstsw %0" : "=m" (*(addr))) +#define __ldmxcsr(addr) __asm __volatile("ldmxcsr %0" : "=m" (*(addr))) +#define __stmxcsr(addr) __asm __volatile("stmxcsr %0" : "=m" (*(addr))) + +/* + * General notes about conflicting SSE vs FP status bits. + * This code assumes that software will not fiddle with the control + * bits of the SSE and x87 in such a way to get them out of sync and + * still expect this to work. Break this at your peril. + * Because I based this on the i386 port, the x87 state is used for + * the fpget*() functions, and is shadowed into the SSE state for + * the fpset*() functions. For dual source fpget*() functions, I + * merge the two together. I think. + */ + +/* Set rounding control */ +static __inline__ fp_rnd_t +__fpgetround(void) +{ + unsigned short _cw; + + __fnstcw(&_cw); + return ((_cw & FP_RND_FLD) >> FP_RND_OFF); +} + +static __inline__ fp_rnd_t +__fpsetround(fp_rnd_t _m) +{ + unsigned short _cw; + unsigned int _mxcsr; + fp_rnd_t _p; + + __fnstcw(&_cw); + _p = (_cw & FP_RND_FLD) >> FP_RND_OFF; + _cw &= ~FP_RND_FLD; + _cw |= (_m << FP_RND_OFF) & FP_RND_FLD; + __fldcw(&_cw); + __stmxcsr(&_mxcsr); + _mxcsr &= ~SSE_RND_FLD; + _mxcsr |= (_m << SSE_RND_OFF) & SSE_RND_FLD; + __ldmxcsr(&_mxcsr); + return (_p); +} + +/* + * Set precision for fadd/fsub/fsqrt etc x87 instructions + * There is no equivalent SSE mode or control. + */ +static __inline__ fp_prec_t +__fpgetprec(void) +{ + unsigned short _cw; + + __fnstcw(&_cw); + return ((_cw & FP_PRC_FLD) >> FP_PRC_OFF); +} + +static __inline__ fp_prec_t +__fpsetprec(fp_rnd_t _m) +{ + unsigned short _cw; + fp_prec_t _p; + + __fnstcw(&_cw); + _p = (_cw & FP_PRC_FLD) >> FP_PRC_OFF; + _cw &= ~FP_PRC_FLD; + _cw |= (_m << FP_PRC_OFF) & FP_PRC_FLD; + __fldcw(&_cw); + return (_p); +} + +/* + * Look at the exception masks + * Note that x87 masks are inverse of the fp*() functions + * API. ie: mask = 1 means disable for x87 and SSE, but + * for the fp*() api, mask = 1 means enabled. + */ +static __inline__ fp_except_t +__fpgetmask(void) +{ + unsigned short _cw; + + __fnstcw(&_cw); + return ((~_cw) & FP_MSKS_FLD); +} + +static __inline__ fp_except_t +__fpsetmask(fp_except_t _m) +{ + unsigned short _cw; + unsigned int _mxcsr; + fp_except_t _p; + + __fnstcw(&_cw); + _p = (~_cw) & FP_MSKS_FLD; + _cw &= ~FP_MSKS_FLD; + _cw |= (~_m) & FP_MSKS_FLD; + __fldcw(&_cw); + __stmxcsr(&_mxcsr); + /* XXX should we clear non-ieee SSE_DAZ_FLD and SSE_FZ_FLD ? */ + _mxcsr &= ~SSE_MSKS_FLD; + _mxcsr |= ((~_m) << SSE_MSKS_OFF) & SSE_MSKS_FLD; + __ldmxcsr(&_mxcsr); + return (_p); +} + +/* See which sticky exceptions are pending, and reset them */ +static __inline__ fp_except_t +__fpgetsticky(void) +{ + unsigned short _sw; + unsigned int _mxcsr; + fp_except_t _ex; + + __fnstsw(&_sw); + _ex = _sw & FP_STKY_FLD; + __stmxcsr(&_mxcsr); + _ex |= _mxcsr & SSE_STKY_FLD; + return (_ex); +} + +/* Note that this should really be called fpresetsticky() */ +static __inline__ fp_except_t +__fpsetsticky(fp_except_t _m) +{ + unsigned _env[7]; + unsigned int _mxcsr; + fp_except_t _p; + + __fnstenv(_env); + _p = _env[FP_STKY_REG] & _m; + __stmxcsr(&_mxcsr); + _p |= _mxcsr & SSE_STKY_FLD; + _env[FP_STKY_REG] &= ~_m; + __fldenv(_env); + _mxcsr &= ~_m; + __ldmxcsr(&_mxcsr); + return (_p); +} + +#endif /* __GNUC__ && !__cplusplus */ + +#if !defined(__IEEEFP_NOINLINES__) && !defined(__cplusplus) && defined(__GNUC__) + +#define fpgetround() __fpgetround() +#define fpsetround(_m) __fpsetround(_m) +#define fpgetprec() __fpgetprec() +#define fpsetprec(_m) __fpsetprec(_m) +#define fpgetmask() __fpgetmask() +#define fpsetmask(_m) __fpsetmask(_m) +#define fpgetsticky() __fpgetsticky() +#define fpsetsticky(_m) __fpsetsticky(_m) + +/* Suppress prototypes in the MI header. */ +#define _IEEEFP_INLINED_ 1 + +#else /* !__IEEEFP_NOINLINES__ && !__cplusplus && __GNUC__ */ + +/* Augment the userland declarations */ +__BEGIN_DECLS +extern fp_prec_t fpgetprec(void); +extern fp_prec_t fpsetprec(fp_prec_t); +__END_DECLS + +#endif /* !__IEEEFP_NOINLINES__ && !__cplusplus && __GNUC__ */ + +#endif /* !_CPU_IEEEFP_H_ */ diff --git a/sys/cpu/amd64/include/inttypes.h b/sys/cpu/amd64/include/inttypes.h new file mode 100644 index 0000000000..9a7ede2ac0 --- /dev/null +++ b/sys/cpu/amd64/include/inttypes.h @@ -0,0 +1,221 @@ +/*- + * Copyright (c) 2001 The NetBSD Foundation, Inc. + * All rights reserved. + * + * This code is derived from software contributed to The NetBSD Foundation + * by Klaus Klein. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * 3. All advertising materials mentioning features or use of this software + * must display the following acknowledgement: + * This product includes software developed by the NetBSD + * Foundation, Inc. and its contributors. + * 4. Neither the name of The NetBSD Foundation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED + * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR + * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS + * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + * From: $NetBSD: int_fmtio.h,v 1.2 2001/04/26 16:25:21 kleink Exp $ + * $FreeBSD: src/sys/amd64/include/_inttypes.h,v 1.3 2003/05/01 01:05:23 peter Exp $ + * $DragonFly: src/sys/cpu/amd64/include/inttypes.h,v 1.1 2007/08/21 19:40:24 corecode Exp $ + */ + +#ifndef _CPU_INTTYPES_H_ +#define _CPU_INTTYPES_H_ + +/* + * Macros for format specifiers. + */ + +/* fprintf(3) macros for signed integers. */ + +#define PRId8 "d" /* int8_t */ +#define PRId16 "d" /* int16_t */ +#define PRId32 "d" /* int32_t */ +#define PRId64 "ld" /* int64_t */ +#define PRIdLEAST8 "d" /* int_least8_t */ +#define PRIdLEAST16 "d" /* int_least16_t */ +#define PRIdLEAST32 "d" /* int_least32_t */ +#define PRIdLEAST64 "ld" /* int_least64_t */ +#define PRIdFAST8 "d" /* int_fast8_t */ +#define PRIdFAST16 "d" /* int_fast16_t */ +#define PRIdFAST32 "d" /* int_fast32_t */ +#define PRIdFAST64 "ld" /* int_fast64_t */ +#define PRIdMAX "jd" /* intmax_t */ +#define PRIdPTR "ld" /* intptr_t */ + +#define PRIi8 "i" /* int8_t */ +#define PRIi16 "i" /* int16_t */ +#define PRIi32 "i" /* int32_t */ +#define PRIi64 "li" /* int64_t */ +#define PRIiLEAST8 "i" /* int_least8_t */ +#define PRIiLEAST16 "i" /* int_least16_t */ +#define PRIiLEAST32 "i" /* int_least32_t */ +#define PRIiLEAST64 "li" /* int_least64_t */ +#define PRIiFAST8 "i" /* int_fast8_t */ +#define PRIiFAST16 "i" /* int_fast16_t */ +#define PRIiFAST32 "i" /* int_fast32_t */ +#define PRIiFAST64 "li" /* int_fast64_t */ +#define PRIiMAX "ji" /* intmax_t */ +#define PRIiPTR "li" /* intptr_t */ + +/* fprintf(3) macros for unsigned integers. */ + +#define PRIo8 "o" /* uint8_t */ +#define PRIo16 "o" /* uint16_t */ +#define PRIo32 "o" /* uint32_t */ +#define PRIo64 "lo" /* uint64_t */ +#define PRIoLEAST8 "o" /* uint_least8_t */ +#define PRIoLEAST16 "o" /* uint_least16_t */ +#define PRIoLEAST32 "o" /* uint_least32_t */ +#define PRIoLEAST64 "lo" /* uint_least64_t */ +#define PRIoFAST8 "o" /* uint_fast8_t */ +#define PRIoFAST16 "o" /* uint_fast16_t */ +#define PRIoFAST32 "o" /* uint_fast32_t */ +#define PRIoFAST64 "lo" /* uint_fast64_t */ +#define PRIoMAX "jo" /* uintmax_t */ +#define PRIoPTR "lo" /* uintptr_t */ + +#define PRIu8 "u" /* uint8_t */ +#define PRIu16 "u" /* uint16_t */ +#define PRIu32 "u" /* uint32_t */ +#define PRIu64 "lu" /* uint64_t */ +#define PRIuLEAST8 "u" /* uint_least8_t */ +#define PRIuLEAST16 "u" /* uint_least16_t */ +#define PRIuLEAST32 "u" /* uint_least32_t */ +#define PRIuLEAST64 "lu" /* uint_least64_t */ +#define PRIuFAST8 "u" /* uint_fast8_t */ +#define PRIuFAST16 "u" /* uint_fast16_t */ +#define PRIuFAST32 "u" /* uint_fast32_t */ +#define PRIuFAST64 "lu" /* uint_fast64_t */ +#define PRIuMAX "ju" /* uintmax_t */ +#define PRIuPTR "lu" /* uintptr_t */ + +#define PRIx8 "x" /* uint8_t */ +#define PRIx16 "x" /* uint16_t */ +#define PRIx32 "x" /* uint32_t */ +#define PRIx64 "lx" /* uint64_t */ +#define PRIxLEAST8 "x" /* uint_least8_t */ +#define PRIxLEAST16 "x" /* uint_least16_t */ +#define PRIxLEAST32 "x" /* uint_least32_t */ +#define PRIxLEAST64 "lx" /* uint_least64_t */ +#define PRIxFAST8 "x" /* uint_fast8_t */ +#define PRIxFAST16 "x" /* uint_fast16_t */ +#define PRIxFAST32 "x" /* uint_fast32_t */ +#define PRIxFAST64 "lx" /* uint_fast64_t */ +#define PRIxMAX "jx" /* uintmax_t */ +#define PRIxPTR "lx" /* uintptr_t */ + +#define PRIX8 "X" /* uint8_t */ +#define PRIX16 "X" /* uint16_t */ +#define PRIX32 "X" /* uint32_t */ +#define PRIX64 "lX" /* uint64_t */ +#define PRIXLEAST8 "X" /* uint_least8_t */ +#define PRIXLEAST16 "X" /* uint_least16_t */ +#define PRIXLEAST32 "X" /* uint_least32_t */ +#define PRIXLEAST64 "lX" /* uint_least64_t */ +#define PRIXFAST8 "X" /* uint_fast8_t */ +#define PRIXFAST16 "X" /* uint_fast16_t */ +#define PRIXFAST32 "X" /* uint_fast32_t */ +#define PRIXFAST64 "lX" /* uint_fast64_t */ +#define PRIXMAX "jX" /* uintmax_t */ +#define PRIXPTR "lX" /* uintptr_t */ + +/* fscanf(3) macros for signed integers. */ + +#define SCNd8 "hhd" /* int8_t */ +#define SCNd16 "hd" /* int16_t */ +#define SCNd32 "d" /* int32_t */ +#define SCNd64 "ld" /* int64_t */ +#define SCNdLEAST8 "hhd" /* int_least8_t */ +#define SCNdLEAST16 "hd" /* int_least16_t */ +#define SCNdLEAST32 "d" /* int_least32_t */ +#define SCNdLEAST64 "ld" /* int_least64_t */ +#define SCNdFAST8 "d" /* int_fast8_t */ +#define SCNdFAST16 "d" /* int_fast16_t */ +#define SCNdFAST32 "d" /* int_fast32_t */ +#define SCNdFAST64 "ld" /* int_fast64_t */ +#define SCNdMAX "jd" /* intmax_t */ +#define SCNdPTR "ld" /* intptr_t */ + +#define SCNi8 "hhi" /* int8_t */ +#define SCNi16 "hi" /* int16_t */ +#define SCNi32 "i" /* int32_t */ +#define SCNi64 "li" /* int64_t */ +#define SCNiLEAST8 "hhi" /* int_least8_t */ +#define SCNiLEAST16 "hi" /* int_least16_t */ +#define SCNiLEAST32 "i" /* int_least32_t */ +#define SCNiLEAST64 "li" /* int_least64_t */ +#define SCNiFAST8 "i" /* int_fast8_t */ +#define SCNiFAST16 "i" /* int_fast16_t */ +#define SCNiFAST32 "i" /* int_fast32_t */ +#define SCNiFAST64 "li" /* int_fast64_t */ +#define SCNiMAX "ji" /* intmax_t */ +#define SCNiPTR "li" /* intptr_t */ + +/* fscanf(3) macros for unsigned integers. */ + +#define SCNo8 "hho" /* uint8_t */ +#define SCNo16 "ho" /* uint16_t */ +#define SCNo32 "o" /* uint32_t */ +#define SCNo64 "lo" /* uint64_t */ +#define SCNoLEAST8 "hho" /* uint_least8_t */ +#define SCNoLEAST16 "ho" /* uint_least16_t */ +#define SCNoLEAST32 "o" /* uint_least32_t */ +#define SCNoLEAST64 "lo" /* uint_least64_t */ +#define SCNoFAST8 "o" /* uint_fast8_t */ +#define SCNoFAST16 "o" /* uint_fast16_t */ +#define SCNoFAST32 "o" /* uint_fast32_t */ +#define SCNoFAST64 "lo" /* uint_fast64_t */ +#define SCNoMAX "jo" /* uintmax_t */ +#define SCNoPTR "lo" /* uintptr_t */ + +#define SCNu8 "hhu" /* uint8_t */ +#define SCNu16 "hu" /* uint16_t */ +#define SCNu32 "u" /* uint32_t */ +#define SCNu64 "lu" /* uint64_t */ +#define SCNuLEAST8 "hhu" /* uint_least8_t */ +#define SCNuLEAST16 "hu" /* uint_least16_t */ +#define SCNuLEAST32 "u" /* uint_least32_t */ +#define SCNuLEAST64 "lu" /* uint_least64_t */ +#define SCNuFAST8 "u" /* uint_fast8_t */ +#define SCNuFAST16 "u" /* uint_fast16_t */ +#define SCNuFAST32 "u" /* uint_fast32_t */ +#define SCNuFAST64 "lu" /* uint_fast64_t */ +#define SCNuMAX "ju" /* uintmax_t */ +#define SCNuPTR "lu" /* uintptr_t */ + +#define SCNx8 "hhx" /* uint8_t */ +#define SCNx16 "hx" /* uint16_t */ +#define SCNx32 "x" /* uint32_t */ +#define SCNx64 "lx" /* uint64_t */ +#define SCNxLEAST8 "hhx" /* uint_least8_t */ +#define SCNxLEAST16 "hx" /* uint_least16_t */ +#define SCNxLEAST32 "x" /* uint_least32_t */ +#define SCNxLEAST64 "lx" /* uint_least64_t */ +#define SCNxFAST8 "x" /* uint_fast8_t */ +#define SCNxFAST16 "x" /* uint_fast16_t */ +#define SCNxFAST32 "x" /* uint_fast32_t */ +#define SCNxFAST64 "lx" /* uint_fast64_t */ +#define SCNxMAX "jx" /* uintmax_t */ +#define SCNxPTR "lx" /* uintptr_t */ + +#endif /* !_CPU_INTTYPES_H_ */ diff --git a/sys/cpu/amd64/include/limits.h b/sys/cpu/amd64/include/limits.h new file mode 100644 index 0000000000..8b092511c0 --- /dev/null +++ b/sys/cpu/amd64/include/limits.h @@ -0,0 +1,100 @@ +/* + * Copyright (c) 1988, 1993 + * The Regents of the University of California. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * 3. All advertising materials mentioning features or use of this software + * must display the following acknowledgement: + * This product includes software developed by the University of + * California, Berkeley and its contributors. + * 4. Neither the name of the University nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + * @(#)limits.h 8.3 (Berkeley) 1/4/94 + * $FreeBSD: src/sys/i386/include/limits.h,v 1.14.2.2 2000/11/05 09:21:42 obrien Exp $ + * $DragonFly: src/sys/cpu/amd64/include/limits.h,v 1.1 2007/08/21 19:40:24 corecode Exp $ + */ + +#ifndef _CPU_LIMITS_H_ +#define _CPU_LIMITS_H_ + +#define CHAR_BIT 8 /* number of bits in a char */ +#define MB_LEN_MAX 6 /* Allow 31 bit UTF2 */ + +/* + * According to ANSI (section 2.2.4.2), the values below must be usable by + * #if preprocessing directives. Additionally, the expression must have the + * same type as would an expression that is an object of the corresponding + * type converted according to the integral promotions. The subtraction for + * INT_MIN, etc., is so the value is not unsigned; e.g., 0x80000000 is an + * unsigned int for 32-bit two's complement ANSI compilers (section 3.1.3.2). + * These numbers are for the default configuration of gcc. They work for + * some other compilers as well, but this should not be depended on. + */ +#define SCHAR_MAX 0x7f /* max value for a signed char */ +#define SCHAR_MIN (-0x7f - 1) /* min value for a signed char */ + +#define UCHAR_MAX 0xff /* max value for an unsigned char */ + +#ifdef __CHAR_UNSIGNED__ +#define CHAR_MAX UCHAR_MAX /* max value for a char */ +#define CHAR_MIN 0 /* min value for a char */ +#else +#define CHAR_MAX SCHAR_MAX /* max value for a char */ +#define CHAR_MIN SCHAR_MIN /* min value for a char */ +#endif + +#define USHRT_MAX 0xffff /* max value for an unsigned short */ +#define SHRT_MAX 0x7fff /* max value for a short */ +#define SHRT_MIN (-0x7fff - 1) /* min value for a short */ + +#define UINT_MAX 0xffffffffU /* max value for an unsigned int */ +#define INT_MAX 0x7fffffff /* max value for an int */ +#define INT_MIN (-0x7fffffff - 1) /* min value for an int */ + +/* Bad hack for gcc configured to give 64-bit longs. */ +#define ULONG_MAX 0xffffffffffffffffUL +#define LONG_MAX 0x7fffffffffffffffL +#define LONG_MIN (-0x7fffffffffffffffL - 1) + + /* XXX what is long long on amd64? */ + /* max value for an unsigned long long */ +#define ULLONG_MAX 0xffffffffffffffffULL +#define LLONG_MAX 0x7fffffffffffffffLL /* max value for a long long */ +#define LLONG_MIN (-0x7fffffffffffffffLL - 1) /* min for a long long */ + +#if !defined(_ANSI_SOURCE) +#define SSIZE_MAX LONG_MAX /* max value for a ssize_t */ + +#if !defined(_POSIX_SOURCE) +#define SIZE_T_MAX ULONG_MAX /* max value for a size_t */ + +/* Quads and long longs are the same size. Ensure they stay in sync. */ +#define UQUAD_MAX ULLONG_MAX /* max value for a uquad_t */ +#define QUAD_MAX LLONG_MAX /* max value for a quad_t */ +#define QUAD_MIN LLONG_MIN /* min value for a quad_t */ + +#endif /* !_POSIX_SOURCE */ +#endif /* !_ANSI_SOURCE */ + +#endif /* !_CPU_LIMITS_H_ */ diff --git a/sys/cpu/amd64/include/math.h b/sys/cpu/amd64/include/math.h new file mode 100644 index 0000000000..9c8793f3a1 --- /dev/null +++ b/sys/cpu/amd64/include/math.h @@ -0,0 +1,12 @@ +/* + * $NetBSD: math.h,v 1.2 2003/10/28 00:55:28 kleink Exp $ + * $DragonFly: src/sys/cpu/amd64/include/math.h,v 1.1 2007/08/21 19:40:24 corecode Exp $ + */ + +#ifndef _CPU_MATH_H_ +#define _CPU_MATH_H_ + +#define __HAVE_LONG_DOUBLE +#define __HAVE_NANF + +#endif diff --git a/sys/cpu/amd64/include/npx.h b/sys/cpu/amd64/include/npx.h new file mode 100644 index 0000000000..d1f9f2f6a5 --- /dev/null +++ b/sys/cpu/amd64/include/npx.h @@ -0,0 +1,161 @@ +/*- + * Copyright (c) 1990 The Regents of the University of California. + * All rights reserved. + * + * This code is derived from software contributed to Berkeley by + * William Jolitz. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * 3. All advertising materials mentioning features or use of this software + * must display the following acknowledgement: + * This product includes software developed by the University of + * California, Berkeley and its contributors. + * 4. Neither the name of the University nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + * from: @(#)npx.h 5.3 (Berkeley) 1/18/91 + * $FreeBSD: src/sys/i386/include/npx.h,v 1.18.2.1 2001/08/15 01:23:52 peter Exp $ + * $DragonFly: src/sys/cpu/amd64/include/npx.h,v 1.1 2007/08/21 19:40:24 corecode Exp $ + */ + +/* + * 287/387 NPX Coprocessor Data Structures and Constants + * W. Jolitz 1/90 + */ + +#ifndef _CPU_NPX_H_ +#define _CPU_NPX_H_ + +#ifndef _SYS_TYPES_H_ +#include +#endif + +/* Environment information of floating point unit */ +struct env87 { + long en_cw; /* control word (16bits) */ + long en_sw; /* status word (16bits) */ + long en_tw; /* tag word (16bits) */ + long en_fip; /* floating point instruction pointer */ + u_short en_fcs; /* floating code segment selector */ + u_short en_opcode; /* opcode last executed (11 bits ) */ + long en_foo; /* floating operand offset */ + long en_fos; /* floating operand segment selector */ +}; + +/* Contents of each floating point accumulator */ +struct fpacc87 { +#ifdef dontdef /* too unportable */ + u_long fp_mantlo; /* mantissa low (31:0) */ + u_long fp_manthi; /* mantissa high (63:32) */ + int fp_exp:15; /* exponent */ + int fp_sgn:1; /* mantissa sign */ +#else + u_char fp_bytes[10]; +#endif +}; + +/* Floating point context */ +struct save87 { + struct env87 sv_env; /* floating point control/status */ + struct fpacc87 sv_ac[8]; /* accumulator contents, 0-7 */ + u_long sv_ex_sw; /* status word for last exception */ + /* + * Bogus padding for emulators. Emulators should use their own + * struct and arrange to store into this struct (ending here) + * before it is inspected for ptracing or for core dumps. Some + * emulators overwrite the whole struct. We have no good way of + * knowing how much padding to leave. Leave just enough for the + * GPL emulator's i387_union (176 bytes total). + */ + u_char sv_pad[64]; /* padding; used by emulators */ +}; + +struct envxmm { + u_int16_t en_cw; /* control word (16bits) */ + u_int16_t en_sw; /* status word (16bits) */ + u_int16_t en_tw; /* tag word (16bits) */ + u_int16_t en_opcode; /* opcode last executed (11 bits ) */ + u_int32_t en_fip; /* floating point instruction pointer */ + u_int16_t en_fcs; /* floating code segment selector */ + u_int16_t en_pad0; /* padding */ + u_int32_t en_foo; /* floating operand offset */ + u_int16_t en_fos; /* floating operand segment selector */ + u_int16_t en_pad1; /* padding */ + u_int32_t en_mxcsr; /* SSE sontorol/status register */ + u_int32_t en_pad2; /* padding */ +}; + +/* Contents of each SSE extended accumulator */ +struct xmmacc { + u_char xmm_bytes[16]; +}; + +/* + * savexmm is a 512-byte structure + */ +struct savexmm { + struct envxmm sv_env; /* 32 */ + struct { + struct fpacc87 fp_acc; /* 10 */ + u_char fp_pad[6]; /* 6 (padding) */ + } sv_fp[8]; + struct xmmacc sv_xmm[8]; /* 128 */ + u_long sv_ex_sw; /* status word for last exception */ + u_char sv_pad[220]; +} __attribute__((aligned(16))); + +union savefpu { + struct save87 sv_87; + struct savexmm sv_xmm; +}; + +/* + * The hardware default control word for i387's and later coprocessors is + * 0x37F, giving: + * + * round to nearest + * 64-bit precision + * all exceptions masked. + * + * We modify the affine mode bit and precision bits in this to give: + * + * affine mode for 287's (if they work at all) (1 in bitfield 1<<12) + * 53-bit precision (2 in bitfield 3<<8) + * + * 64-bit precision often gives bad results with high level languages + * because it makes the results of calculations depend on whether + * intermediate values are stored in memory or in FPU registers. + */ +#define __INITIAL_NPXCW__ 0x127F + +#ifdef _KERNEL + +struct proc; +struct trapframe; + +void npxexit (void); +void npxinit (u_short control); +void npxsave (union savefpu *addr); +#endif + +#endif /* !_CPU_NPX_H_ */ diff --git a/sys/cpu/amd64/include/param.h b/sys/cpu/amd64/include/param.h new file mode 100644 index 0000000000..c1335bf163 --- /dev/null +++ b/sys/cpu/amd64/include/param.h @@ -0,0 +1,260 @@ +/*- + * Copyright (c) 1990 The Regents of the University of California. + * All rights reserved. + * + * This code is derived from software contributed to Berkeley by + * William Jolitz. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * 3. All advertising materials mentioning features or use of this software + * must display the following acknowledgement: + * This product includes software developed by the University of + * California, Berkeley and its contributors. + * 4. Neither the name of the University nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + * from: @(#)param.h 5.8 (Berkeley) 6/28/91 + * $FreeBSD: src/sys/i386/include/param.h,v 1.54.2.8 2002/08/31 21:15:55 dillon Exp $ + * $DragonFly: src/sys/cpu/amd64/include/param.h,v 1.1 2007/08/21 19:40:24 corecode Exp $ + */ + +#ifndef _CPU_PARAM_H_ + +/* + * Do not prevent re-includes of if the file was included + * with NO_NAMESPACE_POLLUTION, or expected macros will not exist. + */ +#ifndef _NO_NAMESPACE_POLLUTION +#define _CPU_PARAM_H_ +#endif + +/* + * Machine dependent constants for Intel 386. + */ +#ifndef _CPU_PARAM_H1_ +#define _CPU_PARAM_H1_ + +/* + * Round p (pointer or byte index) up to a correctly-aligned value + * for all data types (int, long, ...). The result is unsigned int + * and must be cast to any desired pointer type. + */ +#ifndef _ALIGNBYTES +#define _ALIGNBYTES (sizeof(long) - 1) +#endif +#ifndef _ALIGN +#define _ALIGN(p) (((unsigned long)(p) + _ALIGNBYTES) & ~_ALIGNBYTES) +#endif + +#ifndef _CPU +#define _CPU amd64 +#endif +#ifndef _CPU_ARCH +#define _CPU_ARCH amd64 +#endif + +/* + * OBJFORMAT_NAMES is a comma-separated list of the object formats + * that are supported on the architecture. + */ +#define OBJFORMAT_NAMES "elf" +#define OBJFORMAT_DEFAULT "elf" + +#endif /* _CPU_PARAM_H1_ */ + +#ifndef _NO_NAMESPACE_POLLUTION + +#ifndef CPU +#define CPU "amd64" +#endif +#ifndef CPU_ARCH +#define CPU_ARCH "amd64" +#endif + +/* + * Use SMP_MAXCPU instead of MAXCPU for structures that are intended to + * remain compatible between UP and SMP builds. + */ +#define SMP_MAXCPU 16 +#ifdef SMP +#define MAXCPU SMP_MAXCPU +#else +#define MAXCPU 1 +#endif /* SMP */ + +#define ALIGNBYTES _ALIGNBYTES +#define ALIGN(p) _ALIGN(p) + +/* level 1 == page table */ +#define PAGE_SHIFT 12 /* LOG2(PAGE_SIZE) */ +#define PAGE_SIZE (1<>PAGE_SHIFT) + +/* + * btodb() is messy and perhaps slow because `bytes' may be an off_t. We + * want to shift an unsigned type to avoid sign extension and we don't + * want to widen `bytes' unnecessarily. Assume that the result fits in + * a daddr_t. + */ +#define btodb(bytes) /* calculates (bytes / DEV_BSIZE) */ \ + (sizeof (bytes) > sizeof(long) \ + ? (daddr_t)((unsigned long long)(bytes) >> DEV_BSHIFT) \ + : (daddr_t)((unsigned long)(bytes) >> DEV_BSHIFT)) + +#define dbtob(db) /* calculates (db * DEV_BSIZE) */ \ + ((off_t)(db) << DEV_BSHIFT) + +/* + * Mach derived conversion macros + */ +#define trunc_page(x) ((x) & ~PAGE_MASK) +#define round_page(x) (((x) + PAGE_MASK) & ~PAGE_MASK) +#define trunc_4mpage(x) ((x) & ~PDRMASK) +#define round_4mpage(x) ((((x)) + PDRMASK) & ~PDRMASK) + +#if defined(_KERNEL) || defined(_KERNEL_STRUCTURES) +#define atop(x) ((x) >> PAGE_SHIFT) +#endif +#define ptoa(x) ((x) << PAGE_SHIFT) + +#define i386_btop(x) ((x) >> PAGE_SHIFT) +#define i386_ptob(x) ((x) << PAGE_SHIFT) + +#define pgtok(x) ((x) * (PAGE_SIZE / 1024)) + +#ifdef _KERNEL + +/* + * We put here the definition of two debugging macros/function which + * are very convenient to have available. + * The macro is called TSTMP() and is used to timestamp events in the + * kernel using the TSC register, and export them to userland through + * the sysctl variable debug.timestamp, which is a circular buffer + * holding pairs of u_int32_t variables . + * They can be retrieved with something like + * + * sysctl -b debug.timestamp | hexdump -e '"%15u %15u\n"' + * + * The function _TSTMP() is defined in i386/isa/clock.c. It does not + * try to grab any locks or block interrupts or identify which CPU it + * is running on. You are supposed to know what to do if you use it. + * + * The macros must be enabled with "options KERN_TIMESTAMP" in the kernel + * config file, otherwise they default to an empty block. + */ + +#ifdef KERN_TIMESTAMP +extern void _TSTMP(u_int32_t argument); +#define TSTMP(class, unit, event, par) _TSTMP( \ + (((class) & 0x0f) << 28 ) | \ + (((unit) & 0x0f) << 24 ) | \ + (((event) & 0xff) << 16 ) | \ + (((par) & 0xffff) ) ) + +#else /* !KERN_TIMESTAMP */ +#define _TSTMP(x) {} +#define TSTMP(class, unit, event, par) _TSTMP(0) +#endif /* !KERN_TIMESTAMP */ +#endif /* _KERNEL */ + +#endif /* !_NO_NAMESPACE_POLLUTION */ +#endif /* !_CPU_PARAM_H_ */ diff --git a/sys/cpu/amd64/include/pmap.h b/sys/cpu/amd64/include/pmap.h new file mode 100644 index 0000000000..0d2e82ddf1 --- /dev/null +++ b/sys/cpu/amd64/include/pmap.h @@ -0,0 +1,294 @@ +/* + * Copyright (c) 2003 Matthew Dillon + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + * $DragonFly: src/sys/cpu/amd64/include/pmap.h,v 1.1 2007/08/21 19:40:24 corecode Exp $ + */ +#ifndef _CPU_PMAP_H_ +#define _CPU_PMAP_H_ + +/* + * A four level page table is implemented by the amd64 hardware. Each + * page table represents 9 address bits and eats 4KB of space. There are + * 512 8-byte entries in each table. The last page table contains PTE's + * representing 4K pages (12 bits of address space). + * + * The page tables are named: + * PML4 Represents 512GB per entry (256TB total) LEVEL4 + * PDP Represents 1GB per entry LEVEL3 + * PDE Represents 2MB per entry LEVEL2 + * PTE Represents 4KB per entry LEVEL1 + * + * PG_PAE PAE 2MB extension. In the PDE. If 0 there is another level + * of page table and PG_D and PG_G are ignored. If 1 this is + * the terminating page table and PG_D and PG_G apply. + * + * PG_PWT Page write through. If 1 caching is disabled for data + * represented by the page. + * PG_PCD Page Cache Disable. If 1 the page table entry will not + * be cached in the data cache. + * + * Each entry in the PML4 table represents a 512GB VA space. We use a fixed + * PML4 and adjust entries within it to switch user spaces. + */ + +#define PG_V 0x0001LL /* P Present */ +#define PG_RW 0x0002LL /* R/W Writable */ +#define PG_U 0x0004LL /* U/S User */ +#define PG_PWT 0x0008LL /* PWT Page Write Through */ +#define PG_PCD 0x0010LL /* PCD Page Cache Disable */ +#define PG_A 0x0020LL /* A Accessed */ +#define PG_D 0x0040LL /* D Dirty (pte only) */ +#define PG_PS 0x0080LL /* PAT (pte only) */ +#define PG_G 0x0100LL /* G Global (pte only) */ +#define PG_USR0 0x0200LL /* available to os */ +#define PG_USR1 0x0400LL /* available to os */ +#define PG_USR2 0x0800LL /* available to os */ +#define PG_PTE_PAT PG_PAE /* PAT bit for 4K pages */ +#define PG_PDE_PAT 0x1000LL /* PAT bit for 2M pages */ +#define PG_FRAME 0x000000FFFFFF0000LL /* 40 bit phys address */ +#define PG_PHYSRESERVED 0x000FFF0000000000LL /* reserved for future PA */ +#define PG_USR3 0x0010000000000000LL /* avilable to os */ + +/* + * OS assignments + */ +#define PG_W PG_USR0 /* Wired */ +#define PG_MANAGED PG_USR1 /* Managed */ +#define PG_PROT (PG_RW|PG_U) /* all protection bits . */ +#define PG_N (PG_PWT|PG_PCD) /* Non-cacheable */ + +/* + * Page Protection Exception bits + */ + +#define PGEX_P 0x01 /* Protection violation vs. not present */ +#define PGEX_W 0x02 /* during a Write cycle */ +#define PGEX_U 0x04 /* access from User mode (UPL) */ + +/* + * User space is limited to one PML4 entry (512GB). Kernel space is also + * limited to one PML4 entry. Other PML4 entries are used to map foreign + * user spaces into KVM. Typically each cpu in the system reserves two + * PML4 entries for private use. + */ +#define UVA_MAXMEM (512LL*1024*1024*1024) +#define KVA_MAXMEM (512LL*1024*1024*1024) + +/* + * Pte related macros. This is complicated by having to deal with + * the sign extension of the 48th bit. + */ +#define KVADDR(l4, l3, l2, l1) ( \ + ((unsigned long)-1 << 47) | \ + ((unsigned long)(l4) << PML4SHIFT) | \ + ((unsigned long)(l3) << PDPSHIFT) | \ + ((unsigned long)(l2) << PDRSHIFT) | \ + ((unsigned long)(l1) << PAGE_SHIFT)) + +#define UVADDR(l4, l3, l2, l1) ( \ + ((unsigned long)(l4) << PML4SHIFT) | \ + ((unsigned long)(l3) << PDPSHIFT) | \ + ((unsigned long)(l2) << PDRSHIFT) | \ + ((unsigned long)(l1) << PAGE_SHIFT)) + + +#define NKPML4E 1 +#define NKPDPE 1 +#define NKPDE (NKPDPE*NPDEPG) + +#define NUPML4E (NPML4EPG/2) +#define NUPDPE (NUPML4E*NPDPEPG) +#define NUPDE (NUPDPE*NPDEPG) + + +/* + * The *PTDI values control the layout of virtual memory + * + * XXX This works for now, but I am not real happy with it, I'll fix it + * right after I fix locore.s and the magic 28K hole + * + * SMP_PRIVPAGES: The per-cpu address space is 0xff80000 -> 0xffbfffff + */ +#define APTDPTDI (NPDEPG-1) /* alt ptd entry that points to APTD */ +#define MPPTDI (APTDPTDI-1) /* per cpu ptd entry */ +#define KPTDI (MPPTDI-NKPDE) /* start of kernel virtual pde's */ +#define PTDPTDI (KPTDI-1) /* ptd entry that points to ptd! */ +#define UMAXPTDI (PTDPTDI-1) /* ptd entry for user space end */ +#define UMAXPTEOFF (NPTEPG) /* pte entry for user space end */ + +#define KPML4I (NPML4EPG-1) + +#define KPDPI (NPDPEPG-2) + +/* + * XXX doesn't really belong here I guess... + */ +#define ISA_HOLE_START 0xa0000 +#define ISA_HOLE_LENGTH (0x100000-ISA_HOLE_START) + +#ifndef LOCORE + +#include + +/* + * Address of current and alternate address space page table maps + * and directories. + */ +#ifdef _KERNEL +extern pt_entry_t PTmap[], APTmap[], Upte; +extern pd_entry_t PTD[], APTD[], PTDpde, APTDpde, Upde; + +extern pd_entry_t IdlePTD; /* physical address of "Idle" state directory */ +#endif + +#ifdef _KERNEL +/* + * virtual address to page table entry and + * to physical address. Likewise for alternate address space. + * Note: these work recursively, thus vtopte of a pte will give + * the corresponding pde that in turn maps it. + */ +#define vtopte(va) (PTmap + i386_btop(va)) + +#define avtopte(va) (APTmap + i386_btop(va)) + +/* + * Routine: pmap_kextract + * Function: + * Extract the physical page address associated + * kernel virtual address. + */ +static __inline vm_paddr_t +pmap_kextract(vm_offset_t va) +{ + vm_paddr_t pa; + + if ((pa = (vm_offset_t) PTD[va >> PDRSHIFT]) & PG_PS) { + pa = (pa & ~(NBPDR - 1)) | (va & (NBPDR - 1)); + } else { + pa = *(vm_offset_t *)vtopte(va); + pa = (pa & PG_FRAME) | (va & PAGE_MASK); + } + return pa; +} + +/* + * XXX + */ +#define vtophys(va) pmap_kextract(((vm_offset_t)(va))) +#define vtophys_pte(va) ((pt_entry_t)pmap_kextract(((vm_offset_t)(va)))) + +#define avtophys(va) (((vm_offset_t) (*avtopte(va))&PG_FRAME) | ((vm_offset_t)(va) & PAGE_MASK)) + +#endif + +/* + * Pmap stuff + */ +struct pv_entry; + +struct md_page { + int pv_list_count; + TAILQ_HEAD(,pv_entry) pv_list; +}; + +/* + * Each machine dependent implementation is expected to + * keep certain statistics. They may do this anyway they + * so choose, but are expected to return the statistics + * in the following structure. + */ +struct pmap_statistics { + long resident_count; /* # of pages mapped (total) */ + long wired_count; /* # of pages wired */ +}; +typedef struct pmap_statistics *pmap_statistics_t; + +struct pmap { + pd_entry_t *pm_pdir; /* KVA of page directory */ + vm_object_t pm_pteobj; /* Container for pte's */ + TAILQ_HEAD(,pv_entry) pm_pvlist; /* list of mappings in pmap */ + int pm_count; /* reference count */ + cpumask_t pm_active; /* active on cpus */ + struct pmap_statistics pm_stats; /* pmap statistics */ + struct vm_page *pm_ptphint; /* pmap ptp hint */ +}; + +#define pmap_resident_count(pmap) (pmap)->pm_stats.resident_count + +typedef struct pmap *pmap_t; + +#ifdef _KERNEL +extern pmap_t kernel_pmap; +#endif + +/* + * For each vm_page_t, there is a list of all currently valid virtual + * mappings of that page. An entry is a pv_entry_t, the list is pv_table. + */ +typedef struct pv_entry { + pmap_t pv_pmap; /* pmap where mapping lies */ + vm_offset_t pv_va; /* virtual address for mapping */ + TAILQ_ENTRY(pv_entry) pv_list; + TAILQ_ENTRY(pv_entry) pv_plist; + vm_page_t pv_ptem; /* VM page for pte */ +} *pv_entry_t; + +#ifdef _KERNEL + +#define NPPROVMTRR 8 +#define PPRO_VMTRRphysBase0 0x200 +#define PPRO_VMTRRphysMask0 0x201 +struct ppro_vmtrr { + u_int64_t base, mask; +}; +extern struct ppro_vmtrr PPro_vmtrr[NPPROVMTRR]; + +extern caddr_t CADDR1; +extern pt_entry_t *CMAP1; +extern vm_paddr_t avail_end; +extern vm_paddr_t avail_start; +extern vm_offset_t clean_eva; +extern vm_offset_t clean_sva; +extern vm_paddr_t phys_avail[]; +extern char *ptvmmap; /* poor name! */ +extern vm_offset_t virtual_avail; +extern vm_offset_t virtual_end; + +void pmap_bootstrap ( vm_paddr_t, vm_paddr_t); +pmap_t pmap_kernel (void); +void *pmap_mapdev (vm_paddr_t, vm_size_t); +void pmap_unmapdev (vm_offset_t, vm_size_t); +unsigned *pmap_pte (pmap_t, vm_offset_t) __pure2; +vm_page_t pmap_use_pt (pmap_t, vm_offset_t); +#ifdef SMP +void pmap_set_opt (void); +#endif + +#endif /* _KERNEL */ + +#endif /* !LOCORE */ + +#endif /* !_CPU_PMAP_H_ */ diff --git a/sys/cpu/amd64/include/profile.h b/sys/cpu/amd64/include/profile.h new file mode 100644 index 0000000000..7caa2d96d4 --- /dev/null +++ b/sys/cpu/amd64/include/profile.h @@ -0,0 +1,169 @@ +/* + * Copyright (c) 1992, 1993 + * The Regents of the University of California. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * 3. All advertising materials mentioning features or use of this software + * must display the following acknowledgement: + * This product includes software developed by the University of + * California, Berkeley and its contributors. + * 4. Neither the name of the University nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + * @(#)profile.h 8.1 (Berkeley) 6/11/93 + * $FreeBSD: src/sys/amd64/include/profile.h,v 1.33 2004/01/06 20:36:21 nectar Exp $ + * $DragonFly: src/sys/cpu/amd64/include/profile.h,v 1.1 2007/08/21 19:40:24 corecode Exp $ + */ + +#ifndef _CPU_PROFILE_H_ +#define _CPU_PROFILE_H_ + +#ifdef _KERNEL + +/* + * Config generates something to tell the compiler to align functions on 16 + * byte boundaries. A strict alignment is good for keeping the tables small. + */ +#define FUNCTION_ALIGNMENT 16 + +/* + * The kernel uses assembler stubs instead of unportable inlines. + * This is mainly to save a little time when profiling is not enabled, + * which is the usual case for the kernel. + */ +#define _MCOUNT_DECL void mcount +#define MCOUNT + +#ifdef GUPROF +#define CALIB_SCALE 1000 +#define KCOUNT(p,index) ((p)->kcount[(index) \ + / (HISTFRACTION * sizeof(HISTCOUNTER))]) +#define MCOUNT_DECL(s) +#define MCOUNT_ENTER(s) +#define MCOUNT_EXIT(s) +#define PC_TO_I(p, pc) ((uintfptr_t)(pc) - (uintfptr_t)(p)->lowpc) +#else +#define MCOUNT_DECL(s) u_long s; +#ifdef SMP +extern int mcount_lock; +#define MCOUNT_ENTER(s) { s = read_rflags(); disable_intr(); \ + while (!atomic_cmpset_acq_int(&mcount_lock, 0, 1)) \ + /* nothing */ ; } +#define MCOUNT_EXIT(s) { atomic_store_rel_int(&mcount_lock, 0); \ + write_rflags(s); } +#else +#define MCOUNT_ENTER(s) { s = read_rflags(); disable_intr(); } +#define MCOUNT_EXIT(s) (write_rflags(s)) +#endif +#endif /* GUPROF */ + +#else /* !_KERNEL */ + +#define FUNCTION_ALIGNMENT 4 + +#define _MCOUNT_DECL static __inline void _mcount + +#ifdef __GNUC__ +#define MCOUNT \ +void \ +mcount() \ +{ \ + uintfptr_t selfpc, frompc; \ + /* \ + * Find the return address for mcount, \ + * and the return address for mcount's caller. \ + * \ + * selfpc = pc pushed by call to mcount \ + */ \ + __asm("movq 8(%%rbp),%0" : "=r" (selfpc)); \ + /* \ + * frompc = pc pushed by call to mcount's caller. \ + * The caller's stack frame has already been built, so %ebp is \ + * the caller's frame pointer. The caller's raddr is in the \ + * caller's frame following the caller's caller's frame pointer.\ + */ \ + __asm("movq (%%rbp),%0" : "=r" (frompc)); \ + frompc = ((uintfptr_t *)frompc)[1]; \ + _mcount(frompc, selfpc); \ +} +#else /* __GNUC__ */ +#define MCOUNT \ +void \ +mcount() \ +{ \ +} +#endif /* __GNUC__ */ + +typedef unsigned long uintfptr_t; + +#endif /* _KERNEL */ + +/* + * An unsigned integral type that can hold non-negative difference between + * function pointers. + */ +typedef u_int fptrdiff_t; + +#ifdef _KERNEL + +void mcount(uintfptr_t frompc, uintfptr_t selfpc); +void kmupetext(uintfptr_t nhighpc); + +#ifdef GUPROF +struct gmonparam; + +void nullfunc_loop_profiled(void); +void nullfunc_profiled(void); +void startguprof(struct gmonparam *p); +void stopguprof(struct gmonparam *p); +#else +#define startguprof(p) +#define stopguprof(p) +#endif /* GUPROF */ + +#else /* !_KERNEL */ + +#include + +__BEGIN_DECLS +#ifdef __GNUC__ +void mcount(void) __asm(".mcount"); +#endif +__END_DECLS + +#endif /* _KERNEL */ + +#ifdef GUPROF +/* XXX doesn't quite work outside kernel yet. */ +extern int cputime_bias; + +__BEGIN_DECLS +int cputime(void); +void empty_loop(void); +void mexitcount(uintfptr_t selfpc); +void nullfunc(void); +void nullfunc_loop(void); +__END_DECLS +#endif + +#endif /* !_CPU_PROFILE_H_ */ diff --git a/sys/cpu/amd64/include/psl.h b/sys/cpu/amd64/include/psl.h new file mode 100644 index 0000000000..d00ba9236a --- /dev/null +++ b/sys/cpu/amd64/include/psl.h @@ -0,0 +1,89 @@ +/*- + * Copyright (c) 1990 The Regents of the University of California. + * All rights reserved. + * + * This code is derived from software contributed to Berkeley by + * William Jolitz. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * 3. All advertising materials mentioning features or use of this software + * must display the following acknowledgement: + * This product includes software developed by the University of + * California, Berkeley and its contributors. + * 4. Neither the name of the University nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + * from: @(#)psl.h 5.2 (Berkeley) 1/18/91 + * $FreeBSD: src/sys/amd64/include/psl.h,v 1.12 2003/05/01 01:05:23 peter Exp $ + * $DragonFly: src/sys/cpu/amd64/include/psl.h,v 1.1 2007/08/21 19:40:24 corecode Exp $ + */ + +#ifndef _CPU_PSL_H_ +#define _CPU_PSL_H_ + +/* + * 386 processor status longword. + */ +#define PSL_C 0x00000001 /* carry bit */ +#define PSL_PF 0x00000004 /* parity bit */ +#define PSL_AF 0x00000010 /* bcd carry bit */ +#define PSL_Z 0x00000040 /* zero bit */ +#define PSL_N 0x00000080 /* negative bit */ +#define PSL_T 0x00000100 /* trace enable bit */ +#define PSL_I 0x00000200 /* interrupt enable bit */ +#define PSL_D 0x00000400 /* string instruction direction bit */ +#define PSL_V 0x00000800 /* overflow bit */ +#define PSL_IOPL 0x00003000 /* i/o privilege level */ +#define PSL_NT 0x00004000 /* nested task bit */ +#define PSL_RF 0x00010000 /* resume flag bit */ +/* #define PSL_VM 0x00020000 */ /* virtual 8086 mode bit */ +#define PSL_AC 0x00040000 /* alignment checking */ +/* #define PSL_VIF 0x00080000 */ /* virtual interrupt enable */ +/* #define PSL_VIP 0x00100000 */ /* virtual interrupt pending */ +#define PSL_ID 0x00200000 /* identification bit */ + +/* + * The i486 manual says that we are not supposed to change reserved flags, + * but this is too much trouble since the reserved flags depend on the cpu + * and setting them to their historical values works in practice. + */ +#define PSL_RESERVED_DEFAULT 0x00000002 + +/* + * Initial flags for kernel and user mode. The kernel later inherits + * PSL_I and some other flags from user mode. + */ +#define PSL_KERNEL PSL_RESERVED_DEFAULT +#define PSL_USER (PSL_RESERVED_DEFAULT | PSL_I) + +/* + * Bits that can be changed in user mode on 486's. We allow these bits + * to be changed using ptrace(), sigreturn() and procfs. Setting PS_NT + * is undesirable but it may as well be allowed since users can inflict + * it on the kernel directly. Changes to PSL_AC are silently ignored on + * 386's. + */ +#define PSL_USERCHANGE (PSL_C | PSL_PF | PSL_AF | PSL_Z | PSL_N | PSL_T \ + | PSL_D | PSL_V | PSL_NT | PSL_AC | PSL_ID) + +#endif /* !_CPU_PSL_H_ */ diff --git a/sys/cpu/amd64/include/reg.h b/sys/cpu/amd64/include/reg.h new file mode 100644 index 0000000000..5a5f87f6fd --- /dev/null +++ b/sys/cpu/amd64/include/reg.h @@ -0,0 +1,113 @@ +/*- + * Copyright (c) 2003 Peter Wemm. + * Copyright (c) 1990 The Regents of the University of California. + * All rights reserved. + * + * This code is derived from software contributed to Berkeley by + * William Jolitz. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * 4. Neither the name of the University nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + * from: @(#)reg.h 5.5 (Berkeley) 1/18/91 + * $FreeBSD: src/sys/amd64/include/reg.h,v 1.35 2004/04/05 23:55:14 imp Exp $ + * $DragonFly: src/sys/cpu/amd64/include/reg.h,v 1.1 2007/08/21 19:40:24 corecode Exp $ + */ + +#ifndef _CPU_REG_H_ +#define _CPU_REG_H_ + +/* + * Register set accessible via /proc/$pid/regs and PT_{SET,GET}REGS. + */ +struct reg { + register_t r_r15; + register_t r_r14; + register_t r_r13; + register_t r_r12; + register_t r_r11; + register_t r_r10; + register_t r_r9; + register_t r_r8; + register_t r_rdi; + register_t r_rsi; + register_t r_rbp; + register_t r_rbx; + register_t r_rdx; + register_t r_rcx; + register_t r_rax; + register_t r_trapno; + register_t r_err; + register_t r_rip; + register_t r_cs; + register_t r_rflags; + register_t r_rsp; + register_t r_ss; +}; + +/* + * Register set accessible via /proc/$pid/fpregs. + */ +struct fpreg { + /* + * XXX should get struct from fpu.h. Here we give a slightly + * simplified struct. This may be too much detail. Perhaps + * an array of unsigned longs is best. + */ + unsigned long fpr_env[4]; + unsigned char fpr_acc[8][16]; + unsigned char fpr_xacc[16][16]; + unsigned long fpr_spare[12]; +}; + +/* + * Register set accessible via /proc/$pid/dbregs. + */ +struct dbreg { + unsigned long dr[16]; /* debug registers */ + /* Index 0-3: debug address registers */ + /* Index 4-5: reserved */ + /* Index 6: debug status */ + /* Index 7: debug control */ + /* Index 8-15: reserved */ +}; + +#define DBREG_DR7_EXEC 0x00 /* break on execute */ +#define DBREG_DR7_WRONLY 0x01 /* break on write */ +#define DBREG_DR7_RDWR 0x03 /* break on read or write */ +#define DBREG_DRX(d,x) ((d)->dr[(x)]) /* reference dr0 - dr15 by + register number */ +#ifdef _KERNEL +/* + * XXX these interfaces are MI, so they should be declared in a MI place. + */ +int fill_regs(struct thread *, struct reg *); +int set_regs(struct thread *, struct reg *); +int fill_fpregs(struct thread *, struct fpreg *); +int set_fpregs(struct thread *, struct fpreg *); +int fill_dbregs(struct thread *, struct dbreg *); +int set_dbregs(struct thread *, struct dbreg *); +#endif + +#endif /* !_CPU_REG_H_ */ diff --git a/sys/cpu/amd64/include/reloc.h b/sys/cpu/amd64/include/reloc.h new file mode 100644 index 0000000000..d8d1dcb22f --- /dev/null +++ b/sys/cpu/amd64/include/reloc.h @@ -0,0 +1,54 @@ +/*- + * Copyright (c) 1992, 1993 + * The Regents of the University of California. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * 3. All advertising materials mentioning features or use of this software + * must display the following acknowledgement: + * This product includes software developed by the University of + * California, Berkeley and its contributors. + * 4. Neither the name of the University nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + * @(#)reloc.h 8.1 (Berkeley) 6/10/93 + * $FreeBSD: src/sys/amd64/include/reloc.h,v 1.7 1999/08/28 00:44:23 peter Exp $ + * $DragonFly: src/sys/cpu/amd64/include/reloc.h,v 1.1 2007/08/21 19:40:24 corecode Exp $ + */ + +#ifndef _CPU_RELOC_H_ +#define _CPU_RELOC_H_ + +/* Relocation format. */ +struct relocation_info { + int r_address; /* offset in text or data segment */ + unsigned int r_symbolnum : 24, /* ordinal number of add symbol */ + r_pcrel : 1, /* 1 if value should be pc-relative */ + r_length : 2, /* log base 2 of value's width */ + r_extern : 1, /* 1 if need to add symbol to value */ + r_baserel : 1, /* linkage table relative */ + r_jmptable : 1, /* relocate to jump table */ + r_relative : 1, /* load address relative */ + r_copy : 1; /* run time copy */ +}; + +#endif diff --git a/sys/cpu/amd64/include/segments.h b/sys/cpu/amd64/include/segments.h new file mode 100644 index 0000000000..9f0bce5f83 --- /dev/null +++ b/sys/cpu/amd64/include/segments.h @@ -0,0 +1,258 @@ +/*- + * Copyright (c) 1989, 1990 William F. Jolitz + * Copyright (c) 1990 The Regents of the University of California. + * All rights reserved. + * + * This code is derived from software contributed to Berkeley by + * William Jolitz. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * 3. All advertising materials mentioning features or use of this software + * must display the following acknowledgement: + * This product includes software developed by the University of + * California, Berkeley and its contributors. + * 4. Neither the name of the University nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + * from: @(#)segments.h 7.1 (Berkeley) 5/9/91 + * $FreeBSD: src/sys/i386/include/segments.h,v 1.24 1999/12/29 04:33:07 peter Exp $ + * $DragonFly: src/sys/cpu/amd64/include/segments.h,v 1.1 2007/08/21 19:40:24 corecode Exp $ + */ + +#ifndef _CPU_SEGMENTS_H_ +#define _CPU_SEGMENTS_H_ + +/* + * 386 Segmentation Data Structures and definitions + * William F. Jolitz (william@ernie.berkeley.edu) 6/20/1989 + */ + +/* + * Selectors + */ + +#define ISPL(s) ((s)&3) /* what is the priority level of a selector */ +#define SEL_KPL 0 /* kernel priority level */ +#define SEL_UPL 3 /* user priority level */ +#define ISLDT(s) ((s)&SEL_LDT) /* is it local or global */ +#define SEL_LDT 4 /* local descriptor table */ +#define IDXSEL(s) (((s)>>3) & 0x1fff) /* index of selector */ +#define LSEL(s,r) (((s)<<3) | SEL_LDT | r) /* a local selector */ +#define GSEL(s,r) (((s)<<3) | r) /* a global selector */ + +/* + * Memory and System segment descriptors + */ +struct segment_descriptor { + unsigned sd_lolimit:16 ; /* segment extent (lsb) */ + unsigned sd_lobase:24 __attribute__ ((packed)); + /* segment base address (lsb) */ + unsigned sd_type:5 ; /* segment type */ + unsigned sd_dpl:2 ; /* segment descriptor priority level */ + unsigned sd_p:1 ; /* segment descriptor present */ + unsigned sd_hilimit:4 ; /* segment extent (msb) */ + unsigned sd_xx:2 ; /* unused */ + unsigned sd_def32:1 ; /* default 32 vs 16 bit size */ + unsigned sd_gran:1 ; /* limit granularity (byte/page units)*/ + unsigned sd_hibase:8 ; /* segment base address (msb) */ +} ; + +/* + * Gate descriptors (e.g. indirect descriptors) + */ +struct gate_descriptor { + unsigned gd_looffset:16 ; /* gate offset (lsb) */ + unsigned gd_selector:16 ; /* gate segment selector */ + unsigned gd_stkcpy:5 ; /* number of stack wds to cpy */ + unsigned gd_xx:3 ; /* unused */ + unsigned gd_type:5 ; /* segment type */ + unsigned gd_dpl:2 ; /* segment descriptor priority level */ + unsigned gd_p:1 ; /* segment descriptor present */ + unsigned gd_hioffset:16 ; /* gate offset (msb) */ +} ; + +/* + * Generic descriptor + */ +union descriptor { + struct segment_descriptor sd; + struct gate_descriptor gd; +}; + + /* system segments and gate types */ +#define SDT_SYSNULL 0 /* system null */ +#define SDT_SYS286TSS 1 /* system 286 TSS available */ +#define SDT_SYSLDT 2 /* system local descriptor table */ +#define SDT_SYS286BSY 3 /* system 286 TSS busy */ +#define SDT_SYS286CGT 4 /* system 286 call gate */ +#define SDT_SYSTASKGT 5 /* system task gate */ +#define SDT_SYS286IGT 6 /* system 286 interrupt gate */ +#define SDT_SYS286TGT 7 /* system 286 trap gate */ +#define SDT_SYSNULL2 8 /* system null again */ +#define SDT_SYS386TSS 9 /* system 386 TSS available */ +#define SDT_SYSNULL3 10 /* system null again */ +#define SDT_SYS386BSY 11 /* system 386 TSS busy */ +#define SDT_SYS386CGT 12 /* system 386 call gate */ +#define SDT_SYSNULL4 13 /* system null again */ +#define SDT_SYS386IGT 14 /* system 386 interrupt gate */ +#define SDT_SYS386TGT 15 /* system 386 trap gate */ + + /* memory segment types */ +#define SDT_MEMRO 16 /* memory read only */ +#define SDT_MEMROA 17 /* memory read only accessed */ +#define SDT_MEMRW 18 /* memory read write */ +#define SDT_MEMRWA 19 /* memory read write accessed */ +#define SDT_MEMROD 20 /* memory read only expand dwn limit */ +#define SDT_MEMRODA 21 /* memory read only expand dwn limit accessed */ +#define SDT_MEMRWD 22 /* memory read write expand dwn limit */ +#define SDT_MEMRWDA 23 /* memory read write expand dwn limit accessed */ +#define SDT_MEME 24 /* memory execute only */ +#define SDT_MEMEA 25 /* memory execute only accessed */ +#define SDT_MEMER 26 /* memory execute read */ +#define SDT_MEMERA 27 /* memory execute read accessed */ +#define SDT_MEMEC 28 /* memory execute only conforming */ +#define SDT_MEMEAC 29 /* memory execute only accessed conforming */ +#define SDT_MEMERC 30 /* memory execute read conforming */ +#define SDT_MEMERAC 31 /* memory execute read accessed conforming */ + +/* is memory segment descriptor pointer ? */ +#define ISMEMSDP(s) ((s->d_type) >= SDT_MEMRO && (s->d_type) <= SDT_MEMERAC) + +/* is 286 gate descriptor pointer ? */ +#define IS286GDP(s) (((s->d_type) >= SDT_SYS286CGT \ + && (s->d_type) < SDT_SYS286TGT)) + +/* is 386 gate descriptor pointer ? */ +#define IS386GDP(s) (((s->d_type) >= SDT_SYS386CGT \ + && (s->d_type) < SDT_SYS386TGT)) + +/* is gate descriptor pointer ? */ +#define ISGDP(s) (IS286GDP(s) || IS386GDP(s)) + +/* is segment descriptor pointer ? */ +#define ISSDP(s) (ISMEMSDP(s) || !ISGDP(s)) + +/* is system segment descriptor pointer ? */ +#define ISSYSSDP(s) (!ISMEMSDP(s) && !ISGDP(s)) + +/* + * Software definitions are in this convenient format, + * which are translated into inconvenient segment descriptors + * when needed to be used by the 386 hardware + */ + +#if 0 + +struct soft_segment_descriptor { + unsigned ssd_base ; /* segment base address */ + unsigned ssd_limit ; /* segment extent */ + unsigned ssd_type:5 ; /* segment type */ + unsigned ssd_dpl:2 ; /* segment descriptor priority level */ + unsigned ssd_p:1 ; /* segment descriptor present */ + unsigned ssd_xx:4 ; /* unused */ + unsigned ssd_xx1:2 ; /* unused */ + unsigned ssd_def32:1 ; /* default 32 vs 16 bit size */ + unsigned ssd_gran:1 ; /* limit granularity (byte/page units)*/ +}; + +/* + * region descriptors, used to load gdt/idt tables before segments yet exist. + */ +struct region_descriptor { + unsigned rd_limit:16; /* segment extent */ + unsigned rd_base:32 __attribute__ ((packed)); /* base address */ +}; + +#endif /* 0 */ + +/* + * Segment Protection Exception code bits + */ + +#define SEGEX_EXT 0x01 /* recursive or externally induced */ +#define SEGEX_IDT 0x02 /* interrupt descriptor table */ +#define SEGEX_TI 0x04 /* local descriptor table */ + /* other bits are affected descriptor index */ +#define SEGEX_IDX(s) ((s)>>3)&0x1fff) + +/* + * Size of the IDT table. Theoretically we only need to cover past 0x81 + * (NIDT=130) if not running APIC_IO or SMP, but at this point we might + * as well just use all of them. + */ +#define NIDT 256 /* we use them all */ + +/* + * Entries in the Global Descriptor Table (GDT) + */ +#define GNULL_SEL 0 /* Null Descriptor */ +#define GCODE_SEL 1 /* Kernel Code Descriptor */ +#define GDATA_SEL 2 /* Kernel Data Descriptor */ +#define GPRIV_SEL 3 /* SMP Per-Processor Private Data */ +#define GPROC0_SEL 4 /* Task state process slot zero and up */ +#define GLDT_SEL 5 /* LDT - eventually one per process */ +#define GUSERLDT_SEL 6 /* User LDT */ +#define GTGATE_SEL 7 /* Process task switch gate */ +#define GBIOSLOWMEM_SEL 8 /* BIOS low memory access (must be entry 8) */ +#define GPANIC_SEL 9 /* Task state to consider panic from */ +#define GBIOSCODE32_SEL 10 /* BIOS interface (32bit Code) */ +#define GBIOSCODE16_SEL 11 /* BIOS interface (16bit Code) */ +#define GBIOSDATA_SEL 12 /* BIOS interface (Data) */ +#define GBIOSUTIL_SEL 13 /* BIOS interface (Utility) */ +#define GBIOSARGS_SEL 14 /* BIOS interface (Arguments) */ + +#ifdef BDE_DEBUGGER +#define NGDT 18 /* some of 11-17 are reserved for debugger */ +#else +#define NGDT 15 +#endif + +/* + * Entries in the Local Descriptor Table (LDT) + */ +#define LSYS5CALLS_SEL 0 /* forced by intel BCS */ +#define LSYS5SIGR_SEL 1 +#define L43BSDCALLS_SEL 2 /* notyet */ +#define LUCODE_SEL 3 +#define LSOL26CALLS_SEL 4 /* Solaris >= 2.6 system call gate */ +#define LUDATA_SEL 5 +/* separate stack, es,fs,gs sels ? */ +/* #define LPOSIXCALLS_SEL 5*/ /* notyet */ +#define LBSDICALLS_SEL 16 /* BSDI system call gate */ +#define NLDT (LBSDICALLS_SEL + 1) + +#ifdef _KERNEL +extern int _default_ldt; +extern union descriptor gdt[]; +extern struct soft_segment_descriptor gdt_segs[]; +extern struct gate_descriptor *idt; +extern union descriptor ldt[NLDT]; + +void lgdt (struct region_descriptor *rdp); +void sdtossd (struct segment_descriptor *sdp, + struct soft_segment_descriptor *ssdp); +void ssdtosd (struct soft_segment_descriptor *ssdp, + struct segment_descriptor *sdp); +#endif /* _KERNEL */ + +#endif /* !_CPU_SEGMENTS_H_ */ diff --git a/sys/cpu/amd64/include/setjmp.h b/sys/cpu/amd64/include/setjmp.h new file mode 100644 index 0000000000..143c73cc3a --- /dev/null +++ b/sys/cpu/amd64/include/setjmp.h @@ -0,0 +1,54 @@ +/*- + * Copyright (c) 1998 John Birrell . + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * 3. All advertising materials mentioning features or use of this software + * must display the following acknowledgement: + * This product includes software developed by John Birrell. + * 4. Neither the name of the author nor the names of any co-contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY JOHN BIRRELL AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + * $FreeBSD: src/sys/amd64/include/setjmp.h,v 1.9 2003/06/02 21:49:35 peter Exp $ + * $DragonFly: src/sys/cpu/amd64/include/setjmp.h,v 1.1 2007/08/21 19:40:24 corecode Exp $ + */ + +#ifndef _CPU_SETJMP_H_ +#define _CPU_SETJMP_H_ + +#include + +#define _JBLEN 12 /* Size of the jmp_buf on AMD64. */ + +/* + * jmp_buf and sigjmp_buf are encapsulated in different structs to force + * compile-time diagnostics for mismatches. The structs are the same + * internally to avoid some run-time errors for mismatches. + */ +#if __BSD_VISIBLE || __POSIX_VISIBLE || __XSI_VISIBLE +typedef struct _sigjmp_buf { long _sjb[_JBLEN]; } sigjmp_buf[1]; +#endif + +typedef struct _jmp_buf { long _jb[_JBLEN]; } jmp_buf[1]; + +#endif /* !_CPU_SETJMP_H_ */ diff --git a/sys/cpu/amd64/include/signal.h b/sys/cpu/amd64/include/signal.h new file mode 100644 index 0000000000..53fdef1eb3 --- /dev/null +++ b/sys/cpu/amd64/include/signal.h @@ -0,0 +1,106 @@ +/* + * Copyright (c) 1986, 1989, 1991, 1993 + * The Regents of the University of California. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * 3. All advertising materials mentioning features or use of this software + * must display the following acknowledgement: + * This product includes software developed by the University of + * California, Berkeley and its contributors. + * 4. Neither the name of the University nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + * @(#)signal.h 8.1 (Berkeley) 6/11/93 + * $FreeBSD: src/sys/i386/include/signal.h,v 1.12 1999/11/12 13:52:11 marcel Exp $ + * $DragonFly: src/sys/cpu/amd64/include/signal.h,v 1.1 2007/08/21 19:40:24 corecode Exp $ + */ + +#ifndef _CPU_SIGNAL_H_ +#define _CPU_SIGNAL_H_ + +/* + * Machine-dependent signal definitions + */ + +typedef int sig_atomic_t; + +#if !defined(_ANSI_SOURCE) && !defined(_POSIX_SOURCE) + +/* + * XXX temporarily use a path instead of "bla.h" so the + * XFree86-4-clients port, which uses -I-, builds. Use of -I- should + * be banned, or the option should be fixed to not screw up relative-path + * includes. + */ +#include /* codes for SIGILL, SIGFPE */ + +/* + * Information pushed on stack when a signal is delivered. + * This is used by the kernel to restore state following + * execution of the signal handler. It is also made available + * to the handler to allow it to restore state properly if + * a non-standard exit is performed. + * + * The sequence of the fields/registers in struct sigcontext should match + * those in mcontext_t. + */ +struct sigcontext { + sigset_t sc_mask; /* signal mask to restore */ + long sc_onstack; /* sigstack state to restore */ + long sc_rdi; + long sc_rsi; + long sc_rdx; + long sc_rcx; + long sc_r8; + long sc_r9; + long sc_rax; + long sc_rbx; + long sc_rbp; + long sc_r10; + long sc_r11; + long sc_r12; + long sc_r13; + long sc_r14; + long sc_r15; + long sc_trapno; + long sc_addr; + long sc_flags; + long sc_err; + long sc_rip; + long sc_cs; + long sc_rflags; + long sc_rsp; + long sc_ss; + long sc_len; + /* + * XXX - taken from freebsd + */ + long sc_fpformat; + long sc_ownedfp; + long sc_fpstate[64] __aligned(16); + long sc_spare[9]; +}; + +#endif /* !_ANSI_SOURCE && !_POSIX_SOURCE */ + +#endif /* !_CPU_SIGNAL_H_ */ diff --git a/sys/cpu/amd64/include/stdarg.h b/sys/cpu/amd64/include/stdarg.h new file mode 100644 index 0000000000..bfeda75b03 --- /dev/null +++ b/sys/cpu/amd64/include/stdarg.h @@ -0,0 +1,100 @@ +/*- + * Copyright (c) 1991, 1993 + * The Regents of the University of California. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * 3. All advertising materials mentioning features or use of this software + * must display the following acknowledgement: + * This product includes software developed by the University of + * California, Berkeley and its contributors. + * 4. Neither the name of the University nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + * @(#)stdarg.h 8.1 (Berkeley) 6/10/93 + * $FreeBSD: src/sys/i386/include/stdarg.h,v 1.10 1999/08/28 00:44:26 peter Exp $ + * $DragonFly: src/sys/cpu/amd64/include/stdarg.h,v 1.1 2007/08/21 19:40:24 corecode Exp $ + */ + +#ifndef _CPU_STDARG_H_ +#define _CPU_STDARG_H_ + +/* + * GNUC mess + */ +#if defined(__GNUC__) && (__GNUC__ == 2 && __GNUC_MINOR__ > 95 || __GNUC__ >= 3) +typedef __builtin_va_list __va_list; /* internally known to gcc */ +#else +typedef char * __va_list; +#endif /* post GCC 2.95 */ +#if defined __GNUC__ && !defined(__GNUC_VA_LIST) && !defined(__NO_GNUC_VA_LIST) +#define __GNUC_VA_LIST +typedef __va_list __gnuc_va_list; /* compatibility w/GNU headers*/ +#endif + +/* + * Standard va types and macros + */ +#define __va_size(type) \ + (((sizeof(type) + sizeof(int) - 1) / sizeof(int)) * sizeof(int)) + +#ifdef __GNUC__ + +#if __GNUC__ == 2 +#define __va_start(ap, last) \ + ((ap) = (__va_list)__builtin_next_arg(last)) +#define __va_arg(ap, type) \ + (*(type *)((ap) += __va_size(type), (ap) - __va_size(type))) +#define __va_copy(dest, src) \ + ((void)((dest) = (src))) +#define __va_end(ap) +#elif __GNUC__ >= 3 +#if __GNUC_MINOR__ >= 0 && __GNUC_MINOR__ <= 2 +#define __va_start(ap, last) \ + __builtin_stdarg_start((ap), (last)) +#elif __GNUC__ == 3 && __GNUC_MINOR__ >= 3 +#define __va_start(ap, last) \ + __builtin_va_start(ap, last) +#endif +#define __va_arg(ap, type) \ + __builtin_va_arg((ap), type) +#define __va_copy(dest, src) \ + __builtin_va_copy((dest), (src)) +#define __va_end(ap) \ + __builtin_va_end(ap) +#endif + +#else /* !__GNUC__ */ + +/* Provide a free-standing implementation */ +#define __va_start(ap, last) \ + ((ap) = (__va_list)&(last) + __va_size(last)) +#define __va_arg(ap, type) \ + (*(type *)((ap) += __va_size(type), (ap) - __va_size(type))) +/* This assumes a typical stack machine */ +#define __va_copy(dest, src) \ + ((void)((dest) = (src))) +#define __va_end(ap) + +#endif /* __GNUC__ */ + +#endif /* !_CPU_STDARG_H_ */ diff --git a/sys/cpu/amd64/include/stdint.h b/sys/cpu/amd64/include/stdint.h new file mode 100644 index 0000000000..b6de20211d --- /dev/null +++ b/sys/cpu/amd64/include/stdint.h @@ -0,0 +1,255 @@ +/*- + * Copyright (c) 2001, 2002 Mike Barcroft + * Copyright (c) 2001 The NetBSD Foundation, Inc. All rights reserved. + * Copyright (c) 1990, 1993 The Regents of the University of California. + * All rights reserved. + * + * This code is derived from software contributed to The NetBSD Foundation + * by Klaus Klein. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * 3. All advertising materials mentioning features or use of this software + * must display the following acknowledgement: + * This product includes software developed by the NetBSD + * Foundation, Inc. and its contributors. + * 4. Neither the name of The NetBSD Foundation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED + * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR + * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS + * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + * $FreeBSD: src/sys/i386/include/_stdint.h,v 1.1 2002/07/29 17:41:07 mike Exp $ + * $DragonFly: src/sys/cpu/amd64/include/stdint.h,v 1.1 2007/08/21 19:40:24 corecode Exp $ + */ + +#ifndef _CPU_STDINT_H_ +#define _CPU_STDINT_H_ + +/* + * Basic types upon which most other types are built. + */ +typedef __signed char __int8_t; +typedef unsigned char __uint8_t; +typedef short __int16_t; +typedef unsigned short __uint16_t; +typedef int __int32_t; +typedef unsigned int __uint32_t; +typedef int __boolean_t; + +/* + * This mess is to override compiler options that might restrict long long + * and for lint which doesn't understand GNUC attributes. + */ +#if defined(lint) +typedef long __int64_t; +typedef unsigned long __uint64_t; +#elif defined(__GNUC__) +typedef int __attribute__((__mode__(__DI__))) __int64_t; +typedef unsigned int __attribute__((__mode__(__DI__))) __uint64_t; +#else +typedef long __int64_t; +typedef unsigned long __uint64_t; +#endif + +/* + * Standard type definitions. + */ +typedef __int64_t __intmax_t; +typedef __uint64_t __uintmax_t; + +typedef __int64_t __intptr_t; +typedef __uint64_t __uintptr_t; + +typedef __int64_t __ptrdiff_t; /* ptr1 - ptr2 */ + +typedef __int32_t __int_fast8_t; +typedef __int32_t __int_fast16_t; +typedef __int32_t __int_fast32_t; +typedef __int64_t __int_fast64_t; +typedef __int8_t __int_least8_t; +typedef __int16_t __int_least16_t; +typedef __int32_t __int_least32_t; +typedef __int64_t __int_least64_t; +typedef __uint32_t __uint_fast8_t; +typedef __uint32_t __uint_fast16_t; +typedef __uint32_t __uint_fast32_t; +typedef __uint64_t __uint_fast64_t; +typedef __uint8_t __uint_least8_t; +typedef __uint16_t __uint_least16_t; +typedef __uint32_t __uint_least32_t; +typedef __uint64_t __uint_least64_t; + +/* + * System types conveniently placed in this header file in order to put them + * in proximity with the limit macros below and for convenient access by + * other include files which need to pick and choose particular types but + * do not wish to overly pollute their namespaces. + */ + +typedef __uint64_t __size_t; +typedef __int64_t __ssize_t; +typedef long __time_t; +typedef int __timer_t; +typedef __int64_t __register_t; +typedef __uint64_t __u_register_t; +typedef __int32_t __sig_atomic_t; /* XXX */ +typedef unsigned long __clock_t; +typedef unsigned long __clockid_t; +typedef __uint32_t __socklen_t; +typedef volatile int __atomic_intr_t; + +/* + * Its convenient to put these here rather then create another header file. + */ +#define __offsetof(type, field) ((size_t)(&((type *)0)->field)) +#define __arysize(ary) (sizeof(ary)/sizeof((ary)[0])) + +#endif /* _CPU_STDINT_H_ */ + +/* + * OpenGroup stdint.h extensions. Since these are protected by a define we + * do not have to generate __ versions of them. + */ +#if !defined(__cplusplus) || defined(__STDC_CONSTANT_MACROS) +#ifndef _CPU_STDINT_H_STDC_CONSTANT_MACROS_ +#define _CPU_STDINT_H_STDC_CONSTANT_MACROS_ + +#define INT8_C(c) (c) +#define INT16_C(c) (c) +#define INT32_C(c) (c) +#define INT64_C(c) (c ## LL) + +#define UINT8_C(c) (c) +#define UINT16_C(c) (c) +#define UINT32_C(c) (c ## U) +#define UINT64_C(c) (c ## ULL) + +#define INTMAX_C(c) (c ## LL) +#define UINTMAX_C(c) (c ## ULL) + +#endif +#endif /* !defined(__cplusplus) || defined(__STDC_CONSTANT_MACROS) */ + +#if !defined(__cplusplus) || defined(__STDC_LIMIT_MACROS) +#ifndef _CPU_STDINT_H_STDC_LIMIT_MAVROS_ +#define _CPU_STDINT_H_STDC_LIMIT_MAVROS_ + +/* + * ISO/IEC 9899:1999 + * 7.18.2.1 Limits of exact-width integer types + */ +/* Minimum values of exact-width signed integer types. */ +#define INT8_MIN (-0x7f-1) +#define INT16_MIN (-0x7fff-1) +#define INT32_MIN (-0x7fffffff-1) +#define INT64_MIN (-0x7fffffffffffffffLL-1) + +/* Maximum values of exact-width signed integer types. */ +#define INT8_MAX 0x7f +#define INT16_MAX 0x7fff +#define INT32_MAX 0x7fffffff +#define INT64_MAX 0x7fffffffffffffffLL + +/* Maximum values of exact-width unsigned integer types. */ +#define UINT8_MAX 0xff +#define UINT16_MAX 0xffff +#define UINT32_MAX 0xffffffffU +#define UINT64_MAX 0xffffffffffffffffULL + +/* + * ISO/IEC 9899:1999 + * 7.18.2.4 Limits of integer types capable of holding object pointers + */ +#define INTPTR_MIN INT64_MIN +#define INTPTR_MAX INT64_MAX +#define UINTPTR_MAX UINT64_MAX + +/* + * ISO/IEC 9899:1999 + * 7.18.2.5 Limits of greatest-width integer types + */ +#define INTMAX_MIN INT64_MIN +#define INTMAX_MAX INT64_MAX +#define UINTMAX_MAX UINT64_MAX + +/* + * ISO/IEC 9899:1999 + * 7.18.3 Limits of other integer types + */ +/* Limits of ptrdiff_t. */ +#define PTRDIFF_MIN INT64_MIN +#define PTRDIFF_MAX INT64_MAX + +/* Limits of sig_atomic_t. */ +#define SIG_ATOMIC_MIN INT32_MIN +#define SIG_ATOMIC_MAX INT32_MAX + +/* Limit of size_t. */ +#define SIZE_MAX UINT64_MAX + +/* NOTE: wchar and wint macros in sys/stdint.h */ + +/* + * ISO/IEC 9899:1999 + * 7.18.2.2 Limits of minimum-width integer types + */ +/* Minimum values of minimum-width signed integer types. */ +#define INT_LEAST8_MIN INT8_MIN +#define INT_LEAST16_MIN INT16_MIN +#define INT_LEAST32_MIN INT32_MIN +#define INT_LEAST64_MIN INT64_MIN + +/* Maximum values of minimum-width signed integer types. */ +#define INT_LEAST8_MAX INT8_MAX +#define INT_LEAST16_MAX INT16_MAX +#define INT_LEAST32_MAX INT32_MAX +#define INT_LEAST64_MAX INT64_MAX + +/* Maximum values of minimum-width unsigned integer types. */ +#define UINT_LEAST8_MAX UINT8_MAX +#define UINT_LEAST16_MAX UINT16_MAX +#define UINT_LEAST32_MAX UINT32_MAX +#define UINT_LEAST64_MAX UINT64_MAX + +/* + * ISO/IEC 9899:1999 + * 7.18.2.3 Limits of fastest minimum-width integer types + */ +/* Minimum values of fastest minimum-width signed integer types. */ +#define INT_FAST8_MIN INT32_MIN +#define INT_FAST16_MIN INT32_MIN +#define INT_FAST32_MIN INT32_MIN +#define INT_FAST64_MIN INT64_MIN + +/* Maximum values of fastest minimum-width signed integer types. */ +#define INT_FAST8_MAX INT32_MAX +#define INT_FAST16_MAX INT32_MAX +#define INT_FAST32_MAX INT32_MAX +#define INT_FAST64_MAX INT64_MAX + +/* Maximum values of fastest minimum-width unsigned integer types. */ +#define UINT_FAST8_MAX UINT32_MAX +#define UINT_FAST16_MAX UINT32_MAX +#define UINT_FAST32_MAX UINT32_MAX +#define UINT_FAST64_MAX UINT64_MAX + +#endif +#endif /* !defined(__cplusplus) || defined(__STDC_LIMIT_MACROS) */ + diff --git a/sys/cpu/amd64/include/sysarch.h b/sys/cpu/amd64/include/sysarch.h new file mode 100644 index 0000000000..0ef1a7da98 --- /dev/null +++ b/sys/cpu/amd64/include/sysarch.h @@ -0,0 +1,62 @@ +/*- + * Copyright (c) 1993 The Regents of the University of California. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * 3. All advertising materials mentioning features or use of this software + * must display the following acknowledgement: + * This product includes software developed by the University of + * California, Berkeley and its contributors. + * 4. Neither the name of the University nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + * $FreeBSD: src/sys/amd64/include/sysarch.h,v 1.22 2004/01/09 16:52:08 nectar Exp $ + * $DragonFly: src/sys/cpu/amd64/include/sysarch.h,v 1.1 2007/08/21 19:40:24 corecode Exp $ + */ + +/* + * Architecture specific syscalls (AMD64) + */ +#ifndef _CPU_SYSARCH_H_ +#define _CPU_SYSARCH_H_ + +/* Leave space for 0-127 for to avoid translating syscalls */ +/* XXX */ +#define AMD64_GET_FSBASE 128 +#define AMD64_SET_FSBASE 129 +#define AMD64_GET_GSBASE 130 +#define AMD64_SET_GSBASE 131 + +#ifndef _KERNEL +#include + +__BEGIN_DECLS +int amd64_get_fsbase(void **); +int amd64_get_gsbase(void **); +int amd64_set_fsbase(void *); +int amd64_set_gsbase(void *); +int sysarch(int, void *); +__END_DECLS +#endif + +#endif /* !_CPU_SYSARCH_H_ */ diff --git a/sys/cpu/amd64/include/tls.h b/sys/cpu/amd64/include/tls.h new file mode 100644 index 0000000000..9d1d565ebf --- /dev/null +++ b/sys/cpu/amd64/include/tls.h @@ -0,0 +1,122 @@ +/* + * Copyright (c) 2005 The DragonFly Project. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name of The DragonFly Project nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific, prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + * $DragonFly: src/sys/cpu/amd64/include/tls.h,v 1.1 2007/08/21 19:40:24 corecode Exp $ + */ + +#ifndef _CPU_TLS_H_ +#define _CPU_TLS_H_ + +#ifndef _SYS_TYPES_H_ +#include +#endif +#ifndef _SYS_TLS_H_ +#include +#endif + +/* + * NOTE: the tcb_{self,dtv,pthread,errno) fields must be declared + * in the structure in the specified order as assembly will access the + * fields with a hardwired offset. + * + * Outside of this file, the system call layer generation will hardwire + * the offset for tcb_errno. + */ +struct tls_tcb { + struct tls_tcb *tcb_self; /* pointer to self*/ + void *tcb_dtv; /* Dynamic Thread Vector */ + void *tcb_pthread; /* thread library's data*/ + int *tcb_errno_p; /* pointer to per-thread errno */ + void *tcb_unused[4]; +}; + +struct tls_dtv { + uintptr_t dtv_generation; + uintptr_t dtv_max_index; + void *dtv_offset[__ARRAY_ZERO]; +}; + +#define RTLD_TCB_HAS_SELF_POINTER +#define RTLD_STATIC_TLS_ALIGN 16 +#define RTLD_STATIC_TLS_ALIGN_MASK (RTLD_STATIC_TLS_ALIGN - 1) +#define RTLD_STATIC_TLS_EXTRA 256 +#define RTLD_STATIC_TLS_VARIANT_II + +#ifndef _KERNEL + +/* Get the current TCB. */ +static __inline struct tls_tcb * +tls_get_tcb(void) +{ + void *self; + + __asm __volatile ("movq %%fs:%1, %0" + : "=r" (self) + : "m" (((struct tls_tcb *)0)->tcb_self)); + + return(self); +} + +/* Get the current thread. */ +static __inline void * +tls_get_curthread(void) +{ + void *self; + + __asm __volatile ("movq %%fs:%1, %0" + : "=r" (self) + : "m" (((struct tls_tcb *)0)->tcb_pthread)); + + return(self); +} + +static __inline void +tls_set_tcb(struct tls_tcb *tcb) +{ + struct tls_info info; + int seg; + + info.base = tcb; + info.size = -1; + seg = set_tls_area(0, &info, sizeof(info)); + __asm __volatile("movl %0, %%fs" : : "r" (seg)); +} + +struct tls_tcb *_rtld_allocate_tls(void); +struct tls_tcb *_libc_allocate_tls(void); +void _rtld_free_tls(struct tls_tcb *); +void _libc_free_tls(struct tls_tcb *); +void _rtld_call_init(void); +struct tls_tcb *_libc_init_tls(void); +struct tls_tcb *_init_tls(void); + +#endif + +#endif /* !_CPU_TLS_H_ */ diff --git a/sys/cpu/amd64/include/trap.h b/sys/cpu/amd64/include/trap.h new file mode 100644 index 0000000000..0d3ec43cab --- /dev/null +++ b/sys/cpu/amd64/include/trap.h @@ -0,0 +1,108 @@ +/*- + * Copyright (c) 1990 The Regents of the University of California. + * All rights reserved. + * + * This code is derived from software contributed to Berkeley by + * William Jolitz. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * 3. All advertising materials mentioning features or use of this software + * must display the following acknowledgement: + * This product includes software developed by the University of + * California, Berkeley and its contributors. + * 4. Neither the name of the University nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + * from: @(#)trap.h 5.4 (Berkeley) 5/9/91 + * $FreeBSD: src/sys/amd64/include/trap.h,v 1.13 2001/07/12 06:32:51 peter Exp $ + * $DragonFly: src/sys/cpu/amd64/include/trap.h,v 1.1 2007/08/21 19:40:24 corecode Exp $ + */ + +#ifndef _CPU_TRAP_H_ +#define _CPU_TRAP_H_ + +/* + * Trap type values + * also known in trap.c for name strings + */ + +#define T_PRIVINFLT 1 /* privileged instruction */ +#define T_BPTFLT 3 /* breakpoint instruction */ +#define T_ARITHTRAP 6 /* arithmetic trap */ +#define T_PROTFLT 9 /* protection fault */ +#define T_TRCTRAP 10 /* debug exception (sic) */ +#define T_PAGEFLT 12 /* page fault */ +#define T_ALIGNFLT 14 /* alignment fault */ + +#define T_DIVIDE 18 /* integer divide fault */ +#define T_NMI 19 /* non-maskable trap */ +#define T_OFLOW 20 /* overflow trap */ +#define T_BOUND 21 /* bound instruction fault */ +#define T_DNA 22 /* device not available fault */ +#define T_DOUBLEFLT 23 /* double fault */ +#define T_FPOPFLT 24 /* fp coprocessor operand fetch fault */ +#define T_TSSFLT 25 /* invalid tss fault */ +#define T_SEGNPFLT 26 /* segment not present fault */ +#define T_STKFLT 27 /* stack fault */ +#define T_MCHK 28 /* machine check trap */ +#define T_XMMFLT 29 /* SIMD floating-point exception */ +#define T_RESERVED 30 /* reserved (unknown) */ + +/* XXX most of the following codes aren't used, but could be. */ + +/* definitions for */ +#define ILL_RESAD_FAULT T_RESADFLT +#define ILL_PRIVIN_FAULT T_PRIVINFLT +#define ILL_RESOP_FAULT T_RESOPFLT +#define ILL_ALIGN_FAULT T_ALIGNFLT +#define ILL_FPOP_FAULT T_FPOPFLT /* coprocessor operand fault */ + +/* portable macros for SIGFPE/ARITHTRAP */ +#define FPE_INTOVF 1 /* integer overflow */ +#define FPE_INTDIV 2 /* integer divide by zero */ +#define FPE_FLTDIV 3 /* floating point divide by zero */ +#define FPE_FLTOVF 4 /* floating point overflow */ +#define FPE_FLTUND 5 /* floating point underflow */ +#define FPE_FLTRES 6 /* floating point inexact result */ +#define FPE_FLTINV 7 /* invalid floating point operation */ +#define FPE_FLTSUB 8 /* subscript out of range */ + +/* old FreeBSD macros, deprecated */ +#define FPE_INTOVF_TRAP 0x1 /* integer overflow */ +#define FPE_INTDIV_TRAP 0x2 /* integer divide by zero */ +#define FPE_FLTDIV_TRAP 0x3 /* floating/decimal divide by zero */ +#define FPE_FLTOVF_TRAP 0x4 /* floating overflow */ +#define FPE_FLTUND_TRAP 0x5 /* floating underflow */ +#define FPE_FPU_NP_TRAP 0x6 /* floating point unit not present */ +#define FPE_SUBRNG_TRAP 0x7 /* subrange out of bounds */ + +/* codes for SIGBUS */ +#define BUS_PAGE_FAULT T_PAGEFLT /* page fault protection base */ +#define BUS_SEGNP_FAULT T_SEGNPFLT /* segment not present */ +#define BUS_STK_FAULT T_STKFLT /* stack segment */ +#define BUS_SEGM_FAULT T_RESERVED /* segment protection base */ + +/* Trap's coming from user mode */ +#define T_USER 0x100 + +#endif /* !_CPU_TRAP_H_ */ diff --git a/sys/cpu/amd64/include/tss.h b/sys/cpu/amd64/include/tss.h new file mode 100644 index 0000000000..7053eb73ef --- /dev/null +++ b/sys/cpu/amd64/include/tss.h @@ -0,0 +1,72 @@ +/*- + * Copyright (c) 1990 The Regents of the University of California. + * All rights reserved. + * + * This code is derived from software contributed to Berkeley by + * William Jolitz. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * 3. All advertising materials mentioning features or use of this software + * must display the following acknowledgement: + * This product includes software developed by the University of + * California, Berkeley and its contributors. + * 4. Neither the name of the University nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + * from: @(#)tss.h 5.4 (Berkeley) 1/18/91 + * $FreeBSD: src/sys/amd64/include/tss.h,v 1.15 2003/11/17 08:58:14 peter Exp $ + * $DragonFly: src/sys/cpu/amd64/include/tss.h,v 1.1 2007/08/21 19:40:24 corecode Exp $ + */ + +#ifndef _CPU_TSS_H_ +#define _CPU_TSS_H_ + +/* + * amd64 Context Data Type + * + * The alignment is pretty messed up here due to reuse of the original 32 bit + * fields. It might be worth trying to set the tss on a +4 byte offset to + * make the 64 bit fields aligned in practice. + */ +struct amd64tss { + u_int32_t tss_rsvd0; + u_int64_t tss_rsp0 __packed; /* kernel stack pointer ring 0 */ + u_int64_t tss_rsp1 __packed; /* kernel stack pointer ring 1 */ + u_int64_t tss_rsp2 __packed; /* kernel stack pointer ring 2 */ + u_int32_t tss_rsvd1; + u_int32_t tss_rsvd2; + u_int32_t tss_rsvd3; + u_int64_t tss_ist1 __packed; /* Interrupt stack table 1 */ + u_int64_t tss_ist2 __packed; /* Interrupt stack table 2 */ + u_int64_t tss_ist3 __packed; /* Interrupt stack table 3 */ + u_int64_t tss_ist4 __packed; /* Interrupt stack table 4 */ + u_int64_t tss_ist5 __packed; /* Interrupt stack table 5 */ + u_int64_t tss_ist6 __packed; /* Interrupt stack table 6 */ + u_int64_t tss_ist7 __packed; /* Interrupt stack table 7 */ + u_int32_t tss_rsvd4; + u_int32_t tss_rsvd5; + u_int16_t tss_rsvd6; + u_int16_t tss_iobase; /* io bitmap offset */ +}; + +#endif /* _CPU_TSS_H_ */ diff --git a/sys/cpu/amd64/include/types.h b/sys/cpu/amd64/include/types.h new file mode 100644 index 0000000000..11f7ae6c62 --- /dev/null +++ b/sys/cpu/amd64/include/types.h @@ -0,0 +1,84 @@ +/*- + * Copyright (c) 1990, 1993 + * The Regents of the University of California. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * 3. All advertising materials mentioning features or use of this software + * must display the following acknowledgement: + * This product includes software developed by the University of + * California, Berkeley and its contributors. + * 4. Neither the name of the University nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + * @(#)types.h 8.3 (Berkeley) 1/5/94 + * $FreeBSD: src/sys/i386/include/types.h,v 1.19.2.1 2001/03/21 10:50:58 peter Exp $ + * $DragonFly: src/sys/cpu/amd64/include/types.h,v 1.1 2007/08/21 19:40:24 corecode Exp $ + */ + +#ifndef _CPU_TYPES_H_ +#define _CPU_TYPES_H_ + +#if !defined(_ANSI_SOURCE) && !defined(_POSIX_SOURCE) +typedef struct _physadr { + int r[1]; +} *physadr; + +typedef struct label_t { + int val[6]; +} label_t; +#endif + +typedef __uint64_t vm_offset_t; /* address space bounded offset */ +typedef __uint64_t vm_size_t; /* address space bounded size */ +typedef __int64_t vm_ooffset_t; /* VM object bounded offset */ +typedef __uint64_t vm_pindex_t; /* physical page index */ +typedef __uint64_t vm_poff_t; /* physical offset */ +typedef __uint64_t vm_paddr_t; /* physical addr (same as vm_poff_t) */ + +typedef __int64_t register_t; +typedef __uint64_t u_register_t; + +#ifdef _KERNEL +typedef __int64_t intfptr_t; +typedef __uint64_t uintfptr_t; +#endif + +/* + * MMU page tables + */ +typedef __uint64_t pml4_entry_t; +typedef __uint64_t pdp_entry_t; +typedef __uint64_t pd_entry_t; +typedef __uint64_t pt_entry_t; +typedef __uint32_t cpumask_t; /* mask representing a set of cpus */ + +#define PML4SIZE sizeof(pml4_entry_t) /* for assembly files */ +#define PDPSIZE sizeof(pdp_entry_t) /* for assembly files */ +#define PDESIZE sizeof(pd_entry_t) /* for assembly files */ +#define PTESIZE sizeof(pt_entry_t) /* for assembly files */ + +/* Interrupt mask (spl, xxx_imask, etc) */ +typedef __uint32_t intrmask_t; + +#endif /* !_CPU_TYPES_H_ */ + diff --git a/sys/cpu/amd64/include/ucontext.h b/sys/cpu/amd64/include/ucontext.h new file mode 100644 index 0000000000..139f794583 --- /dev/null +++ b/sys/cpu/amd64/include/ucontext.h @@ -0,0 +1,83 @@ +/*- + * Copyright (c) 2003 Peter Wemm + * Copyright (c) 1999 Marcel Moolenaar + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer + * in this position and unchanged. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * 3. The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * $FreeBSD: src/sys/amd64/include/ucontext.h,v 1.18 2003/11/08 04:39:22 peter Exp $ + * $DragonFly: src/sys/cpu/amd64/include/ucontext.h,v 1.1 2007/08/21 19:40:24 corecode Exp $ + */ + +#ifndef _CPU_UCONTEXT_H_ +#define _CPU_UCONTEXT_H_ + +typedef struct __mcontext { + /* + * The first 20 fields must match the definition of + * sigcontext. So that we can support sigcontext + * and ucontext_t at the same time. + */ + __register_t mc_onstack; /* XXX - sigcontext compat. */ + __register_t mc_rdi; /* machine state (struct trapframe) */ + __register_t mc_rsi; + __register_t mc_rdx; + __register_t mc_rcx; + __register_t mc_r8; + __register_t mc_r9; + __register_t mc_rax; + __register_t mc_rbx; + __register_t mc_rbp; + __register_t mc_r10; + __register_t mc_r11; + __register_t mc_r12; + __register_t mc_r13; + __register_t mc_r14; + __register_t mc_r15; + __register_t mc_trapno; + __register_t mc_addr; + __register_t mc_flags; + __register_t mc_err; + __register_t mc_rip; + __register_t mc_cs; + __register_t mc_rflags; + __register_t mc_rsp; + __register_t mc_ss; + + long mc_len; /* sizeof(mcontext_t) */ +#define _MC_FPFMT_NODEV 0x10000 /* device not present or configured */ +#define _MC_FPFMT_XMM 0x10002 + long mc_fpformat; +#define _MC_FPOWNED_NONE 0x20000 /* FP state not used */ +#define _MC_FPOWNED_FPU 0x20001 /* FP state came from FPU */ +#define _MC_FPOWNED_PCB 0x20002 /* FP state came from PCB */ + long mc_ownedfp; + /* + * See for the internals of mc_fpstate[]. + */ + long mc_fpstate[64] __aligned(16); + long mc_spare[8]; +} mcontext_t; + +#endif /* !_CPU_UCONTEXT_H_ */ diff --git a/sys/cpu/amd64/include/varargs.h b/sys/cpu/amd64/include/varargs.h new file mode 100644 index 0000000000..791870a4cf --- /dev/null +++ b/sys/cpu/amd64/include/varargs.h @@ -0,0 +1,78 @@ +/*- + * Copyright (c) 2002 David E. O'Brien. All rights reserved. + * Copyright (c) 1990, 1993 + * The Regents of the University of California. All rights reserved. + * (c) UNIX System Laboratories, Inc. + * All or some portions of this file are derived from material licensed + * to the University of California by American Telephone and Telegraph + * Co. or Unix System Laboratories, Inc. and are reproduced herein with + * the permission of UNIX System Laboratories, Inc. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * 3. All advertising materials mentioning features or use of this software + * must display the following acknowledgement: + * This product includes software developed by the University of + * California, Berkeley and its contributors. + * 4. Neither the name of the University nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + * @(#)varargs.h 8.2 (Berkeley) 3/22/94 + * $FreeBSD: src/sys/amd64/include/varargs.h,v 1.14 2005/03/11 22:16:09 peter Exp $ + * $DragonFly: src/sys/cpu/amd64/include/varargs.h,v 1.1 2007/08/21 19:40:24 corecode Exp $ + */ + +#ifndef _CPU_VARARGS_H_ +#define _CPU_VARARGS_H_ + +#ifdef __GNUC__ + +typedef __va_list va_list; + +typedef int __builtin_va_alist_t __attribute__((__mode__(__word__))); + +#define va_alist __builtin_va_alist +#define va_dcl __builtin_va_alist_t __builtin_va_alist; ... +#define va_start(ap) __builtin_varargs_start(ap) +#define va_arg(ap, type) __builtin_va_arg((ap), type) +#define va_end(ap) __builtin_va_end(ap) + +#else /* !__GNUC__ */ + +typedef char *va_list; + +#define __va_size(type) \ + (((sizeof(type) + sizeof(int) - 1) / sizeof(int)) * sizeof(int)) + +#define va_dcl int va_alist; ... + +#define va_start(ap) \ + ((ap) = (va_list)&va_alist) + +#define va_arg(ap, type) \ + (*(type *)((ap) += __va_size(type), (ap) - __va_size(type))) + +#define va_end(ap) + +#endif /* __GNUC__ */ + +#endif /* !_CPU_VARARGS_H_ */ diff --git a/sys/cpu/amd64/include/vframe.h b/sys/cpu/amd64/include/vframe.h new file mode 100644 index 0000000000..0bf2ad68c9 --- /dev/null +++ b/sys/cpu/amd64/include/vframe.h @@ -0,0 +1,57 @@ +/* + * Copyright (c) 2006 The DragonFly Project. All rights reserved. + * + * This code is derived from software contributed to The DragonFly Project + * by Matthew Dillon + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name of The DragonFly Project nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific, prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + * $DragonFly: src/sys/cpu/amd64/include/vframe.h,v 1.1 2007/08/21 19:40:24 corecode Exp $ + */ + +#ifndef _CPU_VFRAME_H_ +#define _CPU_VFRAME_H_ + +#ifndef _MACHINE_NPX_H_ +#include +#endif +#ifndef _MACHINE_SEGMENTS_H_ +#include +#endif + +/* + * Virtualized external frame. This is used by the virtual kernel in + * addition to trapframe. + */ +struct vextframe { + /* XXX come back for fixing this in segments.h */ + /* struct savetls vx_tls; */ +}; + +#endif + -- 2.41.0