2 * Copyright (c) 2015 Landon Fuller <landon@landonf.org>
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
8 * 1. Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer,
10 * without modification.
11 * 2. Redistributions in binary form must reproduce at minimum a disclaimer
12 * similar to the "NO WARRANTY" disclaimer below ("Disclaimer") and any
13 * redistribution must be conditioned upon including a substantially
14 * similar Disclaimer requirement for further binary redistribution.
17 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
18 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
19 * LIMITED TO, THE IMPLIED WARRANTIES OF NONINFRINGEMENT, MERCHANTIBILITY
20 * AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL
21 * THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY,
22 * OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
23 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
24 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER
25 * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
26 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
27 * THE POSSIBILITY OF SUCH DAMAGES.
32 #ifndef _BCMA_BCMAVAR_H_
33 #define _BCMA_BCMAVAR_H_
35 #include <sys/param.h>
37 #include <sys/limits.h>
39 #include <machine/bus.h>
45 * Internal definitions shared by bcma(4) driver implementations.
48 /** Base resource ID for per-core agent register allocations */
49 #define BCMA_AGENT_RID_BASE 100
52 * Return the device's core index.
54 * @param _dinfo The bcma_devinfo instance to query.
56 #define BCMA_DINFO_COREIDX(_dinfo) \
57 ((_dinfo)->corecfg->core_info.core_idx)
60 /** BCMA port identifier. */
61 typedef u_int bcma_pid_t;
62 #define BCMA_PID_MAX UINT_MAX /**< Maximum bcma_pid_t value */
64 /** BCMA per-port region map identifier. */
65 typedef u_int bcma_rmid_t;
66 #define BCMA_RMID_MAX UINT_MAX /**< Maximum bcma_rmid_t value */
74 int bcma_probe(device_t dev);
75 int bcma_attach(device_t dev);
76 int bcma_detach(device_t dev);
77 int bcma_get_intr_count(device_t dev, device_t child);
78 int bcma_get_core_ivec(device_t dev, device_t child,
79 u_int intr, uint32_t *ivec);
81 int bcma_add_children(device_t bus);
83 struct bcma_sport_list *bcma_corecfg_get_port_list(struct bcma_corecfg *cfg,
86 struct bcma_devinfo *bcma_alloc_dinfo(device_t bus);
87 int bcma_init_dinfo(device_t bus,
88 struct bcma_devinfo *dinfo,
89 struct bcma_corecfg *corecfg);
90 int bcma_dinfo_alloc_agent(device_t bus, device_t child,
91 struct bcma_devinfo *dinfo);
92 void bcma_free_dinfo(device_t bus,
93 struct bcma_devinfo *dinfo);
95 struct bcma_corecfg *bcma_alloc_corecfg(u_int core_index, int core_unit,
96 uint16_t vendor, uint16_t device, uint8_t hwrev);
97 void bcma_free_corecfg(struct bcma_corecfg *corecfg);
99 struct bcma_sport *bcma_alloc_sport(bcma_pid_t port_num, bhnd_port_type port_type);
100 void bcma_free_sport(struct bcma_sport *sport);
102 int bcma_dmp_wait_reset(device_t child,
103 struct bcma_devinfo *dinfo);
104 int bcma_dmp_write_reset(device_t child,
105 struct bcma_devinfo *dinfo, uint32_t value);
107 /** BCMA master port descriptor */
109 bcma_pid_t mp_num; /**< AXI port identifier (bus-unique) */
110 bcma_pid_t mp_vid; /**< AXI master virtual ID (core-unique) */
111 STAILQ_ENTRY(bcma_mport) mp_link;
114 /** BCMA memory region descriptor */
116 bcma_rmid_t m_region_num; /**< region identifier (port-unique). */
117 bhnd_addr_t m_base; /**< base address */
118 bhnd_size_t m_size; /**< size */
119 int m_rid; /**< bus resource id, or -1. */
121 STAILQ_ENTRY(bcma_map) m_link;
124 /** BCMA slave port descriptor */
126 bcma_pid_t sp_num; /**< slave port number (core-unique) */
127 bhnd_port_type sp_type; /**< port type */
129 u_long sp_num_maps; /**< number of regions mapped to this port */
130 STAILQ_HEAD(, bcma_map) sp_maps;
131 STAILQ_ENTRY(bcma_sport) sp_link;
134 STAILQ_HEAD(bcma_mport_list, bcma_mport);
135 STAILQ_HEAD(bcma_sport_list, bcma_sport);
137 /** BCMA IP core/block configuration */
138 struct bcma_corecfg {
139 struct bhnd_core_info core_info; /**< standard core info */
141 u_long num_master_ports; /**< number of master port descriptors. */
142 struct bcma_mport_list master_ports; /**< master port descriptors */
144 u_long num_dev_ports; /**< number of device slave port descriptors. */
145 struct bcma_sport_list dev_ports; /**< device port descriptors */
147 u_long num_bridge_ports; /**< number of bridge slave port descriptors. */
148 struct bcma_sport_list bridge_ports; /**< bridge port descriptors */
150 u_long num_wrapper_ports; /**< number of wrapper slave port descriptors. */
151 struct bcma_sport_list wrapper_ports; /**< wrapper port descriptors */
155 * BCMA per-device info
157 struct bcma_devinfo {
158 struct resource_list resources; /**< Slave port memory regions. */
159 struct bcma_corecfg *corecfg; /**< IP core/block config */
161 struct bhnd_resource *res_agent; /**< Agent (wrapper) resource, or NULL. Not
162 * all bcma(4) cores have or require an agent. */
163 int rid_agent; /**< Agent resource ID, or -1 */
165 struct bhnd_core_pmu_info *pmu_info; /**< Bus-managed PMU state, or NULL */
169 /** BMCA per-instance state */
171 struct bhnd_softc bhnd_sc; /**< bhnd state */
174 #endif /* _BCMA_BCMAVAR_H_ */