Enable arm,io-coherent property of PL310 L2 cache on Armada 38x platforms
authorzbb <zbb@FreeBSD.org>
Wed, 21 Jun 2017 18:28:37 +0000 (18:28 +0000)
committerzbb <zbb@FreeBSD.org>
Wed, 21 Jun 2017 18:28:37 +0000 (18:28 +0000)
commit4bb8c5f36b6f41e820675d3a4d940cb802da42a3
tree075f28e72e279bb080cd8ab6c47593c213ea8a15
parent713a0a26db4493f96a2ce3200ce8429564246208
Enable arm,io-coherent property of PL310 L2 cache on Armada 38x platforms

This patch disables outer cache sync in PL310 driver
by adding "arm,io-coherent" property. In addition to
the previous patches it was the last bit needed
for enabling proper operation of Armada 38x SoCs
with the IO cache coherency.

Submitted by: Michal Mazur <mkm@semihalf.com>
Obtained from: Semihalf
Sponsored by: Stormshield
Reviewed by: mmel
Differential revision: https://reviews.freebsd.org/D11204
sys/boot/fdt/dts/arm/armada-38x.dtsi