Allow setting access-width for UART registers.
authorbr <br@FreeBSD.org>
Mon, 27 Feb 2017 20:08:42 +0000 (20:08 +0000)
committerbr <br@FreeBSD.org>
Mon, 27 Feb 2017 20:08:42 +0000 (20:08 +0000)
commit69f1ecb8f80974c085fc89f8e069f88f726ebcb0
treee6db94b4c584dc04e5507b8d25da964929f78c59
parentd947ed0ae741bf9d57a6341b124ab856cee35bef
Allow setting access-width for UART registers.

This is required for FDT's standard "reg-io-width" property
(similar to "reg-shift" property) found in many DTS files.

This fixes operation on Altera Arria 10 SOC Development Kit,
where standard ns8250 uart allows 4-byte access only.

Reviewed by: kan, marcel
Sponsored by: DARPA, AFRL
Differential Revision: https://reviews.freebsd.org/D9785
36 files changed:
sys/arm/at91/uart_bus_at91usart.c
sys/arm/cavium/cns11xx/uart_bus_ec.c
sys/arm/nvidia/tegra_uart.c
sys/arm/xscale/i8134x/uart_bus_i81342.c
sys/arm/xscale/ixp425/uart_bus_ixp425.c
sys/arm/xscale/pxa/uart_bus_pxa.c
sys/dev/uart/uart.h
sys/dev/uart/uart_bus.h
sys/dev/uart/uart_bus_acpi.c
sys/dev/uart/uart_bus_ebus.c
sys/dev/uart/uart_bus_fdt.c
sys/dev/uart/uart_bus_isa.c
sys/dev/uart/uart_bus_pccard.c
sys/dev/uart/uart_bus_pci.c
sys/dev/uart/uart_bus_puc.c
sys/dev/uart/uart_bus_scc.c
sys/dev/uart/uart_core.c
sys/dev/uart/uart_cpu.h
sys/dev/uart/uart_cpu_arm64.c
sys/dev/uart/uart_cpu_fdt.c
sys/dev/uart/uart_cpu_fdt.h
sys/dev/uart/uart_dev_snps.c
sys/mips/adm5120/uart_bus_adm5120.c
sys/mips/alchemy/uart_bus_alchemy.c
sys/mips/atheros/ar531x/uart_bus_ar5315.c
sys/mips/atheros/uart_bus_ar71xx.c
sys/mips/atheros/uart_bus_ar933x.c
sys/mips/broadcom/uart_bus_chipc.c
sys/mips/cavium/uart_bus_octeonusart.c
sys/mips/idt/uart_bus_rc32434.c
sys/mips/ingenic/jz4780_uart.c
sys/mips/malta/uart_bus_maltausart.c
sys/mips/rmi/uart_bus_xlr_iodi.c
sys/mips/rt305x/uart_bus_rt305x.c
sys/powerpc/psim/uart_iobus.c
sys/sparc64/pci/sbbc.c