drivers/gpu/drm/nouveau/core/include/core/device.h

   1 #ifndef __NOUVEAU_DEVICE_H__
   2 #define __NOUVEAU_DEVICE_H__
   3
   4 #include <core/object.h>
   5 #include <core/subdev.h>
   6 #include <core/engine.h>
   7 #include <core/event.h>
   8
   9 enum nv_subdev_type {
  10         NVDEV_ENGINE_DEVICE,
  11         NVDEV_SUBDEV_VBIOS,
  12
  13         /* All subdevs from DEVINIT to DEVINIT_LAST will be created before
  14          * *any* of them are initialised.  This subdev category is used
  15          * for any subdevs that the VBIOS init table parsing may call out
  16          * to during POST.
  17          */
  18         NVDEV_SUBDEV_DEVINIT,
  19         NVDEV_SUBDEV_GPIO,
  20         NVDEV_SUBDEV_I2C,
  21         NVDEV_SUBDEV_DEVINIT_LAST = NVDEV_SUBDEV_I2C,
  22
  23         /* This grouping of subdevs are initialised right after they've
  24          * been created, and are allowed to assume any subdevs in the
  25          * list above them exist and have been initialised.
  26          */
  27         NVDEV_SUBDEV_MXM,
  28         NVDEV_SUBDEV_MC,
  29         NVDEV_SUBDEV_BUS,
  30         NVDEV_SUBDEV_TIMER,
  31         NVDEV_SUBDEV_FB,
  32         NVDEV_SUBDEV_LTCG,
  33         NVDEV_SUBDEV_IBUS,
  34         NVDEV_SUBDEV_INSTMEM,
  35         NVDEV_SUBDEV_VM,
  36         NVDEV_SUBDEV_BAR,
  37         NVDEV_SUBDEV_PWR,
  38         NVDEV_SUBDEV_VOLT,
  39         NVDEV_SUBDEV_THERM,
  40         NVDEV_SUBDEV_CLOCK,
  41
  42         NVDEV_ENGINE_FIRST,
  43         NVDEV_ENGINE_DMAOBJ = NVDEV_ENGINE_FIRST,
  44         NVDEV_ENGINE_IFB,
  45         NVDEV_ENGINE_FIFO,
  46         NVDEV_ENGINE_SW,
  47         NVDEV_ENGINE_GR,
  48         NVDEV_ENGINE_MPEG,
  49         NVDEV_ENGINE_ME,
  50         NVDEV_ENGINE_VP,
  51         NVDEV_ENGINE_CRYPT,
  52         NVDEV_ENGINE_BSP,
  53         NVDEV_ENGINE_PPP,
  54         NVDEV_ENGINE_COPY0,
  55         NVDEV_ENGINE_COPY1,
  56         NVDEV_ENGINE_COPY2,
  57         NVDEV_ENGINE_VIC,
  58         NVDEV_ENGINE_VENC,
  59         NVDEV_ENGINE_DISP,
  60         NVDEV_ENGINE_PERFMON,
  61
  62         NVDEV_SUBDEV_NR,
  63 };
  64
  65 struct nouveau_device {
  66         struct nouveau_engine base;
  67         struct list_head head;
  68
  69         struct pci_dev *pdev;
  70         struct platform_device *platformdev;
  71         u64 handle;
  72
  73         struct nvkm_event event;
  74
  75         const char *cfgopt;
  76         const char *dbgopt;
  77         const char *name;
  78         const char *cname;
  79         u64 disable_mask;
  80
  81         enum {
  82                 NV_04    = 0x04,
  83                 NV_10    = 0x10,
  84                 NV_11    = 0x11,
  85                 NV_20    = 0x20,
  86                 NV_30    = 0x30,
  87                 NV_40    = 0x40,
  88                 NV_50    = 0x50,
  89                 NV_C0    = 0xc0,
  90                 NV_E0    = 0xe0,
  91                 GM100    = 0x110,
  92         } card_type;
  93         u32 chipset;
  94         u32 crystal;
  95
  96         struct nouveau_oclass *oclass[NVDEV_SUBDEV_NR];
  97         struct nouveau_object *subdev[NVDEV_SUBDEV_NR];
  98
  99         struct {
 100                 struct notifier_block nb;
 101         } acpi;
 102 };
 103
 104 static inline struct nouveau_device *
 105 nv_device(void *obj)
 106 {
 107         struct nouveau_object *object = nv_object(obj);
 108         struct nouveau_object *device = object;
 109
 110         if (device->engine)
 111                 device = device->engine;
 112         if (device->parent)
 113                 device = device->parent;
 114
 115 #if CONFIG_NOUVEAU_DEBUG >= NV_DBG_PARANOIA
 116         if (unlikely(!nv_iclass(device, NV_SUBDEV_CLASS) ||
 117                      (nv_hclass(device) & 0xff) != NVDEV_ENGINE_DEVICE)) {
 118                 nv_assert("BAD CAST -> NvDevice, 0x%08x 0x%08x",
 119                           nv_hclass(object), nv_hclass(device));
 120         }
 121 #endif
 122
 123         return (void *)device;
 124 }
 125
 126 static inline struct nouveau_subdev *
 127 nouveau_subdev(void *obj, int sub)
 128 {
 129         if (nv_device(obj)->subdev[sub])
 130                 return nv_subdev(nv_device(obj)->subdev[sub]);
 131         return NULL;
 132 }
 133
 134 static inline struct nouveau_engine *
 135 nouveau_engine(void *obj, int sub)
 136 {
 137         struct nouveau_subdev *subdev = nouveau_subdev(obj, sub);
 138         if (subdev && nv_iclass(subdev, NV_ENGINE_CLASS))
 139                 return nv_engine(subdev);
 140         return NULL;
 141 }
 142
 143 static inline bool
 144 nv_device_match(struct nouveau_object *object, u16 dev, u16 ven, u16 sub)
 145 {
 146         struct nouveau_device *device = nv_device(object);
 147         return device->pdev->device == dev &&
 148                device->pdev->subsystem_vendor == ven &&
 149                device->pdev->subsystem_device == sub;
 150 }
 151
 152 static inline bool
 153 nv_device_is_pci(struct nouveau_device *device)
 154 {
 155         return device->pdev != NULL;
 156 }
 157
 158 static inline struct device *
 159 nv_device_base(struct nouveau_device *device)
 160 {
 161         return nv_device_is_pci(device) ? &device->pdev->dev :
 162                                           &device->platformdev->dev;
 163 }
 164
 165 resource_size_t
 166 nv_device_resource_start(struct nouveau_device *device, unsigned int bar);
 167
 168 resource_size_t
 169 nv_device_resource_len(struct nouveau_device *device, unsigned int bar);
 170
 171 int
 172 nv_device_get_irq(struct nouveau_device *device, bool stall);
 173
 174 #endif