net/mlx5e: Add port module event counters to ethtool stats
[linux.git] / drivers / net / ethernet / mellanox / mlx5 / core / en_ethtool.c
1 /*
2  * Copyright (c) 2015, Mellanox Technologies. All rights reserved.
3  *
4  * This software is available to you under a choice of one of two
5  * licenses.  You may choose to be licensed under the terms of the GNU
6  * General Public License (GPL) Version 2, available from the file
7  * COPYING in the main directory of this source tree, or the
8  * OpenIB.org BSD license below:
9  *
10  *     Redistribution and use in source and binary forms, with or
11  *     without modification, are permitted provided that the following
12  *     conditions are met:
13  *
14  *      - Redistributions of source code must retain the above
15  *        copyright notice, this list of conditions and the following
16  *        disclaimer.
17  *
18  *      - Redistributions in binary form must reproduce the above
19  *        copyright notice, this list of conditions and the following
20  *        disclaimer in the documentation and/or other materials
21  *        provided with the distribution.
22  *
23  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
24  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
25  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
26  * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
27  * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
28  * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
29  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
30  * SOFTWARE.
31  */
32
33 #include "en.h"
34
35 static void mlx5e_get_drvinfo(struct net_device *dev,
36                               struct ethtool_drvinfo *drvinfo)
37 {
38         struct mlx5e_priv *priv = netdev_priv(dev);
39         struct mlx5_core_dev *mdev = priv->mdev;
40
41         strlcpy(drvinfo->driver, DRIVER_NAME, sizeof(drvinfo->driver));
42         strlcpy(drvinfo->version, DRIVER_VERSION " (" DRIVER_RELDATE ")",
43                 sizeof(drvinfo->version));
44         snprintf(drvinfo->fw_version, sizeof(drvinfo->fw_version),
45                  "%d.%d.%d",
46                  fw_rev_maj(mdev), fw_rev_min(mdev), fw_rev_sub(mdev));
47         strlcpy(drvinfo->bus_info, pci_name(mdev->pdev),
48                 sizeof(drvinfo->bus_info));
49 }
50
51 struct ptys2ethtool_config {
52         __ETHTOOL_DECLARE_LINK_MODE_MASK(supported);
53         __ETHTOOL_DECLARE_LINK_MODE_MASK(advertised);
54         u32 speed;
55 };
56
57 static struct ptys2ethtool_config ptys2ethtool_table[MLX5E_LINK_MODES_NUMBER];
58
59 #define MLX5_BUILD_PTYS2ETHTOOL_CONFIG(reg_, speed_, ...)               \
60         ({                                                              \
61                 struct ptys2ethtool_config *cfg;                        \
62                 const unsigned int modes[] = { __VA_ARGS__ };           \
63                 unsigned int i;                                         \
64                 cfg = &ptys2ethtool_table[reg_];                        \
65                 cfg->speed = speed_;                                    \
66                 bitmap_zero(cfg->supported,                             \
67                             __ETHTOOL_LINK_MODE_MASK_NBITS);            \
68                 bitmap_zero(cfg->advertised,                            \
69                             __ETHTOOL_LINK_MODE_MASK_NBITS);            \
70                 for (i = 0 ; i < ARRAY_SIZE(modes) ; ++i) {             \
71                         __set_bit(modes[i], cfg->supported);            \
72                         __set_bit(modes[i], cfg->advertised);           \
73                 }                                                       \
74         })
75
76 void mlx5e_build_ptys2ethtool_map(void)
77 {
78         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_1000BASE_CX_SGMII, SPEED_1000,
79                                        ETHTOOL_LINK_MODE_1000baseKX_Full_BIT);
80         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_1000BASE_KX, SPEED_1000,
81                                        ETHTOOL_LINK_MODE_1000baseKX_Full_BIT);
82         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_10GBASE_CX4, SPEED_10000,
83                                        ETHTOOL_LINK_MODE_10000baseKX4_Full_BIT);
84         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_10GBASE_KX4, SPEED_10000,
85                                        ETHTOOL_LINK_MODE_10000baseKX4_Full_BIT);
86         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_10GBASE_KR, SPEED_10000,
87                                        ETHTOOL_LINK_MODE_10000baseKR_Full_BIT);
88         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_20GBASE_KR2, SPEED_20000,
89                                        ETHTOOL_LINK_MODE_20000baseKR2_Full_BIT);
90         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_40GBASE_CR4, SPEED_40000,
91                                        ETHTOOL_LINK_MODE_40000baseCR4_Full_BIT);
92         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_40GBASE_KR4, SPEED_40000,
93                                        ETHTOOL_LINK_MODE_40000baseKR4_Full_BIT);
94         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_56GBASE_R4, SPEED_56000,
95                                        ETHTOOL_LINK_MODE_56000baseKR4_Full_BIT);
96         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_10GBASE_CR, SPEED_10000,
97                                        ETHTOOL_LINK_MODE_10000baseKR_Full_BIT);
98         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_10GBASE_SR, SPEED_10000,
99                                        ETHTOOL_LINK_MODE_10000baseKR_Full_BIT);
100         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_10GBASE_ER, SPEED_10000,
101                                        ETHTOOL_LINK_MODE_10000baseKR_Full_BIT);
102         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_40GBASE_SR4, SPEED_40000,
103                                        ETHTOOL_LINK_MODE_40000baseSR4_Full_BIT);
104         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_40GBASE_LR4, SPEED_40000,
105                                        ETHTOOL_LINK_MODE_40000baseLR4_Full_BIT);
106         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_50GBASE_SR2, SPEED_50000,
107                                        ETHTOOL_LINK_MODE_50000baseSR2_Full_BIT);
108         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_100GBASE_CR4, SPEED_100000,
109                                        ETHTOOL_LINK_MODE_100000baseCR4_Full_BIT);
110         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_100GBASE_SR4, SPEED_100000,
111                                        ETHTOOL_LINK_MODE_100000baseSR4_Full_BIT);
112         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_100GBASE_KR4, SPEED_100000,
113                                        ETHTOOL_LINK_MODE_100000baseKR4_Full_BIT);
114         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_100GBASE_LR4, SPEED_100000,
115                                        ETHTOOL_LINK_MODE_100000baseLR4_ER4_Full_BIT);
116         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_10GBASE_T, SPEED_10000,
117                                        ETHTOOL_LINK_MODE_10000baseT_Full_BIT);
118         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_25GBASE_CR, SPEED_25000,
119                                        ETHTOOL_LINK_MODE_25000baseCR_Full_BIT);
120         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_25GBASE_KR, SPEED_25000,
121                                        ETHTOOL_LINK_MODE_25000baseKR_Full_BIT);
122         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_25GBASE_SR, SPEED_25000,
123                                        ETHTOOL_LINK_MODE_25000baseSR_Full_BIT);
124         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_50GBASE_CR2, SPEED_50000,
125                                        ETHTOOL_LINK_MODE_50000baseCR2_Full_BIT);
126         MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_50GBASE_KR2, SPEED_50000,
127                                        ETHTOOL_LINK_MODE_50000baseKR2_Full_BIT);
128 }
129
130 static unsigned long mlx5e_query_pfc_combined(struct mlx5e_priv *priv)
131 {
132         struct mlx5_core_dev *mdev = priv->mdev;
133         u8 pfc_en_tx;
134         u8 pfc_en_rx;
135         int err;
136
137         err = mlx5_query_port_pfc(mdev, &pfc_en_tx, &pfc_en_rx);
138
139         return err ? 0 : pfc_en_tx | pfc_en_rx;
140 }
141
142 static bool mlx5e_query_global_pause_combined(struct mlx5e_priv *priv)
143 {
144         struct mlx5_core_dev *mdev = priv->mdev;
145         u32 rx_pause;
146         u32 tx_pause;
147         int err;
148
149         err = mlx5_query_port_pause(mdev, &rx_pause, &tx_pause);
150
151         return err ? false : rx_pause | tx_pause;
152 }
153
154 #define MLX5E_NUM_Q_CNTRS(priv) (NUM_Q_COUNTERS * (!!priv->q_counter))
155 #define MLX5E_NUM_RQ_STATS(priv) \
156         (NUM_RQ_STATS * priv->params.num_channels * \
157          test_bit(MLX5E_STATE_OPENED, &priv->state))
158 #define MLX5E_NUM_SQ_STATS(priv) \
159         (NUM_SQ_STATS * priv->params.num_channels * priv->params.num_tc * \
160          test_bit(MLX5E_STATE_OPENED, &priv->state))
161 #define MLX5E_NUM_PFC_COUNTERS(priv) \
162         ((mlx5e_query_global_pause_combined(priv) + hweight8(mlx5e_query_pfc_combined(priv))) * \
163           NUM_PPORT_PER_PRIO_PFC_COUNTERS)
164
165 static int mlx5e_get_sset_count(struct net_device *dev, int sset)
166 {
167         struct mlx5e_priv *priv = netdev_priv(dev);
168
169         switch (sset) {
170         case ETH_SS_STATS:
171                 return NUM_SW_COUNTERS +
172                        MLX5E_NUM_Q_CNTRS(priv) +
173                        NUM_VPORT_COUNTERS + NUM_PPORT_COUNTERS +
174                        MLX5E_NUM_RQ_STATS(priv) +
175                        MLX5E_NUM_SQ_STATS(priv) +
176                        MLX5E_NUM_PFC_COUNTERS(priv) +
177                        ARRAY_SIZE(mlx5e_pme_status_desc) +
178                        ARRAY_SIZE(mlx5e_pme_error_desc);
179
180         case ETH_SS_PRIV_FLAGS:
181                 return ARRAY_SIZE(mlx5e_priv_flags);
182         /* fallthrough */
183         default:
184                 return -EOPNOTSUPP;
185         }
186 }
187
188 static void mlx5e_fill_stats_strings(struct mlx5e_priv *priv, uint8_t *data)
189 {
190         int i, j, tc, prio, idx = 0;
191         unsigned long pfc_combined;
192
193         /* SW counters */
194         for (i = 0; i < NUM_SW_COUNTERS; i++)
195                 strcpy(data + (idx++) * ETH_GSTRING_LEN, sw_stats_desc[i].format);
196
197         /* Q counters */
198         for (i = 0; i < MLX5E_NUM_Q_CNTRS(priv); i++)
199                 strcpy(data + (idx++) * ETH_GSTRING_LEN, q_stats_desc[i].format);
200
201         /* VPORT counters */
202         for (i = 0; i < NUM_VPORT_COUNTERS; i++)
203                 strcpy(data + (idx++) * ETH_GSTRING_LEN,
204                        vport_stats_desc[i].format);
205
206         /* PPORT counters */
207         for (i = 0; i < NUM_PPORT_802_3_COUNTERS; i++)
208                 strcpy(data + (idx++) * ETH_GSTRING_LEN,
209                        pport_802_3_stats_desc[i].format);
210
211         for (i = 0; i < NUM_PPORT_2863_COUNTERS; i++)
212                 strcpy(data + (idx++) * ETH_GSTRING_LEN,
213                        pport_2863_stats_desc[i].format);
214
215         for (i = 0; i < NUM_PPORT_2819_COUNTERS; i++)
216                 strcpy(data + (idx++) * ETH_GSTRING_LEN,
217                        pport_2819_stats_desc[i].format);
218
219         for (prio = 0; prio < NUM_PPORT_PRIO; prio++) {
220                 for (i = 0; i < NUM_PPORT_PER_PRIO_TRAFFIC_COUNTERS; i++)
221                         sprintf(data + (idx++) * ETH_GSTRING_LEN,
222                                 pport_per_prio_traffic_stats_desc[i].format, prio);
223         }
224
225         pfc_combined = mlx5e_query_pfc_combined(priv);
226         for_each_set_bit(prio, &pfc_combined, NUM_PPORT_PRIO) {
227                 for (i = 0; i < NUM_PPORT_PER_PRIO_PFC_COUNTERS; i++) {
228                         char pfc_string[ETH_GSTRING_LEN];
229
230                         snprintf(pfc_string, sizeof(pfc_string), "prio%d", prio);
231                         sprintf(data + (idx++) * ETH_GSTRING_LEN,
232                                 pport_per_prio_pfc_stats_desc[i].format, pfc_string);
233                 }
234         }
235
236         if (mlx5e_query_global_pause_combined(priv)) {
237                 for (i = 0; i < NUM_PPORT_PER_PRIO_PFC_COUNTERS; i++) {
238                         sprintf(data + (idx++) * ETH_GSTRING_LEN,
239                                 pport_per_prio_pfc_stats_desc[i].format, "global");
240                 }
241         }
242
243         /* port module event counters */
244         for (i = 0; i < ARRAY_SIZE(mlx5e_pme_status_desc); i++)
245                 strcpy(data + (idx++) * ETH_GSTRING_LEN, mlx5e_pme_status_desc[i].format);
246
247         for (i = 0; i < ARRAY_SIZE(mlx5e_pme_error_desc); i++)
248                 strcpy(data + (idx++) * ETH_GSTRING_LEN, mlx5e_pme_error_desc[i].format);
249
250         if (!test_bit(MLX5E_STATE_OPENED, &priv->state))
251                 return;
252
253         /* per channel counters */
254         for (i = 0; i < priv->params.num_channels; i++)
255                 for (j = 0; j < NUM_RQ_STATS; j++)
256                         sprintf(data + (idx++) * ETH_GSTRING_LEN,
257                                 rq_stats_desc[j].format, i);
258
259         for (tc = 0; tc < priv->params.num_tc; tc++)
260                 for (i = 0; i < priv->params.num_channels; i++)
261                         for (j = 0; j < NUM_SQ_STATS; j++)
262                                 sprintf(data + (idx++) * ETH_GSTRING_LEN,
263                                         sq_stats_desc[j].format,
264                                         priv->channeltc_to_txq_map[i][tc]);
265 }
266
267 static void mlx5e_get_strings(struct net_device *dev,
268                               uint32_t stringset, uint8_t *data)
269 {
270         struct mlx5e_priv *priv = netdev_priv(dev);
271         int i;
272
273         switch (stringset) {
274         case ETH_SS_PRIV_FLAGS:
275                 for (i = 0; i < ARRAY_SIZE(mlx5e_priv_flags); i++)
276                         strcpy(data + i * ETH_GSTRING_LEN, mlx5e_priv_flags[i]);
277                 break;
278
279         case ETH_SS_TEST:
280                 break;
281
282         case ETH_SS_STATS:
283                 mlx5e_fill_stats_strings(priv, data);
284                 break;
285         }
286 }
287
288 static void mlx5e_get_ethtool_stats(struct net_device *dev,
289                                     struct ethtool_stats *stats, u64 *data)
290 {
291         struct mlx5e_priv *priv = netdev_priv(dev);
292         struct mlx5_priv *mlx5_priv;
293         int i, j, tc, prio, idx = 0;
294         unsigned long pfc_combined;
295
296         if (!data)
297                 return;
298
299         mutex_lock(&priv->state_lock);
300         if (test_bit(MLX5E_STATE_OPENED, &priv->state))
301                 mlx5e_update_stats(priv);
302         mutex_unlock(&priv->state_lock);
303
304         for (i = 0; i < NUM_SW_COUNTERS; i++)
305                 data[idx++] = MLX5E_READ_CTR64_CPU(&priv->stats.sw,
306                                                    sw_stats_desc, i);
307
308         for (i = 0; i < MLX5E_NUM_Q_CNTRS(priv); i++)
309                 data[idx++] = MLX5E_READ_CTR32_CPU(&priv->stats.qcnt,
310                                                    q_stats_desc, i);
311
312         for (i = 0; i < NUM_VPORT_COUNTERS; i++)
313                 data[idx++] = MLX5E_READ_CTR64_BE(priv->stats.vport.query_vport_out,
314                                                   vport_stats_desc, i);
315
316         for (i = 0; i < NUM_PPORT_802_3_COUNTERS; i++)
317                 data[idx++] = MLX5E_READ_CTR64_BE(&priv->stats.pport.IEEE_802_3_counters,
318                                                   pport_802_3_stats_desc, i);
319
320         for (i = 0; i < NUM_PPORT_2863_COUNTERS; i++)
321                 data[idx++] = MLX5E_READ_CTR64_BE(&priv->stats.pport.RFC_2863_counters,
322                                                   pport_2863_stats_desc, i);
323
324         for (i = 0; i < NUM_PPORT_2819_COUNTERS; i++)
325                 data[idx++] = MLX5E_READ_CTR64_BE(&priv->stats.pport.RFC_2819_counters,
326                                                   pport_2819_stats_desc, i);
327
328         for (prio = 0; prio < NUM_PPORT_PRIO; prio++) {
329                 for (i = 0; i < NUM_PPORT_PER_PRIO_TRAFFIC_COUNTERS; i++)
330                         data[idx++] = MLX5E_READ_CTR64_BE(&priv->stats.pport.per_prio_counters[prio],
331                                                  pport_per_prio_traffic_stats_desc, i);
332         }
333
334         pfc_combined = mlx5e_query_pfc_combined(priv);
335         for_each_set_bit(prio, &pfc_combined, NUM_PPORT_PRIO) {
336                 for (i = 0; i < NUM_PPORT_PER_PRIO_PFC_COUNTERS; i++) {
337                         data[idx++] = MLX5E_READ_CTR64_BE(&priv->stats.pport.per_prio_counters[prio],
338                                                           pport_per_prio_pfc_stats_desc, i);
339                 }
340         }
341
342         if (mlx5e_query_global_pause_combined(priv)) {
343                 for (i = 0; i < NUM_PPORT_PER_PRIO_PFC_COUNTERS; i++) {
344                         data[idx++] = MLX5E_READ_CTR64_BE(&priv->stats.pport.per_prio_counters[0],
345                                                           pport_per_prio_pfc_stats_desc, i);
346                 }
347         }
348
349         /* port module event counters */
350         mlx5_priv =  &priv->mdev->priv;
351         for (i = 0; i < ARRAY_SIZE(mlx5e_pme_status_desc); i++)
352                 data[idx++] = MLX5E_READ_CTR64_CPU(mlx5_priv->pme_stats.status_counters,
353                                                    mlx5e_pme_status_desc, i);
354
355         for (i = 0; i < ARRAY_SIZE(mlx5e_pme_error_desc); i++)
356                 data[idx++] = MLX5E_READ_CTR64_CPU(mlx5_priv->pme_stats.error_counters,
357                                                    mlx5e_pme_error_desc, i);
358
359         if (!test_bit(MLX5E_STATE_OPENED, &priv->state))
360                 return;
361
362         /* per channel counters */
363         for (i = 0; i < priv->params.num_channels; i++)
364                 for (j = 0; j < NUM_RQ_STATS; j++)
365                         data[idx++] =
366                                MLX5E_READ_CTR64_CPU(&priv->channel[i]->rq.stats,
367                                                     rq_stats_desc, j);
368
369         for (tc = 0; tc < priv->params.num_tc; tc++)
370                 for (i = 0; i < priv->params.num_channels; i++)
371                         for (j = 0; j < NUM_SQ_STATS; j++)
372                                 data[idx++] = MLX5E_READ_CTR64_CPU(&priv->channel[i]->sq[tc].stats,
373                                                                    sq_stats_desc, j);
374 }
375
376 static u32 mlx5e_rx_wqes_to_packets(struct mlx5e_priv *priv, int rq_wq_type,
377                                     int num_wqe)
378 {
379         int packets_per_wqe;
380         int stride_size;
381         int num_strides;
382         int wqe_size;
383
384         if (rq_wq_type != MLX5_WQ_TYPE_LINKED_LIST_STRIDING_RQ)
385                 return num_wqe;
386
387         stride_size = 1 << priv->params.mpwqe_log_stride_sz;
388         num_strides = 1 << priv->params.mpwqe_log_num_strides;
389         wqe_size = stride_size * num_strides;
390
391         packets_per_wqe = wqe_size /
392                           ALIGN(ETH_DATA_LEN, stride_size);
393         return (1 << (order_base_2(num_wqe * packets_per_wqe) - 1));
394 }
395
396 static u32 mlx5e_packets_to_rx_wqes(struct mlx5e_priv *priv, int rq_wq_type,
397                                     int num_packets)
398 {
399         int packets_per_wqe;
400         int stride_size;
401         int num_strides;
402         int wqe_size;
403         int num_wqes;
404
405         if (rq_wq_type != MLX5_WQ_TYPE_LINKED_LIST_STRIDING_RQ)
406                 return num_packets;
407
408         stride_size = 1 << priv->params.mpwqe_log_stride_sz;
409         num_strides = 1 << priv->params.mpwqe_log_num_strides;
410         wqe_size = stride_size * num_strides;
411
412         num_packets = (1 << order_base_2(num_packets));
413
414         packets_per_wqe = wqe_size /
415                           ALIGN(ETH_DATA_LEN, stride_size);
416         num_wqes = DIV_ROUND_UP(num_packets, packets_per_wqe);
417         return 1 << (order_base_2(num_wqes));
418 }
419
420 static void mlx5e_get_ringparam(struct net_device *dev,
421                                 struct ethtool_ringparam *param)
422 {
423         struct mlx5e_priv *priv = netdev_priv(dev);
424         int rq_wq_type = priv->params.rq_wq_type;
425
426         param->rx_max_pending = mlx5e_rx_wqes_to_packets(priv, rq_wq_type,
427                                                          1 << mlx5_max_log_rq_size(rq_wq_type));
428         param->tx_max_pending = 1 << MLX5E_PARAMS_MAXIMUM_LOG_SQ_SIZE;
429         param->rx_pending = mlx5e_rx_wqes_to_packets(priv, rq_wq_type,
430                                                      1 << priv->params.log_rq_size);
431         param->tx_pending     = 1 << priv->params.log_sq_size;
432 }
433
434 static int mlx5e_set_ringparam(struct net_device *dev,
435                                struct ethtool_ringparam *param)
436 {
437         struct mlx5e_priv *priv = netdev_priv(dev);
438         bool was_opened;
439         int rq_wq_type = priv->params.rq_wq_type;
440         u32 rx_pending_wqes;
441         u32 min_rq_size;
442         u32 max_rq_size;
443         u16 min_rx_wqes;
444         u8 log_rq_size;
445         u8 log_sq_size;
446         u32 num_mtts;
447         int err = 0;
448
449         if (param->rx_jumbo_pending) {
450                 netdev_info(dev, "%s: rx_jumbo_pending not supported\n",
451                             __func__);
452                 return -EINVAL;
453         }
454         if (param->rx_mini_pending) {
455                 netdev_info(dev, "%s: rx_mini_pending not supported\n",
456                             __func__);
457                 return -EINVAL;
458         }
459
460         min_rq_size = mlx5e_rx_wqes_to_packets(priv, rq_wq_type,
461                                                1 << mlx5_min_log_rq_size(rq_wq_type));
462         max_rq_size = mlx5e_rx_wqes_to_packets(priv, rq_wq_type,
463                                                1 << mlx5_max_log_rq_size(rq_wq_type));
464         rx_pending_wqes = mlx5e_packets_to_rx_wqes(priv, rq_wq_type,
465                                                    param->rx_pending);
466
467         if (param->rx_pending < min_rq_size) {
468                 netdev_info(dev, "%s: rx_pending (%d) < min (%d)\n",
469                             __func__, param->rx_pending,
470                             min_rq_size);
471                 return -EINVAL;
472         }
473         if (param->rx_pending > max_rq_size) {
474                 netdev_info(dev, "%s: rx_pending (%d) > max (%d)\n",
475                             __func__, param->rx_pending,
476                             max_rq_size);
477                 return -EINVAL;
478         }
479
480         num_mtts = MLX5E_REQUIRED_MTTS(priv->params.num_channels,
481                                        rx_pending_wqes);
482         if (priv->params.rq_wq_type == MLX5_WQ_TYPE_LINKED_LIST_STRIDING_RQ &&
483             !MLX5E_VALID_NUM_MTTS(num_mtts)) {
484                 netdev_info(dev, "%s: rx_pending (%d) request can't be satisfied, try to reduce.\n",
485                             __func__, param->rx_pending);
486                 return -EINVAL;
487         }
488
489         if (param->tx_pending < (1 << MLX5E_PARAMS_MINIMUM_LOG_SQ_SIZE)) {
490                 netdev_info(dev, "%s: tx_pending (%d) < min (%d)\n",
491                             __func__, param->tx_pending,
492                             1 << MLX5E_PARAMS_MINIMUM_LOG_SQ_SIZE);
493                 return -EINVAL;
494         }
495         if (param->tx_pending > (1 << MLX5E_PARAMS_MAXIMUM_LOG_SQ_SIZE)) {
496                 netdev_info(dev, "%s: tx_pending (%d) > max (%d)\n",
497                             __func__, param->tx_pending,
498                             1 << MLX5E_PARAMS_MAXIMUM_LOG_SQ_SIZE);
499                 return -EINVAL;
500         }
501
502         log_rq_size = order_base_2(rx_pending_wqes);
503         log_sq_size = order_base_2(param->tx_pending);
504         min_rx_wqes = mlx5_min_rx_wqes(rq_wq_type, rx_pending_wqes);
505
506         if (log_rq_size == priv->params.log_rq_size &&
507             log_sq_size == priv->params.log_sq_size &&
508             min_rx_wqes == priv->params.min_rx_wqes)
509                 return 0;
510
511         mutex_lock(&priv->state_lock);
512
513         was_opened = test_bit(MLX5E_STATE_OPENED, &priv->state);
514         if (was_opened)
515                 mlx5e_close_locked(dev);
516
517         priv->params.log_rq_size = log_rq_size;
518         priv->params.log_sq_size = log_sq_size;
519         priv->params.min_rx_wqes = min_rx_wqes;
520
521         if (was_opened)
522                 err = mlx5e_open_locked(dev);
523
524         mutex_unlock(&priv->state_lock);
525
526         return err;
527 }
528
529 static void mlx5e_get_channels(struct net_device *dev,
530                                struct ethtool_channels *ch)
531 {
532         struct mlx5e_priv *priv = netdev_priv(dev);
533
534         ch->max_combined   = mlx5e_get_max_num_channels(priv->mdev);
535         ch->combined_count = priv->params.num_channels;
536 }
537
538 static int mlx5e_set_channels(struct net_device *dev,
539                               struct ethtool_channels *ch)
540 {
541         struct mlx5e_priv *priv = netdev_priv(dev);
542         int ncv = mlx5e_get_max_num_channels(priv->mdev);
543         unsigned int count = ch->combined_count;
544         bool arfs_enabled;
545         bool was_opened;
546         u32 num_mtts;
547         int err = 0;
548
549         if (!count) {
550                 netdev_info(dev, "%s: combined_count=0 not supported\n",
551                             __func__);
552                 return -EINVAL;
553         }
554         if (ch->rx_count || ch->tx_count) {
555                 netdev_info(dev, "%s: separate rx/tx count not supported\n",
556                             __func__);
557                 return -EINVAL;
558         }
559         if (count > ncv) {
560                 netdev_info(dev, "%s: count (%d) > max (%d)\n",
561                             __func__, count, ncv);
562                 return -EINVAL;
563         }
564
565         num_mtts = MLX5E_REQUIRED_MTTS(count, BIT(priv->params.log_rq_size));
566         if (priv->params.rq_wq_type == MLX5_WQ_TYPE_LINKED_LIST_STRIDING_RQ &&
567             !MLX5E_VALID_NUM_MTTS(num_mtts)) {
568                 netdev_info(dev, "%s: rx count (%d) request can't be satisfied, try to reduce.\n",
569                             __func__, count);
570                 return -EINVAL;
571         }
572
573         if (priv->params.num_channels == count)
574                 return 0;
575
576         mutex_lock(&priv->state_lock);
577
578         was_opened = test_bit(MLX5E_STATE_OPENED, &priv->state);
579         if (was_opened)
580                 mlx5e_close_locked(dev);
581
582         arfs_enabled = dev->features & NETIF_F_NTUPLE;
583         if (arfs_enabled)
584                 mlx5e_arfs_disable(priv);
585
586         priv->params.num_channels = count;
587         mlx5e_build_default_indir_rqt(priv->mdev, priv->params.indirection_rqt,
588                                       MLX5E_INDIR_RQT_SIZE, count);
589
590         if (was_opened)
591                 err = mlx5e_open_locked(dev);
592         if (err)
593                 goto out;
594
595         if (arfs_enabled) {
596                 err = mlx5e_arfs_enable(priv);
597                 if (err)
598                         netdev_err(dev, "%s: mlx5e_arfs_enable failed: %d\n",
599                                    __func__, err);
600         }
601
602 out:
603         mutex_unlock(&priv->state_lock);
604
605         return err;
606 }
607
608 static int mlx5e_get_coalesce(struct net_device *netdev,
609                               struct ethtool_coalesce *coal)
610 {
611         struct mlx5e_priv *priv = netdev_priv(netdev);
612
613         if (!MLX5_CAP_GEN(priv->mdev, cq_moderation))
614                 return -ENOTSUPP;
615
616         coal->rx_coalesce_usecs       = priv->params.rx_cq_moderation.usec;
617         coal->rx_max_coalesced_frames = priv->params.rx_cq_moderation.pkts;
618         coal->tx_coalesce_usecs       = priv->params.tx_cq_moderation.usec;
619         coal->tx_max_coalesced_frames = priv->params.tx_cq_moderation.pkts;
620         coal->use_adaptive_rx_coalesce = priv->params.rx_am_enabled;
621
622         return 0;
623 }
624
625 static int mlx5e_set_coalesce(struct net_device *netdev,
626                               struct ethtool_coalesce *coal)
627 {
628         struct mlx5e_priv *priv    = netdev_priv(netdev);
629         struct mlx5_core_dev *mdev = priv->mdev;
630         struct mlx5e_channel *c;
631         bool restart =
632                 !!coal->use_adaptive_rx_coalesce != priv->params.rx_am_enabled;
633         bool was_opened;
634         int err = 0;
635         int tc;
636         int i;
637
638         if (!MLX5_CAP_GEN(mdev, cq_moderation))
639                 return -ENOTSUPP;
640
641         mutex_lock(&priv->state_lock);
642
643         was_opened = test_bit(MLX5E_STATE_OPENED, &priv->state);
644         if (was_opened && restart) {
645                 mlx5e_close_locked(netdev);
646                 priv->params.rx_am_enabled = !!coal->use_adaptive_rx_coalesce;
647         }
648
649         priv->params.tx_cq_moderation.usec = coal->tx_coalesce_usecs;
650         priv->params.tx_cq_moderation.pkts = coal->tx_max_coalesced_frames;
651         priv->params.rx_cq_moderation.usec = coal->rx_coalesce_usecs;
652         priv->params.rx_cq_moderation.pkts = coal->rx_max_coalesced_frames;
653
654         if (!was_opened || restart)
655                 goto out;
656
657         for (i = 0; i < priv->params.num_channels; ++i) {
658                 c = priv->channel[i];
659
660                 for (tc = 0; tc < c->num_tc; tc++) {
661                         mlx5_core_modify_cq_moderation(mdev,
662                                                 &c->sq[tc].cq.mcq,
663                                                 coal->tx_coalesce_usecs,
664                                                 coal->tx_max_coalesced_frames);
665                 }
666
667                 mlx5_core_modify_cq_moderation(mdev, &c->rq.cq.mcq,
668                                                coal->rx_coalesce_usecs,
669                                                coal->rx_max_coalesced_frames);
670         }
671
672 out:
673         if (was_opened && restart)
674                 err = mlx5e_open_locked(netdev);
675
676         mutex_unlock(&priv->state_lock);
677         return err;
678 }
679
680 static void ptys2ethtool_supported_link(unsigned long *supported_modes,
681                                         u32 eth_proto_cap)
682 {
683         unsigned long proto_cap = eth_proto_cap;
684         int proto;
685
686         for_each_set_bit(proto, &proto_cap, MLX5E_LINK_MODES_NUMBER)
687                 bitmap_or(supported_modes, supported_modes,
688                           ptys2ethtool_table[proto].supported,
689                           __ETHTOOL_LINK_MODE_MASK_NBITS);
690 }
691
692 static void ptys2ethtool_adver_link(unsigned long *advertising_modes,
693                                     u32 eth_proto_cap)
694 {
695         unsigned long proto_cap = eth_proto_cap;
696         int proto;
697
698         for_each_set_bit(proto, &proto_cap, MLX5E_LINK_MODES_NUMBER)
699                 bitmap_or(advertising_modes, advertising_modes,
700                           ptys2ethtool_table[proto].advertised,
701                           __ETHTOOL_LINK_MODE_MASK_NBITS);
702 }
703
704 static void ptys2ethtool_supported_port(struct ethtool_link_ksettings *link_ksettings,
705                                         u32 eth_proto_cap)
706 {
707         if (eth_proto_cap & (MLX5E_PROT_MASK(MLX5E_10GBASE_CR)
708                            | MLX5E_PROT_MASK(MLX5E_10GBASE_SR)
709                            | MLX5E_PROT_MASK(MLX5E_40GBASE_CR4)
710                            | MLX5E_PROT_MASK(MLX5E_40GBASE_SR4)
711                            | MLX5E_PROT_MASK(MLX5E_100GBASE_SR4)
712                            | MLX5E_PROT_MASK(MLX5E_1000BASE_CX_SGMII))) {
713                 ethtool_link_ksettings_add_link_mode(link_ksettings, supported, FIBRE);
714         }
715
716         if (eth_proto_cap & (MLX5E_PROT_MASK(MLX5E_100GBASE_KR4)
717                            | MLX5E_PROT_MASK(MLX5E_40GBASE_KR4)
718                            | MLX5E_PROT_MASK(MLX5E_10GBASE_KR)
719                            | MLX5E_PROT_MASK(MLX5E_10GBASE_KX4)
720                            | MLX5E_PROT_MASK(MLX5E_1000BASE_KX))) {
721                 ethtool_link_ksettings_add_link_mode(link_ksettings, supported, Backplane);
722         }
723 }
724
725 int mlx5e_get_max_linkspeed(struct mlx5_core_dev *mdev, u32 *speed)
726 {
727         u32 max_speed = 0;
728         u32 proto_cap;
729         int err;
730         int i;
731
732         err = mlx5_query_port_proto_cap(mdev, &proto_cap, MLX5_PTYS_EN);
733         if (err)
734                 return err;
735
736         for (i = 0; i < MLX5E_LINK_MODES_NUMBER; ++i)
737                 if (proto_cap & MLX5E_PROT_MASK(i))
738                         max_speed = max(max_speed, ptys2ethtool_table[i].speed);
739
740         *speed = max_speed;
741         return 0;
742 }
743
744 static void get_speed_duplex(struct net_device *netdev,
745                              u32 eth_proto_oper,
746                              struct ethtool_link_ksettings *link_ksettings)
747 {
748         int i;
749         u32 speed = SPEED_UNKNOWN;
750         u8 duplex = DUPLEX_UNKNOWN;
751
752         if (!netif_carrier_ok(netdev))
753                 goto out;
754
755         for (i = 0; i < MLX5E_LINK_MODES_NUMBER; ++i) {
756                 if (eth_proto_oper & MLX5E_PROT_MASK(i)) {
757                         speed = ptys2ethtool_table[i].speed;
758                         duplex = DUPLEX_FULL;
759                         break;
760                 }
761         }
762 out:
763         link_ksettings->base.speed = speed;
764         link_ksettings->base.duplex = duplex;
765 }
766
767 static void get_supported(u32 eth_proto_cap,
768                           struct ethtool_link_ksettings *link_ksettings)
769 {
770         unsigned long *supported = link_ksettings->link_modes.supported;
771
772         ptys2ethtool_supported_port(link_ksettings, eth_proto_cap);
773         ptys2ethtool_supported_link(supported, eth_proto_cap);
774         ethtool_link_ksettings_add_link_mode(link_ksettings, supported, Pause);
775         ethtool_link_ksettings_add_link_mode(link_ksettings, supported, Asym_Pause);
776 }
777
778 static void get_advertising(u32 eth_proto_cap, u8 tx_pause,
779                             u8 rx_pause,
780                             struct ethtool_link_ksettings *link_ksettings)
781 {
782         unsigned long *advertising = link_ksettings->link_modes.advertising;
783
784         ptys2ethtool_adver_link(advertising, eth_proto_cap);
785         if (tx_pause)
786                 ethtool_link_ksettings_add_link_mode(link_ksettings, advertising, Pause);
787         if (tx_pause ^ rx_pause)
788                 ethtool_link_ksettings_add_link_mode(link_ksettings, advertising, Asym_Pause);
789 }
790
791 static u8 get_connector_port(u32 eth_proto)
792 {
793         if (eth_proto & (MLX5E_PROT_MASK(MLX5E_10GBASE_SR)
794                          | MLX5E_PROT_MASK(MLX5E_40GBASE_SR4)
795                          | MLX5E_PROT_MASK(MLX5E_100GBASE_SR4)
796                          | MLX5E_PROT_MASK(MLX5E_1000BASE_CX_SGMII))) {
797                         return PORT_FIBRE;
798         }
799
800         if (eth_proto & (MLX5E_PROT_MASK(MLX5E_40GBASE_CR4)
801                          | MLX5E_PROT_MASK(MLX5E_10GBASE_CR)
802                          | MLX5E_PROT_MASK(MLX5E_100GBASE_CR4))) {
803                         return PORT_DA;
804         }
805
806         if (eth_proto & (MLX5E_PROT_MASK(MLX5E_10GBASE_KX4)
807                          | MLX5E_PROT_MASK(MLX5E_10GBASE_KR)
808                          | MLX5E_PROT_MASK(MLX5E_40GBASE_KR4)
809                          | MLX5E_PROT_MASK(MLX5E_100GBASE_KR4))) {
810                         return PORT_NONE;
811         }
812
813         return PORT_OTHER;
814 }
815
816 static void get_lp_advertising(u32 eth_proto_lp,
817                                struct ethtool_link_ksettings *link_ksettings)
818 {
819         unsigned long *lp_advertising = link_ksettings->link_modes.lp_advertising;
820
821         ptys2ethtool_adver_link(lp_advertising, eth_proto_lp);
822 }
823
824 static int mlx5e_get_link_ksettings(struct net_device *netdev,
825                                     struct ethtool_link_ksettings *link_ksettings)
826 {
827         struct mlx5e_priv *priv    = netdev_priv(netdev);
828         struct mlx5_core_dev *mdev = priv->mdev;
829         u32 out[MLX5_ST_SZ_DW(ptys_reg)] = {0};
830         u32 eth_proto_cap;
831         u32 eth_proto_admin;
832         u32 eth_proto_lp;
833         u32 eth_proto_oper;
834         u8 an_disable_admin;
835         u8 an_status;
836         int err;
837
838         err = mlx5_query_port_ptys(mdev, out, sizeof(out), MLX5_PTYS_EN, 1);
839         if (err) {
840                 netdev_err(netdev, "%s: query port ptys failed: %d\n",
841                            __func__, err);
842                 goto err_query_ptys;
843         }
844
845         eth_proto_cap    = MLX5_GET(ptys_reg, out, eth_proto_capability);
846         eth_proto_admin  = MLX5_GET(ptys_reg, out, eth_proto_admin);
847         eth_proto_oper   = MLX5_GET(ptys_reg, out, eth_proto_oper);
848         eth_proto_lp     = MLX5_GET(ptys_reg, out, eth_proto_lp_advertise);
849         an_disable_admin = MLX5_GET(ptys_reg, out, an_disable_admin);
850         an_status        = MLX5_GET(ptys_reg, out, an_status);
851
852         ethtool_link_ksettings_zero_link_mode(link_ksettings, supported);
853         ethtool_link_ksettings_zero_link_mode(link_ksettings, advertising);
854
855         get_supported(eth_proto_cap, link_ksettings);
856         get_advertising(eth_proto_admin, 0, 0, link_ksettings);
857         get_speed_duplex(netdev, eth_proto_oper, link_ksettings);
858
859         eth_proto_oper = eth_proto_oper ? eth_proto_oper : eth_proto_cap;
860
861         link_ksettings->base.port = get_connector_port(eth_proto_oper);
862         get_lp_advertising(eth_proto_lp, link_ksettings);
863
864         if (an_status == MLX5_AN_COMPLETE)
865                 ethtool_link_ksettings_add_link_mode(link_ksettings,
866                                                      lp_advertising, Autoneg);
867
868         link_ksettings->base.autoneg = an_disable_admin ? AUTONEG_DISABLE :
869                                                           AUTONEG_ENABLE;
870         ethtool_link_ksettings_add_link_mode(link_ksettings, supported,
871                                              Autoneg);
872         if (!an_disable_admin)
873                 ethtool_link_ksettings_add_link_mode(link_ksettings,
874                                                      advertising, Autoneg);
875
876 err_query_ptys:
877         return err;
878 }
879
880 static u32 mlx5e_ethtool2ptys_adver_link(const unsigned long *link_modes)
881 {
882         u32 i, ptys_modes = 0;
883
884         for (i = 0; i < MLX5E_LINK_MODES_NUMBER; ++i) {
885                 if (bitmap_intersects(ptys2ethtool_table[i].advertised,
886                                       link_modes,
887                                       __ETHTOOL_LINK_MODE_MASK_NBITS))
888                         ptys_modes |= MLX5E_PROT_MASK(i);
889         }
890
891         return ptys_modes;
892 }
893
894 static u32 mlx5e_ethtool2ptys_speed_link(u32 speed)
895 {
896         u32 i, speed_links = 0;
897
898         for (i = 0; i < MLX5E_LINK_MODES_NUMBER; ++i) {
899                 if (ptys2ethtool_table[i].speed == speed)
900                         speed_links |= MLX5E_PROT_MASK(i);
901         }
902
903         return speed_links;
904 }
905
906 static int mlx5e_set_link_ksettings(struct net_device *netdev,
907                                     const struct ethtool_link_ksettings *link_ksettings)
908 {
909         struct mlx5e_priv *priv    = netdev_priv(netdev);
910         struct mlx5_core_dev *mdev = priv->mdev;
911         u32 eth_proto_cap, eth_proto_admin;
912         bool an_changes = false;
913         u8 an_disable_admin;
914         u8 an_disable_cap;
915         bool an_disable;
916         u32 link_modes;
917         u8 an_status;
918         u32 speed;
919         int err;
920
921         speed = link_ksettings->base.speed;
922
923         link_modes = link_ksettings->base.autoneg == AUTONEG_ENABLE ?
924                 mlx5e_ethtool2ptys_adver_link(link_ksettings->link_modes.advertising) :
925                 mlx5e_ethtool2ptys_speed_link(speed);
926
927         err = mlx5_query_port_proto_cap(mdev, &eth_proto_cap, MLX5_PTYS_EN);
928         if (err) {
929                 netdev_err(netdev, "%s: query port eth proto cap failed: %d\n",
930                            __func__, err);
931                 goto out;
932         }
933
934         link_modes = link_modes & eth_proto_cap;
935         if (!link_modes) {
936                 netdev_err(netdev, "%s: Not supported link mode(s) requested",
937                            __func__);
938                 err = -EINVAL;
939                 goto out;
940         }
941
942         err = mlx5_query_port_proto_admin(mdev, &eth_proto_admin, MLX5_PTYS_EN);
943         if (err) {
944                 netdev_err(netdev, "%s: query port eth proto admin failed: %d\n",
945                            __func__, err);
946                 goto out;
947         }
948
949         mlx5_query_port_autoneg(mdev, MLX5_PTYS_EN, &an_status,
950                                 &an_disable_cap, &an_disable_admin);
951
952         an_disable = link_ksettings->base.autoneg == AUTONEG_DISABLE;
953         an_changes = ((!an_disable && an_disable_admin) ||
954                       (an_disable && !an_disable_admin));
955
956         if (!an_changes && link_modes == eth_proto_admin)
957                 goto out;
958
959         mlx5_set_port_ptys(mdev, an_disable, link_modes, MLX5_PTYS_EN);
960         mlx5_toggle_port_link(mdev);
961
962 out:
963         return err;
964 }
965
966 static u32 mlx5e_get_rxfh_key_size(struct net_device *netdev)
967 {
968         struct mlx5e_priv *priv = netdev_priv(netdev);
969
970         return sizeof(priv->params.toeplitz_hash_key);
971 }
972
973 static u32 mlx5e_get_rxfh_indir_size(struct net_device *netdev)
974 {
975         return MLX5E_INDIR_RQT_SIZE;
976 }
977
978 static int mlx5e_get_rxfh(struct net_device *netdev, u32 *indir, u8 *key,
979                           u8 *hfunc)
980 {
981         struct mlx5e_priv *priv = netdev_priv(netdev);
982
983         if (indir)
984                 memcpy(indir, priv->params.indirection_rqt,
985                        sizeof(priv->params.indirection_rqt));
986
987         if (key)
988                 memcpy(key, priv->params.toeplitz_hash_key,
989                        sizeof(priv->params.toeplitz_hash_key));
990
991         if (hfunc)
992                 *hfunc = priv->params.rss_hfunc;
993
994         return 0;
995 }
996
997 static void mlx5e_modify_tirs_hash(struct mlx5e_priv *priv, void *in, int inlen)
998 {
999         struct mlx5_core_dev *mdev = priv->mdev;
1000         void *tirc = MLX5_ADDR_OF(modify_tir_in, in, ctx);
1001         int i;
1002
1003         MLX5_SET(modify_tir_in, in, bitmask.hash, 1);
1004         mlx5e_build_tir_ctx_hash(tirc, priv);
1005
1006         for (i = 0; i < MLX5E_NUM_INDIR_TIRS; i++)
1007                 mlx5_core_modify_tir(mdev, priv->indir_tir[i].tirn, in, inlen);
1008 }
1009
1010 static int mlx5e_set_rxfh(struct net_device *dev, const u32 *indir,
1011                           const u8 *key, const u8 hfunc)
1012 {
1013         struct mlx5e_priv *priv = netdev_priv(dev);
1014         int inlen = MLX5_ST_SZ_BYTES(modify_tir_in);
1015         void *in;
1016
1017         if ((hfunc != ETH_RSS_HASH_NO_CHANGE) &&
1018             (hfunc != ETH_RSS_HASH_XOR) &&
1019             (hfunc != ETH_RSS_HASH_TOP))
1020                 return -EINVAL;
1021
1022         in = mlx5_vzalloc(inlen);
1023         if (!in)
1024                 return -ENOMEM;
1025
1026         mutex_lock(&priv->state_lock);
1027
1028         if (indir) {
1029                 u32 rqtn = priv->indir_rqt.rqtn;
1030
1031                 memcpy(priv->params.indirection_rqt, indir,
1032                        sizeof(priv->params.indirection_rqt));
1033                 mlx5e_redirect_rqt(priv, rqtn, MLX5E_INDIR_RQT_SIZE, 0);
1034         }
1035
1036         if (key)
1037                 memcpy(priv->params.toeplitz_hash_key, key,
1038                        sizeof(priv->params.toeplitz_hash_key));
1039
1040         if (hfunc != ETH_RSS_HASH_NO_CHANGE)
1041                 priv->params.rss_hfunc = hfunc;
1042
1043         mlx5e_modify_tirs_hash(priv, in, inlen);
1044
1045         mutex_unlock(&priv->state_lock);
1046
1047         kvfree(in);
1048
1049         return 0;
1050 }
1051
1052 static int mlx5e_get_rxnfc(struct net_device *netdev,
1053                            struct ethtool_rxnfc *info, u32 *rule_locs)
1054 {
1055         struct mlx5e_priv *priv = netdev_priv(netdev);
1056         int err = 0;
1057
1058         switch (info->cmd) {
1059         case ETHTOOL_GRXRINGS:
1060                 info->data = priv->params.num_channels;
1061                 break;
1062         case ETHTOOL_GRXCLSRLCNT:
1063                 info->rule_cnt = priv->fs.ethtool.tot_num_rules;
1064                 break;
1065         case ETHTOOL_GRXCLSRULE:
1066                 err = mlx5e_ethtool_get_flow(priv, info, info->fs.location);
1067                 break;
1068         case ETHTOOL_GRXCLSRLALL:
1069                 err = mlx5e_ethtool_get_all_flows(priv, info, rule_locs);
1070                 break;
1071         default:
1072                 err = -EOPNOTSUPP;
1073                 break;
1074         }
1075
1076         return err;
1077 }
1078
1079 static int mlx5e_get_tunable(struct net_device *dev,
1080                              const struct ethtool_tunable *tuna,
1081                              void *data)
1082 {
1083         const struct mlx5e_priv *priv = netdev_priv(dev);
1084         int err = 0;
1085
1086         switch (tuna->id) {
1087         case ETHTOOL_TX_COPYBREAK:
1088                 *(u32 *)data = priv->params.tx_max_inline;
1089                 break;
1090         default:
1091                 err = -EINVAL;
1092                 break;
1093         }
1094
1095         return err;
1096 }
1097
1098 static int mlx5e_set_tunable(struct net_device *dev,
1099                              const struct ethtool_tunable *tuna,
1100                              const void *data)
1101 {
1102         struct mlx5e_priv *priv = netdev_priv(dev);
1103         struct mlx5_core_dev *mdev = priv->mdev;
1104         bool was_opened;
1105         u32 val;
1106         int err = 0;
1107
1108         switch (tuna->id) {
1109         case ETHTOOL_TX_COPYBREAK:
1110                 val = *(u32 *)data;
1111                 if (val > mlx5e_get_max_inline_cap(mdev)) {
1112                         err = -EINVAL;
1113                         break;
1114                 }
1115
1116                 mutex_lock(&priv->state_lock);
1117
1118                 was_opened = test_bit(MLX5E_STATE_OPENED, &priv->state);
1119                 if (was_opened)
1120                         mlx5e_close_locked(dev);
1121
1122                 priv->params.tx_max_inline = val;
1123
1124                 if (was_opened)
1125                         err = mlx5e_open_locked(dev);
1126
1127                 mutex_unlock(&priv->state_lock);
1128                 break;
1129         default:
1130                 err = -EINVAL;
1131                 break;
1132         }
1133
1134         return err;
1135 }
1136
1137 static void mlx5e_get_pauseparam(struct net_device *netdev,
1138                                  struct ethtool_pauseparam *pauseparam)
1139 {
1140         struct mlx5e_priv *priv    = netdev_priv(netdev);
1141         struct mlx5_core_dev *mdev = priv->mdev;
1142         int err;
1143
1144         err = mlx5_query_port_pause(mdev, &pauseparam->rx_pause,
1145                                     &pauseparam->tx_pause);
1146         if (err) {
1147                 netdev_err(netdev, "%s: mlx5_query_port_pause failed:0x%x\n",
1148                            __func__, err);
1149         }
1150 }
1151
1152 static int mlx5e_set_pauseparam(struct net_device *netdev,
1153                                 struct ethtool_pauseparam *pauseparam)
1154 {
1155         struct mlx5e_priv *priv    = netdev_priv(netdev);
1156         struct mlx5_core_dev *mdev = priv->mdev;
1157         int err;
1158
1159         if (pauseparam->autoneg)
1160                 return -EINVAL;
1161
1162         err = mlx5_set_port_pause(mdev,
1163                                   pauseparam->rx_pause ? 1 : 0,
1164                                   pauseparam->tx_pause ? 1 : 0);
1165         if (err) {
1166                 netdev_err(netdev, "%s: mlx5_set_port_pause failed:0x%x\n",
1167                            __func__, err);
1168         }
1169
1170         return err;
1171 }
1172
1173 static int mlx5e_get_ts_info(struct net_device *dev,
1174                              struct ethtool_ts_info *info)
1175 {
1176         struct mlx5e_priv *priv = netdev_priv(dev);
1177         int ret;
1178
1179         ret = ethtool_op_get_ts_info(dev, info);
1180         if (ret)
1181                 return ret;
1182
1183         info->phc_index = priv->tstamp.ptp ?
1184                           ptp_clock_index(priv->tstamp.ptp) : -1;
1185
1186         if (!MLX5_CAP_GEN(priv->mdev, device_frequency_khz))
1187                 return 0;
1188
1189         info->so_timestamping |= SOF_TIMESTAMPING_TX_HARDWARE |
1190                                  SOF_TIMESTAMPING_RX_HARDWARE |
1191                                  SOF_TIMESTAMPING_RAW_HARDWARE;
1192
1193         info->tx_types = (BIT(1) << HWTSTAMP_TX_OFF) |
1194                          (BIT(1) << HWTSTAMP_TX_ON);
1195
1196         info->rx_filters = (BIT(1) << HWTSTAMP_FILTER_NONE) |
1197                            (BIT(1) << HWTSTAMP_FILTER_ALL);
1198
1199         return 0;
1200 }
1201
1202 static __u32 mlx5e_get_wol_supported(struct mlx5_core_dev *mdev)
1203 {
1204         __u32 ret = 0;
1205
1206         if (MLX5_CAP_GEN(mdev, wol_g))
1207                 ret |= WAKE_MAGIC;
1208
1209         if (MLX5_CAP_GEN(mdev, wol_s))
1210                 ret |= WAKE_MAGICSECURE;
1211
1212         if (MLX5_CAP_GEN(mdev, wol_a))
1213                 ret |= WAKE_ARP;
1214
1215         if (MLX5_CAP_GEN(mdev, wol_b))
1216                 ret |= WAKE_BCAST;
1217
1218         if (MLX5_CAP_GEN(mdev, wol_m))
1219                 ret |= WAKE_MCAST;
1220
1221         if (MLX5_CAP_GEN(mdev, wol_u))
1222                 ret |= WAKE_UCAST;
1223
1224         if (MLX5_CAP_GEN(mdev, wol_p))
1225                 ret |= WAKE_PHY;
1226
1227         return ret;
1228 }
1229
1230 static __u32 mlx5e_refomrat_wol_mode_mlx5_to_linux(u8 mode)
1231 {
1232         __u32 ret = 0;
1233
1234         if (mode & MLX5_WOL_MAGIC)
1235                 ret |= WAKE_MAGIC;
1236
1237         if (mode & MLX5_WOL_SECURED_MAGIC)
1238                 ret |= WAKE_MAGICSECURE;
1239
1240         if (mode & MLX5_WOL_ARP)
1241                 ret |= WAKE_ARP;
1242
1243         if (mode & MLX5_WOL_BROADCAST)
1244                 ret |= WAKE_BCAST;
1245
1246         if (mode & MLX5_WOL_MULTICAST)
1247                 ret |= WAKE_MCAST;
1248
1249         if (mode & MLX5_WOL_UNICAST)
1250                 ret |= WAKE_UCAST;
1251
1252         if (mode & MLX5_WOL_PHY_ACTIVITY)
1253                 ret |= WAKE_PHY;
1254
1255         return ret;
1256 }
1257
1258 static u8 mlx5e_refomrat_wol_mode_linux_to_mlx5(__u32 mode)
1259 {
1260         u8 ret = 0;
1261
1262         if (mode & WAKE_MAGIC)
1263                 ret |= MLX5_WOL_MAGIC;
1264
1265         if (mode & WAKE_MAGICSECURE)
1266                 ret |= MLX5_WOL_SECURED_MAGIC;
1267
1268         if (mode & WAKE_ARP)
1269                 ret |= MLX5_WOL_ARP;
1270
1271         if (mode & WAKE_BCAST)
1272                 ret |= MLX5_WOL_BROADCAST;
1273
1274         if (mode & WAKE_MCAST)
1275                 ret |= MLX5_WOL_MULTICAST;
1276
1277         if (mode & WAKE_UCAST)
1278                 ret |= MLX5_WOL_UNICAST;
1279
1280         if (mode & WAKE_PHY)
1281                 ret |= MLX5_WOL_PHY_ACTIVITY;
1282
1283         return ret;
1284 }
1285
1286 static void mlx5e_get_wol(struct net_device *netdev,
1287                           struct ethtool_wolinfo *wol)
1288 {
1289         struct mlx5e_priv *priv = netdev_priv(netdev);
1290         struct mlx5_core_dev *mdev = priv->mdev;
1291         u8 mlx5_wol_mode;
1292         int err;
1293
1294         memset(wol, 0, sizeof(*wol));
1295
1296         wol->supported = mlx5e_get_wol_supported(mdev);
1297         if (!wol->supported)
1298                 return;
1299
1300         err = mlx5_query_port_wol(mdev, &mlx5_wol_mode);
1301         if (err)
1302                 return;
1303
1304         wol->wolopts = mlx5e_refomrat_wol_mode_mlx5_to_linux(mlx5_wol_mode);
1305 }
1306
1307 static int mlx5e_set_wol(struct net_device *netdev, struct ethtool_wolinfo *wol)
1308 {
1309         struct mlx5e_priv *priv = netdev_priv(netdev);
1310         struct mlx5_core_dev *mdev = priv->mdev;
1311         __u32 wol_supported = mlx5e_get_wol_supported(mdev);
1312         u32 mlx5_wol_mode;
1313
1314         if (!wol_supported)
1315                 return -ENOTSUPP;
1316
1317         if (wol->wolopts & ~wol_supported)
1318                 return -EINVAL;
1319
1320         mlx5_wol_mode = mlx5e_refomrat_wol_mode_linux_to_mlx5(wol->wolopts);
1321
1322         return mlx5_set_port_wol(mdev, mlx5_wol_mode);
1323 }
1324
1325 static int mlx5e_set_phys_id(struct net_device *dev,
1326                              enum ethtool_phys_id_state state)
1327 {
1328         struct mlx5e_priv *priv = netdev_priv(dev);
1329         struct mlx5_core_dev *mdev = priv->mdev;
1330         u16 beacon_duration;
1331
1332         if (!MLX5_CAP_GEN(mdev, beacon_led))
1333                 return -EOPNOTSUPP;
1334
1335         switch (state) {
1336         case ETHTOOL_ID_ACTIVE:
1337                 beacon_duration = MLX5_BEACON_DURATION_INF;
1338                 break;
1339         case ETHTOOL_ID_INACTIVE:
1340                 beacon_duration = MLX5_BEACON_DURATION_OFF;
1341                 break;
1342         default:
1343                 return -EOPNOTSUPP;
1344         }
1345
1346         return mlx5_set_port_beacon(mdev, beacon_duration);
1347 }
1348
1349 static int mlx5e_get_module_info(struct net_device *netdev,
1350                                  struct ethtool_modinfo *modinfo)
1351 {
1352         struct mlx5e_priv *priv = netdev_priv(netdev);
1353         struct mlx5_core_dev *dev = priv->mdev;
1354         int size_read = 0;
1355         u8 data[4];
1356
1357         size_read = mlx5_query_module_eeprom(dev, 0, 2, data);
1358         if (size_read < 2)
1359                 return -EIO;
1360
1361         /* data[0] = identifier byte */
1362         switch (data[0]) {
1363         case MLX5_MODULE_ID_QSFP:
1364                 modinfo->type       = ETH_MODULE_SFF_8436;
1365                 modinfo->eeprom_len = ETH_MODULE_SFF_8436_LEN;
1366                 break;
1367         case MLX5_MODULE_ID_QSFP_PLUS:
1368         case MLX5_MODULE_ID_QSFP28:
1369                 /* data[1] = revision id */
1370                 if (data[0] == MLX5_MODULE_ID_QSFP28 || data[1] >= 0x3) {
1371                         modinfo->type       = ETH_MODULE_SFF_8636;
1372                         modinfo->eeprom_len = ETH_MODULE_SFF_8636_LEN;
1373                 } else {
1374                         modinfo->type       = ETH_MODULE_SFF_8436;
1375                         modinfo->eeprom_len = ETH_MODULE_SFF_8436_LEN;
1376                 }
1377                 break;
1378         case MLX5_MODULE_ID_SFP:
1379                 modinfo->type       = ETH_MODULE_SFF_8472;
1380                 modinfo->eeprom_len = ETH_MODULE_SFF_8472_LEN;
1381                 break;
1382         default:
1383                 netdev_err(priv->netdev, "%s: cable type not recognized:0x%x\n",
1384                            __func__, data[0]);
1385                 return -EINVAL;
1386         }
1387
1388         return 0;
1389 }
1390
1391 static int mlx5e_get_module_eeprom(struct net_device *netdev,
1392                                    struct ethtool_eeprom *ee,
1393                                    u8 *data)
1394 {
1395         struct mlx5e_priv *priv = netdev_priv(netdev);
1396         struct mlx5_core_dev *mdev = priv->mdev;
1397         int offset = ee->offset;
1398         int size_read;
1399         int i = 0;
1400
1401         if (!ee->len)
1402                 return -EINVAL;
1403
1404         memset(data, 0, ee->len);
1405
1406         while (i < ee->len) {
1407                 size_read = mlx5_query_module_eeprom(mdev, offset, ee->len - i,
1408                                                      data + i);
1409
1410                 if (!size_read)
1411                         /* Done reading */
1412                         return 0;
1413
1414                 if (size_read < 0) {
1415                         netdev_err(priv->netdev, "%s: mlx5_query_eeprom failed:0x%x\n",
1416                                    __func__, size_read);
1417                         return 0;
1418                 }
1419
1420                 i += size_read;
1421                 offset += size_read;
1422         }
1423
1424         return 0;
1425 }
1426
1427 typedef int (*mlx5e_pflag_handler)(struct net_device *netdev, bool enable);
1428
1429 static int set_pflag_rx_cqe_based_moder(struct net_device *netdev, bool enable)
1430 {
1431         struct mlx5e_priv *priv = netdev_priv(netdev);
1432         struct mlx5_core_dev *mdev = priv->mdev;
1433         bool rx_mode_changed;
1434         u8 rx_cq_period_mode;
1435         int err = 0;
1436         bool reset;
1437
1438         rx_cq_period_mode = enable ?
1439                 MLX5_CQ_PERIOD_MODE_START_FROM_CQE :
1440                 MLX5_CQ_PERIOD_MODE_START_FROM_EQE;
1441         rx_mode_changed = rx_cq_period_mode != priv->params.rx_cq_period_mode;
1442
1443         if (rx_cq_period_mode == MLX5_CQ_PERIOD_MODE_START_FROM_CQE &&
1444             !MLX5_CAP_GEN(mdev, cq_period_start_from_cqe))
1445                 return -ENOTSUPP;
1446
1447         if (!rx_mode_changed)
1448                 return 0;
1449
1450         reset = test_bit(MLX5E_STATE_OPENED, &priv->state);
1451         if (reset)
1452                 mlx5e_close_locked(netdev);
1453
1454         mlx5e_set_rx_cq_mode_params(&priv->params, rx_cq_period_mode);
1455
1456         if (reset)
1457                 err = mlx5e_open_locked(netdev);
1458
1459         return err;
1460 }
1461
1462 static int mlx5e_handle_pflag(struct net_device *netdev,
1463                               u32 wanted_flags,
1464                               enum mlx5e_priv_flag flag,
1465                               mlx5e_pflag_handler pflag_handler)
1466 {
1467         struct mlx5e_priv *priv = netdev_priv(netdev);
1468         bool enable = !!(wanted_flags & flag);
1469         u32 changes = wanted_flags ^ priv->pflags;
1470         int err;
1471
1472         if (!(changes & flag))
1473                 return 0;
1474
1475         err = pflag_handler(netdev, enable);
1476         if (err) {
1477                 netdev_err(netdev, "%s private flag 0x%x failed err %d\n",
1478                            enable ? "Enable" : "Disable", flag, err);
1479                 return err;
1480         }
1481
1482         MLX5E_SET_PRIV_FLAG(priv, flag, enable);
1483         return 0;
1484 }
1485
1486 static int mlx5e_set_priv_flags(struct net_device *netdev, u32 pflags)
1487 {
1488         struct mlx5e_priv *priv = netdev_priv(netdev);
1489         int err;
1490
1491         mutex_lock(&priv->state_lock);
1492
1493         err = mlx5e_handle_pflag(netdev, pflags,
1494                                  MLX5E_PFLAG_RX_CQE_BASED_MODER,
1495                                  set_pflag_rx_cqe_based_moder);
1496
1497         mutex_unlock(&priv->state_lock);
1498         return err ? -EINVAL : 0;
1499 }
1500
1501 static u32 mlx5e_get_priv_flags(struct net_device *netdev)
1502 {
1503         struct mlx5e_priv *priv = netdev_priv(netdev);
1504
1505         return priv->pflags;
1506 }
1507
1508 static int mlx5e_set_rxnfc(struct net_device *dev, struct ethtool_rxnfc *cmd)
1509 {
1510         int err = 0;
1511         struct mlx5e_priv *priv = netdev_priv(dev);
1512
1513         switch (cmd->cmd) {
1514         case ETHTOOL_SRXCLSRLINS:
1515                 err = mlx5e_ethtool_flow_replace(priv, &cmd->fs);
1516                 break;
1517         case ETHTOOL_SRXCLSRLDEL:
1518                 err = mlx5e_ethtool_flow_remove(priv, cmd->fs.location);
1519                 break;
1520         default:
1521                 err = -EOPNOTSUPP;
1522                 break;
1523         }
1524
1525         return err;
1526 }
1527
1528 const struct ethtool_ops mlx5e_ethtool_ops = {
1529         .get_drvinfo       = mlx5e_get_drvinfo,
1530         .get_link          = ethtool_op_get_link,
1531         .get_strings       = mlx5e_get_strings,
1532         .get_sset_count    = mlx5e_get_sset_count,
1533         .get_ethtool_stats = mlx5e_get_ethtool_stats,
1534         .get_ringparam     = mlx5e_get_ringparam,
1535         .set_ringparam     = mlx5e_set_ringparam,
1536         .get_channels      = mlx5e_get_channels,
1537         .set_channels      = mlx5e_set_channels,
1538         .get_coalesce      = mlx5e_get_coalesce,
1539         .set_coalesce      = mlx5e_set_coalesce,
1540         .get_link_ksettings  = mlx5e_get_link_ksettings,
1541         .set_link_ksettings  = mlx5e_set_link_ksettings,
1542         .get_rxfh_key_size   = mlx5e_get_rxfh_key_size,
1543         .get_rxfh_indir_size = mlx5e_get_rxfh_indir_size,
1544         .get_rxfh          = mlx5e_get_rxfh,
1545         .set_rxfh          = mlx5e_set_rxfh,
1546         .get_rxnfc         = mlx5e_get_rxnfc,
1547         .set_rxnfc         = mlx5e_set_rxnfc,
1548         .get_tunable       = mlx5e_get_tunable,
1549         .set_tunable       = mlx5e_set_tunable,
1550         .get_pauseparam    = mlx5e_get_pauseparam,
1551         .set_pauseparam    = mlx5e_set_pauseparam,
1552         .get_ts_info       = mlx5e_get_ts_info,
1553         .set_phys_id       = mlx5e_set_phys_id,
1554         .get_wol           = mlx5e_get_wol,
1555         .set_wol           = mlx5e_set_wol,
1556         .get_module_info   = mlx5e_get_module_info,
1557         .get_module_eeprom = mlx5e_get_module_eeprom,
1558         .get_priv_flags    = mlx5e_get_priv_flags,
1559         .set_priv_flags    = mlx5e_set_priv_flags
1560 };