ahci: imx: PLL clock needs 100us to settle down
authorShawn Guo <shawn.guo@freescale.com>
Sat, 17 May 2014 12:46:01 +0000 (20:46 +0800)
committerTejun Heo <tj@kernel.org>
Mon, 19 May 2014 20:06:50 +0000 (16:06 -0400)
commit3685f2516116c5f3b9d498d531955ad70216ad84
tree022e032cea06b2052608b59a6cab36692a48f2d1
parent2af89a3cde1beb88a2c65e0558d828c1a9e4677f
ahci: imx: PLL clock needs 100us to settle down

The commit e783c51 (ahci: imx: software workaround for phy reset issue
in resume) calls imx_sata_phy_reset() to reset phy immediately after
SATA MPLL is enabled.  It seems working fine mostly, but fails in some
case as below.

...
ahci-imx 2200000.sata: failed to reset phy: -110
ahci-imx: probe of 2200000.sata failed with error -110

After talking to the designer, we learnt that when enabling i.MX6Q SATA
MPLL, we need to wait 100us for it to settle down for safety.  Add this
required delay to fix above failure.

Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
Tested-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Tejun Heo <tj@kernel.org>
drivers/ata/ahci_imx.c