arm64: Disable TTBR0_EL1 during normal kernel execution
authorCatalin Marinas <catalin.marinas@arm.com>
Fri, 2 Sep 2016 13:54:03 +0000 (14:54 +0100)
committerCatalin Marinas <catalin.marinas@arm.com>
Mon, 21 Nov 2016 18:48:54 +0000 (18:48 +0000)
commit39bc88e5e38e9b213bd7d833ce0df6ec029761ad
tree767472a4cbe749b81e76d692402dc756b4e2f54d
parent4b65a5db362783ab4b04ca1c1d2ad70ed9b0ba2a
arm64: Disable TTBR0_EL1 during normal kernel execution

When the TTBR0 PAN feature is enabled, the kernel entry points need to
disable access to TTBR0_EL1. The PAN status of the interrupted context
is stored as part of the saved pstate, reusing the PSR_PAN_BIT (22).
Restoring access to TTBR0_EL1 is done on exception return if returning
to user or returning to a context where PAN was disabled.

Context switching via switch_mm() must defer the update of TTBR0_EL1
until a return to user or an explicit uaccess_enable() call.

Special care needs to be taken for two cases where TTBR0_EL1 is set
outside the normal kernel context switch operation: EFI run-time
services (via efi_set_pgd) and CPU suspend (via cpu_(un)install_idmap).
Code has been added to avoid deferred TTBR0_EL1 switching as in
switch_mm() and restore the reserved TTBR0_EL1 when uninstalling the
special TTBR0_EL1.

User cache maintenance (user_cache_maint_handler and
__flush_cache_user_range) needs the TTBR0_EL1 re-instated since the
operations are performed by user virtual address.

This patch also removes a stale comment on the switch_mm() function.

Cc: Will Deacon <will.deacon@arm.com>
Cc: James Morse <james.morse@arm.com>
Cc: Kees Cook <keescook@chromium.org>
Cc: Mark Rutland <mark.rutland@arm.com>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
arch/arm64/include/asm/efi.h
arch/arm64/include/asm/mmu_context.h
arch/arm64/kernel/entry.S
arch/arm64/kernel/setup.c
arch/arm64/kernel/traps.c
arch/arm64/mm/cache.S
arch/arm64/mm/context.c